Some DT properties where used directly in the code w/o being put in
instatiable device structs (cfg, data).
Move them in these structs and access it from there.
Change definition of STM32_XSPI_RESET_GPIO to DT_ANY_INST
While I'm at it, simplify use of DT macros, replace
DT_NODE_HAS_PROP(DT_INST(0, st_stm32_ospi_nor), foo)
by DT_INST_NODE_HAS_PROP(0, foo).
Remove DT_XSPI_IO_PORT_PROP_OR, which is unused.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
While there was a small related piece of code in the driver,
it is not handled in the code.
Remove the related code and make clear in the binding that this property
is not supported.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Use DT_GPARENT() so that protection entries are generated for
partitions under the fixed-partitions node, even when an extra
intermediate node is present. This ensures the C40 protection table
is correctly derived from the flash<x> partitions.
Signed-off-by: Petr Buchta <petr.buchta@nxp.com>
Handle the case where the chosen zephyr,flash-controller device has
no flash API (api == NULL). This prevents flash_shell from
dereferencing a NULL api pointer and hard-faulting when no usable
default flash device is available.
Signed-off-by: Petr Buchta <petr.buchta@nxp.com>
Initial generic driver for SPI-NAND devices that expose the ONFI
parameter page. Does not support advanced features such as continuous
reads, software ECC, or optional power down modes.
Configuration comes from devicetree in order to support other modules,
but is validated against the loaded ONFI data at boot.
Signed-off-by: Jordan Yates <jordan@embeint.com>
- Implement flash read, write and erase APIs.
- flash rows are automatically erased during Cy_Flash_WriteRow()
operation.
- Implement erase by writing the erased value (0xFF) to maintain
compatibility with the Zephyr flash API.i
Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
- Introduce FLASH_INFINEON_PSOC4 to enable the flash driver for the
Infineon PSoC4 family.
- This option selects required flash capabilities.
Signed-off-by: Manojkumar Konisetty <manoj@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
If the clock device (i.e., RCC) failed to initialize, we have bigger
problems than trying to call clock_control_{off,on,configure} on it.
Don't bother checking to save some footprint.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
Rework flash simulator to use per-instance configuration,
replacing single global state and enabling support for
multiple independent simulator instances.
Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
Implement readout protection for the STM32U5 / STM32L5 series.
Move the stm32u5 / stm32l5 flash register manipulation in
flash_stm32_option_bytes_write() to be called by the
flash_stm32_set_rdp_level().
Signed-off-by: Johannes Schuler <jschuler@testo.de>
Add a helper function to check the lock status of the QSPI-FIU
bus controller mutex. This is useful for debug assertions and
verifying exclusive access in high-level drivers.
Signed-off-by: Firas Sammoura <fsammoura@google.com>
IOMEM interface base address is stored in both device configuration
and device data structures. Remove the occurence in the config data
that is used only for trace messages.
No functional changes.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Check the used XSPIx peripheral before calling the corresponding function
instead of hard-coded calling the LL_PWR_EnableXSPIM2() and
LL_SBS_EnableXSPI2SpeedOptim() during flash_stm32_xspi_init(...).
Signed-off-by: Thomas Decker <decker@jb-lighting.de>
If a device has multiple flashes, likely it has multiple partition tables.
This change updates the `flash partitions` command to print all partitions
for all partition tables, instead of just one partition table.
Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
When 4-byte addressing is enabled, update the page program LUT entry
to use the appropriate 4-byte page program command (SPI_NOR_CMD_PP_4B).
For octal mode (1S-8S-8S), select the correct page program command
based on address width:
- Use SPI_NOR_CMD_PP_1_8_8_4B for 32-bit addressing
- Use SPI_NOR_CMD_PP_1_8_8 for 24-bit addressing
This ensures the flash controller uses the correct command sequence
for page programming operations in both standard and octal modes with
extended addressing.
Signed-off-by: Albort Xue <yao.xue@nxp.com>
- 1-1-8 and 1-8-8 page program commands for 3-byte addressing
- 1-1-8 and 1-8-8 page program commands for 4-byte addressing
Signed-off-by: Albort Xue <yao.xue@nxp.com>
Different flash parts have different requirements on the number of dummy
bytes to send when issued a RDID request, so allow configuring the read ID
dummy byte count in devicetree for the MAX32 SPIXF flash driver.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
Add the `DEVICE_API` wrapper to the remaining `flash_driver_api`
instances, ensuring that each driver API is placed in its respective
linker section.
Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
Actually, the parameter is the number of bytes to read, not the number
of double words.
Signed-off-by: Marcelo Roberto Jimenez <marcelo.jimenez@gmail.com>
The parsing of the number of bytes to read in the read command was being
done in hexadecimal, causing unexpected behavior.
Now the number can be interpreted in decimal or hexadecimal if prefixed
with 0x.
Signed-off-by: Marcelo Roberto Jimenez <marcelo.jimenez@gmail.com>
This patch runs clang-format on the flash_shell.c file before the
real patch gets applied, otherwise the changes would be hard to
read.
Signed-off-by: Marcelo Roberto Jimenez <marcelo.jimenez@gmail.com>
The JESD216_DW15_QER_VAL_S2B1v5 case had incorrect status register
read/write logic. It was reading only SR2 but writing both SR1 and SR2,
which could corrupt SR1 if not read first.
Merge the S2B1v5 case with S2B1v1/v4 cases since they all set bit 1 of
SR2. Update the common path to properly handle both single-byte (SR2 only)
and two-byte (SR1+SR2) read/write operations by:
- Reading SR1 first when rd_size is 2, saving it temporarily
- Reading SR2 using the scratch command
- Combining both bytes with SR2 in the upper byte when needed
- Writing the combined value with the QE bit set
Remove the now-redundant S2B1v5-specific case and simplify the LUT
sequence to read SR2 directly instead of reading SR1 first.
Signed-off-by: Albort Xue <yao.xue@nxp.com>
Add workaround for MCUXSDK FTFX driver when FTFx_DRIVER_IS_FLASH_RESIDENT
is enabled.
The SDK places the run command function in data section which
is not executable when Zephyr configures memory permissions.
Implement a RAM function to replace the FTFX driver's run command function
Fixes: #98560
Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
Increase the maximum allowed repeat count for flash speed tests from
10 to 10000. This allows for more accurate measurements over
longer test durations.
Signed-off-by: Tim Pambor <tim.pambor@codewrights.de>
This commit adds initial support for non secure nRF7120 targets in
zephyr.
There are important limitations, such as:
- The hardware Crypto accelerator is not supported and thus the non
secure target is NOT secure for production applications in upstream
Zephyr.
- The BL2 is not supported, so no DFU is supported with this support
Signed-off-by: Robert Robinson <robert.robinson@nordicsemi.no>
When qer is S2B1v1 or S2B1v4, reading Status Register
1 and Status Register 2 requires different opcodes,
and writing Status Register 1/2 requires two bytes in a
single write. Add the Read Status Register 2 command
sequence to the LUT used by the quad-enable function,
and ensure the write operation sends two bytes (SR1|SR2)
when setting the QE bit.
Signed-off-by: Albort Xue <yao.xue@nxp.com>
The commit c42c8a4da4 (do not invalidate bet at end of loop")
correctly restored the best erase type (bet) selection logic
based on SFDP/JESD216 erase types.
However, this caused a regression
in Octal OPI mode: when bet != NULL, the driver started using bet->cmd
(a standard SPI 1-byte opcode) directly, which is not valid in OPI mode
where the controller expects OPI opcodes (2-byte OCMD).
When bet != NULL:
- In OPI mode, ignore bet->cmd and use the OPI sector erase
opcode SPI_NOR_OCMD_SE.
- In SPI/QPI modes, keep using bet->cmd as intended.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
- Flash configuration was previously done in the driver selected by
Kconfig. Instead move flash configuration to the board removing
the need for ifdefs in the driver. This will allow boards to
configure specifics related to the on board (not part of the SoC)
flash.
Signed-off-by: Merin George <merin.george@infineon.com>
For STM32WB0x series, LL_GetFlashSize returns the flash size in words,
not bytes. The previous implementation incorrectly interpreted this
value, leading to a large discrepancy between the expected size (512 KB)
and the computed size (64 MB) in the test_get_size ztest.
This change updates the logic to correctly compute the flash size in
bytes, ensuring accurate results in size-related operations.
Signed-off-by: Fabrice DJIATSA <fabrice.djiatsa-ext@st.com>
When a driver requires the usage of a low level driver subsystem
(like SPI, I2C, DMA...), it shall enable it instead of depending on it.
Also, make DMA usage depend on its DT properties being defined.
Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
Add the functionality that allows to register write and erase callbacks.
The callbacks can modify the behaviour of this operations.
It are meant to be used during testing of the situation when the memory
starts to generate errors or the data cannot be trusted anymore.
It expands the testing possibility, for a situation when the module
is tested that checks the data integrity and and we cannot just jump in
between its internal write and read operations to inject an error.
Signed-off-by: Radosław Koppel <r.koppel@k-el.com>
Move the programmable unit buffer used to detect double writes out of
the function stack. This fixes stack overflows when simulating flash
devices with large programming units (SPI-NAND, 2-4 kB).
Signed-off-by: Jordan Yates <jordan@embeint.com>
This commit enables use of FTFC flash controller.
Together with DT changes it adds support for FTFC into soc_flash_mcux.c
driver.
Signed-off-by: Petr Buchta <petr.buchta@nxp.com>
Drop cat1 from the binding files to enable reuse by other
category devices as well.
Fixes#99174
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
Remove duplicated #include directives within the same
preprocessor scope across the Zephyr tree.
Duplicates inside different #ifdef branches are preserved
as they may be intentional.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
