There was a possible race condition when setting the return value of a
thread that is pending, from an ISR.
A kernel function causes a thread to pend, with the following series of
steps:
- disable interrupts
- move current thread to wait_q
- call _Swap
Depending if running on M3/4 or M0+, _Swap will either issue a svc #0,
or pend PendSV directly. The same problem exists in both cases.
M3/4:
__svc will:
- enable interrupts
- trigger __pendsv
M0+:
_Swap() will enable interrupts.
__pendsv will:
- save register context including PSP into the thread struct
If an interrupt occurs between interrupts being enabled them and
__pendsv saving PSP, and the ISR sets the pending thread's return value,
this will happen:
- sees the thread in a wait_q
- removes it
- makes it ready
- calls _set_thread_return_value
- _set_thread_return_value looks at the thread's saved PSP to poke
the value
In this scenario, PSP hasn't yet been updated by __pendsv so it's a
stale value from the previous context switch, resulting in unpredictable
word on the stack getting set to the return value.
There is no way to fix this issue and still have the return value being
delivered directly in the pending thread's exception stack frame, in the
M0+ case. There will always be a window between the unlocking of
interrupts and PendSV being handled. On M3/4, it could be possible with
the mix of SVC and PendSV, since the exception stack frame is created in
the __svc handler. However, because we want to keep the two
implementations as close as possible, and there were talks of moving
M3/4 to using PendSV only, to save an exception, the approach taken
solves both cases.
The approach taken is similar to the ARC and Nios2 ports, where
there is a field in the thread structure that holds the return value.
_Swap() then loads r0/a1 with that value just before returning.
Fixes ZEP-1289.
Change-Id: Iee7e06fe3f8ded84aff918fd43408c7f589344d9
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
When a thread dies, at least print the pointer to it, so we can debug
better.
Change-Id: Ief6bbc0c221e2d5271c240a4b73df16413aa5e22
Signed-off-by: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
This reverts commit
"kernel/arm: add comment about _is_next_thread_current"
and fixes the interrupt locking issue.
The comment would have been right if only reads were done the ready
queue, but that is not the case. It turns out that the comment was written
ignoring the fact that _is_next_thread_current() updates the next thread
cache when fetching the next thread.
Change-Id: I21c9230f85f4f87a6bbf14fd4a9eb7e19b59f8c5
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Though Cortex-M4 could optionally have a floating point unit,
the MCU in the cc3200 in fact does not have an FPU.
Enabling CPU_HAS_FPU caused applications built with CONFIG_FLOAT=y
to crash during an early call to enable_floating_point().
This patch was validated by running microPython, which is one
such application.
Change-Id: I8bfd42c456524e152cbbb983001d9540d93fbe98
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Normally, _is_next_thread_current() must be called with interrupts
locked, but the ARM interrupt exit code does not have to do that. Add
explanation why.
Change-Id: Id383b47a055fdd6fbd5afffa52772e92febde98f
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
There was a lot of duplication between architectures for the definition
of threads and the "nanokernel" guts. These have been consolidated.
Now, a common file kernel/unified/include/kernel_structs.h holds the
common definitions. Architectures provide two files to complement it:
kernel_arch_data.h and kernel_arch_func.h. The first one contains at
least the struct _thread_arch and struct _kernel_arch data structures,
as well as the struct _callee_saved and struct _caller_saved register
layouts. The second file contains anything that needs what is provided
by the common stuff in kernel_structs.h. Those two files are only meant
to be included in kernel_structs.h in very specific locations.
The thread data structure has been separated into three major parts:
common struct _thread_base and struct k_thread, and arch-specific struct
_thread_arch. The first and third ones are included in the second.
The struct s_NANO data structure has been split into two: common struct
_kernel and arch-specific struct _kernel_arch. The latter is included in
the former.
Offsets files have also changed: nano_offsets.h has been renamed
kernel_offsets.h and is still included by the arch-specific offsets.c.
Also, since the thread and kernel data structures are now made of
sub-structures, offsets have to be added to make up the full offset.
Some of these additions have been consolidated in shorter symbols,
available from kernel/unified/include/offsets_short.h, which includes an
arch-specific offsets_arch_short.h. Most of the code include
offsets_short.h now instead of offsets.h.
Change-Id: I084645cb7e6db8db69aeaaf162963fe157045d5a
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
The unified kernel is now the only supported kernel, so this
option is unnessary. Eliminating this option also enables
the removal of some legacy code that is no longer required.
Change-Id: Ibfc339d643c8de16a2ed2009c9b468848b8b4972
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Add SoC support for ARM Beetle platform.
Beetle is an ARM Cortex-M3 based SoC used on ARM V2M Beetle Boards.
https://www.arm.com/products/tools/development-boards/versatile-express/beetle_iot_evaluation_platform.php
This patch contains:
* The base SoC platform.
* The clock_init functionality.
* The system wide pin definitions.
* The configuarion for the drivers at SoC level (IRQs, PINs and
Base Addr).
Jira: ZEP-1245
Change-Id: If15675935890711983e5ce37d49732b0462c3ec7
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
PRIMARY, SECONDARY, NANOKERNEL, MICROKERNEL init levels are now
deprecated.
New init levels introduced: PRE_KERNEL_1, PRE_KERNEL_2, POST_KERNEL
to replace them.
Most existing code has instances of PRIMARY replaced with PRE_KERNEL_1,
SECONDARY with POST_KERNEL as SECONDARY has had a longstanding bug
where the documentation specified SECONDARY ran before the kernel started
up, but actually ran afterwards.
Change-Id: I771bc634e9caf7f17dbf214a270bc9967eed7d32
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Verify the thread priorities are within the bounds when starting a new
thread and when changing the priority of a thread.
Change-Id: I007b3b249e4b80235b6439cbee44cad2f31973bb
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Symbols now use the K_ prefix which is now standard for the
unified kernel. Legacy support for these symbols is retained
to allow existing applications to build successfully.
Change-Id: I3ff12c96f729b535eecc940502892cbaa52526b6
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
This KSDK flash shim driver supports the device in the FRDM K64F
platform (enabled with this commit).
WARNING: the driver disables the system interrupts for potentially
long periods of time. This is required to avoid Read-While-Write
issues since most platforms run in XIP mode.
For more detailed information see the link below:
http://cache.freescale.com/files/32bit/doc/app_note/AN4695.pdf
Change-Id: I70f8d09080251033ce2f45be0c2eb95c19fded08
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org>
The uart_k20 serial driver incorrectly assumed that all instances of the
UART peripheral are driven by the system clock, when actually some
instances are driven by the bus clock (which usually runs at half the
system clock). This caused incorrect baud rate calculations for UART
instances driven by the bus clock (UART2-4).
Change-Id: I38041781cdee146912bb5167e7c71d6416b966b5
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This change is required to support unified kernel.
Change-Id: I47bd644239eb3e624c7a5cb456eedad5aca79e8e
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
The unified kernel expect the default return value from a _Swap() call
to be set to -EAGAIN by the architecture code. Cortex-M3/M4 does this in
the SVC call handler, and it was missing from the Cortex-M0/M0+ before
pending PendSV.
Change-Id: I3316901186ab409f49043eb4f1972c4b0dd9a4a2
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
The pinmux configuration is done during board initialization.
This was validated using the following Zephyr apps:
- samples/hello_world
- samples/philosophers
- samples/drivers/uart
- samples/shell
UARTA0 is currently supported.
Change-Id: I85727c622d4d42183cc9f2f8b43d653e245dd17e
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Initial support is for the CC3200 SoC, comprising a network coprocessor
and Cortex-M4 MPU.
This leverages the CC3200 SDK driver peripheral library, installed
separately, or built from ext/hal/.
Jira: ZEP-1109
Change-Id: I508afc8596c165b309a4ec641c39abadc779eea3
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
The k64 SoC has multiple instances of many peripherals, but which
instances can actually be used depends upon the board design and pinmux
configuration.
Move all instance-specific default driver configurations from the SoC to
the boards (frdm_k64f and hexiwear_k64). Default driver selection
remains in the SoC (e.g., enable the KSDK I2C driver when I2C is
enabled).
This paves the way to support different driver defaults for the
frdm_k64f and hexiwear_k64 boards, but it does not yet change any of the
default values; it only changes where the default values get set.
Change-Id: Id9ed898762eb400ecefeac91ae4dce66da05622d
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds standard prefix to symbolic option that flags a thread
as essential to system operation.
Change-Id: Ia904a81ce343fdd1cd44caaaeae641d822777f9b
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Enable HAS_CUBE config flag on stm32f4 family soc.h is updated to
include minimum include files from ext/hal/stm23cube
Change-Id: I35a8c33aab777167ee7029edc1b7a4f6d21fccd8
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Create HAS_CUBE config flag to control activation of STM32Cube support.
Generate fitting compilation options for STM32Cube in
/ext/hal/stm32cube/Makefile soc.h is updated to include minimum include
files from ext/hal/stm23cube
Change-Id: If58ce0a4fdb7fbf5f171dfe5f1f8eb75126a8313
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
In ST CMSIS files, FLASH_BASE does not mean base address of FLASH register
Instead FLASH_R_BASE is used.
stm32f1 clock control driver is updated to be compatible with this naming.
Change-Id: Ic4fb49c60c392e15fd12c69266baf4c686bd343b
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
STM32Cube uses SoC defines made to reflect HW heterogeneity that
should be taken into account by SW.
Aim of this commit is to adapt values used by Zephyr to the same
diversity. This will help create new SoC values only when justified
by a real hardware difference that should be taken into account
by software.
For instance, for SoC stm32f401re following define is used:
*STM32F401xE
Which means:
*Same SW could be used on STM32F401RE and STM32F401CE:
same CONFIG_SOC could be used
*Different SW should be used on STMF401RE and STM32F401RC:
different CONFIG_SOC should be used
This change focuses on stm32f4xx series.
Change-Id: I56ff4d1815d09747cf722385532eb2dcbdf37b44
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
STM32Cube uses SoC defines made to reflect HW heterogeneity
that should be taken into account by SW.
Aim of this commit is to adapt values used by Zephyr to the same
diversity. This will help create new SoC values only when justified
by a real hardware difference that should be taken into account
by software.
For instance, for SoC stm32f103rb following define is used:
*STM32F103xB
Which means:
*Same SW could be used on STM32F103RB and STM32F103VB:
same CONFIG_SOC could be used
*Different SW should be used on STMF103RB and STM32F103R4:
different CONFIG_SOC should be used
This change focuses on stm32f1xx series.
Change-Id: I5ecfaa52952d04421b27b5e74fb71b4fc108b662
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move common config options one level up to try to simplify the per-board
defconfig
Change-Id: I3d80fa494050634d0f877af2015b01b85df20d1d
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add support for the STM32F401 chip on the board
Change-Id: I96c0799f3658ecea096fa5971bce9faf21919ee1
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
STM32F401 allows for upto 16 alternate functions on each pin.
Change-Id: Ib1c14fd31abaa2b05a5ab0f7bd1b4a4748f10f84
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Implements MCU-specific GPIO input interrupt integration. Added
definition of System configuration controller as well as its needed by
the GPIO code.
The SYSCFG controller is used for system-specific configuration such as:
- remap the type of memory accessible at address 0x00000000
- manage the external interrupt line connection to GPIOs
- configure the I/O compensation cell
Change-Id: Id2ebfbd1b21e77be76406d1cd6cd5d4989e9e2fa
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Based on the STM32F10x driver. Removing old code as we need to use the
bus number when dealing with 4 possible peripherals.
Change-Id: Id0263aa008e9b039ff9a00339e5622e289ffdf99
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch adds support for the STMicroelectronics STM32F4x family in the
STM32 MCU line. Configuration is included for the STM32F401RE MCU.
Acknowledgements to Pawel Wodnicki's earlier submission from February that
was used as a starting point for this port. In the end, we rewrote all of it.
Change-Id: I9797c282ac3c0cc66a63b9d34821de95df537ef6
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
The mk64f12 provides RNGA hardware. Follow the implementation pattern
used by various other driver classes and enable the RANDOM KSDK shim
driver if the RANDOM driver is enabled.
Change-Id: I46bdf16cf1c48937011fb1b0e4c292615efd4c95
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
They were the same, standardize on the lowercase one.
Change-Id: I8bca080e45f3e0970697d4451e468b9081f96f5f
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
SOC_TI_LM3S6965 and UART_STELLARIS are platform-specific, remove from
arch/arm/defconfig.
Change-Id: I3b37bc2ddfabb1da4e7538b5ab0e553fb2464584
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
STM32F4 requires the alternative function config to be set, so just
initialize that as part of the gpio configure call.
Change-Id: I33a4a8efec59c5ebe7dc3f3580f0dd2bf7ded7f4
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
The STM32F1 range all have the independent watchdog, enable the driver
by default if CONFIG_WATCHDOG is enabled.
Change-Id: I3869884dc51c56194367b46007c87f6cee699689
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
All M7 features common to M3/M4 are working. New features like Tightly
Coupled Memory (TCM) are not yet supported.
Change-Id: I5f7b292e70843aec415728f24c973bb003014f4b
Jira: ZEP-977
Signed-off-by: Piotr Mienkowski <Piotr.Mienkowski@schmid-telecom.ch>
Existing code wasn't removing a thread from the kernel's list
of active threads if the thread terminated or aborted. (It did
remove it if the delayed starting of a thread was cancelled.)
Change-Id: Icc97917e33765696480d0e9bf31e882ef555d095
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Gets rid of unnecessary THREAD_MONITOR_INIT() macro, to be
consistent with the approach taken by _thread_monitor_exit().
Aligns x86 code with the approach used on other architectures.
Revises the associated comments and removes unnecessary
doxygen tags.
Change-Id: Ied1aebcd476afb82f61862b77264efb8a7dc66c9
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Renames _thread_exit() to _thread_monitoring_exit() to make
its purpose clearer. Revises the associated comments and
removes unnecessary doxygen tags.
Change-Id: I010a328d35d2d79d2a29b9d0b6c02097bb655989
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
The baudrate calculation present in set_baudrate() is
causing the UART to emit inital bytes incorrectly, for a
reason currently unknown, but directly related to the fact
that __aeabi_uldivmod is being invoked.
Since the nRF5x Product Specifications do not provide a
standard formula to calculate baudrates and instead list
a predefined set of divisor values, we opt here to use the
official values and remove the attempt at calculating them
manually.
Change-Id: Ic3ff42ea6d065e9a1d26a5350ce5bf5ad661160a
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Several platforms utilize a ihex image format. Rather than
duplicating the build bits in everyones makefile, pull it into the
toplevel makefile so we all share it.
Change-Id: I9097b06e7e386a69ce6ab4d4e4d56cc776adfec2
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Still missing a working timer driver, as SysTick is not really available
in this SoC series (enabled to avoid build issues, but not used).
Jira: ZEP-784
Change-Id: Ie1c8e6c5e8955ee7f260ce013f4451f9215f3457
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Integrating the IRQ definitions for both nRF51 and nRF52, and defining
the set of IRQ values that are common to both.
Also switch the controller, uart and clock drivers to use the common
header definitions.
Change-Id: Id6816d7a97720896cfe4df83656fb8b1f8fb01fa
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Not disabling SysTick as it is optional by the spec.
SVC not used as there is no priority-based interrupt masking (only
PendSV is used).
Largely based on a previous work done by Euan Mutch <euan@abelon.com>.
Jira: ZEP-783
Change-Id: I38e29bfcf0624c1aea5f9fd7a74230faa1b59e8b
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Those options are not being used anywhere, so remove them and avoid some
confusion.
Change-Id: Ia3767dbd2432851dfae4b1e996f02ed1b2450505
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Bluetooth controller implementation requires the low power
oscillator for radio time space scheduling and as sleep
clock; the high frequency oscillator as the active clock.
For Nordic Semiconductor's nRF5 Series SoC's select the
NRF Clock peripheral when BLUETOOTH_CONTROLLER is selected
in Kconfig build.
Jira: ZEP-897
Change-id: I6f99e90b3485e757be61e91c749e485dd0cfdaba
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
