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serial/uart_k20: Fix instance source clock frequencies

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The uart_k20 serial driver incorrectly assumed that all instances of the
UART peripheral are driven by the system clock, when actually some
instances are driven by the bus clock (which usually runs at half the
system clock). This caused incorrect baud rate calculations for UART
instances driven by the bus clock (UART2-4).

Change-Id: I38041781cdee146912bb5167e7c71d6416b966b5
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This commit is contained in:
Maureen Helm 2016-11-04 08:37:32 -05:00 • committed by Kumar Gala
commit 33ee93d7dd
2 changed files with 12 additions and 7 deletions
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9
arch/arm/soc/nxp_kinetis/k6x/soc.h
View file

@ -34,6 +34,8 @@ extern "C" {
/* default system clock */
#define SYSCLK_DEFAULT_IOSC_HZ MHZ(120)
#define BUSCLK_DEFAULT_IOSC_HZ (SYSCLK_DEFAULT_IOSC_HZ / \
CONFIG_K64_BUS_CLOCK_DIVIDER)
/* address bases */
@ -153,22 +155,25 @@ extern "C" {
#include <drivers/k20_pcr.h>
#define UART_K20_CLK_FREQ SYSCLK_DEFAULT_IOSC_HZ
#define UART_IRQ_FLAGS 0
#define UART_K20_PORT_0_CLK_FREQ SYSCLK_DEFAULT_IOSC_HZ
#define UART_K20_PORT_0_BASE_ADDR 0x4006A000
#define UART_K20_PORT_0_IRQ IRQ_UART0_STATUS
#define UART_K20_PORT_1_CLK_FREQ SYSCLK_DEFAULT_IOSC_HZ
#define UART_K20_PORT_1_BASE_ADDR 0x4006B000
#define UART_K20_PORT_1_IRQ IRQ_UART1_STATUS
#define UART_K20_PORT_2_CLK_FREQ BUSCLK_DEFAULT_IOSC_HZ
#define UART_K20_PORT_2_BASE_ADDR 0x4006C000
#define UART_K20_PORT_2_IRQ IRQ_UART2_STATUS
#define UART_K20_PORT_3_CLK_FREQ BUSCLK_DEFAULT_IOSC_HZ
#define UART_K20_PORT_3_BASE_ADDR 0x4006D000
#define UART_K20_PORT_3_IRQ IRQ_UART3_STATUS
#define UART_K20_PORT_4_CLK_FREQ BUSCLK_DEFAULT_IOSC_HZ
#define UART_K20_PORT_4_BASE_ADDR 0x400EA000
#define UART_K20_PORT_4_IRQ IRQ_UART4_STATUS

10
drivers/serial/uart_k20.c
View file

@ -416,7 +416,7 @@ static void irq_config_func_0(struct device *port);
static const struct uart_device_config uart_k20_dev_cfg_0 = {
.base = (uint8_t *)UART_K20_PORT_0_BASE_ADDR,
.sys_clk_freq = UART_K20_CLK_FREQ,
.sys_clk_freq = UART_K20_PORT_0_CLK_FREQ,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = irq_config_func_0,
@ -453,7 +453,7 @@ static void irq_config_func_1(struct device *port);
static const struct uart_device_config uart_k20_dev_cfg_1 = {
.base = (uint8_t *)UART_K20_PORT_1_BASE_ADDR,
.sys_clk_freq = UART_K20_CLK_FREQ,
.sys_clk_freq = UART_K20_PORT_1_CLK_FREQ,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = irq_config_func_1,
@ -490,7 +490,7 @@ static void irq_config_func_2(struct device *port);
static const struct uart_device_config uart_k20_dev_cfg_2 = {
.base = (uint8_t *)UART_K20_PORT_2_BASE_ADDR,
.sys_clk_freq = UART_K20_CLK_FREQ,
.sys_clk_freq = UART_K20_PORT_2_CLK_FREQ,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = irq_config_func_2,
@ -527,7 +527,7 @@ static void irq_config_func_3(struct device *port);
static struct uart_device_config uart_k20_dev_cfg_3 = {
.base = (uint8_t *)UART_K20_PORT_3_BASE_ADDR,
.sys_clk_freq = UART_K20_CLK_FREQ,
.sys_clk_freq = UART_K20_PORT_3_CLK_FREQ,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = irq_config_func_3,
@ -564,7 +564,7 @@ static void irq_config_func_4(struct device *port);
static const struct uart_device_config uart_k20_dev_cfg_4 = {
.base = (uint8_t *)UART_K20_PORT_4_BASE_ADDR,
.sys_clk_freq = UART_K20_CLK_FREQ,
.sys_clk_freq = UART_K20_PORT_4_CLK_FREQ,
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
.irq_config_func = irq_config_func_4,