-The stm32wba6x has Dual Bank memory. Change the flash driver
to support this OPTion given by presence of the
DUAL_BANK bit (21) in the FLASH_OPTR register.
-Flash erase with 2 banks: Add the control of the BKER
bit of the FLASH_NSCR1 to select BANK1 or 2 of
the internal flash depending
on the page number >127 for BANK2
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit adds the Device Tree include files
for the STM32WBA65x device
Adding GPIO D/E/G banks.
Renaming JTAG reset pin.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
zephyr_linker_section(... ADDRESS 0xF00) was broken. The fixed
placement was using their parent group address.
This also removes some dead code in config_file_script.cmake that
helped confuse what is going on with fixed sections.
Signed-off-by: Björn Bergman <bjorn.bergman@iar.com>
Add the two new function `util_memeq` and `util_eq` recently added in
`sys/util.h` to the release notes for 4.2.
Signed-off-by: Théo Battrel <theo.battrel@nordicsemi.no>
Make the IOVDD settling delay configurable, instead of hardcoding a
delay that happens to work for the dev kits. For example, the nPM1300
load switches have a soft-start time of 1.8 ms.
Signed-off-by: Jordan Yates <jordan@embeint.com>
The nRF lower levels (`spim_addr_check` and `qspi_addr_check`) do
address alignment validation before sending or receiving data. If the
buffer sizes are not aligned, errors like this are printed to the
console when the interface is powered up.
```
<err> : spim_addr_check : Unaligned address ee0b2 2002b020 1 0 0
<err> : spim_addr_check : Unaligned address eeb3e 2002bb40 1 0 0
<err> : spim_addr_check : Unaligned address ef5ca 2002c660 1 0 0
<err> : spim_addr_check : Unaligned address f0056 2002d180 1 0 0
```
Signed-off-by: Jordan Yates <jordan@embeint.com>
DAC pins are not defined for SAM V71(B) Xplained Ultra - this was
causing device initialization to fail. This commit fixes that.
Signed-off-by: Dhanesh S R <sr.dhanesh@protonmail.com>
Flexcomm3 is used for the mikrobus header, enable the clock for it and
setup a pinctrl group for i2c.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
This reverts commit fe32d059af.
A supported host, 52840 does not support 16MHz SPI (though it falls back
to 8M) but prioritize interoperability over performance.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
Determine if lpflexcomm wrapped lpi2c by instance and connect
irq differently dependending on that to support platforms with
both flexcomm wrapped and unwrapped lpi2c's.
Applying c1286a8d8d425805fcceb3b872325fb4c439a572 to RTIO version.
Authored-by: Declan Snyder <declan.snyder@nxp.com>
Signed-off-by: Luis Ubieda <luisf@croxel.com>
The Low Power Flexcomm driver manages the interrupt handling
and provides an API to register interrupt callbacks.
Register the NXP LPI2C interrupt handler.
Applying dca6e64c93f26db254089f20225854bb1f8fe9b4 on RTIO-version.
Authored-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Some NXP SoC's have a FlexComm interface that manages the
interrupts.
Applying 482e39ea9556f53adbb7f67d0d0da3d17bbbae90 on RTIO-version.
Authored-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Update the driver to account for variations in the SDK driver
when it uses the instance number instead of the base address.
Applying 49bdcd2ef2fd5c91ab36f08d29e5183df5437843 on RTIO-version.
Co-authored-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Update the kernel API doxygen for k_thread_stack_alloc() and
k_thread_create() to convey that kernel thread stacks may be
dynamically allocated as an alternative to static allocation.
Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
It seems that some copyrights were not udpated to
Apache-2.0 as they should have been so this commit
updates them.
Signed-off-by: Georgios Vasilakis <georgios.vasilakis@nordicsemi.no>
The ADC and watchdog samples are not currently supported for the
non secure target of the nRF54L10 DK.
Add exclusions for these until they are supported.
Signed-off-by: Georgios Vasilakis <georgios.vasilakis@nordicsemi.no>
This adds the nrf54l15dk/nrf54l10/cpuapp/ns board variant to
Zephyr. It allows to build applications for this target.
This is an initial support for the non secure target which allows
building and running tfm_ipc and config_build.
This is NOT full support of the non secure target in upstream
Zephyr.
There are important limitations, such as:
- The hardware Crypto accelerator is not supported and thus the non
secur target is NOT secure for production applications in upstream
Zephyr.
- The BL2 is not supported, so no DFU is supported with this support
Most of the code changes here are taken from nRF Connect SDK
in order to avoid having noups there.
Signed-off-by: Georgios Vasilakis <georgios.vasilakis@nordicsemi.no>
Update the header to include a generic header for the NRF54L
series and not a specific one for the NRF54L15.
Signed-off-by: Georgios Vasilakis <georgios.vasilakis@nordicsemi.no>
- In middleware/CMakeLists.txt, using add_subdirectory()
to load the cmakelists.txt under bt_controller will
result in the bt_controller directory not being found
correctly, because the starting point of the query
is mcux-sdk-ng/CMakeLists.txt. Need to add
${CMAKE_CURRENT_LIST_DIR} to bt_controller to correctly
locate the folder.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
This patch establishes proper handling of RTIO OPs with multiple write
requests in the same transfer (as in: including OP_TRANSACTION flag).
An example of this is captured in test_ram_rtio_write_with_transaction
test). This patch makes that testcase pass for i2c_nrfx_twi_rtio.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
As it is a common pattern for drivers performing writes (e.g: write
reg-addr + write reg-data) without having to memcpy both into a buffer.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Add test cases where spi_transceive gets NULL spi_buf_set
once for tx and once for rx.
Signed-off-by: Piotr Krzyzanowski <piotr.krzyzanowski@nordicsemi.no>
Use underlying Zephyr thread directly to store thread name instead of
storing the name in CMSIS control block. Also, allow `osThreadGetName`
to work within ISR, as expected from spec.
Signed-off-by: Utsav Munendra <utsavm@meta.com>
Remove the dependency on the system heap existing when enabling
`ZBUS_RUNTIME_OBSERVERS`. Instead the previously allocated memory is
required to be provided to `zbus_chan_add_obs` (which can still be
allocated through malloc).
Signed-off-by: Jordan Yates <jordan@embeint.com>
previsouly the ordering was case sensitive, making the list of vendors
not really alphabetically ordered.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
The meas,ms5837 compat has been removed and replaced with two variants
hence the documentation in order to migrate to the new ones.
Signed-off-by: Ivan Wagner <ivan.wagner@tecinvent.ch>
