Commit graph

906 commits

Author SHA1 Message Date
Pawel Czarnecki
f1d3011ae1 drivers: spi: gecko: add support for pinctrl configuration
This commit adds support for pinctrl configuration in the Gecko SPI
driver.

Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
2023-01-17 15:37:27 -06:00
YuLong Yao
2a013216eb drivers: gd32_spi: drop APB marco
drop APB marco because clock_control driver is added.

Signed-off-by: YuLong Yao <feilongphone@gmail.com>
2023-01-12 21:45:38 +01:00
TOKITA Hiroshi
e55cbb8ce6 drivers: spi: gd32: Add support DMA transfer
Add supporting DMA-based transfer for GD32 SPI.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2023-01-11 08:50:56 -08:00
Fabio Baltieri
afd766d2b3 drivers: xec_qmspi: add missing default y to SPI_XEC_QMSPI_FULL_DUPLEX
Add missing "default y" to the Kconfig option so that it gets selected
automatically when a matching devicetree node is enabled.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-01-11 09:11:03 -06:00
Erwan Gouriou
66d4c64966 all: Fix "#if IS_ENABLED(CONFIG_FOO)" occurrences
Clean up occurrences of "#if IS_ENABLED(CONFIG_FOO)" an replace
with classical "#if defined(CONFIG_FOO)".

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-12-21 10:09:23 +01:00
Pawel Czarnecki
e8d3673c13 soc: arm: silabs: remove soc_gpio_configure wrapper
It would be better to use GPIO_PinModeSet() functions directly
in the drivers.

Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
2022-12-20 22:50:19 +01:00
Duong Vu Nam
b24f4625f0 arch: support nocache for Cortex-R52
Config NOCACHE_MEMORY depend on ARCH_HAS_NOCACHE_MEMORY_SUPPORT. Enable
ARCH_HAS_NOCACHE_MEMORY_SUPPORT for Cortex-R52 to run NXP S32Z/E with
nocache attibute.

Enable nocache in each driver use it.

Signed-off-by: Duong Vu Nam <duong.vunam@nxp.com>
2022-12-12 10:39:31 +01:00
Lucas Tamborrino
b196edf55d drivers: spi: esp32xx: Fix buffer length for DMA
Fixes #52588

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2022-12-07 10:13:38 +00:00
Jonas Otto
d3415e2ce1 drivers: spi_mcux_lpspi: fix baudrate change when switching devices
When configuring an LPSPI module for a new device with different baud rate,
the module needs to be disabled for the baud rate change to take effect.
This adds the necessary call to LPSPI_Enable before initializing the
module.

Fixes #51177

Signed-off-by: Jonas Otto <jonas@jonasotto.com>
2022-11-30 11:28:22 +01:00
Gaël PORTAY
ffed8388e7 drivers: spi_context: fix some LOG_DBG warnings
This casts the char * buffers to void * before giving them to the
LOG_DBG function to fix a warning at runtime.

Signed-off-by: Gaël PORTAY <gael.portay@gmail.com>
2022-11-29 22:52:40 -08:00
Dat Nguyen Duy
6d866b62bf drivers: spi: introduce SPI driver for NXP S32
This introduces SPI driver for NXP S32 platform

Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
2022-11-24 09:37:24 +01:00
Benedikt Schmidt
5fc743e5f9 drivers: spi: fix return value of spi_transceive for STM32 slaves
Return correctly the number of received bytes for a
spi_transceive on a STM32 SPI slave.
Fixes #52216

Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
2022-11-16 11:19:43 +01:00
Tom Burdick
74b9699213 spi: SAM support SPI transfers with DMA
For larger transfers DMA can be used enabling other tasks
to continue running. A threshold of 32 byte transfers
is about right and is defined threshold value for using DMA.

This does not currently support multiple SPI transactions changing
chip select with DMA (though the hardware supports this) currently.
Instead opting for the simpler first change of enabling one shot
DMA SPI transfers for those where the size warrants it.

Adds the loopback binding option to enable the spi_loopback test.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-11-08 09:37:59 +00:00
Jay Vasanth
37874f8f67 drivers: spi: fix formatting in mec172x ldma driver
fix leading white space and use tabs instead of space
in mec172x spi ldma driver.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-10-28 14:29:46 -05:00
Jay Vasanth
0976343513 drivers: SPI: MEC172x QMSPI clock fix
Microchip MEC172x QMSPI expanded its clock divider register
field from 8 to 16 bits. QMSPI source clock is on the fast
peripheral domain therefore get the frequency from the clock
control driver.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-10-28 14:29:46 -05:00
Gerard Marull-Paretas
178bdc4afc include: add missing zephyr/irq.h include
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-17 22:57:39 +09:00
Jay Vasanth
ae9de20222 drivers: spi: Added MEC172x full duplex qmspi driver
Add MEC172x full duplex qmspi driver version to support full
duplex transfers as expected by the Zephyr spi driver model.
On every spi clock we transmit one bit and receive one bit.
This driver will work with Zephyr SPI NOR driver.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-10-14 14:09:51 -05:00
Lucas Tamborrino
c0a2b9bbc4 drivers: spi: esp32xx: remove unnecessary log
Remove unnecessary log in init_dma function.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2022-10-14 09:56:38 +02:00
Gerard Marull-Paretas
6a0f554ffa include: add missing kernel.h include
Some files make use of Kernel APIs without including kernel.h, fix this
problem.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-11 18:05:17 +02:00
Lucas Tamborrino
a29ebef6ce drivers: spi: esp32c3: add DMA support
Add SPI DMA support for esp32c3.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2022-10-04 10:35:14 +02:00
Lucas Tamborrino
a11a103518 drivers: spi: esp32/s2: add DMA support
Add SPI DMA support for esp32/s2.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2022-10-04 10:35:14 +02:00
Gerhard Jörges
1e87837f2a drivers: spi: pl022: fix dropping RX bytes
If the thread that submits data over spi is interrupted by a higher
priority thread while pushing data to the tx fifo the hardware pushes
data to spi and frees up space in the fifo. In this case more than
8 Bytes are written to the tx fifo and bytes in the rx fifo get lost
before they are collected in the rx while loop.
To avoid this, the tx loop is exited after a maximum of 8 bytes and the
rx loop will run until it collected all bytes from the rx fifo.

Signed-off-by: Gerhard Jörges <joerges@metratec.com>
2022-09-22 17:16:45 +02:00
Jay Vasanth
d6ba6a5fac spi: mec15xx: add pinctrl for mec15xx/mec1501 qmspi
Remove pinmux calls and add pinctrl support for mec15xx
and mec1501 qmspi. Update board dts, pinmux and driver files.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-09-21 18:05:32 +00:00
Kevin Wang
c01dcacb6f drivers: spi: add Andes atcspi200 driver
Support the Andes atcspi200 spi driver

Signed-off-by: Kevin Wang <yunkai@andestech.com>
2022-09-07 15:34:47 +02:00
Francois Ramu
86ede2b679 drivers: spi : driver with DMA for the stm32u5
This commit is the adaptation of the stm32 SPI driver with DMA
transfer for the stm32u5 soc.
Use the DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_spi)
also valid for the stm32U5 serie.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-09-07 15:34:35 +02:00
Gerard Marull-Paretas
64eb350e5e drivers: spi: gd32: use clock control API
Use the clock control API to enable/get rate of SPI clocks.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-09-06 09:57:25 +02:00
Gerard Marull-Paretas
79e6b0e0f6 includes: prefer <zephyr/kernel.h> over <zephyr/zephyr.h>
As of today <zephyr/zephyr.h> is 100% equivalent to <zephyr/kernel.h>.
This patch proposes to then include <zephyr/kernel.h> instead of
<zephyr/zephyr.h> since it is more clear that you are including the
Kernel APIs and (probably) nothing else. <zephyr/zephyr.h> sounds like a
catch-all header that may be confusing. Most applications need to
include a bunch of other things to compile, e.g. driver headers or
subsystem headers like BT, logging, etc.

The idea of a catch-all header in Zephyr is probably not feasible
anyway. Reason is that Zephyr is not a library, like it could be for
example `libpython`. Zephyr provides many utilities nowadays: a kernel,
drivers, subsystems, etc and things will likely grow. A catch-all header
would be massive, difficult to keep up-to-date. It is also likely that
an application will only build a small subset. Note that subsystem-level
headers may use a catch-all approach to make things easier, though.

NOTE: This patch is **NOT** removing the header, just removing its usage
in-tree. I'd advocate for its deprecation (add a #warning on it), but I
understand many people will have concerns.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-09-05 16:31:47 +02:00
Sylvio Alves
7a00f7b793 west.yml: update hal to v4.4.1 base
west.yml: update hal_espressif to use latest v4.4.1 updates.
This change needs to be insync with esp32c3 timer changes, otherwise it
breaks it.

drivers: timer: update esp32c3 systimer to meet API changes.
Systimer API was refactored in hal v4.4.1, which
requires updates in esp32C3 systimer. Timer behavior is maintained
as is.

mcpwm: add v4.4.1 include reference, which was refactored as well.

driver: spi: esp32: update internal structs to meet API changes.

cmake: updated esp32 board to use HAL_ prefix as from west blobs
requirement.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2022-09-01 21:48:18 +00:00
Stephanos Ioannidis
e9b29a6f83 drivers: spi: psoc6: Fix spi_psoc6_transceive calls
The commit 4c20403629 updated the
`spi_psoc6_transceive` function signature but forgot to update its
usages.

This commit updates the `spi_psoc6_transceive` function invocations
to properly provide the callback and user data parameters.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-09-01 01:02:50 +09:00
Stephanos Ioannidis
a25257fcef drivers: spi: sifive: Migrate spi_context_{complete,lock} usage
This commit updates the SiFive SPI driver to reflect the
`spi_context_complete` and `spi_context_lock` function signature
changes introduced in the commit
4c20403629.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-09-01 01:02:50 +09:00
Stephanos Ioannidis
da570f871f drivers: spi: mchp_mss_qspi: Migrate spi_context_{complete,lock} usage
This commit updates the Microchip MSS QSPI SPI driver to reflect the
`spi_context_complete` and `spi_context_lock` function signature
changes introduced in the commit
4c20403629.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-09-01 01:02:50 +09:00
Stephanos Ioannidis
068006e1dc drivers: spi: litespi: Migrate spi_context_complete usage
This commit updates the LiteSPI SPI driver to reflect the
`spi_context_complete` function signature change introduced in the
commit 4c20403629.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-09-01 01:02:50 +09:00
Stephanos Ioannidis
fedf0faac0 drivers: spi: gecko: Migrate spi_context_complete usage
This commit updates the Gecko SPI driver to reflect the
`spi_context_complete` function signature change introduced in the
commit 4c20403629.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-09-01 01:02:50 +09:00
Stephanos Ioannidis
c4840535b6 drivers: spi: gd32: Migrate spi_context_{complete,lock} usage
This commit updates the GD32 SPI driver to reflect the
`spi_context_complete` and `spi_context_lock` function signature
changes introduced in the commit
4c20403629.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2022-09-01 01:02:50 +09:00
Gerard Marull-Paretas
d55bc1f7ba drivers: spi: gd32: use reset API
Use the reset API to reset the peripheral state before initialization.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2022-08-29 10:30:49 +02:00
Tom Burdick
4c20403629 spi: callback API for asynchronous transcieve
Adds a new spi_transcieve_cb API which enables asynchronous
SPI transactions with callback notification.

The exist spi_transcieve_async API remains and uses the new
spi_transcieve_cb API to provide a k_poll_signal notifier.

The driver API changes to provide a callback and userdata
parameter to async transcieve. All drivers in the tree
have been updated to the change.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-08-26 09:29:48 -04:00
Gerard Marull-Paretas
a202341958 devices: constify device pointers initialized at compile time
Many device pointers are initialized at compile and never changed. This
means that the device pointer can be constified (immutable).

Automated using:

```
perl -i -pe 's/const struct device \*(?!const)(.*)= DEVICE/const struct
device *const $1= DEVICE/g' **/*.c
```

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-22 17:08:26 +02:00
Fabio Baltieri
bf47c2a763 drivers: drop few unused pinmux.h include
Drop few unused include pinmux header from drivers that don't seem to be
using it anymore.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2022-08-18 12:13:14 +00:00
TOKITA Hiroshi
a7721aa30d drivers: spi: pl022: Support interrupt based transfer
Add interrupt based transfer feature for the PL022 SPI.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2022-08-18 10:18:16 +02:00
TOKITA Hiroshi
da32e26a3d drivers: spi: Add basic support for PL022
Add fundamental feature support for PL022 SPI peripheral.
This commit implements synchronous transfer with 8bit-MSB format.

Optional functions are not currently implemented yet.

- interrupt based transfer is not implemented yet.
- DMA transfer is not implemented yet.
- Slave mode is not implemented yet.
- Currently support only 8-bit data transfer.

Hardware limitation:

- LSB-first format is not supported by hardware.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2022-08-18 10:18:16 +02:00
Bryce Wilkins
405ebc0cd0 drivers: spi: Set spi context for mcux flexcomm spi slave configuration
This is a bug fix. A pointer to the spi configuration is not saved when
the spi driver is configured for slave operation and it can lead to
runtime errors.

Signed-off-by: Bryce Wilkins <bryce.wilkins@gmail.com>
2022-08-10 22:01:11 -05:00
Henrik Brix Andersen
d6776fe169 drivers: spi: check if clock device is ready before accessing
Add check for device_is_ready() before accessing clock control devices.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-08-09 17:16:16 +02:00
XiNGRZ Chan
7109632046 drivers: spi_esp32_spim: Add support for IOMUX mode
In order to work on a clock speed higher than 20 MHz, IO MUX is required.

Co-authored-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
Signed-off-by: XiNGRZ Chan <hi@xingrz.me>
2022-08-09 12:31:23 +02:00
Erwan Gouriou
1ef9e9eb9b include: drivers: stm32 clock_control: Replace OPT by DOMAIN
In the continuation of the previous commit, replace _OPT_ by _DOMAIN_
in macros relating to this feature.
hen, adapt drivers and tests to this new wording.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-08-08 14:17:07 +02:00
Bryce Wilkins
5ff80ef2b1 drivers: spi: Add default char to mcux flexcomm spi driver
Adds optional device tree property to specify a default character
to clock out when the TX buffer pointer is NULL. If the property is
not set the existing behavior (default char of 0x00) is used.

I verified the expected behavior using an i.MX RT685 board and
logic analyzer that the def-char character is transmitted when
TX buffer pointer is NULL.

Signed-off-by: Bryce Wilkins <bryce.wilkins@gmail.com>
2022-08-05 09:28:39 -05:00
Gerard Marull-Paretas
149fe06341 drivers: arc/designware: remove unused <soc.h>
The <soc.h> header is not required by a few ARC/Designware drivers, so
remove it.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-08-03 07:46:14 -04:00
TOKITA Hiroshi
49522c061f drivers: spi: gd32: support interrupt-driven mode
Add supporting interrupt-based asynchronous operation for GD32 SPI.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
2022-08-01 10:32:33 +02:00
Simon Hein
d0921018fc drivers: Fix coding guidelines MISRAC:2012 Rule 14.4 do-whiles/Zero checks
MISRA C:2012 Rule 14.4 (The controlling expression of an if statement
and the controlling expression of an iteration-statement shall have
essentially Boolean type.)

Use `do { ... } while (false)' instead of `do { ... } while (0)'.
Use comparisons with zero instead of implicitly testing integers.

The commit is a subset of the original auditable-branch commit:
5d02614e34a86b549c7707d3d9f0984bc3a5f22a

Signed-off-by: Simon Hein <SHein@baumer.com>
2022-07-26 15:30:24 -04:00
Kumar Gala
0be3a7604b drivers: spi: Update drivers to use devicetree Kconfig symbol
Update spi drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.

We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-25 09:38:30 +02:00
Kumar Gala
8fb2210cfb emul: remove name param from bus register APIs
Rework the <BUS>_emul_register calls to not pass the name param.  The
name param is only used for logging and we can get it from the
struct <BUS>_emul instead.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-19 15:52:36 -05:00