Convert older DT_INST_ macro use in stellaris drivers to the new
include/devicetree.h DT_INST macro APIs.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This adds the per CPU address offset for intel_apl_adsp, so
the correct base address can be calculated under SMP.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds a rather primitive driver for use with the Intra-DSP
Communication (IDC) on the DSP on certain Intel SoCs. The IDC
generates interrupts from one core to another by writing to
certain registers. This is also being utilized as
the scheduler IPI since it can interrupt other cores.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The DSP wall clock timer on some Intel SoC is a timer driven
directly by external oscillator and is external to the CPU
core(s). It is not as fast as the internal core clock, but
provides a common and synchronized counter for all CPU cores
(which is useful for SMP).
This uses the RISCV timer as base as it is using 64-bit
counter.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The CAVS interrupt controller has different base addresses for
each CPU. When running under SMP, the driver needs to look at
the correct address for the CPU the ISR is running so interrupts
can be dispatched correctly. This adds a function to calculate
the correct base address. Note that each supported SoC may have
different offsets so per SoC config will need to added. Support
for intel_s1000 is added as an example.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The dw_ictl interrupt controller is an interrupt aggregator
supporting multi-level interrupts. Therefore, it needs to be
initialized earlier than any downstream interrupt controllers
and devices.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The cavs_ictl interrupt controller is an interrupt aggregator
supporting multi-level interrupts. Therefore, it needs to be
initialized earlier than any downstream interrupt controllers
and devices.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
It was observed that leaving the pin type configured for i2c for SDA
and SCL results in higher power consumption during standby. So we are
resetting the pin type when bringing the i2c into low power mode, and
setting it back to the correct type when exiting low power mode.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Add a dependency on the I2C resource in the TI Power module,
reconfigure the peripheral upon CPU exiting standby, and add
support for device PM.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Add a dependency on the UART resource in the TI Power module,
reconfigure the UART upon CPU exiting standby, and add support
for device PM.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Adding a dependency on the GPIO resource in the TI Power module, and
configuring the edge detection on pads as a wakeup source.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
z_vrfy_counter_get_value should check the size of memory pointed to
ticks and not the size of the pointer.
Fixes: #22431
Coverity CID :207984
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
The shared irq support isn't needed in this driver. We just need to
deal with the fact that some SoCs have only a single interrupt line and
some have three interrupts. We can just ifdef that based on
DT_NUM_IRQS.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Calling device_set_power_state() with DEVICE_PM_SUSPEND_STATE then
DEVICE_PM_OFF_STATE creates an assert in nrf driver
Signed-off-by: Ismael Fillonneau <ismael.fillonneau@stimio.fr>
In the default configuration of the stm32g4 is the dual bank mode.
In dual bank mode, the flash is split into two banks with 256k each.
The erase pages have a range form 0 to 127, where each page has 2k.
If one wants to erase an area above 256k, the driver has to switch
to bank 2 befor erasing. Otherwise it will erase the page moulo 127.
Signed-off-by: Alexander Wachter <alexander.wacher@leica-geosystems.com>
This commit introduces some logs in the stm32 flash implementation.
Thith the logs it is easier to locate problems when they arrise.
Signed-off-by: Alexander Wachter <alexander.wacher@leica-geosystems.com>
A txcnt of zero prevents transmission, as transmit requires the number
of entries in the transmit fifo to be strictly less than the txcnt
value. Set the default to 1.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Convert the driver to use DT_INST_ defines, update all dependent dts,
soc and board files.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This allows us to start using DT_NODELABEL() to access SPIMs that way,
instead of via an alias.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
uart_configure verification handler was missing what would cause a crash
if called from a user thread.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Add the get_entropy_isr API function for the gecko entropy
driver. When the function is invoked without the ENTROPY_BUSYWAIT
flag, it returns whatever data is available in a non-blocking manner.
Signed-off-by: Pooja Karanjekar <pooja.karanjekar@lemonbeat.com>
Starting a SMI write operation without waiting for completion of the
preceding SMI read operation cause the write operation to fail if
the time between the 2 operations it too short. This leads to the
PHY being in an unusable state on the MIMRT1060-EVK eval board.
In addition the value of the register was not used, as consequence
some bits were not preserved.
The solution is to do a read/modify/write to set only the
ref clock bit, which sets the PHY into 50MHz clock mode,
and keep the value of the other bits.
Signed-off-by: Armand Ciejak <armand@riedonetworks.com>
Force PHY normal operation in eth_mcux_phy_setup in case strap-in
pins configure the PHY in factory test mode.
Signed-off-by: Armand Ciejak <armand@riedonetworks.com>
Don't use DT_INST_0_SOC_NV_FLASH_LABEL as device name.
Use DT_FLASH_DEV_NAME instead
Fixes#23678
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
At OpenThread stack on ieee802154_radio_handle_ack method the
net_pkt_read fail because net_pkt_cursor wasn't proper initialized.
This ensures that net_pkt_cursor is initialized for any ack frame.
Another hidden problem fixed was the frags property on net_buf. Now
it is defined as NULL to ensures that no fragments are available.
The ack frame should be returned to OT only if requested. In this
case, the IEEE 802.15.4 Frame Control field from TX frag is now
verified for an ACK request and if OT requires ACK response it will
be proper handled and dispatched.
Fixes#23595
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This commit reworks the Xilinx TTC timer driver to use the "match" mode
instead of the "interval" mode which counts up to the specified value
and resets to zero.
Using the "match" mode ensures that the timer keeps counting even after
an interrupt is triggered, and facilitates the tickless mode support
implementation.
This also allows `z_timer_cycle_get_32` to return the correct cycle
count when interrupt is locked; thereby, fixing the k_busy_wait hang
issue.
Note that the TTC "match" mode emulation (and tickless timer operation)
is only stable when the QEMU icount mode is enabled.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This adds support for the Espressif ESP8266 and ESP32 devices to be used
as peripherals on a UART.
There are two main AT command versions that can be selected, 1.7 and
2.0. Since they behave a bit different it is important to select the
one that matches the used in the firmware on your device.
When downloading large amounts of data it is highly recommended to
enable CONFIG_ESP_PASSIVE_TCP and flow control on the UART so that
data is not lost due to UART speed or receive buffer size.
Currently unsupported:
- Changing UDP endpoint with a sendto()
- Bind to a specific local port
- Server socket operations, ie listen() and accept()
Official AT firmware for ESP8266 and ESP32 can be found at:
https://github.com/espressif/esp-at
Signed-off-by: Tobias Svehagen <tobias.svehagen@gmail.com>
This commit adds the "monitor task" to detect and report any changes
in the PHY link status to the operating system.
The monitor task is perodically executed to poll the link status from
the PHY and call `net_eth_carrier_{off,on}` based on the detected
link status change.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The `link_configure` function currently configures the `GMAC_UR`
register and forces the RMII interface.
This is not necessary because the `GMAC_UR` register is already
configured with an appropriate value based on `CONFIG_ETH_SAM_GMAC_MII`
in `gmac_init`.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit adds the PHY link status query function that can be used
for detecting the Ethernet connection.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The IIS2MDC is a 3D digital magnetometer ultra-low power sensor
for industrial applications, which can be interfaced through
either I2C or SPI bus.
https://www.st.com/resource/en/datasheet/iis2mdc.pdf
This driver is based on stmemsc i/f v1.02.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
