Use the CODE_DATA_RELOCATION_SRAM config to indentify code relocated
to SRAM so we can setup the MPU for the SRAM region used for code
relocation.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
1. This will help us identify if the relocation is to
SRAM which is used when setting up the MPU entry
for the SRAM region where code is relocated
2. Move CODE_DATA_RELOCATION configs to ARM specific
folder
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The AUDIO_DMIC INIT_PRIORITY definition is set to 60 by default,
but this value is causing dmic drivers to be initialized prior to
i2s, to which they are dependent from.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Fixes an issue with mcuboot where the SoC will freeze when the dpll is
disabled since `atmel_samd_init` was already run in the bootloader.
Signed-off-by: Abram Early <abram.early@gmail.com>
The cbprintf packaging needs CONFIG_CBPRINTF_PACKAGE_LONGDOUBLE
to be enabled to work with long double. So #ifdef that inside
CONFIG_FPU.
Also add to the sample.yaml to enable testing with FPU and
long doubles.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The size of long double on x86-32 is 12 which is not
a power of 2, and this results in build error when it is
being used for alignment of buf32 in log_core.c.
So manually set it to 16.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
We need to clear interrupt status, before we enable the interrupt.
So I let ite_intc_isr_clear() to be global function.
Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
The i2s_config structure passed to the i2s_configure() function is
not supposed to be modified by the driver. Similarly, the structure
returned by the i2s_config_get() function is not supposed to be
modified outside the driver.
Decorate the pointers to those structures with the const qualifier
and correct one driver that actually modified the structure passed
to i2s_configure().
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Introduce a new enumeration value that allows setting configuration
and triggering commands for both I2S streams simultaneously.
Such possibility is especially important on hardware where the streams
can be only enabled/disabled (but not started/stopped) independently,
like it is in nRF SoCs.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Automatic collision detection for half-duplex mode can be enabled
by setting `collision-detection` proprety for uart hardware
in the dts file. If the transmitted bit does not match the received
bit an error is raised. This is useful in RS-485 half-duplex mode.
Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
Certain uarts support collision detection. This is mainly used in
half-duplex scenarios, like RS-485 and raises an error when bits
output on the TX line do not match the bits received on the RX line.
Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
Both z_arm64_exit_exc and z_arm64_exit_exc_fpu_done must be within
the same section as execution falls through here.
If z_arm64_exit_exc_fpu_done creates a section of its own then the
linker is free to disjoint the code and we absolutely don't want that.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
This adds k_thread_join() to the thread being used in
test_sem_take_timeout_isr() to avoid a thread re-use error
in the test after this one.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The permission to use multiple_condvar is not granted to test
test_condvar_multiple_threads_wait_wake, which results in
bunch or permission error messages, and actually not testing
the conditional variables. This grants the permission to
the those conditional variables to the test threads. Also,
replace the k_yield() with k_msleep() to allow all created
threads time to run. A simply k_yield() might let a few to
run before the next batch of "waking" threads start to run,
resulting in some conditional variables not being initialized
but trying to wake.
Fixes#34777
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Allow SMP processing for SOF on ADSP. Note, that after this
SOF will build with SMP support enabled on all cAVS versions,
but secondary cores will remain disabled unless an SMP
topology is loaded by the host.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
With SOF secondary cores are booted later at run-time instead
of the traditional simultaneous booting of all the cores.
Adjust arch_start_cpu() to make that possible.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
smp.c only has to be built if CONFIG_SMP is enabled. Remove
preprocessor checks from the file itself and update cmake rules
instead.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
To disable the IDC interrupt on the interrupt controller a bit
must be set in the MSD register instead of clearing the bit in
the MCD register, which has no effect.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Currently cavs_idc_smp_init() is called from a system
initialisation sequence, which only runs on the main CPU.
However, it must also run on secondary CPUs if those are
powered on later instead of simultaneously with the main
CPU.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Currently P4WQ supports queues with sets of user-provided
worked threads of arbitrary numbers. These threads are started
immediately upon initialisation.
This patch adds support for 3 more thread implementation options:
1. queue per thread. It adds a K_P4WQ_ARRAY_DEFINE() macro which
initialises an array of queues and threads of the same number.
These threads are then uniquely assigned to respective queues.
2. delayed start. With this option threads aren't started
immediately upon queue initialisation. Instead a new function
k_p4wq_enable_static_thread() has to be called to enable those
threads individually.
3. queue per CPU. With this option the user can assign CPU masks
to threads when calling k_p4wq_enable_static_thread().
Otherwise the cpu_mask parameter to that function is ignored.
Currently enabling this option implies option 2 above. Also so
far to enable queues per CPU the user has to use
K_P4WQ_ARRAY_DEFINE(), which means this option also implies 1
above, but both these restrictions can be relaxed in the
future if required.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Work items in P4WQ currently belong to the user before submission
and after exit from the handler, therefore, unless the handler
re-submits the item, accessing it in p4wq_loop() in such cases
is racy. To fix this we re-define work item ownership. Now the
item belongs to the P4WQ core until the user calls
k_p4wq_wait(). If the work item has its .sync flag set, the
function will sleep until the handler completes processing the
work item or until the timeout expires. If .sync isn't set and
the handler hasn't processed the item yet, the function returns
-EBUSY.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
When SMP is disabled, the SMP initialisation level is
undefined, therefore a different level must be used.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
When secondary cores are booted, they use the dummy thread and
the IRQ stack until they switch over to a real thread. Therefore
dummy threads shouldn't be skipped when cohering outgoing thread
stack, only threads with zero stack size should be skipped.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
Usually Zephyr boots all secondary CPUs as a part of system
boot. Some applications however need an ability to boot on
the main CPU only and enable secondary CPUs selectively at
run-time. Add a Kconfig option to support this behaviour.
When booting CPUs on demand applications also need helpers
to initialise a dummy thread and begin threaded execution
on those CPUs, add two such helpers.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
irq_enable() should be called with the composite IRQ code as its
argument, not just the Xtensa proper part of it.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
