boards: nucleo_l073rz: Use dts for clocks configuration
Convert board to use of device tree for clocks configuration. Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
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6a000c9143
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2 changed files with 22 additions and 19 deletions
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@ -42,6 +42,27 @@
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};
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};
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&clk_hse {
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hse-bypass;
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clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
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status = "okay";
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};
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&pll {
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div = <2>;
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mul = <8>;
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clocks = <&clk_hse>;
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status = "okay";
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};
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&rcc {
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clocks = <&pll>;
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clock-frequency = <DT_FREQ_M(32)>;
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ahb-prescaler = <1>;
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apb1-prescaler = <1>;
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apb2-prescaler = <1>;
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};
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&usart1 {
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pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>;
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current-speed = <115200>;
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@ -6,9 +6,6 @@ CONFIG_SOC_SERIES_STM32L0X=y
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# Platform Configuration
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CONFIG_SOC_STM32L073XX=y
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# General Kernel Options
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=32000000
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# Enable MPU
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CONFIG_ARM_MPU=y
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@ -25,20 +22,5 @@ CONFIG_PINMUX=y
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# GPIO Controller
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CONFIG_GPIO=y
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# Clock configuration
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# Enable Clocks
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CONFIG_CLOCK_CONTROL=y
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# SYSCLK selection
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CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
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# HSE configuration
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CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
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# however, the board does not have an external oscillator, so just use
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# the 8MHz clock signal coming from integrated STLink
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CONFIG_CLOCK_STM32_HSE_BYPASS=y
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# PLL configuration
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CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
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# produce 32MHz clock at PLL output
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CONFIG_CLOCK_STM32_PLL_MULTIPLIER=8
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CONFIG_CLOCK_STM32_PLL_DIVISOR=2
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CONFIG_CLOCK_STM32_AHB_PRESCALER=1
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CONFIG_CLOCK_STM32_APB1_PRESCALER=1
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CONFIG_CLOCK_STM32_APB2_PRESCALER=1
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