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boards: stm32g071b_disco: Use dts for clocks configuration

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Convert board to use of device tree for clocks configuration.

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
This commit is contained in:
Alexandre Bourdiol 2021-05-03 14:58:45 +02:00 • committed by Anas Nashif
commit 803912b236
2 changed files with 22 additions and 19 deletions
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21
boards/arm/stm32g071b_disco/stm32g071b_disco.dts
View file

@ -76,6 +76,27 @@
};
};
&clk_hsi {
status = "okay";
};
&pll {
div-m = <1>;
mul-n = <8>;
div-p = <2>;
div-q = <2>;
div-r = <2>;
clocks = <&clk_hsi>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(64)>;
ahb-prescaler = <1>;
apb1-prescaler = <1>;
};
&usart3 {
pinctrl-0 = <&usart3_tx_pc10 &usart3_rx_pc11>;
current-speed = <115200>;

20
boards/arm/stm32g071b_disco/stm32g071b_disco_defconfig
View file

@ -5,9 +5,6 @@
CONFIG_SOC_SERIES_STM32G0X=y
CONFIG_SOC_STM32G071XX=y
# 64MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=64000000
# Serial Drivers
CONFIG_SERIAL=y
CONFIG_UART_INTERRUPT_DRIVEN=y
@ -22,20 +19,5 @@ CONFIG_PINMUX=y
# GPIO Controller
CONFIG_GPIO=y
# Clock configuration
# Enable Clocks
CONFIG_CLOCK_CONTROL=y
# SYSCLK selection
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
# PLL configuration
CONFIG_CLOCK_STM32_PLL_SRC_HSI=y
# produce 64MHz clock at PLL output
CONFIG_CLOCK_STM32_PLL_M_DIVISOR=1
CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=8
CONFIG_CLOCK_STM32_PLL_P_DIVISOR=2
CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=2
CONFIG_CLOCK_STM32_PLL_R_DIVISOR=2
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
CONFIG_CLOCK_STM32_APB1_PRESCALER=1