The current AArch64 interrupt system relies on the multi-level
interrupt mechanism and the `irq_nextlevel` public interface to invoke
the Generic Interrupt Controller (GIC) driver functions.
Since the GIC driver has been refactored to provide a direct interface,
in order to resolve various implementation issues described in the GIC
driver refactoring commit, the architecture interrupt control functions
are updated to directly invoke the GIC driver functions.
This commit also adds support for the ARMv8 cores (e.g. Cortex-A53)
that allow interfacing to a custom external interrupt controller
(i.e. non-GIC) by mapping the architecture interrupt control functions
to the SoC layer interrupt control functions when
`ARM_CUSTOM_INTERRUPT_CONTROLLER` configuration is enabled.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The current AArch32 (Cortex-R and to-be-added Cortex-A) interrupt
system relies on the multi-level interrupt mechanism and the
`irq_nextlevel` public interface to invoke the Generic Interrupt
Controller (GIC) driver functions.
Since the GIC driver has been refactored to provide a direct interface,
in order to resolve various implementation issues described in the GIC
driver refactoring commit, the architecture interrupt control functions
are updated to directly invoke the GIC driver functions.
This commit also adds support for the Cortex-R cores (Cortex-R4 and R5)
that allow interfacing to a custom external interrupt controller
(i.e. non-GIC) by introducing the `ARM_CUSTOM_INTERRUPT_CONTROLLER`
configuration that maps the architecture interrupt control functions to
the SoC layer interrupt control functions.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The current Generic Interrupt Controller (GIC) driver makes use of the
multi-level interrupt mechanism and `irq_nextlevel` public interface.
This is a less-than-ideal implementation for the following reasons:
1. The GIC is often used as the main interrupt controller for the
Cortex-A and Cortex-R family SoCs and, in this case, it is not a 2nd
level interrupt controller; in fact, it is the root interrupt
controller and therefore should be treated as such.
2. The only reason for using `irq_nextlevel` here is to interface the
architecture implementation to the interrupt controller functions.
Since there is no nesting or multiple instances of an interrupt
controller involved, there is really no point in adding such an
abstraction.
3. 2nd level topology adds many unnecessary abstractions and results
in strange coding artefacts as well as performance penalty due to
additional branching.
This commit refactors the GIC driver interface as follows:
1. Remove the current GIC driver interface based on the multi-level
interrupt mechanism and the `irq_nextlevel` public interface.
2. Define the GIC driver interface in
`include/drivers/interrupt_controller/gic.h` and allow the arch
implementation to directly invoke this interface.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This macro allows to easily initialize utf8 strings (struct mqtt_utf8)
from C literals, as it automatically calculates string length.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
We rename the z_arm_int_lib_init() function to
z_arm_interrupt_init(), aligning to how other
ARCHes name their IRQ initialization function.
There is nothing about 'library' in this
functionality, so we remove the 'lib' in-fix.
The commit does not introduce any behavior changes.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
i2c_slave_register/unregister must not be syscalls since it provides
callbacks that will run in supervisor mode. Nonetheless, verification
functions were missing which means that these functions never worked
from usermode.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
There are scenarios where there is a NAT firewall in between MQTT
client and server. In such case, the NAT TCP timeout may be shorter
than MQTT keepalive timeout and TCP timeout. The the MQTT ping
request message is dropped by the NAT firewall, so that it cannot be
received by the server, resulting in void MQTT ping response message.
There is no TCP FIN or RST at all. The application looks hang-up
until TCP timeout happens on the client side, which may take too
long.
Therefore, the event MQTT_EVT_PINGRESP is added to inform the
application that the route between client and server is still valid.
Signed-off-by: PK Chan <pak.kee.chan@nordicsemi.no>
This change removes the hardcoded subsystem list in gen_kobject_list.py
favor of marking the relevant driver API structs with the _subsystem
sentinel.
Signed-off-by: Corey Wharton <coreyw7@fb.com>
This change extends the parse_syscalls.py script to scan for a
__subsystem sentinal added to driver api declarations. It thens
generates a list that is passed into gen_kobject_list.py to extend
the subsystems list. This allows subsystems to be declared in the
code instead of a separate python list and provides a mechanism for
defining out-of-tree subsystems.
Signed-off-by: Corey Wharton <coreyw7@fb.com>
This commit introduces the `COMPILER_ISA_THUMB2` symbol to allow
choosing either the ARM or Thumb instruction set for C code
compilation.
In addition, this commit introduces the `ASSEMBLER_ISA_THUMB2` helper
symbol to specify the default target instruction set for the assembler.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The variable needs to be an atomic_t, and in one case it was
being incremented outside of an atomic_inc/atomic_add.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Adding the ability to set and get pthread names by defining
some non-standard extension functions that were first
introduced by Glibc.
Similar to zephyr thread naming, these allow for thread
tracking and debugging even when using the more portable
posix API.
Though Glibc was the originator, the current POSIX functions
have return codes based on Oracle's adopted spec, so these
functions follow suit. The Oracle and Glibc function
prototypes match.
Signed-off-by: Nicholas Lowell <nlowell@lexmark.com>
This allows flash_img.c to be used outside of mcuboot scope.
Add new call to not break existing code.
Signed-off-by: Håkon Øye Amundsen <haakon.amundsen@nordicsemi.no>
While CONFIG_ARCH_POSIX in general isn't compatible with Zephyr POSIX
subsys (because CONFIG_ARCH_POSIX itself is implemented on top of
POSIX, so there're obvious conflicts), apply workaround to allow to
at least use clock_gettime() and clock_settime() functions.
This change is grounded in upcoming support for date manipulation
commands for Zephyr shell, which are implemented using functions
above. There's no guarantee that CONFIG_ARCH_POSIX and Zephyr POSIX
subsys will coexist for any other usecase. (But the change is
relatively clean and is definitely in the right direction of
prototyping ways of such a coexistance.)
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
(cherry picked from commit 4a05644bce81f4792c018964d29c1158f1982d1e)
According to the Zephyr VS HCI specification:
Only Read_Version_Information and Read_Supported_Commands commands are
mandatory.
Check for supported Read Supported Features command before issuing this
command to the controller.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Add the Energy Scan capability to the possible capabilities list.
Create new energy scan callback function type to make its usage
more readable.
Signed-off-by: Marek Porwisz <marek.porwisz@nordicsemi.no>
According to LWM2M specification, when Queue Mode is used, the LWM2M
client should keep the reciever on for specified time after sending A
CoAP message. This commit adds a new LWM2M event,
`LWM2M_RD_CLIENT_EVENT_QUEUE_MODE_RX_OFF`, to facilitate the process by
notifying the application when it's safe to turn the receiver off.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
We now negotiate DNS servers in the IPCP configuration. This has been
observed to speed up the connection setup. The received DNS servers
are used by the DNS resolver library, but we leave it optional since
the static server list might be preferable.
Increase MAX_IPCP_OPTIONS to 4 so that we can nack all RFC 1877
options.
Signed-off-by: Göran Weinholt <goran.weinholt@endian.se>
arc mpu ver3 does not allow mpu region overlap, so need to enable
MPU_REQUIRES_NON_OVERLAPPING_REGIONS.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
In C++ designated initializers require that designators used in the
expression must appear in the same order as the data members.
In addition, 7-2018-q2-update version of g++ doesn't support
implicit member initialization, so all members must be
initialized.
Signed-off-by: Alexey Eremin <a.eremin.msu@gmail.com>
Change the doxygen doc from "negative on error" to -ENOSUP and
negative value on driver specific errors.
Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
sys/timeutil.h could not be used without including first
<zephyr/types.h> because s64_t type definition was missing.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Document the need for the caller to call bt_conn_unref on the
connection object returned from API functions.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Add zephyr execution regions(text, rodata, data, noinit, bss, etc.)
with proper attributes to translation tables.
Linker script has been modified a little to align these sections to
minimum translation granule(4 kB).
With this in place, code cannot be overwritten accidently as it is
marked read only. Similarly, execution is prohibited from data/RW
section as it is marked execute-never.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Add MMU support for ARMv8A. We support 4kB translation granule.
Regions to be mapped with specific attributes are required to be
at least 4kB aligned and can be provided through platform file(soc.c).
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Following changes are done:
- The vector table should be placed in text segment.
- Removed Vector relay table related entries as it is
only applicable to aarch32.
- irq_vector_table contains ISR pointers - should be placed
in rodata segment.
- put openocd_dbg in rodata and skip adding <linker_relocate.ld>
as CONFIG_CODE_DATA_RELOCATION is not defined for aarch64
currently (add later if needed).
Fixes: #22673
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
plt and got sections are used for dynamic linking which
is not supported in Zephyr.
Reference: #11953
commit 3ba7097e73 ("linker: add orphan sections to linker script")
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
We introduce a macro to define the IRQ priority level for
PendsV, and use it in arch/arm/include/aarch32/exc.h
to set the PendSV IRQ level. The commit does not change
the behavior of PendSV interrupt.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit adds some documentation for the exception
priority scheme for 32-bit ARM architecture variants.
In addition we document that SVCall priority level for
ARMv6-M is implicitly set to highest (by leaving it as
default).
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Public arm/aarch32/exc.h header file is used by both
Cortex-M and Cortex-R; we update the header information
accordingly.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
If IO APIC is in logical destination mode, local APICs compare their
logical APIC ID defined in LDR (Logical Destination Register) with
the destination code sent with the interrupt to determine whether or not
to accept the incoming interrupt.
This patch programs LDR in xAPIC mode to support IO APIC logical mode.
The local APIC ID from local APIC ID register can't be used as the
'logical APIC ID' because LAPIC ID may not be consecutive numbers hence
it makes it impossible for LDR to encode 8 IDs within 8 bits.
This patch chooses 0 for BSP, and for APs, cpu_number which is the index
to x86_cpuboot[], which ultimately assigned in z_smp_init[].
Signed-off-by: Zide Chen <zide.chen@intel.com>
Document that all services that should be included in the initial
database hash should be registered before calling settings load. All
services added after settings_load will trigger a new hash calculation
and a new value stored. This would result in the database hash always
being rewritten.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
The Runtime API and the name processing API were omitted in
the documentation as were not included in any doxygen group.
This patch includes them in dedicated settings API doxygen
sub-groups.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
This is aligned with the documentation which states that an error shall
be returned if the work has been completed:
'-EINVAL Work item is being processed or has completed its work.'
Though in order to be able to resubmit from the handler itself it needs
to be able to distinct when the work is already completed so instead of
-EINVAL it return -EALREADY when the work is considered to be completed.
Fixes#22803
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
This commit fixes the improper naming of the ROM sections.
1. Rename the first ROM section, which was previously named using the
`_TEXT_SECTION_NAME` definition, to `rom_start`, as this section does
not actually represent the text section.
2. Rename the second ROM section, which was previously named
`_TEXT_SECTION_NAME_2` which supposedly refers to the definition of
the same name that does not exist, to `_TEXT_SECTION_NAME`. Note that
this is indeed the section that contains the text section from the
source image.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit cleans up the linker.ld file for the Cortex-R arch.
* Convert all TAB characters to SPACE.
* Fix insane placement of curly brackets.
* Fix overall text alignments.
* Remove the special handlings for the Cortex-M devices that were
copied from `include/arm/aarch32/cortex_m/scripts/linker.ld`.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
GPIO_DIR_OUT is deprecated but allowed in devicetree bindings because
some in-tree bindings provided it in the past. GPIO_DIR_IN was the
former explicit way of representing the default direction. Put it
back so symmetry is maintained.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the special x86 operand modifier 'p' to print the raw value.
This fixes an issue on x86-64 where errors were generated
if a constant larger than INT_MAX was used.
Values larger than UINT_MAX are still unsupported (on any arch).
Fixes: #22542
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This commit relocates the `_vector_end` symbol that was previously
placed after the OpenOCD sections to before these sections, as the
OpenOCD debug sections are not part of the "vector table."
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit fixes the improper naming of the ROM sections.
1. Rename the first ROM section, which was previously named using the
`_TEXT_SECTION_NAME` definition, to `rom_start`, as this section does
not actually represent the text section.
2. Rename the second ROM section, which was previously named
`_TEXT_SECTION_NAME_2` which supposedly refers to the definition of
the same name that does not exist, to `_TEXT_SECTION_NAME`. Note that
this is indeed the section that contains the text section from the
source image.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit cleans-up the linker.ld file for the AArch64 arch.
* Convert all TAB characters to SPACE.
* Fix insane placement of curly brackets.
* Fix overall text alignments.
* Remove the special handlings for the Cortex-M devices that were
copied from `include/arm/aarch32/cortex_m/scripts/linker.ld`.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
