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arch: arm: aarch32: Refactor interrupt interface

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The current AArch32 (Cortex-R and to-be-added Cortex-A) interrupt
system relies on the multi-level interrupt mechanism and the
`irq_nextlevel` public interface to invoke the Generic Interrupt
Controller (GIC) driver functions.

Since the GIC driver has been refactored to provide a direct interface,
in order to resolve various implementation issues described in the GIC
driver refactoring commit, the architecture interrupt control functions
are updated to directly invoke the GIC driver functions.

This commit also adds support for the Cortex-R cores (Cortex-R4 and R5)
that allow interfacing to a custom external interrupt controller
(i.e. non-GIC) by introducing the `ARM_CUSTOM_INTERRUPT_CONTROLLER`
configuration that maps the architecture interrupt control functions to
the SoC layer interrupt control functions.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit is contained in:
Stephanos Ioannidis 2020-02-11 16:21:36 +09:00 • committed by Ioannis Glaropoulos
commit 2c5ca5505c
6 changed files with 134 additions and 39 deletions
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49
include/arch/arm/aarch32/irq.h
View file

@ -29,20 +29,52 @@ GTEXT(z_arm_int_exit);
GTEXT(arch_irq_enable)
GTEXT(arch_irq_disable)
GTEXT(arch_irq_is_enabled)
#if defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
GTEXT(z_soc_irq_get_active)
GTEXT(z_soc_irq_eoi)
#endif /* CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
#else
#if !defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
extern void arch_irq_enable(unsigned int irq);
extern void arch_irq_disable(unsigned int irq);
extern int arch_irq_is_enabled(unsigned int irq);
/* internal routine documented in C file, needed by IRQ_CONNECT() macro */
extern void z_arm_irq_priority_set(unsigned int irq, unsigned int prio,
u32_t flags);
#else
/*
* When a custom interrupt controller is specified, map the architecture
* interrupt control functions to the SoC layer interrupt control functions.
*/
void z_soc_irq_init(void);
void z_soc_irq_enable(unsigned int irq);
void z_soc_irq_disable(unsigned int irq);
int z_soc_irq_is_enabled(unsigned int irq);
void z_soc_irq_priority_set(
unsigned int irq, unsigned int prio, unsigned int flags);
unsigned int z_soc_irq_get_active(void);
void z_soc_irq_eoi(unsigned int irq);
#define arch_irq_enable(irq) z_soc_irq_enable(irq)
#define arch_irq_disable(irq) z_soc_irq_disable(irq)
#define arch_irq_is_enabled(irq) z_soc_irq_is_enabled(irq)
#define z_arm_irq_priority_set(irq, prio, flags) \
z_soc_irq_priority_set(irq, prio, flags)
#endif /* !CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
extern void z_arm_int_exit(void);
#if defined(CONFIG_ARMV7_R)
static ALWAYS_INLINE void z_arm_interrupt_init(void)
{
}
#else
extern void z_arm_interrupt_init(void);
#endif
/* macros convert value of it's argument to a string */
#define DO_TOSTR(s) #s
@ -52,11 +84,6 @@ extern void z_arm_interrupt_init(void);
#define DO_CONCAT(x, y) x ## y
#define CONCAT(x, y) DO_CONCAT(x, y)
/* internal routine documented in C file, needed by IRQ_CONNECT() macro */
extern void z_arm_irq_priority_set(unsigned int irq, unsigned int prio,
u32_t flags);
/* Flags for use with IRQ_CONNECT() */
#ifdef CONFIG_ZERO_LATENCY_IRQS
/**