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arch: arm: aarch64: Refactor interrupt interface

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The current AArch64 interrupt system relies on the multi-level
interrupt mechanism and the `irq_nextlevel` public interface to invoke
the Generic Interrupt Controller (GIC) driver functions.

Since the GIC driver has been refactored to provide a direct interface,
in order to resolve various implementation issues described in the GIC
driver refactoring commit, the architecture interrupt control functions
are updated to directly invoke the GIC driver functions.

This commit also adds support for the ARMv8 cores (e.g. Cortex-A53)
that allow interfacing to a custom external interrupt controller
(i.e. non-GIC) by mapping the architecture interrupt control functions
to the SoC layer interrupt control functions when
`ARM_CUSTOM_INTERRUPT_CONTROLLER` configuration is enabled.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit is contained in:
Stephanos Ioannidis 2020-02-11 18:08:28 +09:00 • committed by Ioannis Glaropoulos
commit 91ceee782f
7 changed files with 110 additions and 19 deletions
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36
include/arch/arm/aarch64/irq.h
View file

@ -27,7 +27,14 @@ extern "C" {
GTEXT(arch_irq_enable)
GTEXT(arch_irq_disable)
GTEXT(arch_irq_is_enabled)
#if defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
GTEXT(z_soc_irq_get_active)
GTEXT(z_soc_irq_eoi)
#endif /* CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
#else
#if !defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
extern void arch_irq_enable(unsigned int irq);
extern void arch_irq_disable(unsigned int irq);
extern int arch_irq_is_enabled(unsigned int irq);
@ -36,6 +43,35 @@ extern int arch_irq_is_enabled(unsigned int irq);
extern void z_arm64_irq_priority_set(unsigned int irq, unsigned int prio,
u32_t flags);
#else
/*
* When a custom interrupt controller is specified, map the architecture
* interrupt control functions to the SoC layer interrupt control functions.
*/
void z_soc_irq_init(void);
void z_soc_irq_enable(unsigned int irq);
void z_soc_irq_disable(unsigned int irq);
int z_soc_irq_is_enabled(unsigned int irq);
void z_soc_irq_priority_set(
unsigned int irq, unsigned int prio, unsigned int flags);
unsigned int z_soc_irq_get_active(void);
void z_soc_irq_eoi(unsigned int irq);
#define arch_irq_enable(irq) z_soc_irq_enable(irq)
#define arch_irq_disable(irq) z_soc_irq_disable(irq)
#define arch_irq_is_enabled(irq) z_soc_irq_is_enabled(irq)
#define z_arm64_irq_priority_set(irq, prio, flags) \
z_soc_irq_priority_set(irq, prio, flags)
#endif /* !CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
extern void z_arm64_interrupt_init(void);
/* All arguments must be computable by the compiler at build time.
*
* Z_ISR_DECLARE will populate the .intList section with the interrupt's

2
include/arch/arm/aarch64/timer.h
View file

@ -16,7 +16,7 @@
extern "C" {
#endif
#define ARM_ARCH_TIMER_IRQ ((ARM_TIMER_VIRTUAL_IRQ + 1) << 8)
#define ARM_ARCH_TIMER_IRQ ARM_TIMER_VIRTUAL_IRQ
#define CNTV_CTL_ENABLE ((1) << 0)