arch: aarch32: define macro for PendSV IRQ priority level
We introduce a macro to define the IRQ priority level for PendsV, and use it in arch/arm/include/aarch32/exc.h to set the PendSV IRQ level. The commit does not change the behavior of PendSV interrupt. Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
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2 changed files with 9 additions and 1 deletions
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@ -85,7 +85,7 @@ static ALWAYS_INLINE bool arch_is_in_nested_exception(const z_arch_esf_t *esf)
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*/
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static ALWAYS_INLINE void z_arm_exc_setup(void)
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{
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NVIC_SetPriority(PendSV_IRQn, 0xff);
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NVIC_SetPriority(PendSV_IRQn, _EXC_PENDSV_PRIO);
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#ifdef CONFIG_CPU_CORTEX_M_HAS_BASEPRI
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/* Note: SVCall IRQ priority level is left to default (0)
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@ -14,6 +14,8 @@
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#ifndef ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_EXC_H_
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#define ZEPHYR_INCLUDE_ARCH_ARM_AARCH32_EXC_H_
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#include <devicetree.h>
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/* for assembler, only works with constants */
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#define Z_EXC_PRIO(pri) (((pri) << (8 - DT_NUM_IRQ_PRIO_BITS)) & 0xff)
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@ -32,6 +34,8 @@
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* Regular HW IRQs are always assigned priority levels lower than the priority
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* levels for SVCalls, Zero-Latency IRQs and processor faults.
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*
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* PendSV IRQ (which is used in Cortex-M variants to implement thread
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* context-switching) is assigned the lowest IRQ priority level.
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*/
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#if defined(CONFIG_CPU_CORTEX_M_HAS_PROGRAMMABLE_FAULT_PRIOS)
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#define _EXCEPTION_RESERVED_PRIO 1
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@ -51,6 +55,10 @@
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#define _EXC_IRQ_DEFAULT_PRIO Z_EXC_PRIO(_IRQ_PRIO_OFFSET)
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/* Use lowest possible priority level for PendSV */
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#define _EXC_PENDSV_PRIO 0xff
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#define _EXC_PENDSV_PRIO_MASK Z_EXC_PRIO(_EXC_PENDSV_PRIO)
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#ifdef _ASMLANGUAGE
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GTEXT(z_arm_exc_exit);
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#else
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