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interrupt_controller: gic: Refactor GIC driver interface

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The current Generic Interrupt Controller (GIC) driver makes use of the
multi-level interrupt mechanism and `irq_nextlevel` public interface.

This is a less-than-ideal implementation for the following reasons:

1. The GIC is often used as the main interrupt controller for the
  Cortex-A and Cortex-R family SoCs and, in this case, it is not a 2nd
  level interrupt controller; in fact, it is the root interrupt
  controller and therefore should be treated as such.

2. The only reason for using `irq_nextlevel` here is to interface the
  architecture implementation to the interrupt controller functions.
  Since there is no nesting or multiple instances of an interrupt
  controller involved, there is really no point in adding such an
  abstraction.

3. 2nd level topology adds many unnecessary abstractions and results
  in strange coding artefacts as well as performance penalty due to
  additional branching.

This commit refactors the GIC driver interface as follows:

1. Remove the current GIC driver interface based on the multi-level
  interrupt mechanism and the `irq_nextlevel` public interface.

2. Define the GIC driver interface in
  `include/drivers/interrupt_controller/gic.h` and allow the arch
  implementation to directly invoke this interface.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit is contained in:
Stephanos Ioannidis 2020-02-11 15:47:59 +09:00 • committed by Ioannis Glaropoulos
commit 50519ce7ba
2 changed files with 153 additions and 104 deletions
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73
include/drivers/interrupt_controller/gic.h
View file

@ -4,10 +4,20 @@
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief Driver for ARM Generic Interrupt Controller
*
* The Generic Interrupt Controller (GIC) is the default interrupt controller
* for the ARM A and R profile cores. This driver is used by the ARM arch
* implementation to handle interrupts.
*/
#ifndef ZEPHYR_INCLUDE_DRIVERS_GIC_H_
#define ZEPHYR_INCLUDE_DRIVERS_GIC_H_
#include <arch/cpu.h>
#include <zephyr/types.h>
#include <device.h>
/*
* GIC Register Interface Base Addresses
@ -196,4 +206,65 @@
#endif /* CONFIG_GIC_VER <= 2 */
#ifndef _ASMLANGUAGE
/*
* GIC Driver Interface Functions
*/
/**
* @brief Initialise ARM GIC driver
*
* @return 0 if successful
*/
int arm_gic_init(void);
/**
* @brief Enable interrupt
*
* @param irq interrupt ID
*/
void arm_gic_irq_enable(unsigned int irq);
/**
* @brief Disable interrupt
*
* @param irq interrupt ID
*/
void arm_gic_irq_disable(unsigned int irq);
/**
* @brief Check if an interrupt is enabled
*
* @param irq interrupt ID
* @return Returns true if interrupt is enabled, false otherwise
*/
bool arm_gic_irq_is_enabled(unsigned int irq);
/**
* @brief Set interrupt priority
*
* @param irq interrupt ID
* @param prio interrupt priority
* @param flags interrupt flags
*/
void arm_gic_irq_set_priority(
unsigned int irq, unsigned int prio, unsigned int flags);
/**
* @brief Get active interrupt ID
*
* @return Returns the ID of an active interrupt
*/
unsigned int arm_gic_get_active(void);
/**
* @brief Signal end-of-interrupt
*
* @param irq interrupt ID
*/
void arm_gic_eoi(unsigned int irq);
#endif /* !_ASMLANGUAGE */
#endif /* ZEPHYR_INCLUDE_DRIVERS_GIC_H_ */