Add ELC nodes to RA SoC DTS files and provide
device-specific ELC signal enums for Devicetree bindings
Signed-off-by: Khanh Nguyen <khanh.nguyen.wz@bp.renesas.com>
Add support for the Renesas RA Event Link Controller, including
driver sources, Kconfig, and Devicetree bindings.
Signed-off-by: Khanh Nguyen <khanh.nguyen.wz@bp.renesas.com>
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
Fixes the JEDEC-ID value of the W25Q32JVWJ on-chip flash of RT1024.
It was incorrectly set to the value for the different IS25WP064 chip.
Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
Microchip is adding more non-MEC devices to Zephyr such as
SAM and PIC32. Each device family will have its own subfolder.
We moved the existing MEC DTSI files into a new mec subfolder.
We also updated the existing MEC boards include paths.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Add information about nfct node status. For cpuapp status is irrelevant
because NFCT is by default assigned to cpuapp but for cpurad node needs
to have reserved status.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Use nordic,nrf-nfct-v2 compatible in the main nrf54h20 devicetree
description.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
Configure the active discharge feature for both the BUCK and LDO/LDSW
blocks through the appropriate registers.
Signed-off-by: Jordan Yates <jordan@embeint.com>
As a software construct that depends upon Bluetooth being enabled,
this device should not be enabled by default. Most nRF SoC's have
internal `RNG` hardware that is much more efficient to access.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Explicitly enable `rng_hci` on nRF5340 application core boards, as the
application core dos not have access to a dedicated RNG hardware
peripheral (limited to the network core).
Signed-off-by: Jordan Yates <jordan@embeint.com>
Add support to use DMA mode with cc23x0 AES module. This consists in
specifying the DMA channels and peripherals.
Signed-off-by: Julien Panis <jpanis@baylibre.com>
Two DMA channels are assigned to AES channels A and B respectively.
Each channel A/B has an interface to control the conditions that will
generate requests on the related DMA channel: trigger condition,
R/W address, and DMA done action.
Signed-off-by: Julien Panis <jpanis@baylibre.com>
The intention was to use the "interface-name" string property in the
interface string descriptor, but using the label property is acceptable
again. Therefore, allow the use of the DT label property string in the
interface string descriptor.
Follow exactly the same approach as in the CDC ACM implementation
introduced in the commit b0791400f6
("usb: device_next: cdc_acm: allow setting the interface description").
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
In j722s_main.dtsi, the pinctrl block must have reg length 0x2b0
As per TRM, PADCONFIG registers range from 0 to 171.
Thus, length = (171-0+1)*4 = 172*4 = 0x2b0.
Reference: https://www.ti.com/lit/ds/symlink/tda4ven-q1.pdf
Table 5.1 contains data on PADCONFIG registers.
Signed-off-by: Shreyas Shankar <s-shankar@ti.com>
Add a support for TI MSPM0 Timer which has sub module for Counter,
Timer Capture and Timer Compare.
Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
TI MSPM0 SoC series has General Purpose Timer and Advanced control timers
with Counting module, Capture block (measure input signal period/time) and
Compare block (to generate time expiry, output waveform like PWM).
Add a support for counter driver with alarm and counter top functions.
Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
Add property which indicates that PWM instance supports IDLEOUT
feature. Add property to all instances that supports it.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
The temperature calibration addresses of ts-cal1-addr and ts-cal2-addr
are not shared between stm32wba5 and stm32wba6 these addresses are now
separated to the dedicated device-tree
Signed-off-by: Romain Jayles <romain.jayles@st.com>
Add support to use DMA mode with cc23x0 UART module. This consists in
specifying the DMA channels and peripherals.
Signed-off-by: Julien Panis <jpanis@baylibre.com>
Two DMA channels are assigned to TX and RX respectively:
- A TX DMA request is asserted when there is space in the FIFO.
- A RX DMA request is asserted when data is in the FIFO.
When DMA is enabled for a peripheral, the DMA transfer completion is
signaled on the peripheral's interrupt only (here UART's interrupt).
It is not signaled on the DMA dedicated interrupt.
Also, when DMA is enabled for a peripheral, the DMA controller stops
the normal transfer interrupts for this peripheral from reaching the
NVIC (the interrupts are still reported in the interrupt registers of
the peripheral). Thus, when a large amount of data is transferred using
DMA, instead of receiving multiple interrupts from the peripheral as
data flows, the NVIC receives only one interrupt when the transfer
completes (unmasked peripheral error interrupts continue to be sent
to the NVIC).
Signed-off-by: Julien Panis <jpanis@baylibre.com>
Add support to use DMA mode with cc23x0 ADC module. This consists in
specifying the DMA channel and peripheral.
Signed-off-by: Julien Panis <jpanis@baylibre.com>
The ADC has a dedicated interface for communicating with the DMA.
The ADC module provides four interrupt sources (one for each
conversion result storage register) which can be configured to
source the DMA trigger.
Signed-off-by: Julien Panis <jpanis@baylibre.com>
Add MPS4 pinctrl support by referring to
`mps4/common/partition/platform_base_address.h`
from TF-M's main branch.
Signed-off-by: Sudan Landge <sudan.landge@arm.com>
Adds skeleton dtsi for u5f9 for u5g9 to inherit from
Moves the peripheral nodes into dtsi's that actually has the peripheral
and includes them for SoC's higher in the series where applicable.
signed-off-by: Harris Tomy <harristomy@gmail.com>
The `idma` property added in 94847be1 was removed in the re-organisation
in 306dea6f. Re-add the property at a more generic location.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Add devicetree to support for Renesas RZ/G2UL
Signed-off-by: Phuc Pham <phuc.pham.xr@bp.renesas.com>
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Initial commit for SPI driver support on RSK_RX130@512KB board
with RSPI module
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Signed-off-by: Minh Tang <minh.tang.ue@bp.renesas.com>
Since `VirtIO` is not the official notation,
unify the name to `VIRTIO`.
In the text, `Virtio` and `virtio` can also be used
depending on the context.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Add RTIO async and RTIO stream functionalities that enables,
among all the other things, the sensor data streaming from FIFO.
RTIO stream supports following triggers:
- SENSOR_TRIG_FIFO_WATERMARK
- SENSOR_TRIG_FIFO_FULL
- SENSOR_TRIG_DATA_READY
Following FIFO parameters has to be defined in device tree to
correctly stream sensor data:
- fifo-watermark
- accel-fifo-batch-rate
Currently the driver can decode FIFO content with Accelerometer
16-bit samples.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
