Commit graph

11531 commits

Author SHA1 Message Date
Henrik Brix Andersen
0bdc2983d0 drivers: can: stm32: only call state change callback if state is changed
Only call the state change callback if the state has changed. Reuse the
existing function for retrieving the CAN controller state instead of
having the same code twice.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-03-11 11:27:09 -08:00
Henrik Brix Andersen
00a3a0f184 drivers: can: stm32: add statistics support
Add CAN controller statistics support to the STM32 bxCAN driver.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-03-11 11:27:09 -08:00
Carles Cufi
af9a6a6924 drivers: clock_control: nrf: Fix missing dependency to mt
The temperature sensor used in the clock_control driver requires
multithreading, but this is not compatible with mcuboot builds with
multithreading disabled.

Fixes #41597.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2022-03-11 08:22:31 -06:00
Avi Green
a2190cc92b bmi160: bmi160_bus union bugfix
bmi160.c module defines DT_DRV_COMPAT, but bmi160_trigger.c doesn't.
This causes a catastrophic chain of events.
The bmi160.c module includes bmi160.h,
in which the macro DT_ANY_INST_ON_BUS_STATUS_OKAY
affects the size of bmi160_bus union.
So bmi160.c defines a bmi160_cfg struct which contains that union.
Now, in bmi160_trigger_init we get a pointer to that config struct.
The fact that this module now includes bmi160.h without
DT_DRV_COMPAT, causes it to think the union is empty.

That doesn't cause compilation error, just undefined behaviour,
In which you address an empty struct fields.

In general, I suggest that someone makes sure it doesn't happen
in other drivers as well. The problem presented here is general,
meaning that if an h file assumes someone defined DT_DRV_COMPAT
before and it doesn't,
it may lead to some weird behaviour, like the one described.

Signed-off-by: Avi Green <avigreen1978@yandex.com>
2022-03-11 07:05:12 -06:00
Peter Marheine
1cf884786b drivers: it8xxx2: fix GPIO interrupt enables
gpio_pin_interrupt_configure asserts that one of GPIO_INT_ENABLE or
_DISABLE is specified by the caller, and also that GPIO_INT_EDGE is
requested if both states (GPIO_INT_TRIG_BOTH) should interrupt. This
change corrects the misuses in it8xxx2 drivers that cause assertion
failures.

When assertions are disabled the existing code works correctly because
the it8xxx2 GPIO driver assumes that a pin interrupt should be enabled
if _DISABLE is not requested, and the driver only supports edge
triggers but assumes the absence of GPIO_INT_MODE_LEVEL indicates
an edge trigger was requested.

Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Change-Id: I1aaee190ec4cf063f36e25c0c293a91d280e71bb
2022-03-11 11:00:22 +01:00
Julien Massot
03dffa5434 drivers: intc_gicv3: use BIT64_MASK instead of BIT_MASK
On 32bit compiler the BIT_MASK(32) generate a warning,
after discussion on #42226 and #42163, advise was to use
BIT64_MASK instead.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
2022-03-11 10:59:48 +01:00
Julien Massot
dd74db46e4 arch: arm: cortex_a_r: add MPIDR and SG1R definition
These definitions are required to be able to use GICv3
interrupts controller on an ARMv8 AArch32 processor.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
2022-03-11 10:59:48 +01:00
Francois Ramu
61bef2087f drivers: spi: stm32 spi with dma must enable cs after periph
When using DMA to transfer over the spi, the spi_stm32_cs_control
is done after enabling the SPI. The same sequence applies
in the transceive_dma function as in transceive function

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2022-03-11 10:59:05 +01:00
Jay Vasanth
3e25b36979 driver: i2c: mec15xx: i2c clk and data same group
I2C clock and I2C gpio could be on same gpio group.
Remove assertion that required them to be on different
group.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-03-10 16:08:37 -05:00
Peng Fan
d1b8743b37 drivers: console: add jailhouse debug console
Support jailhouse hypervisor debug console

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-03-10 14:05:00 -05:00
Peng Fan
f6b608798f clock_control: mcux_ccm: fix build warning for ARM64
Fix below warning:
"warning: cast from pointer to integer of different size"

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-03-10 12:57:37 -06:00
Peng Fan
827f472560 clock: mcux_ccm: support uart1/2/3
Add UART1/2/3 clock support, also update uart4 to read clock root
mux to get clock rate.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-03-10 12:57:37 -06:00
Peng Fan
06b8dc6790 nxp: imx: rename IMX_CCM_UART_CLK to IMX_CCM_UART4_CLK
The code is actually using uart4, so rename
IMX_CCM_UART_CLK to IMX_CCM_UART4_CLK

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2022-03-10 12:57:37 -06:00
Pete Dietl
060e39e75a uart: logging: Add configurable log level to UART drivers
This change adds compile-time selection of log level for
the UART drivers.

Signed-off-by: Pete Dietl <petedietl@gmail.com>
2022-03-10 13:49:43 -05:00
Henrik Brix Andersen
d4023b3c1b drivers: gpio: move non-standard dts flags to be soc specific
Reserve the upper 8 bits of gpio_dt_flags_t for SoC specific flags and
move the non-standard, hardware-specific GPIO devicetree flags (IO
voltage level, drive strength, debounce filter) from the generic
dt-bindings/gpio/gpio.h header to SoC specific dt-bindings headers.

Some of the SoC specific dt-bindings flags take up more bits than
necessary in order to retain backwards compatibility with the deprecated
GPIO flags. The width of these fields can be reduced/optimized once the
deprecated flags are removed.

Remove hardcoded use of GPIO_INT_DEBOUNCE in GPIO client drivers. This
flag can now be set in the devicetree for boards/SoCs with debounce
filter support. The SoC specific debounce flags have had the _INT part
of their name removed since these flag must be passed to
gpio_pin_configure(), not gpio_pin_interrupt_configure().

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-03-10 13:46:34 -05:00
Bernd Weiberg
fd8702474d drivers: fixed return code bug in eth_stm32_hal_set_config()
The function eth_stm32_hal_set_config() located in
drivers/ethernet/eth_stm32_hal.c always returns -ENOTSUP,
even if everything is fine. This commit fixes the return statement
so that the real result (ret) will be returned.

Signed-off-by: Bernd Weiberg <bernd.weiberg@siemens.com>
2022-03-10 13:44:48 -05:00
Erwan Gouriou
3a041ca5c8 drivers/bluetooth: stm32wb: Allow sequential C2 start
Set up a c2_reset procedure in order to allow sequential
open/close/open calls and keep c2_reset done at init (required
for flash access).
Move reinit out of the reset procedure, so flash could be
accessed after bt_disable().

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-03-10 13:28:41 -05:00
Erwan Gouriou
045c986314 drivers/bluetooth/hci: stm32wb: Implement close api
Add treatment for close api.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-03-10 13:28:41 -05:00
Erwan Gouriou
49b15c8306 drivers/bluetooth/hci: stm32wb: Move RX thread creation to open
In order to enable RX thread abortion on close, move creation
to from init to open.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-03-10 13:28:41 -05:00
Jose Alberto Meza
ee1653985d drivers: espi: xec: mec172x: Handle eSPI peripheral channel error
Handle eSPI periperal channel error to avoid continous interrupt
beyond the bus error.

Whenever an eSPI access causes an internal bus error,
PC_BUS_ERROR bit is set, it remains set until cleared by written
with an 1.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2022-03-10 13:25:13 -05:00
Tomislav Milkovic
7f365f46b8 drivers: clock_control: clock_stm32_ll_h7: Fix PLL3 PQR output init
Due to typo in macro name, PLL3P, PLL3Q and PLL3R outputs
are never enabled

Signed-off-by: Tomislav Milkovic <tomislav.milkovic95@gmail.com>
2022-03-10 09:44:52 -05:00
Tom Burdick
ad2799ed15 drivers: dma: nios2: const device driver config
Moves the nios2 msgdma driver device config struct to the device data
struct for mutable data. The config struct is expected to be const.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-03-09 14:13:02 -05:00
Tom Burdick
82449f6749 drivers: i2c: nios2: const driver config
Moves the nios2 msgdma driver device config struct to the device data
struct for mutable data. The config struct is expected to be const.

Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
2022-03-09 14:13:02 -05:00
Henrik Brix Andersen
e9c9caa80d net: remove unmaintained 6LoCAN implementation
Remove the unmaintained, experimental 6LoCAN (IPv6 over CAN bus)
implementation.

Fixes: #42559

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-03-09 18:07:31 +01:00
Jeremy Wood
2331b76b9b drivers: lis2dh: power management
* Add support for power management.

Signed-off-by: Jeremy Wood <jeremy@bcdevices.com>
2022-03-09 10:19:22 -06:00
Henrik Brix Andersen
9fe466f4b0 drivers: can: rcar: add statistics support
Add CAN controller statistics support to the Renesas R-Car CAN driver.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-03-09 09:51:05 -06:00
Gerard Marull-Paretas
034b705745 drivers: counter: native_posix: use tabs in Kconfig
Kconfig used spaces instead of tabs, leading to compliance failures.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-09 15:35:54 +01:00
Gerard Marull-Paretas
dffaf5375c kconfig: tweak Kconfig prompts
Tweak some Kconfig prompts after the removal of "Enable...".

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-09 15:35:54 +01:00
Gerard Marull-Paretas
95fb0ded6b kconfig: remove Enable from boolean prompts
According to Kconfig guidelines, boolean prompts must not start with
"Enable...". The following command has been used to automate the changes
in this patch:

sed -i "s/bool \"[Ee]nables\? \(\w\)/bool \"\U\1/g" **/Kconfig*

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-03-09 15:35:54 +01:00
Andrzej Głąbek
89cc06e588 drivers: gpio_pcal6408a: Fix handling of the GPIO_INT_DEBOUNCE flag
Ignore the flag instead of rejecting it with -ENOTSUP, as this is what
the GPIO API expects from drivers that do not support debouncing.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-03-09 12:06:20 +01:00
Andrzej Głąbek
b2a4a3672f drivers: i2c: nrfx: Add support for pinctrl
Add support for the new pinctrl API to the I2C drivers that handle
the nRF TWI and TWIM peripherals. Update code of the drivers and
related devicetree bindings.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-03-09 12:05:22 +01:00
Andrzej Głąbek
32b9e65e4b drivers: spi: nrfx: Add support for pinctrl
Add support for the new pinctrl API to the SPI drivers that handle
the nRF SPI, SPIM, and SPIS peripherals. Update code of the drivers
and related devicetree bindings.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-03-09 12:05:22 +01:00
Andrzej Głąbek
2a87e04ce6 drivers: spi: nrfx: Clean up code
- clean up registration of the drivers with the logging subsystem
- use consistent naming of local variables accessing configuration
  and runtime data of driver instances, for easier code maintenance

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-03-09 12:05:22 +01:00
Andrzej Głąbek
fa22634880 drivers: pinctrl: nrf: Add support for SPI and TWI peripherals
Add support for configuring pins of the following nRF peripherals:
SPI, SPIM, SPIS, TWI, and TWIM.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-03-09 12:05:22 +01:00
Andrzej Głąbek
70fb3124db drivers: serial: nrfx: Ensure that instances have some pins assigned
Add build assertions that will ensure that every peripheral for
which a driver instance is created has some pins assigned to it.
Neither pinctrl-0 nor *-pin properties can be currently marked as
required in devicetree, so these assertions will help users avoid
invalid configurations where it could be hard to figure out why
the UART is not working.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-03-09 12:05:22 +01:00
Simon Frank
4d4bc67243 gpio: mcp23s17: use gpio_driver_data not config
fix incorrect gpio driver struct used in driver data.
This should not have caused any issue as currently
sizeof(gpio_driver_data) == sizeof(gpio_driver_config).

Signed-off-by: Simon Frank <simon.frank@lohmega.com>
2022-03-08 09:20:15 -06:00
Sam Hurst
6458649137 stm32: Add STM32 USB TCPC Driver
This commit adds a USB Type-C Port Controller Driver for
the STM32 USB Type-C / USB Power Delivery (UCPD) peripheral

Signed-off-by: Sam Hurst <sbh1187@gmail.com>
2022-03-08 11:08:43 +01:00
Krzysztof Chruscinski
47ae656cc1 all: Deprecate UTIL_LISTIFY and replace with LISTIFY
UTIL_LISTIFY is deprecated. Replacing it with LISTIFY.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2022-03-08 11:03:30 +01:00
Yegor Yefremov
1155d4679b drivers: serial: fix typos
Typos were found with codespell utility.

Signed-off-by: Yegor Yefremov <yegorslists@googlemail.com>
2022-03-08 10:24:23 +01:00
Mikkel Jakobsen
da514737d0 drivers: sensor: icm42605: fix default kconfig issues
by default, a global trigger thread was enabled in kconfig but
the thread priority and stack size depended on a local thread
being enabled.

the local thread option was never used anywhere so it is removed.

Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@escolifesciences.com>
2022-03-07 16:23:36 -06:00
Mikkel Jakobsen
9d3f9e3921 drivers: sensor: icm42605: make trigger mode choice named
convert choice to named choice to allow setting from Kconfig.* files

Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@escolifesciences.com>
2022-03-07 16:23:36 -06:00
Daniel DeGrasse
694e6493af timers: mcux_gpt_timer: Change MCUX GPT timer to use indirect ISR
Indirect ISR automatically calls power management functions, which GPT
timer direct ISR was not calling. Calling these functions means that the
kernel will recognize that it is exiting low power mode when the GPT
timer interrupt fires that wakes the SOC up, and will call
pm_power_state_exit_post_ops, which can in turn raise the clock
frequencies and voltage of the SOC as early as possible.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-07 13:53:14 -06:00
Daniel DeGrasse
6696d834cf drivers: serial: Add pm constraint setting to mcux lpuart driver
System entering sleep state before uart tx is complete can result in
characters being dropped from the transmission. Add pm constraint
setting to the lpuart driver to prevent character drops

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-07 13:53:14 -06:00
Jay Vasanth
3034693509 drivers: i2c: MEC15xx: Improved error handling
1. Check I2C Clock and Data is high through GPIO driver instead
of the I2C bitbang registers
2. i2c_xec_poll_write() and i2c_xec_poll_read() will poll to
check I2C clock and data lines are high before initiating the
transaction. The polling will be every 25us for a cumulative
max of 2.5ms
3. wait_completion() will not call recover_from_error() to reset
the controller. Instead will poll for 10ms for the PIN bit to
clear before returning error.
4. wait_completion() will send STOP if the 9th bit is NACK
5. If any errors with current transaction:
(a) Set error_seen flag.
(b) In the next transaction do the recovery process (reset the
i2c controller) if the clk and data lines are high.
Note: error_seen flag is set for Address NACK with Repeated
Start as well.
6. If timeout error occurs in wait_completion():
(a) Set timeout_seen flag;
(b) Wait till the slave will release the clock.
(c) Once slave releases clock send STOP on the bus. If the
timeout occurred while master read, read the I2C DATA register
for the hardware to proceed.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-03-07 14:13:34 -05:00
Bartosz Bilas
718225dadf drivers: ethernet: dsa_ksz8xxx: fix spi bus initialization
spi_dt_spec structure initialization should not be done
in the runtime during spi bus initialization because it
causes kernel panic.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2022-03-07 09:54:21 -06:00
Rafał Kuźnia
1a0fed70d5 drivers: timer: Set user RTC channel count conditionally
The RTC user channel count is increased contitionally to 2 when
nrf_802154 radio driver is enabled.

Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
2022-03-07 09:26:52 -06:00
Rene Bredlau
876ea8d215 modem: hl7800: use correct timeouts on KTCPSND to avoid internal deadlock
The response of a KTCPSND has two phases. According to documentation by
wireless the timeout is 60 seconds. The fix respects the timeout on the
second phase, too (waiting for OK or errors from modem). Previously only
the first phase used 60 seconds and the second phase used 5 seconds.

Without this fix the hl7800 will lock the tcp stack for the current
socket indefinitely if another socket operation is performed before the
response from the modem is received.

Additionally all timeouts are adjusted to be at least one second longer
as the documented timeout from wireless. This avoids races between the
hl7800 and the driver.

Signed-off-by: Rene Bredlau <git@unrelated.de>
2022-03-07 09:24:25 -06:00
Andrzej Głąbek
70a9e2055c drivers: Remove undesirable irq_enable calls from nrfx driver shims
Shims for nrfx drivers should only connect the related IRQ handlers,
they should not enable the IRQs, as this could lead to a situation
where the interrupt handler is called before the driver had a chance
to properly initialize the peripheral and install the provided event
handler. nrfx drivers will enable the interrupts appropriately on
their own by calling the NRFX_IRQ_ENABLE macro which is implemented
in nrfx_glue.h as a call to irq_enable().
This commit fixes the above issue spotted in the following shims:
- dmic_nrfx_pdm
- clock_control_nrf
- i2s_nrfx

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-03-07 09:19:56 -06:00
Erwan Gouriou
d74cb2a3df drivers/clock_control: stm32h7: Simplify SysClk freq computing
Instead of reading registers query the info on sysclock configuration
from existing configuration symbols.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-03-07 11:36:28 +01:00
Erwan Gouriou
2116606ce2 drivers/clock_control/stm32h7: Independent clocks configuration
Rework clock start up functions in order to allow configuration
and enabling of individual clocks.
This way, each clock defined with a "okay" status will be enabled
even if not part of the sysclock clock tree.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2022-03-07 11:36:28 +01:00