This way, when RTC is used as the generator, one PPI channel per each
configured PWM channel can be saved.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Use compare channel 0 in the generator for handling the PWM period.
This way all other channels offered by the generator can be easily
used for handling pulses on particular PWM channels.
So far the driver allowed to configure more than 3 channels for certain
TIMER instances, but since channel 3 was always used for the period,
the generation could not work in such setups.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The driver improperly uses the PWM channel index to reference
the GPIOTE channel to be used for the PWM signal generation.
Consequently, the PWM signal on a given channel can be correctly
generated only if both those indexes are by chance the same.
Fix this by switching to use the stored index of the actually
allocated GPIOTE channel.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
All these sort of helpers were removed from tree a while ago, this one
was missed as it uses a custom name.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
If dev was null, caller would have faulted before since dev->api needs
to be accessed before reaching this point. Also, a well-defined device
will never have a NULL dev->config.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The API spec states that calling pin_set() with period set to 0 is
equivalent to set the PWM channel to an inactive level. Some drivers
treat this input as invalid (-EINVAL), however, it's an unsupported
feature. Maybe it's due to copy&paste effect? This changes error message
to be clear and changes return value to -ENOTSUP for this case.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The API call checks for this condition before calling the pin_set driver
OP call, so drivers don't have to do this check now.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Rather than specify input clock for each peripheral individually, instead
specify the relevant clocks in DTS.
This will enable easier support for non-default coreclk on fe310 in a
follow-up CL.
Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>
Instead of selecting appropriate HAS_HW_NRF_* options for particular
nRF SoCs (and simulated nRF52 target), set their values basing on
information from devicetree.
Correct also semantics of those options so that they are set only when
a corresponding DT node is enabled. This allows using them directly in
Kconfig dependencies of Zephyr drivers for nRF peripherals. Update
appropriately these dependencies.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
If the dts defines the PWM complementary output, then the OCN
must be init in place of the OC state and polarity.
This is an exclusive setting for this pin.
The channel in LL_TIM_OC_SetPolarity can be the complementary one.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This add support to pinctrl at Atmel sam0 tcc pwm driver. It updates
all boards with new pinctrl groups format and drop pinmux entries.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update Atmel sam pwm driver to use pinctrl driver and API. It
updates all boards with new pinctrl groups format. In addition this
remove all remaining manual pinmux at board level.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Add a dummy driver for the `vnd,pwm` compatible to allow compilation of
drivers utilising PWM when running "build_all" tests.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
This commit makes the transition from the pinmux driver to the pinctrl
driver. It also modifies UART, SPI and I2C drivers used in FE310-based
boards to use the new pinctrl API.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
Add build time optional PINCTRL support to common PWM driver
for Microchip XEC MEC15xx and MEC172x families.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Add support for MEC172x series to Microchip XEC PWM driver.
Standardize device tree properties for both SoC families.
Standardize device structure usage.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Extend the macro with checks for DT properties related to pin
assignments that are defined but would be ignored, depending on
whether PINCTRL is enabled or not, what presumably indicates
a resulting configuration different from what the user expects.
Add also a possibility to indicate that the pinctrl-1 property
should not be checked because the caller does not support the
sleep state.
Rename the macro so that its name better reflects its function.
Update accordingly all drivers that use it.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
When configuring the pwm capture, the callback function might
be reset, this i not an error. However the isr should not call it
and enabling the capture should always provide a callback function.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add support for the new pinctrl API to the nRF PWM driver.
Update code of the driver and the related devicetree binding.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
According to Kconfig guidelines, boolean prompts must not start with
"Enable...". The following command has been used to automate the changes
in this patch:
sed -i "s/bool \"[Ee]nables\? \(\w\)/bool \"\U\1/g" **/Kconfig*
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Currently pwm_npcx_pin_set() disables and reconfigures the PWM
controller every time its called, causing the PWM line to pulse even if
only the duty cycle is changed.
Modify the function so that controller is only disabled if any of the
configuration has to be changed, only set the new DCR otherwise.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add pwm-0 to support tests/drivers/pwm/pwm_api.
Solve tests code runtime error on it8xxx2_evb:
1.If the pwm channel target frequency is < 1, then we will
return an error code.
2.If the target_freq is <= 324Hz, we will configure that this pwm
channel need to output in EC power saving mode.
In test_pwm_cycle() case, the period is 64000, then the
target_freq is 8000000 / 64000 = 125Hz and <= 324Hz, so we will
switch the prescaler clock source from 8MHz to 32.768kHz.
Then the target_freq is 32768 / 64000 = 0.512Hz and < 1Hz,
this will return an error code. In order to get the same
target_freq, we always return PWM_FREQ in
pwm_it8xxx2_get_cycles_per_sec().
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
This corrects the following:
1. The priority of type cast is lower than member access. So don't need
the redundant parentheses.
2. The macro should be added to the parentheses.
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In order to align with macros used to obtain a device reference (e.g.
DEVICE_DT_GET), align the PM macros to use "GET" instead of "REF". This
change should have low impact since no official release has gone out yet
with the "REF" macros.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Initial version of a PWM driver for GigaDevice GD32 SoCs. Only PWM
output is supported for now (no capture support).
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The PINCTRL_DT_(INST_)DEFINE macros already defined the trailing ;,
making its usage inconsistent with other macros such as
DEVICE_DT_DEFINE.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Replace usages of DT_PARENT(DT_DRV_INST(idx)) with more idiomatic
DT_INST_PARENT(idx).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
MCUX PWM driver used hardcoded clock source. update driver to use clock
bindings to determine PWM peripheral clock frequency.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit adds support for IMX6SX PWM.
The PWM module is the same module present on the IMX7D and so dts
bindings has been renamed following the one present on linux.
Signed-off-by: Antonio Tessarolo <anthonytexdev@gmail.com>
The device PM subsystem _depends_ on device, not vice-versa. Devices
only hold a reference to struct pm_device now, and initialize this
reference with the value provided in Z_DEVICE_DEFINE. This requirement
can be solved with a forward struct declaration, meaning there is no
need to include device PM headers.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use the new pinctrl API to configure pins.
Since STM32F1 series require pinctrl option and required register
address is parent timer address in place of own node register address,
use PINCTRL_DT_INST_CUSTOM_REG_DEFINE in place of usual
PINCTRL_DT_INST_DEFINE for this specific series.
Additionally, remove the automatic selection of PINMUX API.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use nrfx_gpiote and nrfx_ppi allocators to allocate channels
at runtime instead of fixed, device-tree based allocation which
is harder to maintain.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Device data is cleared on deinitialization. This operation removes
some important information. Let's restore the defaults each time
the device is initialized.
Signed-off-by: Pawel Dunaj <pawel.dunaj@nordicsemi.no>
Extends STM32 PWM driver to support capturing pulse width, period,
or both.
The approach used is based on the PWM Input sections in reference
manual RM0351 by ST in the chapters on timers.
The LL library by ST is used for all extensions to the driver.
Only the disco_l475_iot1 board was available for testing on hardware,
using tests/drivers/pwm/pwm_loopback.
Since timers are a generic component, it is assumed that other STM32
boards will behave the same
Fixes#39394
Signed-off-by: Tilmann Unte <unte@es-augsburg.de>
