michaelh/zephyr
1
0
Fork 0
Code Releases Activity

drivers/pwm: stm32: use new pinctrl API

Browse source 
Use the new pinctrl API to configure pins.
Since STM32F1 series require pinctrl option and required register
address is parent timer address in place of own node register address,
use PINCTRL_DT_INST_CUSTOM_REG_DEFINE in place of usual
PINCTRL_DT_INST_DEFINE for this specific series.

Additionally, remove the automatic selection of PINMUX API.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2021-11-08 11:42:44 +01:00 • committed by Carles Cufí
commit eff3ad6df7
2 changed files with 6 additions and 21 deletions
Download patch file Download diff file Expand all files Collapse all files

16
drivers/pwm/pwm_stm32.c
View file

@ -13,12 +13,12 @@
#include <stm32_ll_rcc.h>
#include <stm32_ll_tim.h>
#include <drivers/pwm.h>
#include <drivers/pinctrl.h>
#include <device.h>
#include <kernel.h>
#include <init.h>
#include <drivers/clock_control/stm32_clock_control.h>
#include <pinmux/pinmux_stm32.h>
#include <logging/log.h>
LOG_MODULE_REGISTER(pwm_stm32, CONFIG_PWM_LOG_LEVEL);
@ -60,9 +60,7 @@ struct pwm_stm32_config {
/** Clock configuration. */
struct stm32_pclken pclken;
/** pinctrl configurations. */
const struct soc_gpio_pinctrl *pinctrl;
/** Number of pinctrl configurations. */
size_t pinctrl_len;
const struct pinctrl_dev_config *pcfg;
#ifdef CONFIG_PWM_CAPTURE
void (*irq_config_func)(const struct device *dev);
#endif /* CONFIG_PWM_CAPTURE */
@ -596,9 +594,7 @@ static int pwm_stm32_init(const struct device *dev)
}
/* configure pinmux */
r = stm32_dt_pinctrl_configure(cfg->pinctrl,
cfg->pinctrl_len,
(uint32_t)cfg->timer);
r = pinctrl_apply_state(cfg->pcfg, PINCTRL_STATE_DEFAULT);
if (r < 0) {
LOG_ERR("PWM pinctrl setup failed (%d)", r);
return r;
@ -666,8 +662,7 @@ replaced by 'st,prescaler' property in parent node, aka timers"
static struct pwm_stm32_data pwm_stm32_data_##index; \
IRQ_CONFIG_FUNC(index) \
\
static const struct soc_gpio_pinctrl pwm_pins_##index[] = \
ST_STM32_DT_INST_PINCTRL(index, 0); \
PINCTRL_DT_INST_DEFINE(index) \
\
static const struct pwm_stm32_config pwm_stm32_config_##index = { \
.timer = (TIM_TypeDef *)DT_REG_ADDR( \
@ -678,8 +673,7 @@ replaced by 'st,prescaler' property in parent node, aka timers"
(DT_PROP(DT_PARENT(DT_DRV_INST(index)), \
st_prescaler))), \
.pclken = DT_INST_CLK(index, timer), \
.pinctrl = pwm_pins_##index, \
.pinctrl_len = ARRAY_SIZE(pwm_pins_##index), \
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(index), \
CAPTURE_INIT(index) \
}; \
\

11
dts/bindings/pwm/st,stm32-pwm.yaml
View file

@ -2,7 +2,7 @@ description: STM32 PWM
compatible: "st,stm32-pwm"
include: [pwm-controller.yaml, base.yaml]
include: [pwm-controller.yaml, base.yaml, pinctrl-device.yaml]
properties:
label:
@ -18,15 +18,6 @@ properties:
binding of parent timer node. It is kept temporarily for compatibility
reasons.
pinctrl-0:
type: phandles
required: false
description: |
GPIO pin configuration for PWM signal/s. We expect that the phandles
will reference pinctrl nodes, e.g.
pinctrl-0 = <&tim1_ch1_pwm_pa8 &tim1_ch2_pwm_pa9>;
"#pwm-cells":
const: 3