Protect gpio_configure function in dual core context.
This operation is not needed for other fuctions of the api:
* init
* read
* write
Protecting gpio_configure also protects access to
interrupt_controller IP.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
move misc/util.h to sys/util.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move pinmux.h to drivers/pinmux.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move gpio.h to drivers/gpio.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The compiler and linker was generating errors after
disabling `CONFIG_EXTI_STM32` due to inconsistency
in `interrupt_controller/CMakeLists.txt`
and not considering this option in gpio implementation.
Signed-off-by: Maciej Zagrabski <maciej.zagrabski@grinn-global.com>
For STM32L47x/48x series devices, register ASCR should be configured to
connect analog switch of gpio lines to the ADC.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
Rename reserved function names in drivers/ subdirectory. Update
function macros concatenatenating function names with '##'. As
there is a conflict between the existing gpio_sch_manage_callback()
and _gpio_sch_manage_callback() names, leave the latter unmodified.
Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
Following configuration options are not supported by STM32
gpio driver:
-GPIO_INT_LEVEL
-GPIO_POL_INV
Return an error when one of these is requested.
Fixes#12766
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
It needs to verify if the callback was not already installed, and if so:
if is was in controller's list.
It should return an error in case the node is not found though it was
requested to be removed.
If already inserted, it will be silently removed but added again, to
avoid circular list as stated in the bug.
Fixes#11394
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Complete code factorization in stm32 exti drivers.
Add return value in case line is not implemented.
Except returned error code, refactor has been done iso-feature
compared to previous code. Hence error is reported only when
support was not available on previous series.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Behavior of function gpio_stm32_configure has been modified
during driver factorization. Various gpio settings (speed, mode, ..)
are applied conditionally while they used to be applied in sequence,
unconditionally before this change. As a consequence some
combinations of configurations are no more applied (like speed for
alternate mode). This of course has impact in some use cases.
Rework functions in order to apply settings unconditionally. Take
advantage of the change to reduce code size.
This change impacts all SoCs except F1 series.
Fixes#12544
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The original implementation of gpio functions access registers
directly. Using LL library can add a set of unifying access
functions for all series of stm32 for avoiding accessing low level
code, and improve readability.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
All series STM32 have mostly the same GPIO architecture
and can share the same code for GPIO manipulation.
Functions of the external interrupt line control are also the same.
This patch extracts common code from them and put them into the 'common'
folder.
Functions of control GPIO of these series scattered in
soc/arm/st_stm32/stm32xx/ folders contain these functions:
stm32_gpio_flags_to_conf(), stm32_gpio_configure(), stm32_gpio_set(),
stm32_gpio_get, stm32_gpio_enable_int().
This patch merges them into the gpio_stm32.c file.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
On STM32L4, 14 pins (Port G[15:2]), require external power supply.
Activate this at port G init when PWR_CR2_IOSV is defined.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Check clock_control_on return value now that it is checking appropriate
bus is used in the request.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
GPIO pin interrupts share common EXTI resources.
Return an error when attempt to configure a line already in use.
Fixes#10611
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
These changes were obtained by running a script created by
Ulf Magnusson <Ulf.Magnusson@nordicsemi.no> for the following
specification:
1. Read the contents of all dts_fixup.h files in Zephyr
2. Check the left-hand side of the #define macros (i.e. the X in
#define X Y)
3. Check if that name is also the name of a Kconfig option
3.a If it is, then do nothing
3.b If it is not, then replace CONFIG_ with DT_ or add DT_ if it
has neither of these two prefixes
4. Replace the use of the changed #define in the code itself
(.c, .h, .ld)
Additionally, some tweaks had to be added to this script to catch some
of the macros used in the code in a parameterized form, e.g.:
- CONFIG_GPIO_STM32_GPIO##__SUFFIX##_BASE_ADDRESS
- CONFIG_UART_##idx##_TX_PIN
- I2C_SBCON_##_num##_BASE_ADDR
and to prevent adding DT_ prefix to the following symbols:
- FLASH_START
- FLASH_SIZE
- SRAM_START
- SRAM_SIZE
- _ROM_ADDR
- _ROM_SIZE
- _RAM_ADDR
- _RAM_SIZE
which are surprisingly also defined in some dts_fixup.h files.
Finally, some manual corrections had to be done as well:
- name##_IRQ -> DT_##name##_IRQ in uart_stm32.c
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Specific code is present GPIO_DEVICE_INIT_STM32 in
GPIO_DEVICE_INIT_STM32 to handle LL_APB2_GRP1_PERIPH_AFIO bit.
Though, this bit is already included in device tree information,
in clocks property, 'bits' field, which carries for each GPIO,
both LL_APB2_GRP1_PERIPH_GPIOX and LL_APB2_GRP1_PERIPH_AFIO.
Hence, it is already taken into account in
CONFIG_GPIO_STM32_GPIO##__SUFFIX##_CLOCK_BITS and it is redundant
to handle it in GPIO_DEVICE_INIT_STM32 macro.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The information extracted from the device tree is now used to initialize
GPIO device instances. Up until now the GPIO device driver made no use
of this information. Actual instance creation is still controlled using
the Kconfig method. Missing GPIO device tree nodes were added in the
process for STM32L073, STM32F413 and STM32F373.
The information for gpio instance initialization has already been
present for supported STM32 SoCs but remained unused. Changes in the
device tree had no effect on GPIO functionality and was essentially
redundant. Using the device tree for hardware description seems
plausible and less painful than a myriad of defines in some SoC
description header.
The change was implemented under the assumption that current device
trees provide a correct description of the SoCs. Base register addresses
and RCC register bits were not explicitly checked for each device.
Manual tests were executed on:
- NUCLEO-F103RB
- STM32F429I-DISCO
- STM32F746G-DISCO
- NUCLEO-F767ZI
Manual tests consisted of blinky on different GPIOs and pins on each
board.
sanitycheck was executed for all STM32 based boards
Fixes: #10629
Signed-off-by: Martin Bertsche <martin72216@googlemail.com>
STM32 GPIO device initialization priority was set to
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT
Following introduction of __ZEPHYR_SUPERVISOR__ macro (#6835),
drivers intialization order have been reordered which blocks
some use cases now.
Increase GPIO init priority to get it initialized before SPI
and avoid a deadlock.
Fixes#7663
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of stm32f1xx series clock control driver to
STM32Cube LL API, cleanup stm32 code base in order to take into
account that this is the only clock driver available for stm32
family.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Before introduction of LL based clock control for stm32f1xx series,
prepare gpio driver to provide useful definition for new API
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following activation of stm32 common clock driver for stm32f4 series
remove references to stm32f4 specific driver.
Change-Id: I372a0ea046007bcb34944d6b2b8880077583b1d3
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.
Jira: ZEP-2051
Change-Id: I08f51e2bfd475f6245771c1bd2df7ffc744c48c4
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add support for GPIO banks I to K that can be found on some high-density
STM32F4 products.
Change-Id: I2cb65ed4d4a2282f7d17478cb1fcdd65dffe71b0
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
The registration of each GPIO bank differs by only few details. These
differences can be factorized in order to create a generic registration
macro.
This has several advantages:
- Less code
- Easier to add new banks
- Less work to add support for new STM32 families
The diff stat speaks for it-self: 26 insertions(+), 92 deletions(-)
Change-Id: I674752fda5ee3caefb815ccf070a1b636b16cf85
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Some GPIO ports activation where missing since not used
on available soc/boards.
Since stm32 family increases, activation of these ports
should be made available.
Jira: ZEP-1551
Change-Id: I612d135b28ef255bc771599e33796671ff81d0ac
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
After activation of cube based driver support on L4 and F3 series,
this commits performs the clean up of F3 and L4 relative code to
native clock control drivers.
Indirectly, it makes pwm driver supported de facto on F3 series
Change-Id: Idac17103a9b5ef6eab540719343cc8f5865f15fa
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
After introducing STM32Cube based clock control driver for
stm32 family, update GPIO driver to support it.
Once supported across the whole family, we clean up will be done.
Change-Id: If50cb580cb01dc1d38557e54f19a8260feaa504e
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Several GPIO device drivers support only one of the two possible
access_op modes and return an errno error code for the mode they do
not support. Use the same errno code across all drivers.
Change-Id: Ic01ce9dee7fb2405d254c60cebee22053c803270
Signed-off-by: Marcus Shawcroft <marcus.shawcroft@arm.com>
The commit c90e4d063be0ff5f47df45ca8500eff8518c5d25 changed
line 216 in drivers/gpio/gpio_stm32.c:
-elif CONFIG_SOC_SERIES_STM32F4X
+#elif /* CONFIG_SOC_SERIES_STM32F4X */
This causes the following compiler error:
zephyr/drivers/gpio/gpio_stm32.c:218:39: error: #elif with no expression
#elif /* CONFIG_SOC_SERIES_STM32F4X */
^
Change-Id: Ie8b124931e333aa7860e6db22f5c259670e29833
Signed-off-by: Michael Scott <michael.scott@linaro.org>
Implementation includes adding some defines in the pinmux,
adjusting gpio driver to specific defines for STM32F3X family,
adding specific functionality in the F3X SoC definition.
Change-Id: I465c66eb93e7afb43166c4585c852e284b0d6e67
Signed-off-by: Adam Podogrocki <adam.podogrocki@rndity.com>
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.
Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.
Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file. Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.
Jira: ZEP-1457
Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add the support for all the GPIO port of the L4.
Change-Id: Id365e17223cd5c49443df9fb6b96a3c4f204f523
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit replaces the nanokernel.h include by kernel.h.
Change-Id: Ib42fbf2d9f77a73c0831f569b3dbbfb342ea2e1d
Signed-off-by: Flavio Santes <flavio.santes@intel.com>
PRIMARY, SECONDARY, NANOKERNEL, MICROKERNEL init levels are now
deprecated.
New init levels introduced: PRE_KERNEL_1, PRE_KERNEL_2, POST_KERNEL
to replace them.
Most existing code has instances of PRIMARY replaced with PRE_KERNEL_1,
SECONDARY with POST_KERNEL as SECONDARY has had a longstanding bug
where the documentation specified SECONDARY ran before the kernel started
up, but actually ran afterwards.
Change-Id: I771bc634e9caf7f17dbf214a270bc9967eed7d32
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Implements MCU-specific GPIO input interrupt integration. Added
definition of System configuration controller as well as its needed by
the GPIO code.
The SYSCFG controller is used for system-specific configuration such as:
- remap the type of memory accessible at address 0x00000000
- manage the external interrupt line connection to GPIOs
- configure the I/O compensation cell
Change-Id: Id2ebfbd1b21e77be76406d1cd6cd5d4989e9e2fa
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
STM32F4 requires the alternative function config to be set, so just
initialize that as part of the gpio configure call.
Change-Id: I33a4a8efec59c5ebe7dc3f3580f0dd2bf7ded7f4
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Since dd5e90ec the device_get_binding call returns NULL unless the
driver_api is set by the driver. Since the exti driver only uses an
internal struct to store the callbacks, remove the need for the device
binding call from other drivers (e.g. gpio).
Change-Id: If0b733c27754108118d87ef02640311f0535ab57
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Bug was introduced by a6cf6038e3
Change-Id: I91ceab2ca20c4d2f70a953b56d895152a471125a
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
In 1.0 you could set only one callback on the whole gpio controller. It
was impossible for another sub-system to add another callback, without
overwritting an existing one.
Such API has been obsolete for a long time and no one is using it
anymore. Thus removing it entirely.
Change-Id: I6a17fd99373dc6cef1fa2ebb421e992412d5015e
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
