Commit graph

110 commits

Author SHA1 Message Date
Anas Nashif
5d6c219210 drivers: device: do not reuse tag name 'device'
Do not reuse tag name (misra rule 5.7).

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-03-22 19:48:14 -04:00
Erwan Gouriou
ddeff276a4 drivers/gpio: stm32: Check return value of clock_control_on api call
In function gpio_stm32_enable_int, retiurn value of clock_control_on
was not checked.
This is reported as an issue by coverity (CID 219652).
Fix this.

Fixes #33035

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-09 09:08:40 -05:00
Erwan Gouriou
bb014514e0 drivers/gpio: stm32: Use gpio device as gpio_stm32_configure arg
Now that pinmux driver holds a table of GPIO device pointers,
use gpio device as the single source of trust for gpio_base
and remove use of port_base and related code.
This way, gpio_stm32_configure could directly take gpio device
pointer as argument.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-03 12:13:34 -06:00
Erwan Gouriou
6b2ccbb721 drivers/gpio: stm32: Add port clock handling function
As a preparation for GPIO ports clocks power management,
add a dedicated central function fog GPIO ports clock toggling.

This function is made accessible to other users (pinmux).

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-03 12:13:34 -06:00
Erwan Gouriou
888a24f76d drivers/gpio: stm32: Review code for Port G clock on L4/L5
On L4/L5 device, GPIO port G benefits from a dedicated supply
rail that should be enabled independently.
Review the code around this:
-Compile only when port G is enabled
-Assume that PWR clock is ON, as it is enabled as part of clock init

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-03 12:13:34 -06:00
Kumar Gala
b275fec8c4 soc: stm32: convert to use DEVICE_DT_GET for clocks
Convert from device_get_binding to DEVICE_DT_GET.  In doing this we
no longer need the label in the devicetree node so we remove that.

Removed all __ASSERT_NO_MSG(clk) since we'll get a build error if
DEVICE_DT_GET cant be satisfied, and the clock control api's will
handle reporting if the device_is_ready.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-16 17:01:37 -06:00
Kumar Gala
569155701c drivers: gpio: Convert drivers to new DT device macros
Convert gpio drivers to use new DT variants of the DEVICE APIs.
    DEVICE_AND_API_INIT -> DEVICE_DT_DEFINE
    DEVICE_GET -> DEVICE_DT_GET
    DEVICE_DECLARE -> DEVICE_DT_INST_DECLARE

etc..

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-12-13 19:24:24 -05:00
Martin Jäger
92e16191ac drivers: gpio: stm32: use generic LL headers
Use generic LL headers instead of depending on soc.h.

Signed-off-by: Martin Jäger <martin@libre.solar>
2020-11-30 15:50:03 +01:00
Kumar Gala
5e97d779bb device: convert DEVICE_INIT to DEVICE_DEFINE or SYS_DEVICE_DEFINE
Convert handful of users of DEVICE_INIT to DEVICE_DEFINE or
SYS_DEVICE_DEFINE to allow deprecation of DEVICE_INIT.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-11-10 08:38:09 -06:00
Erwan Gouriou
12ef6b7d17 drivers/gpio: stm32: Fix formatting
Fix formatting for lines > 80 chars

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-21 06:43:42 -05:00
Erwan Gouriou
23f7eb0721 drivers/gpio: stm32f1: Revert gpio register programming re-ordering
In #29055, GPIO registers programming order was modified in order
to avoid late glitch generation when programming pins at device
driver init.
The issue had been seen on non F1 device, but it made sense
to be applied on F1 series as well.
After test, it appears that it doesn't and initial F1 code was fine.
New code is generating glitch on I2C bus.
Revert the change for F1 series.


Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-21 06:43:42 -05:00
Erwan Gouriou
02bd657ce3 drivers/gpio: stm32: Change order of registers configuration
During implementation of i2c pinctrl configuration within i2c driver,
it appears that current order of register configuration used to
generate a spike on I2C bus, leading to broken configuration with
I2C device.
Reverse the order so that pin mode setting is done only after pupd,
speed and type are set, in order to avoid generating unwanted
artefacts on the bus.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-09 11:52:47 +02:00
Tomasz Bursztyka
4917f6f4da drivers: gpio: Fix device instance const qualifier loss
It is necessary to wrap the device pointer into data.

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Tomasz Bursztyka
e18fcbba5a device: Const-ify all device driver instance pointers
Now that device_api attribute is unmodified at runtime, as well as all
the other attributes, it is possible to switch all device driver
instance to be constant.

A coccinelle rule is used for this:

@r_const_dev_1
  disable optional_qualifier
@
@@
-struct device *
+const struct device *

@r_const_dev_2
 disable optional_qualifier
@
@@
-struct device * const
+const struct device *

Fixes #27399

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-09-02 13:48:13 +02:00
Tomasz Bursztyka
98d9b01322 device: Apply driver_api/data attributes rename everywhere
Via coccinelle:

@r_device_driver_api_and_data_1@
struct device *D;
@@
(
D->
-	driver_api
+	api
|
D->
-	driver_data
+	data
)

@r_device_driver_api_and_data_2@
expression E;
@@
(
net_if_get_device(E)->
-	driver_api
+	api
|
net_if_get_device(E)->
-	driver_data
+	data
)

And grep/sed rules for macros:

git grep -rlz 'dev)->driver_data' |
	xargs -0 sed -i 's/dev)->driver_data/dev)->data/g'

git grep -rlz 'dev->driver_data' |
	xargs -0 sed -i 's/dev->driver_data/dev->data/g'

git grep -rlz 'device->driver_data' |
	xargs -0 sed -i 's/device->driver_data/device->data/g'

Fixes #27397

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-08-11 19:30:53 +02:00
Tomasz Bursztyka
af6140cc0d device: Apply config_info rename everywhere
Via coccinelle:

@r_device_config@
struct device *D;
@@

D->
-	config_info
+	config

And 2 grep/sed rules for macros:

git grep -rlz 'dev)->config_info' |
	xargs -0 sed -i 's/dev)->config_info/dev)->config/g'

git grep -rlz 'dev->config_info' |
	xargs -0 sed -i 's/dev->config_info/dev->config/g'

Fixes #27397

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-08-11 19:30:53 +02:00
Alexandre Bourdiol
c8ceca2d53 drivers: STM32 dualcore concurrent register access protection with HSEM
In case of dualcore, STM32H7, STM32W and STM32MP1,
protect concurrent register write access with HSEM.
Done for following drivers:
clock_control, counter, flash, gpio, interrupt_controller

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2020-07-09 11:27:56 +02:00
Piotr Mienkowski
4b194eb4fc gpio: remove deprecated API functions/macros
This commit removes API functions and macros which were deprecated in
2.2 release. GPIO drivers are updated accordingly.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2020-06-16 19:13:05 +02:00
Kumar Gala
a1b77fd589 zephyr: replace zephyr integer types with C99 types
git grep -l 'u\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g"
	git grep -l 's\(8\|16\|32\|64\)_t' | \
		xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g"

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-06-08 08:23:57 -05:00
Martí Bolívar
6e8775ff84 devicetree: remove DT_HAS_NODE_STATUS_OKAY
Several reviewers agreed that DT_HAS_NODE_STATUS_OKAY(...) was an
undesirable API for the following reasons:

- it's inconsistent with the rest of the DT_NODE_HAS_FOO names
- DT_NODE_HAS_FOO_BAR_BAZ(node) was agreed upon as a shorthand
  for macros which are equivalent to
  DT_NODE_HAS_FOO(node) && DT_NODE_HAS_BAR(node) &&
- DT_NODE_HAS_BAZ(node), and DT_HAS_NODE_STATUS_OKAY is an odd duck
- DT_NODE_HAS_STATUS(..., okay) was viewed as more readable anyway
- it is seen as a somewhat aesthetically challenged name

Replace all users with DT_NODE_HAS_STATUS(..., okay), which is
semantically equivalent.

This is mostly done with sed, but a few remaining cases were done by
hand, along with whitespace, docs, and comment changes. These special
cases include the Nordic SOC static assert files.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-05-13 18:24:42 +02:00
Tomasz Bursztyka
97326c0445 device: Fix structure attributes access
Since struct devconfig was merged earlier into struct device, let's fix
accessing config_info, name, ... attributes everywhere via:

grep -rlZ 'dev->config->' | xargs -0 sed -i 's/dev->config->/dev->/g'

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-05-08 23:07:44 +02:00
Erwan Gouriou
cdd5856167 driver/gpio: stm32: Add STM32L5 support
Add basic GPIO support. Regarding interface with EXTI,
STM32L5 is similar to STM32G0.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-05-08 00:34:34 -05:00
Kumar Gala
fdd85d5ad7 dts: Rename DT_HAS_NODE macro to DT_HAS_NODE_STATUS_OKAY
Rename DT_HAS_NODE to DT_HAS_NODE_STATUS_OKAY so the semantics are
clear.  As going forward DT_HAS_NODE will report if a NODE exists
regardless of its status.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-05-06 05:25:41 -05:00
Erwan Gouriou
e26767fc06 drivers/gpio: stm32: Remove Kconfig based device declaration
Use device node declaration instead.
Clean up GPIO_STM32_PORT* Kconfig symbols.

On some boards some gpio ports where disabled using Kconfig symbols.
Disable them now via device tree nodes in boards dts files.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-04-02 06:50:05 -05:00
Erwan Gouriou
c4de0d3b5b drivers: gpio: Use new DT macros for device driver init
Kconfig based device declaration is kept as is.
Clean up the fixup files.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-04-02 06:50:05 -05:00
Peter Bigot
7c95d503b0 gpio: clean up internal API function prototypes
Use gpio_pin_t uniformly when passing pin indexes to the driver.  Use
gpio_flags_t uniformly when passing flags to the driver.  Change name
of pin configuration function in API function table to be consistent
with other API functions.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-02-05 12:00:36 +01:00
Peter Bigot
c7d526be04 gpio: remove port access op support
The only remaining port operations have dedicated API function table
entries.  Remove the defines for access op (mode), and remove support
for access op from all implementations.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-02-05 12:00:36 +01:00
Peter Bigot
1f9beb193f gpio: remove legacy read/write API functions
The last external reference to these was removed when the pin
write/read functions were deprecated.  Remove the syscall support, API
function table entries, and implementation from all drivers.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-02-05 12:00:36 +01:00
Peter Bigot
1947481cce gpio: deprecate gpio pin callback enable and disable API
These have been replaced by the appropriate call to
gpio_pin_interrupt_configure().  While the disable function could be
implemented using the new functionality, the enable function cannot
because the interrupt mode is not available.  Consequently we cannot
replace these with equivalent functionality using the legacy API.

Clean up the internal implementation by removing the inaccessible
port-based enable/disable feature, leaving the pin-based capability in
place.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-02-05 12:00:36 +01:00
Erwan Gouriou
9222a4f9a3 drivers/gpio: stm32: Align arguments types on few api functions
Somehow, types used in some api functions where not in line with
api.
Fix this.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-02-05 12:00:36 +01:00
Peter Bigot
32ff5f1d1f drivers: gpio_stm32: add support for pin validation
Add the common config structure as a prefix of the driver-specific
config structure.  This driver uses fixups to define a common name
based on the SOC series; until aliases for the new properties are
added the code assumes all pins are supported.

Since pin ordinal validation is now done directly in gpio API,
remove checks inside the driver itself.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-02-05 12:00:36 +01:00
Erwan Gouriou
78d7b2106a drivers/interrup_controller: stm32: stm32_exti_enable could be void
stm32_exti_enable was returning errors on line > 32 or line pointing
to non implemented line. Both conditions are hard-coded, hence there
is no use to detect them dynamically in the code.
Check them with assert. As a consequence, function could now be void.

Additionally, enable exti irq line only if both checks are passed.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-02-05 12:00:36 +01:00
Erwan Gouriou
29e9780ad1 drivers/interrupt_controller: stm32: Clean set api from unused arg
Argument 'port' in stm32_exti_set_callback function is not
used, remove it.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-02-05 12:00:36 +01:00
Erwan Gouriou
e88cdffcd6 drivers/gpio: stm32: exti: Clear triggers when not requested
Since it is now possible to disable/re-enable interrupts and
also to reconfigure an already configured interrupt, it is
now required to clear non requested triggers.
While it is not strictly requested, triggers are also cleared
when interrupt is disabled (assuming trigger should be configured
when interrupt is enabled).

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>

fixup exti
2020-02-05 12:00:36 +01:00
Erwan Gouriou
eecc384b22 drivers/gpio: stm32: various clean up
Perform few clean up in stm32 gpio driver:
*Clean up uint32_t occurrences left over.
*Move function gpio_stm32_flags_to_conf from const to static
and remove useless parameter check
*Rework error handling in functoin gpio_stm32_config
*Remove gpio_stm32_int_enabled_port function and have direct call
to gpio_stm32_get_exti_source

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-02-05 12:00:36 +01:00
Erwan Gouriou
a6801f7ff4 drivers/gpio: stm32: Update to new GPIO api
Update STM32 GPIO driver to support new GPIO API.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-02-05 12:00:36 +01:00
Peter Bigot
0b0d2e640b treewide: use full path to clock_control/stm32_clock_control.h header
The build infrastructure should not be adding the drivers subdirectory
to the include path.  Fix the legacy uses that depended on that
addition.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-01-26 17:52:12 +01:00
Tomasz Bursztyka
9abc0e2efd include/drivers: Move 2 specific intc headers into public location
sam0 and stm32 specific interrupt controller headers are meant to be
public, and as such should be found in
include/drivers/interrupt_controller and not in
drivers/interrupt_controllers.

Fixing documentation issues as well.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2019-12-18 21:49:46 +01:00
Tomasz Bursztyka
c30600d4ab drivers/interrupt_controller: Adopt file naming as other drivers
Pattern being <domain>_<model>.<c/h>.
Here interrupt_controller as a domain would be far too long so
shortening it to "intc", as DTS does actually.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2019-12-18 21:49:46 +01:00
Marcin Niestroj
dfda0cb114 gpio: stm32: support disabling and reenabling interrupts on gpio pin
Up to now interrupts could be only configured once, with no way to
disable them in runtime.

Allow interrupts to be disabled in runtime and then properly reenabled
on user request. This allows to ignore interrupts when software is not
expecting them.

The improvement over previously reverted patch [1] is that we disable
interrupts only when we configure port for which interrupt line was
previously selected. This for example prevents to disable interrupts
line 2 in case PA2 was previously configured as interrupt source, but we
are currently configuring PB2 as output.

[1] 0951ce2d34 ("gpio: stm32: support disabling and reenabling
  interrupts on pin")

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2019-11-13 12:05:48 -06:00
Marcin Niestroj
7edcbedc70 gpio: stm32: split helper functions from gpio_stm32_enable_int()
This patch doesn't change functionality, but is only related to improved
readability and reusability.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2019-11-13 12:05:48 -06:00
Marcin Niestroj
09a57a5e81 gpio: stm32: statify gpio_stm32_enable_int()
This allows compiler to inline function body and reduce overall code
size.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2019-11-13 12:05:48 -06:00
Erwan Gouriou
dd0d567e8b drivers/gpio: stm32: Rework configure function exit for dual core
With dual core handling introduction, we now need to take care to
always release lock before exiting function.
Rework gpio_stm32_config to take this into account.
Additionally, since ENOSYS usage is resevred to system calls
handling, replace with EIO.


Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-11-13 12:05:48 -06:00
Richard Osterloh
f7bad922f0 drivers: gpio: Add STM32G4X gpio support
Add GPIO driver support for STM32G4X SoC series.

Signed-off-by: Richard Osterloh <richard.osterloh@gmail.com>
2019-10-04 18:44:24 -07:00
Erwan Gouriou
c9dcf37e6c Revert "gpio: stm32: support disabling and reenabling interrupts on pin"
This reverts commit 0951ce2d34.

This change introduces regression on GPIO interrupts handling
when several GPIOs are configured.

Fixes #19177

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-09-16 05:44:15 -05:00
Marcin Niestroj
0951ce2d34 gpio: stm32: support disabling and reenabling interrupts on pin
Up to now interrupts could be only configured once, with no way to
disable them in runtime.

Allow interrupts to be disabled in runtime and then properly reenabled
on user request. This allows to ignore interrupts when software is not
expecting them.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2019-09-12 08:41:44 -05:00
Marcin Niestroj
c62b57fbd4 gpio: stm32: fix build for stm32l0x with no GPIOH
Some smaller stm32l0x MCUs, such as stm32l011x, do not have GPIOH
port. Fix build for those by checking LL_SYSCFG_EXTI_PORTH macro.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2019-08-26 09:48:54 -05:00
Findlay Feng
4b18a079d9 drivers: gpio: add stm32f1x SWJ configuration
Add the serial wire JTAG configuration of the stm32f1x family.
Before gpio is initialized, you can choose to turn off the debug pin to
make the used pins available.

Signed-off-by: Findlay Feng <i@fengch.me>
2019-08-05 13:22:34 +02:00
Erwan Gouriou
b44f0eacd5 drivers/gpio: stm32h7: Don't use HSEM_CR_COREID_CURRENT as process id
HSEM_CR_COREID_CURRENT was used as process number parameter in
LL_HSEM_ReleaseLock function. While this is working, this
define should not be used in this context.
Also, process number parameter is actually proposed in case of HSEM
use in inter-process context but is not required for inter-core
resource lock. Replace HSEM_CR_COREID_CURRENT with 0.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-07-26 11:25:05 -04:00
Francois Ramu
9b2025c891 drivers: pinmux: Add STM32G0X pinmux support
Add pinmux support for STM32G0X SoC series.

Signed-off-by: Philippe Retornaz <philippe@shapescale.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>

# Conflicts:
#	drivers/pinmux/stm32/pinmux_stm32.h
2019-07-05 10:35:55 -05:00