Add support for up-and-down counter mode, which aligns the center of
each channel's pulses instead of their initial edges. This is enabled
on a PWM periphral by adding the "center-aligned" property to the
device tree, e.g.:
&pwm0 {
status = "okay";
center-aligned;
ch0-pin = <15>;
ch1-pin = <17>;
ch1-inverted;
};
Signed-off-by: Jim Paris <jim@jtan.com>
Use the device tree to assign the correct peripheral clock to each
UART/USART/LEUART. Previously, the clock identifier was determined
through the sequence number of the instantiated UART. This meant
configuring all UARTs when only one of the later UARTs was required.
Signed-off-by: Oane Kingma <o.kingma@interay.com>
We need to change the order of inclusions in
uart_mcux_lpuart.c, to avoid build errors. This
is required since the driver structures contain
a field named DATA, which is also a macro defined
in the linker script.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Replace zephyr_library_sourceS_ifdef with zephyr_library_sources_ifdef
and follow cmake coding style.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
'enable-pin-remap' is defined as 'type: boolean' in
dts/bindings/usb/st,stm32-usb.yaml, so it generates either
#define DT_USB_ENABLE_PIN_REMAP 1
or
#define DT_USB_ENABLE_PIN_REMAP 0
depending on if 'enable-pin-remap;' appears on the node or not.
Since a macro is always generated, #ifdef won't work. The test needs to
be this instead:
#if DT_USB_ENABLE_PIN_REMAP == 1
(Should be careful with '#if HMZ == 0' though, because it's true even if
HMZ is undefined.)
This behavior was inherited from the old scripts, and some things depend
on it, e.g. by expanding macros in initializers.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
This file contains redundant definitions of a bunch of nRF IRQ numbers
(not all, however) that only generates confusion, as enumeration values
provided by MDK can be used instead.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This change is done so that there is no need to additionaly include
<nrfx.h> before <soc/nrfx_coredep.h> (what might be a bit surprising)
and so that <nrfx_config.h> doesn't need to be include separately for
nRF SoCs requiring a special mapping of peripheral accessing symbols.
This commit removes also no longer needed inclusions and updates
the hal_nordic module with required minor correction of nrfx_glue.h.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Header files of nrfx HALs are not supposed to be included directly
but only with their names prepended with the hal/ directory (so that
an inclusion of an nrfx HAL header clearly differs from an inclusion
of an nrfx driver header).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
nrf52840 and nrf9160 have possible configuration of two stop bits
for UART and UARTE, this commit adds handling of it to driver.
Signed-off-by: Mieszko Mierunski <mieszko.mierunski@nordicsemi.no>
Top value interrupt was not enabled because channel index was
used instead of mask. Additionally, interrupt was enabled only
when user callback was provided and not in case there was
custom top value and no top callback.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
A commit that organizes the soc.h header of NXP SoCs:
- removing redundant inclusions of sys/util.h
- removing inclusions of device.h and kernel_includes.h
- including the auto-generated DTS board header
- including the fsl_common.h header
- fixing minor style issues
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Like its 32-bit sibling, the 64-bit code should EOI inline rather than
invoking a function. Defeats the performance advantages of x2APIC.
Signed-off-by: Charles E. Youse <charles.youse@intel.com>
This commit adds driver supporting reading DNA ID value for LiteX SoC
builder.
Signed-off-by: Jakub Wegnerowski <jwegnerowski@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
When a eSPI slave needs to send back-to-back packets
updating status signal need to guarantee both status
reach the eSPI host, i.e. SCI=0 followed by SCI=1.
This change guarantees both packets are transmitted
over esSPI bus.
Allow to map eSPI host logical UART to a soc UART.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
In the main Addr handler code the F1 workaround was used.
Add compile time swith depending on SOC family.
So workaround is not afffecting F2/F4 families.
Signed-off-by: Pavlo Hamov <pavlo_hamov@jabil.com>
This patch adds support for configuring the MAC address through the
Network Management API to the STM32 Ethernet driver.
Signed-off-by: Markus Fuchs <markus.fuchs@de.sauter-bc.com>
A 16bits on/off based PWM, found on MEC1501.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add RTC timer driver for CC13X2/CC26X2, and use it instead of systick
as system clock. It is necessary to use this timer for power
management support, so that the system can exit from deep sleep upon
expiry of timeouts.
Signed-off-by: Vincent Wan <vincent.wan@linaro.org>
Use the named representation for no-wait to future-proof against a
change to the representation of timeout values.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
This commit adds:
1. pin definitions for SPI1 on PE12-15 on STM32L4 devices
2. SPI3 on PA15_SPI3_NSS
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The correct suffix name for selecting the GPIO for SPI Chip Select
is _CS_GPIOS_CONTROLLER and not _CS_GPIO_CONTROLLER.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
It seems that gpio_pin_disable_callback() has never been working
for that sensor as it was expected. We used there argument 'dev'
as its own (lis2dw12) device pointer. While this argument is a
gpio_port device pointer not lis2dw12 sensor device pointer. So
cfg->int_gpio_pin always tries to disable callback for some random
pin read from accidental data sector.
Signed-off-by: Michał Oleszczyk <oleszczyk.m@gmail.com>
console_register_line_input has been deprecated for at least 2 releases
so we can now remove it. Remove native_stdin_register_input that is
associated with console_register_line_input.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
For now there is only periodic data acquisition mode implemented.
This mode is quite power consuming. Based on datasheet in idle
state in periodic data acquisition mode SHT3X consumes 45uA but
in single shot mode 0.2uA. For many applications where power
consumption has to be kept as low as possible single shot mode
is the only choice. Tester on custom board NRF52832 + SHT31-DIS.
Signed-off-by: Michał Oleszczyk <oleszczyk.m@gmail.com>
When randomly generating MAC addresses they will always be
locally administrated addresses, so the LAA bit should be set.
The LAA bit is the 2nd bit of the 1st byte of the MAC address
not the 2nd bit of the 4th byte.
Fixes: #16452
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
No users of this driver after dropping quark platforms.
COUNTER_0_NAME was only defined by the QMSI driver and was defined but
not used in DTS fixup files of ateml_sam0 SoCs. Removing those leftover
defines as well.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
GPIO configuration flags will move and some that used to be in the low
8 bits are now higher, resulting in implicit constant conversion
overflows. Use a boolean data type to hold boolean values.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
