soc: nordic: Get rid of nrf_common.h

This file contains redundant definitions of a bunch of nRF IRQ numbers
(not all, however) that only generates confusion, as enumeration values
provided by MDK can be used instead.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This commit is contained in:
Andrzej Głąbek 2019-09-20 14:13:45 +02:00 committed by Ioannis Glaropoulos
commit 35754375bc
8 changed files with 18 additions and 88 deletions

View file

@ -347,9 +347,9 @@ static void nrf5_irq_config(struct device *dev)
{
ARG_UNUSED(dev);
IRQ_CONNECT(NRF5_IRQ_RADIO_IRQn, NRF_802154_IRQ_PRIORITY,
IRQ_CONNECT(RADIO_IRQn, NRF_802154_IRQ_PRIORITY,
nrf5_radio_irq, NULL, 0);
irq_enable(NRF5_IRQ_RADIO_IRQn);
irq_enable(RADIO_IRQn);
}
static int nrf5_init(struct device *dev)

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@ -1,7 +1,3 @@
# SPDX-License-Identifier: Apache-2.0
zephyr_include_directories(
include
)
add_subdirectory(${SOC_SERIES})

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@ -1,64 +0,0 @@
/*
* Copyright (c) 2016 Linaro Ltd.
* Copyright (c) 2016-2018 Nordic Semiconductor ASA
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef _NRF_SOC_COMMON_H_
#define _NRF_SOC_COMMON_H_
/**
* @file Common definitions for NRF51/NRF52 family processors.
*
* The nRF51 IRQs can all be represented by the common definitions.
*
* Based on Nordic MDK included header files: nrf51.h and nrf51_to_nrf52.h
*/
#define NRF5_IRQ_POWER_CLOCK_IRQn 0
#define NRF5_IRQ_RADIO_IRQn 1
#define NRF5_IRQ_UART0_IRQn 2
#define NRF5_IRQ_SPI0_TWI0_IRQn 3
#define NRF5_IRQ_SPI1_TWI1_IRQn 4
#define NRF5_IRQ_GPIOTE_IRQn 6
#define NRF5_IRQ_ADC_IRQn 7
#define NRF5_IRQ_TIMER0_IRQn 8
#define NRF5_IRQ_TIMER1_IRQn 9
#define NRF5_IRQ_TIMER2_IRQn 10
#define NRF5_IRQ_RTC0_IRQn 11
#define NRF5_IRQ_TEMP_IRQn 12
#define NRF5_IRQ_RNG_IRQn 13
#define NRF5_IRQ_ECB_IRQn 14
#define NRF5_IRQ_CCM_AAR_IRQn 15
#define NRF5_IRQ_WDT_IRQn 16
#define NRF5_IRQ_RTC1_IRQn 17
#define NRF5_IRQ_QDEC_IRQn 18
#define NRF5_IRQ_LPCOMP_IRQn 19
#define NRF5_IRQ_SWI0_IRQn 20
#define NRF5_IRQ_SWI1_IRQn 21
#define NRF5_IRQ_SWI2_IRQn 22
#define NRF5_IRQ_SWI3_IRQn 23
#define NRF5_IRQ_SWI4_IRQn 24
#define NRF5_IRQ_SWI5_IRQn 25
/**
* @file Interrupt numbers for NRF52 family processors.
*
* Based on Nordic MDK included header file: nrf52.h
*/
#define NRF52_IRQ_NFCT_IRQn 5
#define NRF52_IRQ_TIMER3_IRQn 26
#define NRF52_IRQ_TIMER4_IRQn 27
#define NRF52_IRQ_PWM0_IRQn 28
#define NRF52_IRQ_PDM_IRQn 29
#define NRF52_IRQ_MWU_IRQn 32
#define NRF52_IRQ_PWM1_IRQn 33
#define NRF52_IRQ_PWM2_IRQn 34
#define NRF52_IRQ_SPIM2_SPIS2_SPI2_IRQn 35
#define NRF52_IRQ_RTC2_IRQn 36
#define NRF52_IRQ_I2S_IRQn 37
#define NRF52_IRQ_FPU_IRQn 38
#endif /* _NRF_SOC_COMMON_H_ */

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@ -13,7 +13,6 @@
#ifndef _ASMLANGUAGE
#include <nrf_common.h>
#include <nrfx.h>
/* Add include for DTS generated information */

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@ -13,7 +13,6 @@
#ifndef _ASMLANGUAGE
#include <nrf_common.h>
#include <nrfx.h>
/* Add include for DTS generated information */

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@ -180,16 +180,16 @@ int ll_init(struct k_sem *sem_rx)
ll_filter_reset(true);
}
IRQ_DIRECT_CONNECT(NRF5_IRQ_RADIO_IRQn, CONFIG_BT_CTLR_WORKER_PRIO,
IRQ_DIRECT_CONNECT(RADIO_IRQn, CONFIG_BT_CTLR_WORKER_PRIO,
radio_nrf5_isr, 0);
IRQ_CONNECT(NRF5_IRQ_RTC0_IRQn, CONFIG_BT_CTLR_WORKER_PRIO,
IRQ_CONNECT(RTC0_IRQn, CONFIG_BT_CTLR_WORKER_PRIO,
rtc0_nrf5_isr, NULL, 0);
IRQ_CONNECT(NRF5_IRQ_SWI5_IRQn, CONFIG_BT_CTLR_JOB_PRIO, swi5_nrf5_isr,
NULL, 0);
IRQ_CONNECT(SWI5_IRQn, CONFIG_BT_CTLR_JOB_PRIO,
swi5_nrf5_isr, NULL, 0);
irq_enable(NRF5_IRQ_RADIO_IRQn);
irq_enable(NRF5_IRQ_RTC0_IRQn);
irq_enable(NRF5_IRQ_SWI5_IRQn);
irq_enable(RADIO_IRQn);
irq_enable(RTC0_IRQn);
irq_enable(SWI5_IRQn);
return 0;
}

View file

@ -14,13 +14,13 @@ static inline void hal_swi_init(void)
/* SW IRQs required for the nRF5 BLE Controller. */
#if defined(CONFIG_BT_LL_SW_SPLIT)
/* Split architecture uses max. two SWI */
#define HAL_SWI_RADIO_IRQ NRF5_IRQ_SWI4_IRQn
#define HAL_SWI_WORKER_IRQ NRF5_IRQ_RTC0_IRQn
#define HAL_SWI_RADIO_IRQ SWI4_IRQn
#define HAL_SWI_WORKER_IRQ RTC0_IRQn
#if (CONFIG_BT_CTLR_ULL_HIGH_PRIO == CONFIG_BT_CTLR_ULL_LOW_PRIO)
#define HAL_SWI_JOB_IRQ HAL_SWI_WORKER_IRQ
#else
#define HAL_SWI_JOB_IRQ NRF5_IRQ_SWI5_IRQn
#define HAL_SWI_JOB_IRQ SWI5_IRQn
#endif
static inline void hal_swi_lll_pend(void)
@ -30,8 +30,8 @@ static inline void hal_swi_lll_pend(void)
#elif defined(CONFIG_BT_LL_SW_LEGACY)
/* Legacy controller uses max. one SWI */
#define HAL_SWI_WORKER_IRQ NRF5_IRQ_RTC0_IRQn
#define HAL_SWI_JOB_IRQ NRF5_IRQ_SWI5_IRQn
#define HAL_SWI_WORKER_IRQ RTC0_IRQn
#define HAL_SWI_JOB_IRQ SWI5_IRQn
#else
#error "CTRL architecture not defined"

View file

@ -155,9 +155,9 @@ int lll_init(void)
hal_swi_init();
/* Connect ISRs */
IRQ_DIRECT_CONNECT(NRF5_IRQ_RADIO_IRQn, CONFIG_BT_CTLR_LLL_PRIO,
IRQ_DIRECT_CONNECT(RADIO_IRQn, CONFIG_BT_CTLR_LLL_PRIO,
radio_nrf5_isr, 0);
IRQ_CONNECT(NRF5_IRQ_RTC0_IRQn, CONFIG_BT_CTLR_ULL_HIGH_PRIO,
IRQ_CONNECT(RTC0_IRQn, CONFIG_BT_CTLR_ULL_HIGH_PRIO,
rtc0_nrf5_isr, NULL, 0);
IRQ_CONNECT(HAL_SWI_RADIO_IRQ, CONFIG_BT_CTLR_LLL_PRIO,
swi_lll_nrf5_isr, NULL, 0);
@ -167,8 +167,8 @@ int lll_init(void)
#endif
/* Enable IRQs */
irq_enable(NRF5_IRQ_RADIO_IRQn);
irq_enable(NRF5_IRQ_RTC0_IRQn);
irq_enable(RADIO_IRQn);
irq_enable(RTC0_IRQn);
irq_enable(HAL_SWI_RADIO_IRQ);
#if (CONFIG_BT_CTLR_ULL_HIGH_PRIO != CONFIG_BT_CTLR_ULL_LOW_PRIO)
irq_enable(HAL_SWI_JOB_IRQ);