Several peripherals are non-functional in the ENG_A revision
of nRF5340 (Application MCU) so we delete the corresponding
DTS nodes in the device description.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
When building for nRF5340 Application MCU we need to properly
select which are the default GPIO port/pins for UARTE on the
Network MCU (so we allocate them to Network MCU). These depend
on the actual version of the board we are using (PDK or DK) so
this commit implements the corresponding conditional logic.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
When building for nRF5340 PDK board, enable Kconfig option
for Erratum 19. Do not enable when building on nRF5340 DK.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We rename the nRF5340 board directory to
nrf5340dk_nrf5340 since this will be now
containing board definitions for both the
nRF5340 PDK and DK.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Refactor the common Kconfig and build files of nRF5340
board definition to enable building for either nRF5340
PDK or DK.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We do not need to have the nrf5340pdk_ prefix in the
partition configuration and sram planning files for
nrf5340 platforms because these files may be common
for any nrf5340 board variant. Also, we do not need
it in the common .dts header for the Application MCU.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Rename the nRF5340 QKAA variant .dtsi headers (Application
MCU) by adding an Engineering A (Eng A) suffix. This is done
to indicate that the headers should be explicitly used when
building for a board that contains the Engineeering A nrf5340
SoC variant.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We do not need to list the SoC compatibles in the
PDK node definition, this was accidentally left out.
Removing it in this commit.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Since Python 2 is already EOL, Linux distributions are starting
to drop support for Python 2. For example, on Ubuntu 20.04,
"python" is no longer available. This breaks the bootstrap
and autogen.sh as they are both default to executing "python".
Fix this by setting the PYTHON environment variable before
building so both scripts will use python3 instead.
Also update git checkout to grab the official 2.04 release.
Fixes#25398
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Since commit 5963ebaf33
("drivers: spi: CS configuration through devicetree")
the SPI GPIO CS flags are obtained from DT,
but the patch series has missed the necessary changes
in the device trees for displays and link_board_eth.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
Since commit 5963ebaf33
("drivers: spi: CS configuration through devicetree")
the SPI GPIO CS flags are obtained from DT,
but the patch series has missed the necessary changes
for the ieee802154_dw1000 driver and decawave_dwm1001_dev board.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
Add and mark PCIe highmem outbound memory as nGnRnE device memory
in Viper SoC MMU configuration.
Increase VA/PA bits to 36-bits to support the same.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Adds the chip select devicetree flags to the spi_cs_control instance.
ISM43362 chip select is ACTIVE_LOW.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
This commit adds the PWM LED definition in the board device tree for
the on-board LED connected to the pin PC18.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
CLOCK_STM32_PLL_XTPRE Kconfig symbols was made to differentiate
code between F1 soc variants with XTRE and others.
It appears that specific XTRE code handling is already in place in
LL_PLL_ConfigSystemClock_* functions that are called afterwards.
Since this piece of code is not required anymore, let's remove
the symbol.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit adds the PWM LED definition in the board device tree for
the on-board LED connected to the pin PB30.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
The preceeding patches causes bossac to automatically pull the flash
address from DeviceTree, so drop the explicit flag.
Signed-off-by: Michael Hope <mlhx@google.com>
This commit makes it possible to use stm32flash for flashing (with west)
the STM32F030 Demo Board. OpenOCD is still the default, so in order to
use stm32flash, one must invoke ‘west flash’ with ‘-r stm32flash’.
Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Enable TCC0, define the PWM LED, document, and add to the peripheral
list.
Tested using samples/basic/fade_led/
Signed-off-by: Michael Hope <mlhx@google.com>
The common code now auto selects drivers. Update the Trinket to match
the Arduino Zero including trimming the defconfig and listing the
supported peripherals.
Signed-off-by: Michael Hope <mlhx@google.com>
Add devicetree overlay for connecting an Mikroe ADC click shield to an
NXP LPCXpresso55S16 development board.
The LPCXpresso55S16 uses SSEL1 (CS1) for mikroBUS SPI, whereas the
generic Mikroe ADC click board definition assumes SPI CS0.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Use the recently introduced mikrobus_spi devicetree node as parent node
instead of relying on mapping for arduino_spi.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
The Seeeduino XIAO is a tiny (20 mm x 17.5 mm) ARM development
board with onboard LEDs, USB port, and range of I/O broken out
onto 14 pins.
Signed-off-by: Michael Hope <mlhx@google.com>
Fixes whitespace in the frdm_kw41z shield document to allow continuation
in the numbered list of Bluetooth controller instructions and to format
the jumper configuration sublist correctly.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This enables PWM and connects it to the main LED. Tested by running
samples/basic/blinky_pwm and /fade_led.
Signed-off-by: Michael Hope <mlhx@google.com>
Fixes#26413.
The devicetree for disco_l475_iot1 declares the flash partitions
"storage" and "image-scratch" with overlapping address spaces.
As a result, when one of these partitions is used it can corrupt the
contents of the other one. This is the case when mcuboot performs an
image swap using the scratch partition.
To fix the bug, the size of the scratch partition is reduced.
Signed-off-by: Hans Wilmers <hans@wilmers.no>
In this board DT the "storage" and "image-scratch" are declared
with overlapping address spaces.
As a result, when one of these partitions is used it can corrupt the
contents of the other one. This is the case when mcuboot performs an
image swap using the scratch partition.
To fix the bug, the size of the scratch partition is reduced.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Fixes the frdm_k64f and twr_ke18f boards to enable the kinetis
temperature sensor only if the sensor and adc drivers are both enabled.
This fixes a logging error seen at runtime in
samples/bluetooth/peripheral_hr.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Plus corresponding configuration file for the spi_loopback test that
will be activated for that board by this added capability.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
No need to specify a default configuration for
ENTROPY_NRF_FORCE_ALT Kconfig symbol in the
qemu_cortex_m0 board definition.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
We rework the timer driver for Cortex-M0 QEMU Board.
The driver is adapted to follow the (recent) nRF RTC
driver logic, and adaptations are made simply because
the driver is based on the TIMER peripheral instead of
the RTC.
A couple of tweaks are added due to QEMU issues with the
simulation of the TIMER peripheral.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Instead of endlessly repeating the same command line args,
centralize this and tune the shift value on a per-board
basis.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This patch enables the Independent watchdog (iwdg)
so that the testcase tests/drivers/watchdog/wdt_basic_api
can run on this stm32f3_disco board
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Explicitly ignore the nanosleep() return value.
nanosleep() is called to slow down native_posix in real time
mode.
There is no real reason to handle this call returning too early:
The call may return earlier if a signal was sent to the process
(e.g. the user pressed Ctrl+C), or in case of errors.
In case of SIGKILL, SIGTERM, what we do is what we should do
(not wait, but terminate the program as requested by the user ASAP)
In case of another signal, we will wait the appropriate
amount of time in the next systick (so we won't accumulate any
error over time)
So there is no real need to add extra code here to handle
those cases.
Solves coverity CID 211046
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
QEMU icount does not work correctly when more than 1 CPU is used,
but works fine with only 1 CPU enabled. So we can enable icount
on qemu_x86_64 when CONFIG_MP_NUM_CPUS=1. Sanitycheck goes from
~158 seconds to ~113 seconds on my dev machine.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
All pinmux supporting CAN, SPI and I2C of F7 series are added.
Since the F7 series supports up to two CANs,
the pin names of CANs have been changed.
Several minor pinmux errors have also been fixed.
Sorted by Alternate function.
Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
PA selection mainly depends on board design. So it looks like
device-tree is a better mechanism than Kconfig in this case. Use string
property with two possible values: "rfo" and "pa-boost".
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Changes to the PLL configuration were required
for proper device enumeration. Now there is a 48MHz USB clock
(was 25MHz), and a 96MHz system clock (was 100 MHz).
Addresses #25293
Signed-off-by: Brian Bradley <brian.bradley.p@gmail.com>
With addition of flash_get_parameters API call, it is needed to provide
support for the API to flash drivers.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Now that the SAM0 SOC selects the appropriate SAM0 driver for a class,
reduce the drivers that are compiled in by default on the Arduino
Zero. This reduces the size of `blink` from ~14 KiB to ~10 KiB.
Also add the supported features to arduino_zero.yaml to get more
coverage in the sanity tests.
Signed-off-by: Michael Hope <mlhx@google.com>
The DTS for nRF53 and nRF91 boards has been modified to cut the size
of boot partition from 64KiB to 48KiB, making it the same size as for
nRF52.
Resolves#25664
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Only boards with at least 64K Flash will activate MPU because:
MPU + UERSPACE + All switches implicity activated
(CONFIG_MPU_STACK_GUARD, CONFIG_ARM_STACK_PROTECTION ...)
will consume about 40K Flash
(value computed on nucleo_f767_zi on tests/arch/arm/arm_ramfunc/).
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Add support for the polarity flag in the STM32 PWM driver.
STM32 boards using PWM have been updated accordingly.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Add devicetree nodes for the Arduino GPIO and MikroElektronika
mikroBUS headers present on the NXP LPCXpresso55S16 development board.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Bluetooth interacts with real-world hardware and thus requires the QEMU
target to follow wall time, and not have a free running timer that is
much faster than actual wall time.
Diable the QEMU icount mechanism when Bluetooth is enabled.
Fixes#26242
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
With latest SDK release v0.11.3 basic SMP support for HSDK
board was introduced in OpenOCD. Lets enable smp in openocd.cfg,
so using west we would be able to run Zephyr on all 4 cores.
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Implement stubs for ARM CMSIS intrinsics,
to be used locally for nrf52_bsim builds.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Provide a very simple model of the DSB ARM
instruction as no-operation. The implementation
is provided in a cmsis.h header file added
in the nrf52_bsim board directory.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Appropriate WS can be loaded automatically if
the display controller has integrated temperature
sensor or an external sensor is connected.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
Enable GPIO as a workaround to enable some SPI slaves are not correctly
controlled using the Flexcomm SPI device.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
This patch introduces the new b_l4s5i_iot01a discovery kit
from STMicroelectronics.
This is a IOT node based on the stm32l4s5vi
including MEMS, Bluetooth BLE, WiFi and NFC modules
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Replace usage of deprecated GPIO_INT_ACTIVE_LOW, GPIO_INT_ACTIVE_HIGH,
GPIO_PUD_PULL_UP flags with a new equivalent in a few boards that were
added after 2.2 release.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Added / Tested support for RNG on the STM32F767ZI nucleo board.
Updated the SoC defconfig to auto-enable the driver when
ENTROPY_GENERATOR is enabled, and updated the board README.
Signed-off-by: Bilal Wasim <bilalwasim676@gmail.com>
- Change default CPU Clock to 240MHz
(PLL is activated)
- I2C, UART will use sysclk from clock driver
- esp32_enable_peripheral replaced by
clock_control_on
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
- Support PLL for Higher Frequencies 80,160,240 MHz
- Support XTAL Frequencies 26MHz, 40MHz
- Clock Driver can't be disabled, because all of the other drivers
will depend on it to get their operating Frequency based on chosen
clock source (XTAL/PLL).
- Add needed references to BBPLL i2c bus ROM functions.
- Add `rtc` node to Device Tree.
- Since All Peripherals Frequency is depending on CPU_CLK Source,
`clock-source` property added to CPU node
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
tested on mimxrt1060_evt
MEMORY_NOCACHE is needed
test on frdmk64f
special test slot need configure with
CONFIG_DMA_TEST_SLOT_START
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Add support for Bluetooth Controller GPIO Debug Pins for
nRF5340 PDK board. GPIO Pin toggling can be captured on the
P3 pinhead of the PDK.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
The `netif` capability is needed for certain samples to be built by the
CI for a target platform. As it was missing for nrf52840dk_nrf52840,
echo samples with OpenThread support were not being built and thus not
tested by the CI.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
The STM32L072CZ MCU has a built-in USB device controller which is
supported by Zephyr's USB STM32 driver. The b_l072z_lrwan1 board has a
micro-USB connector that is wired to the MCU via two solder bridges
(SB15 and SB16) that need to be closed to connect the data lines.
Update the board documentation to describe the solder bridges and
enable the USB controller in the device tree.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
* current supported boards:
* emsk, iotdk, nsim, emsdp, hsdk.
* for the unsupported future boards, pls take a
reference of supported boards' board.cmake.
* mdb runner is required and the default runner for SMP
case, e.g., HSDK and nsim_hs_smp.
* other ARC boards can also choose to use mdb by
setting runner as mdb, e.g. west flash --runner mdb.
* with mdb runner, user can make a debug through mdb gui
* with arc_nsim or opencod runner (default runner), user
can make a debug through gdb cmdline.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Provide devicetree configuration for UART2 on the mesh feather header.
The peripheral must be enabled in an overlay, optionally including a
provided overlay with the hardware flow control signals.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Default alternate function for the MEC15xx VCI pins makes them
HW-controlled.
Most common scenario is that pins are used as GPIOs, however
there are still some board designs where HW-controlled is desired.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
The ip_k66f board can run with clock frequency of 180 MHz. This requires
switching it to high speed mode (HSRUN).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This patch adds information regarding usage of serial console on
the ip_k66f board, as it only can use Segger's RTT console for
communication.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This change allows usage of larger RTT "UP" buffers from target to host.
It is necessary to allow correct execution of ping command:
net ping 192.168.0.1
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Michael Hope
