The MCUBoot partition in the default partition table (fstab-stock)
is not meant to accommodate an RTT console, since the board does
not have a SEGGER chip.
Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
Provide a dtsi file that sets up common capabilities for all
Feather-based Particle Mesh devices. Provide additional dtsi files for
some obvious peripheral options.
Remove the xtensa esp32 image: it didn't build, and there's no
indication of how the ESP32 firmware can be updated on the Argon board.
Use particle_argon as the nRF52840 side of the board.
Add Particle Boron support.
Note that dtsi files must be replicated in each board directory until
tooling supports DTS includes from a shared area.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Fix the QSPI and hyperflash nodes to be proper SPI children and expose
the address range for direct access as part of the controller's reg
region.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The mimxrt1020_evk and mimxrt1060_evk boards had invalid jlink device
names. Debugging via 'ninja debug' now works on these boards.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Fixes a Kconfig typo in the mimxrt1060_evk board that was introduced
when the board was split into separate hyperflash and qspi
configurations.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Moves the default TEXT_SECTION_OFFSET from the board level to the soc
level for the imx rt series. This offset is used to reserve space for
the imx boot header for external xip flash images.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add board support files for mimxrt1020_evk, the development board for
i.MXRT1021 (CM7) SoC.
- Add pinmux, dts, doc.
- Code can be loaded to SRAM.
- Tested samples: hello_world, philosophers, synchronization,
basic/blinky, and basic/button.
Signed-off-by: Ryan QIAN <jianghao.qian@nxp.com>
By default, after reset SWO signal is not connected to GPIO pin.
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
By default, after reset SWO signal is not connected to GPIO pin. This
commit adds required initialization code to enable support for SWO
logger. Not all SoC series support the feature.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
lpuart1 is the default port used by ST-Link VPC.
Update board description to match out of box board configuration.
Fixes#12092
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following recent renaming of STM32 UART Kconfig UART symbols,
LPUART was named as UART_LPUART_1.
Rename to LPUART_1.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
* Add DTS support for gpio controller driver
Signed-off-by: Ashokkumar B <ashokkumar@zilogic.com>
Signed-off-by: Subash G <subash@zilogic.com>
Signed-off-by: Vishnu K <vishnu@zilogic.com>
Signed-off-by: Vaishnavi D <vaishnavi.d@zilogic.com>
By adding 'aliases' node in SoC .dtsi file it is possible to generate
DT_ defines which specify a logical name rather than relay on module
location on APB bus. E.g. DT_SILABS_GECKO_USART_40010000_LABEL becomes
DT_SILABS_GECKO_USART_USART_0_LABEL. Thus it is possible to remove
dts_fixup.h defines.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
The i2c_atmel_sam3 driver was deprecated at release 1.9, this commit
removes it. Also pinmux_dev_atmel_sam3x driver is removed.
i2c_atmel_sam3 was the last one which depended on it.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Remove configuration parameter CONFIG_BUS_TYPE. Now we may
make use of DT_ST_LSM6DSL_BUS_I2C and DT_ST_LSM6DSL_BUS_SPI
definition to select the bus.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Updated flash partitions to extend supported boot scenarios.
Add support for using Nordic nRF5 bootloader to:
- flash a Zephyr application
- flash a MCUboot image as an application
Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
The en.high-perf_nucleo-144_mbed.jpg is an empty file.
This causes error when generating PDF documentation
as the tool cannot deal with empty image files.
So replace it with the image with same filename from
nucleo_f765zg, as the images are identical from
the online product description pages.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
interface/stlink-v2-1.cfg and interface/stlink-v2.cfg are wrappers
around interface/stlink.cfg, their inclusion trigger warning which
this change addresses. Besides the warning there is nothing there
except sourcing iterface/stlink.cfg directly.
Signed-off-by: Vasili Slapik <vslapik@gmail.com>
This mode allows the USB driver to use MSI clock as source clock.
MSI PLL-Mode permits +/-0,25% accuracy.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
The L476RG does not use the same I2C instance as the other L4 boards.
Correct the pinmux and add the peripheral.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Document CAN support for board nucleo_l432kc and
add can to board yaml "support" section.
Fixes#12052
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Fix misspellings in documentation (.rst, Kconfig help text, and .h
doxygen API comments), missed during regular reviews.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Enable by default the following hardware instances in Kconfig:
- ADC_0
- I2C_0
- SPI_1 (SPI_0 for nRF52810)
for all nRF development kit boards having the corresponding DT nodes
enabled. This way there is no need to enable these instances in
particular applications, like samples for sensors or tests for drivers.
I2C_0 and SPI_0 cannot be used simultaneously in most of nRF SoCs,
nRF52810 is the only exception so far (and in this SoC SPI_1 is not
present, hence SPI_0 is enabled for it).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The options selecting nRF drivers are now enabled by default when
an nRF SoC is selected as the build target.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Fixes board PHY initialization.
ENET_RST and ENET_INT pins are also used as USER_LED/JTAG_TDI and
INT1_COMBO/JTAG_TDO. Initialization needs to set these pins to power and
interrupt for the PHY Transciver. PHY reset works without busy waiting.
Moved pin initialization back to PRE_KERNEL_1 to fix UART bug and busy
wait not required.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Added support for SPI 1 available from the arduino connector (plus an
extra gpio). Tested against samples/sensor/bme280.
Added warnings in documentation, pinmux and dts highlighting a potential
conflict if using SPI_1 and on-board ethernet at the same time.
Signed-off-by: AJ Palmer <ajpcode@hotmail.com>
Added board definitions for nucleo_f756zg. Features include gpio,
pinmux, uart (ST Zio, ST-Link and Arduino Uno v3 interfaces).
Added basic documentation and some soc definitions for the
stm32 f756XX soc.
Signed-off-by: AJ Palmer <ajpcode@hotmail.com>
Updated .dts and pinmux.c to highlight pin conflict on PA7 if ETH and
SPI_1 are selected together without modification.
Signed-off-by: AJ Palmer <ajpcode@hotmail.com>
