Commit graph

2509 commits

Author SHA1 Message Date
Francois Ramu 734c7e053a boards: arm: stm32f091 add rtc feature on the nucleo board
This patch enables the rtc so that the testcase
tests/drivers/counter/counter_basic_api
can run on this nucleo_f091rc board
also when running sanity check

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-07-24 16:16:21 +02:00
Josep Puigdemont 7cafe7e74b boards: arm: olimex stm32-h103: Add board
The Olimex STM32-h103 is a development board based on the STM32F103RB,
very similar to the stm32_mini, which was used as a reference for the
pinmux configuration.

Signed-off-by: Josep Puigdemont <josep.puigdemont@gmail.com>
2020-07-24 14:48:07 +02:00
Erwan Gouriou 6f38dc9bb6 boards: nucleo_h747: Fix pinmux conditional configuration
To avoid potential conflicts, pin settings should depend on
subsystem activation.
Fix this.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-07-24 12:03:33 +02:00
Erwan Gouriou c062cd260a drivers/ethernet: stm32: Enable Kconfig symbol ETH_STM32_HAL using dts
It should not be needed to configure ETH_STM32_HAL from boards.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-07-24 12:03:33 +02:00
Erwan Gouriou e8f1c17e79 boards: stm32: Enable ethernet devices through device tree
Update boards that use to declare ethernet support to enable
matching ethernet node.
Similarly to other devices, use dts API to control ethernet pin
settings.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-07-24 12:03:33 +02:00
Michael Hope 2dd255d195 boards: arm: add the Arduino Nano 33 IOT
The Arduino Nano 33 IOT is a a small form factor development board
with USB, Wifi, Bluetooth, a 6 axis IMU, and secure element.

Signed-off-by: Michael Hope <mlhx@google.com>
2020-07-24 12:01:50 +02:00
Ioannis Glaropoulos 6d9d60ce60 boards: nrf5340: update help text for BOARD_ENABLE_CPUNET symbol
We enhance the help text of the BOARD_ENABLE_CPUNET Kconfig
option, to stress that if the option is used when building
a Non-Secure Application MCU firmware image, the Secure
image counterpart also needs to perform the required GPIO
allocation.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-23 14:07:16 +02:00
Ioannis Glaropoulos 4051f277ef boards: nrf5340: do not attempt to boot NETWORK MCU from Secure image
Building Zephyr with CONFIG_TRUSTED_EXECUTION_SECURE=y implies
building also a Non-Secure image. The Non-Secure image will, in
this case do the remainder of actions to properly configure and
boot the Network MCU. So the (strictly) secure firmware image
does not need to execute the configuration and the booting of
the Network MCU, except for the part that does security
attribution. In the absence of any TrustZone awareness, the
single Application MCU firmware will do all the required
steps to configure and boot the Network MCU.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-23 14:07:16 +02:00
Kumar Gala 77a56fd725 dts: remove incorrect use of device_type property
For true mmio-sram, arc,iccm, arc,dccm nodes we should not be setting
device_type = "memory".  This should be used for true DRAM regions of
memory and not on SoC SRAMs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-07-23 06:37:41 -05:00
Alexander Kozhinov c485207044 boards: arm: yaml: nucleo_h745zi_q_m4
add netif:eth to supported devices
change ram size to 288 as it the size of
  sram0 in h745 SoC

Signed-off-by: Alexander Kozhinov <AlexanderKozhinov@yandex.com>
2020-07-22 15:19:38 -05:00
Alexander Kozhinov dd9e9c2e71 boards: arm: dts: nuleo_h745zi_q_m4
bringing model and compatible descriptors
  to same style as in case of M7 core
enable UART8 for Cortex-M4 in it's dts

Signed-off-by: Alexander Kozhinov <AlexanderKozhinov@yandex.com>
2020-07-22 15:19:38 -05:00
Alexander Kozhinov 3b115be91f boards: arm: dts: nuleo_h745zi_q_m7
updating comment on resources

Signed-off-by: Alexander Kozhinov <AlexanderKozhinov@yandex.com>
2020-07-22 15:19:38 -05:00
Michael Hope 045cc2eb2a boards: arm: configure and document the bootloader on the Trinket M0
The Trinket M0 has a Adafruit UF2 bootloader.  Configure and document
how to use it.

Signed-off-by: Michael Hope <mlhx@google.com>
2020-07-22 13:24:37 +02:00
Henrik Brix Andersen 80c2a751ff boards: arm: twr_ke18f: enable edma
Enable eDMA on the NXP TWR-KE18F development board.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-07-21 08:56:51 -05:00
Alexander Kozhinov 08b557ee24 boards: nucleo_h745zi_q: added ethernet support
KConfig.defconfig: enabled NETWORKING support
pinmux.c: added ethernet pins definition for this board
m7 yaml file becomes netif:eth support enabled

Signed-off-by: Alexander Kozhinov <AlexanderKozhinov@yandex.com>
2020-07-21 15:12:18 +02:00
Krzysztof Chruscinski 4883a36be2 boards: arm: qemu_cortex_m0: Removed HFXO request from the timer
Removed HFXO request. It is a qemu target thus HF clock source
should not matter.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-07-20 16:22:21 +02:00
Brian Bradley 8ec1cbc95d boards: arm: stm32: Add WeAct Black Pill V2.0 definitions
Includes support for spi, usb, i2c, uart, pwm, adc, dfu,
and onboard led and switch.

Signed-off-by: Brian Bradley <brian.bradley.p@gmail.com>
2020-07-17 16:54:22 +02:00
Peter Bigot 5f68b63896 dts: ti,bq274xx: remove default properties
The parameters for this fuel gauge depend on the hardware design and
the expected battery.  These should not be defaulted to a value that
may be inappropriate.  Require that they be explicitly provided.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-07-17 13:35:52 +02:00
Gerson Fernando Budke 2568925c2b boards: arm: nucleo_f767zi: Add flash partitions
Define flash layout to allow use of MCUboot and storage.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-07-16 10:52:13 +02:00
David Brown 79daf21189 dts: arm: nxp: nxp_lpc55s6x: Use proper code partition
The zephyr,code-parition was set incorrectly to SRAM.  Set it to the
slot0 partition, so that enabling BOOTLOADER_MCUBOOT will place the code
at the proper address.

Signed-off-by: David Brown <david.brown@linaro.org>
2020-07-15 13:29:50 +02:00
David Brown e2f4b9ef37 dts: arm: nxp: nxp_lpc55s6x: Fix partition table
The partition table in DTS are offsets within the flash device, not
absolute addresses.  The flash doesn't start at 0 on the lpc55s6x
(because of the secure execution bit), but the offsets in the partition
table should.

Signed-off-by: David Brown <david.brown@linaro.org>
2020-07-15 13:29:50 +02:00
Daniel Leung f6d8909a6d boards: mec15xxevb_assy6853: use DTS node labels for PWM pinmux
The DT_INST_* macros for PWM may not exactly point to the hardware
instance (e.g. DT_INST_0 may not point to PWM0). So use the node
labels for a more precise match.

Fixes #26782

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-07-15 06:14:56 -04:00
Abhishek Shah 4a68cd9724 boards: arm: bcm958402m2_a72: remove CONFIG_PCIE
Now that PCIE and PCIE_ENDPOINT are made independent,
remove unnecessary CONFIG_PCIE=y from defconfig

Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
2020-07-14 19:35:31 -04:00
Michael Hope 71e631c2f6 boards: arm: add OpenOCD flash and debug support for the itsybitsy_m4
The Itsybitsy exposes the SWD pins on an unpopulated header on the end
of the board.  Add a OpenOCD config and document how to use it.

Signed-off-by: Michael Hope <mlhx@google.com>
2020-07-13 10:24:13 -05:00
Gerson Fernando Budke 32b97ea3d5 boards: arm: sam_v71_xult: Add arduino uno r3 headers
Add arduino uno r3 connectors definitions.  This enable hardware related
GPIOs and drivers to drive external shields.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-07-13 11:54:29 +02:00
Gerson Fernando Budke 5b7697f52b boards: arm: sam_v71_xult: Add atmel xplained-pro headers
Add xplained-pro connectors definitions.  This enable hardware related
GPIOs and drivers to drive external shields.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-07-13 11:54:29 +02:00
Gerson Fernando Budke 4da1dff1ff boards: arm: samr21_xpro: Add atmel xplained-pro headers
Add xplained-pro connectors definitions.  This enable hardware related
GPIOs and drivers to drive external shields.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-07-13 11:54:29 +02:00
Gerson Fernando Budke e85cd4548f boards: arm: sam4e_xpro: Add atmel xplained-pro headers
Add xplained-pro connectors definitions.  This enable hardware related
GPIOs and drivers to drive external shields.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-07-13 11:54:29 +02:00
Gerson Fernando Budke 20a4165dc4 boards: arm: sam4s_xplained: Add atmel xplained headers
Add xplained connectors definitions.  This enable hardware related
GPIOs and drivers to drive external shields.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-07-13 11:54:29 +02:00
Jared Wolff 126a5678a6 boards: arm: nrf: Adding board.c to nRF9160 Feather def
Allows the Circuit Dojo nRF9160 Feather to remain powered on
battery power.

Signed-off-by: Jared Wolff <hello@jaredwolff.com>
2020-07-10 17:56:00 +02:00
Jared Wolff 11966acdd3 boards: arm: nrf: Adding Circuit Dojo nRF9160 Feather definitions.
Adding the Circuit Dojo nRF9160 Feather device tree definitions.
Both secure and non secure targets.

Signed-off-by: Jared Wolff <hello@jaredwolff.com>
2020-07-10 17:56:00 +02:00
Alexandre Bourdiol e09fcca8a8 boards: arm: nucleo_f767zi: ethernet restriction on cut-A
nucleo_f767zi with soc cut-A (Device marking A) has some ethernet
restrictions.
Use of cut-Z is adviced.

fixes #26519

Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
2020-07-10 12:05:54 +02:00
Maureen Helm 18bb0b8904 boards: arm: Clean up lpcxpresso55s16 board.cmake
Cleans up the lpcxpresso55s16 board.cmake to make it consistent with
other lpc boards. jlink.board.cmake sets the default runner to jlink if
not already set.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-07-09 07:58:50 -05:00
Maureen Helm 8a8b90d6d1 boards: arm: Clean up zephyr-app-commands usage in frdm_k82f board doc
Cleans up the frdm_k82f board document to make its usage of
zephyr-app-commands consistent with other frdm boards.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-07-09 07:58:50 -05:00
Maureen Helm 877997e71f boards: arm: Remove OPENSDA_FW cmake variables from nxp boards
The OPENSDA_FW and LPCLINK_FW cmake variables are remnants of pre-west
days where we used an environment variable to set the desired debug host
tool, such as jlink or pyocd, based on which debug probe firmware was
loaded on the board. We now have two possible ways to do this, neither
of which requires the nxp-specific OPENSDA_FW or LPCLINK_FW variables:

1. Set standardized cmake runner variables when generating the build
   system:
   $ west build -- -DBOARD_FLASH_RUNNER=jlink -DBOARD_DEBUG_RUNNER=jlink

2. Use the west "--runner" argument with the debug and flash commands:
   $ west debug -r jlink

Remove the now unnecessary OPENSDA_FW ond LPCLINK_FW variables and
update board documentation accordingly.

A few boards (frdm_kw41z, hexiwear_k64, mimxrt10{20,50,60,64}_evk)
reordered pyocd.board.cmake and jlink.board.cmake includes to preserve
the default runner when OPENSDA_FW was not explicitly set.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-07-09 07:58:50 -05:00
Peter Bigot 9dc7640ede spi-device: set CS gpio flags for all devices that had none
The generic SPI GPIO chip select support now respects devicetree flags
for signal active level.  Update all cs-gpios properties to specify
active low.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-07-09 06:07:07 -05:00
Gerson Fernando Budke 1b293b2ba5 boards: arm: samr21: Add active low CS gpio flags
Update cs-gpios flag with active low value to instruct spi driver how
to handle cs signal.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-07-08 23:22:19 -04:00
Stéphane D'Alu d9619e493d boards: decawave_dwm1001_dev: make button active low
Make the board button active low.

Signed-off-by: Stéphane D'Alu <sdalu@sdalu.com>
2020-07-08 16:10:25 -05:00
Christian Taedcke 2872af1a93 boards: efr32mg_sltb004a: Add support for sensor ccs811
The on-board sensor has a enable pin that must be pulled
high in order to power the sensor.
Since no i2c sensor connected to ENV_I2C is supported by zephyr yet,
changed the pins of i2c1 to be connected to CCS811_I2C pins.

Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
2020-07-08 15:31:03 -05:00
Ioannis Glaropoulos 619a498845 soc: arm: nrf5340: remove DTS nodes for non-functional devices
Several peripherals are non-functional in the ENG_A revision
of nRF5340 (Application MCU) so we delete the corresponding
DTS nodes in the device description.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-08 10:45:57 +02:00
Ioannis Glaropoulos c6c978ad19 boards: nrf5340dk_nrf5340: properly choose UARTE pins for Network MCU
When building for nRF5340 Application MCU we need to properly
select which are the default GPIO port/pins for UARTE on the
Network MCU (so we allocate them to Network MCU). These  depend
on the actual version of the board we are using (PDK or DK) so
this commit implements the corresponding conditional logic.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-08 10:45:57 +02:00
Ioannis Glaropoulos e684dfa399 boards: arm: nrf5340: enable erratum19 configuration on nRF5340 PDK
When building for nRF5340 PDK board, enable Kconfig option
for Erratum 19. Do not enable when building on nRF5340 DK.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-08 10:45:57 +02:00
Ioannis Glaropoulos ee92112502 boards: arm: nrf5340: add definition for nRF5340 DK
Add the board definition for Nordic
nRF5340 DK.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-08 10:45:57 +02:00
Ioannis Glaropoulos cbc52292b1 boards: arm: nrf5340: rename nRF5340 board definition directory
We rename the nRF5340 board directory to
nrf5340dk_nrf5340 since this will be now
containing board definitions for both the
nRF5340 PDK and DK.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-08 10:45:57 +02:00
Ioannis Glaropoulos f1801fac34 boards: arm: nrf5340: refactor common board Kconfig structure
Refactor the common Kconfig and build files of nRF5340
board definition to enable building for either nRF5340
PDK or DK.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-08 10:45:57 +02:00
Ioannis Glaropoulos 6b93b493ca boards: arm: nrf5340pdk: remove un-needed nrf5340pdk prefix
We do not need to have the nrf5340pdk_ prefix in the
partition configuration and sram planning files for
nrf5340 platforms because these files may be common
for any nrf5340 board variant. Also, we do not need
it in the common .dts header for the Application MCU.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-08 10:45:57 +02:00
Ioannis Glaropoulos ac9901d5fc dts: arm: nordic: add Eng A suffix to nRF5340 CPUAPP .dtsi headers
Rename the nRF5340 QKAA variant .dtsi headers (Application
MCU) by adding an Engineering A (Eng A) suffix. This is done
to indicate that the headers should be explicitly used when
building for a board that contains the Engineeering A nrf5340
SoC variant.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-08 10:45:57 +02:00
Ioannis Glaropoulos e65f57bdb1 boards: arm: nrf5340: remove SoC compatibles from board node
We do not need to list the SoC compatibles in the
PDK node definition, this was accidentally left out.
Removing it in this commit.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-07-08 10:45:57 +02:00
Johann Fischer cfe0a688b2 boards: fix SPI GPIO CS, display and link_board_eth
Since commit 5963ebaf33
("drivers: spi: CS configuration through devicetree")
the SPI GPIO CS flags are obtained from DT,
but the patch series has missed the necessary changes
in the device trees for displays and link_board_eth.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2020-07-07 15:08:16 +02:00
Johann Fischer d261de8960 drivers: dw1000: fix SPI GPIO CS
Since commit 5963ebaf33
("drivers: spi: CS configuration through devicetree")
the SPI GPIO CS flags are obtained from DT,
but the patch series has missed the necessary changes
for the ieee802154_dw1000 driver and decawave_dwm1001_dev board.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2020-07-07 15:08:16 +02:00