This board uses the sam3 gpio driver. gpio_sam was selected by default
causing a conflict and issues when building for this board.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
holyiot_yj16019 board uses nRF52832 SoC, which does not have 802.15.4
radio. Therefore, 802.15.4 should not be listed in it's capabilities.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
At the time these overlays were created the author was unclear on how to
correctly represent SPI chip selects on a target where the peripheral
does not control that signal. As such the pin assignment was present
only as documentation.
Enlightenment was subsequently achieved and the cs-gpios property should
be properly defined.
Note that the mesh feather does not define a chip select to be used with
the spi1 peripheral.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Use an assert to catch the situation where we can't find a port
to use for the reset line pin, since it shouldn't really happen.
The case where reset_pin_configure() is executed but no reset
line is selected can't happen due to static asserts in `integrity.c`
that enforce a reset line to be selected when the reset pin
functionality is enabled.
Signed-off-by: Emanuele Di Santo <emdi@nordicsemi.no>
Implementation of pinmux of usdhc depends on board design.
Usdhc driver could change pinmux according to SD mode, SoC
should provide API for this. Board pinmux should register
its pinmux function to SoC.
Signed-off-by: Jun Yang <jun.yang@nxp.com>
1) dts/bindings/mmc/mmc.yaml: specifies common mmc.
2) dts/bindings/mmc/nxp,imx-usdhc.yaml: specifies
nxp usdhc module which inherits mmc.
3) dts/arm/nxp/nxp_rt.dtsi: usdhc support on RT chip.
4) boards/arm/mimxrt1050_evk/mimxrt1050_evk.dts:
usdhc slot support on mimxrt1050_evk board.
Signed-off-by: Jun Yang <jun.yang@nxp.com>
Enables the pyocd runner on the lpcxpresso55s69 board. Note that this
currently requires building pycod from source to pick up fixes in
https://github.com/mbedmicro/pyOCD/pull/690
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Converts all net samples that enable the mcr20a 802.15.4 driver to use
the frdm_cr20a shield instead of hardcoding configs for the frdm_k64f
base board. This makes it possible to build mcr20a samples for other
base boards with compatible arduino headers.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Match the speed speficied for all boards using the jlink runner when
using the pyocd runner on the same board.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This patch adds support for the STM32 nucleo_g071rb board
from STMicroelectronics.
Signed-off-by: Philippe Retornaz <philippe@shapescale.com>
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Remove unnecessary MCU slow down to 16Mhz when using BLE chip BlueNRG-MS
Signed-off-by: Yaël Boutreux <yael.boutreux@st.com>
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com>
Provide doc for stm32h747i_disco.
Includes basic description for building and flashing
individual cores.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
These all have what appears to be a promiscuously cut-and-pasted
declaration for a 1000 Hz tick rate. They are all SysTick boards and
will work very well with the new 10 kHz default, so use that instead.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The AN521 is a Soft Macro Model implementation of the SSE-200 subsystem
with SIE-200 and CMSDK components targeting the MPS2+ board. The
SSE-200 subsystem implements two Cortex-M33 cores.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
We use the following commands to rename any
SW._GPIO_{CONTROLLER,PIN,FLAGS} to
DT_ALIAS_SW._GPIOS_{CONTROLLER,PIN,FLAGS}
git grep -l SW._GPIO_CONTROLLER | xargs sed -i 's/SW\(.\)_GPIO_CONTROLLER/DT_ALIAS_SW\1_GPIOS_CONTROLLER/g'
git grep -l SW._GPIO_PIN | xargs sed -i 's/SW\(.\)_GPIO_PIN/DT_ALIAS_SW\1_GPIOS_PIN/g'
git grep -l SW._GPIO_FLAGS | xargs sed -i 's/SW\(.\)_GPIO_FLAGS/DT_ALIAS_SW\1_GPIOS_FLAGS/g'
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
move misc/printk.h to sys/printk.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move uart.h to drivers/uart.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move pinmux.h to drivers/pinmux.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move gpio.h to drivers/gpio.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
move sys_io.h to sys/sys_io.h and
create a shim for backward-compatibility.
No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.
Related to #16539
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add board support for 96Boards Avenger96 board from Arrow Electronics
based on STM32MP157A MPU from ST Microelectronics. This board is one
of the consumer editions boards of the 96Boards family following the
Extented CE form factor. More information about this board can be found
in 96Boards website: https://www.96boards.org/product/avenger96/
By default Zephyr console output is available via RAM console, but it
can also be changed to UART7 exposed as UART0 on 40 pin LS header.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Use Device Tree,and in particular a new 'bt-c2h-uart' to select which
UART is being used to communicate with an external BLE Host when acting
as a Controller.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Allow individual specification of the time quanta used for the CAN bus
propagation segment and phase segment 1.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add support for two CAN bus controller instances and disable both of
them by default. Enable CAN_1 for the STM boards currently supporting
CAN.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The defines in board.h aren't used/buildable so lets remove it. If
someone wants to support the button/led samples they can add DTS support
for those items.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Found a few annoying typos and figured I better run script and
fix anything it can find, here are the results...
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Fix misspellings and doc issues missed during regular reviews (including
some files without a trailing newline)
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
stm32wb is not yet supported on openocd.
But support on pyocd can be enabled thanks to "pack" feature.
Configure board runner with pyocd and provide guidelines
to configure pyocd.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
