Add initial support for the Versal Gen 2 SoC APU, which is based on
the Arm Cortex-A78 processor. It includes basic wiring for memory
regions, UART, interrupt controller, and timer.
The versal2_apu.dtsi file defines peripherals shared across the SoC,
while versal2_a78.dtsi captures peripherals private to the Cortex-A78
processor. These device trees lay the groundwork for further APU-based
development on the Versal Gen 2 platform.
Signed-off-by: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
Implement cyw20829 SoC specific flash power down before
entering deep sleep and power up on wake. This reduces
the overall power consumption during deep sleep
Signed-off-by: Merin George <merin.george@infineon.com>
The new node is called "npu_cache".
This way a possibility is offered to choose - thru an overlay - if to
enable the NPU cache or not.
This new node has a dependency with node "npu", so the NPU cache's
status is taken into account only in case node "npu" has status "okay".
Default status value of "npu_cache" is "okay"
(i.e. enable the NPU cache).
Signed-off-by: Wolfgang Betz <wolfgang.betz@st.com>
Remove inclusion of files already included by the arch linker script from
the SoC-specific linker script.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
STM32MP1 series used a custom SOC_LINKER_SCRIPT, but all it did was
include the main Cortex-M script, unnecessarily re-include headers already
included by the main script(!) and add a custom section.
Get rid of the custom SOC_LINKER_SCRIPT but keep the custom section by
moving it to a linker script snippet file, added to the build system using
CMake directives.
Signed-off-by: Mathieu Choplain <mathieu.choplain-ext@st.com>
SYSTEM_WORKQUEUE_STACK_SIZE KConfig is setting to 1024 in case of
BT_TX_PROCESSOR_THREAD is enabled, else 2048.
BT_TX_PROCESSOR_STACK_SIZE KConfig is setting to 2048 in case of
BT_TX_PROCESSOR_THREAD is enabled.
Signed-off-by: Vincent Tardy <vincent.tardy@st.com>
Due to multiple customer requests we are deprecating the MEC5 HAL.
Customers prefer all code to be in the main Zephyr tree. They do
not want a dependency on an outside SoC HAL. These changes remove
the MEC5_HAL select from MEC165xB, MEC174x, and MEC175x. The SoC
code calling the HAL for debug configuration was replaced with
a small amount of code common to all SoC's. We also moved all
the common header includes into a common SoC header to prevent
changing multiple files if new common headers are added.
Note: the in-tree drivers: kernel timer, GPIO, PINCTRL, and UART
are all non-HAL.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Add initial support for the PSOC 4100S Max series, starting
with the CY8C4149AZI-S598 (100-TQFP package) used on the
CY8CKIT-041S-MAX development board.
The infrastructure supports adding additional part numbers
in the future as needed.
Signed-off-by: Braeden Lane <Braeden.Lane@infineon.com>
Provide some information on how to find the command that is used for
generating the UICR hex file so that its easier for users to
know what command to use.
Signed-off-by: Håkon Amundsen <haakon.amundsen@nordicsemi.no>
Remove the root clock control early initialization because it has
already been done in the soc_reset_hooks()
Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
This commit updates the source files for Renesas RA initialization:
- The SoC reset/init now uses generic hooks from the
"soc/renesas/ra/common" instead of SoC-specific initialization hooks.
- Add soc_reset_hooks() to perform the early reset code.
- Battery-backup domain initialization has been removed from
soc_early_init() and reallocated to soc_reset_hooks().
Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
Select KERNEL_NO_LTO only when LTO is enabled. This ensures proper
handling when kernel code is placed in RAM.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
With -Hccm, the linker automatically moves stuff in RODATA
section into DATA section. Our current kobject related
scripts cannot accommodate this, resulting in space not
being reserved correctly. So for now, disable -Hccm
compiler option if userspace is enabled.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
- The RX Message Descriptor in CANXL on newer SoC such as
the S32K5 supports receiving both classic and FD frames,
so enable the RX FIFO only for S32ZE SoC.
- The CANXL bare-metal driver has significant changes, the
current codebase for S32ZE need to be guarded and modified
to support newer SoC
- Expand the peripheral region to 1G to include the CANXL
area.
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
cy8ckit_062_wifi_bt board requires NMI handler to point to
the prefefined address 0x0000000D in order to correctly run
system calls. This can be achieved by specifying the runtime
nmi configuration and hardcoding the address in soc.c.
With the introduction of this change the system calls can
correctly be executed correctly thus resolving open
issue #99642 .
Signed-off-by: Laura Carlesso <laura.carlesso@infineon.com>
Move the multicore middleware to the new mcux-sdk-ng integration from
hal_nxp, instead of using the legacy integration method.
This will allow for easier integration of future releases.
Signed-off-by: Axel Le Bourhis <axel.lebourhis@nxp.com>
Add invisible RENESAS_PN config to reflect the SoC hardware
information and provide input for hal_renesas
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
- Replaced the previous struct layout with a union
type. This change exposes all register fields that were hidden
for pinctrl, but now they are useful for gpio to reuse.
- Remove `_t` suffix from struct tag to avoid duplication with
typedef alias.
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Implement power management with IDLE, STOP, PSTOP1, and PSTOP2 modes.
- Add power state definitions with timing parameters
- Implement pm_state_set() with proper SLEEPDEEP handling
- Add XIP-safe WFI execution from RAM
- Enable SMC driver and power mode protection
- Remove forced timer Kconfig defaults
Signed-off-by: Holt Sun <holt.sun@nxp.com>
This is to start the process of fixing the issue of the SoC series
not matching the value in the soc.yml file, which is needed to
support future build system features for automatically creating
SoC Kconfigs by the build system.
This also fixes some oddities with how the Kconfigs were set out,
which included duplicated Kconfigs and duplicate selections and
having them in the wrong (or differing) files, to actually follow
how HWMv2 should define these Kconfigs.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Fixes the Kconfig name of this so that it matches the value from
soc.yml, this has not been deprecated because this SoC is a virtual
SoC used only with the boards in zephyr meaning it should not cause
any breakage of out-of-tree boards
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Fixes the Kconfig name of this so that it matches the value from
soc.yml, this has not been deprecated because this SoC is a virtual
SoC used only with the boards in zephyr meaning it should not cause
any breakage of out-of-tree boards
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
