Clock ctimer if being used for PWM. Otherwise, it not only doesn't work
but makes the chip unable to be communicated to by the debugger.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The RTC counter that is used in Power Mode 3 to track
System time could overflow for large timeouts.
Add code to catch wakeup events due to this overflow and re-enter
Power Mode 3.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Confirmed by section 3.7.2 in the datasheet (version 29 July 2025) and
running a sample piece of code exercising smuad, smladx and
other DSP intrinsics.
Signed-off-by: Dmitrii Sharshakov <d3dx12.xx@gmail.com>
PPR was using 1 kHz system clock frequency instead of default 31250 Hz
used on other cores with GRTC. Low frequency impacts system clock
accuracy. There is no reason to use different frequency for PPR.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
The definition of the EM3 energy mode is that software switches
off the LFRCO and LFXO before entering deep sleep. On Series 2,
oscillators are clocked on-demand based on peripheral requests
from hardware. Requesting EM3 will result in EM2 if any active
peripheral uses one of the oscillators, and requesting EM2
will result in EM3 if no peripherals use the oscillators.
In version 2025.6 of the HAL, this was reflected in the API
of the power manager by making EM3 an alias of EM2. Reflect
this in Zephyr by removing the separate EM3 power state.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
When the target has only a single CPU, this function cannot ever
succeed. Skip all of the drama and just return -EINVAL. This makes GCC 14
happy as it doesn't get confused about possible out of bounds access of the
soc_cpus_active array.
Signed-off-by: Keith Packard <keithp@keithp.com>
1. Renamed MCXA276 to MCXA266
2. NXP frdm_mcxa276 is renamed to frdm_mcxa266,
add this information to migration-guide-4.3.rst.
Signed-off-by: Peter Wang <chaoyi.wang@nxp.com>
1. Renamed MCXA166 to MCXA346.
2. NXP frdm_mcxa166 is renamed to frdm_mcxa346,
add this information to migration-guide-4.3.rst.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
STM32G0x SoCs reference manuals say that for Shutdown mode (STM32G0x1)
or Standby mode (STM32G0x0) entry (used for Power OFF entry), that
"WUFx bits are cleared in Power status register 1 (PWR_SR1)".
Therefore call LL_PWR_ClearFlag_WU() unconditionally (regarding
CONFIG_STM32_WKUP_PINS) in z_sys_poweroff() sequence.
Reference manuals references:
- STM32G0x0: RM0454 Rev 5, Table 25.
- STM32G0x1: RM0444 Rev 6, Table 34.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
STM32F4x SoCs reference manuals say that for Standby mode (aka Power OFF)
entry, "WUF bit is cleared in Power Control register (PWR_CR)" [1]
and "WUF bit is cleared in Power Control/Status register (PWR_CR)" [2].
Therefore call LL_PWR_ClearFlag_WU() unconditionally (regarding
CONFIG_STM32_WKUP_PINS) in z_sys_poweroff() sequence.
Reference manuals references:
- [1] STM32F401xx: RM0368 Rev 6, Table 20.
- [2] STM32F469xx/STM32F479xx: RM0386 Rev 6, Table 23.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
STM32C0x SoCs reference manual says the wakeup source status flags (from
register PWR_SR1) are not cleared by hardware and therefore should be
cleared by software before entering Standby or Shutdown power mode.
Therefore call LL_PWR_ClearFlag_WU() unconditionally (regarding
CONFIG_STM32_WKUP_PINS) in z_sys_poweroff() sequence.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Fix STM32G0x0 SoCs power off sequence that do not support Shutdown mode
and which deppest power mode state is Standby mode.
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
Remove CONFIG_SOC_SERIES_NSIM_ARC_V_RMX conditional check from
zephyr_compile_options_ifdef and apply all extensions
unconditionally when using arcmwdt compiler.
Since this CMakeLists.txt is already SoC-specific, the
additional config check is redundant.
Signed-off-by: Afonso Oliveira <afonsoo@synopsys.com>
Rename SOC configuration symbols from generic names to more specific
ones that include the vendor and platform information. This improves
clarity and prevents potential naming conflicts.
Changes:
- SOC_SERIES_RMX -> SOC_SERIES_NSIM_ARC_V_RMX
- SOC_RMX100 -> SOC_NSIM_ARC_V_RMX100
Signed-off-by: Afonso Oliveira <afonsoo@synopsys.com>
Added helper Kcoinfig option USE_ISR_WRAPPER which can be used to
include isr_wrapper even if GEN_SW_ISR_TABLE is not enabled. This
is needed to enable configurations where only IRQ vector table is
used with multithreading (only direct isr used). This change is
backward compatibible with previous config.
Signed-off-by: Łukasz Stępnicki <lukasz.stepnicki@nordicsemi.no>
Keep AHB clock running when CM7 is sleeping and TCM is accessible.
Otherwise, NETC transmission will fail.
Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Remove these legacy kconfig, not necessary.
The DT already has the bindings and nodes required to represent if there
is a FlexSPI and/or SEMC.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This Kconfig does not belong in the ADC folder, because there is not
actually a zephyr ADC driver for this. Also, remove HAS_MCUX_ADC_ETC as
well because it is a useless config.
The cmake line to pull in this driver from the SDK in the zephyr repo is
totally unnecessary. If a user wants to use this SDK driver they can add
it to their build like any other SDK driver or any other
external code module. Zephyr should not be a cesspool of random build
glue for random pieces of code.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Only the k2x series socs seem to be pulling in this driver for some
reason, the kconfig is not needed.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The only code change to remove this was a redundant usage in the rt1180
soc.c which was not needed because it was redundant, if you catch my
drift.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Remove the configs that are not actually used for anything anymore or
never were, or that are redundant with other configs, and don't have any
code changes outside of Kconfig to remove.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add support for executing the CM7 core directly from flash memory
(XIP - eXecute In Place) instead of copying to ITCM. This provides
the following benefits:
- Allows for larger code size than the 512KB ITCM limit
- Simplifies memory management for large applications
- Reduces boot time by eliminating the need to copy code to ITCM
The implementation includes:
1. A new Kconfig option CM7_BOOT_FROM_FLASH (default: n) to control
the execution mode
2. A device tree overlay (cm7_flash_boot.overlay) that configures
the flash memory for CM7 execution
3. Updates to soc.c to calculate the correct CM7 boot address
based on the flash partition
5. Documentation updates with instructions for both execution modes
Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
Remove INPUTMUX interrupt assignments for PINT and GPIO peripherals.
Remove gpio0 DT node.
As the GPIO peripherals can be secured on the mimxrt798s, accesses from
the cm33_cpu0 and hifi4 are mutually exclusive, so the GPIO0 will stay
enabled in the cm33_cpu0 domain.
Signed-off-by: Vit Stanicek <vit.stanicek@nxp.com>
wakeupmix keep power on state is essential for system
suspend mode, because of console uart locate in it.
temporarily set the M7 mix to power on,
further optimization will be carried out later
Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
All pins are configured by default to be output low during sleep.
A device-tree property called "sleep-output" is provided for cases where
pins need to be configured differently.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
This property allows a user to specify the operation of a
pin in sleep mode.
By default, pins are configured to be output low in sleep mode.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
this commit removes creation of virtual memory regions from
Zephyr, allowing the application to create required regions
It is up the application to use virtual memory as needed,
zephyr however is keeping the table and ensures no memory
addresses overlaps
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
Do not use the custom buildlib configuration for the RMX series as it
was replaced with several even more specific configurations in the
recent MWDT release. Pass the generic RMX option to the linker instead.
Signed-off-by: Ilya Tagunov <Ilya.Tagunov@synopsys.com>
Introduce the ACE 4.0 architecture, along with support for the NVL and
NVL-S platforms within the Intel ADSP framework in the Zephyr project.
This update includes:
- Addition of ACE 4.0 architecture configurations in Kconfig and
Kconfig.intel_adsp.
- Inclusion of device tree source files for NVL and NVL-S platforms,
defining CPU, memory, and peripheral configurations.
- Updates to driver files to support ACE 4.0 specific features,
including DMIC and SSP configurations.
- Introduction of new header files for ACE 4.0, detailing boot,
interrupt, IPC, power, and shim functionalities.
- Modifications to the CMakeLists.txt to include ACE 4.0 MMU support.
- Addition of default configurations for NVL and NVL-S platforms in
Kconfig.defconfig.ace40.
The NVL and NVL-S platforms are part of the Nova Lake series, targeting
advanced audio processing capabilities. ACE 4.0 introduces enhanced DSP
capabilities and advanced power management features, improving audio
stream handling and synchronization compared to ACE 3.0.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Added ABB analog status lock read retries if needed.
After cpu idle ABB macro may need some time to initialize
and report status locked. Attempts cound can be configured
using Kconfig option.
Signed-off-by: Łukasz Stępnicki <lukasz.stepnicki@nordicsemi.no>
As discussed here[1], CONFIG_SOC should rely on CONFIG_SOC_* variables
while it currently rely on CONFIG_SOC_PART_NUMBER_*. These variable are in
fact misnamed since the migration to HWMv2. So "PART_NUMBER" has to be
removed from these names.
[1]: https://github.com/zephyrproject-rtos/ \
zephyr/pull/93285#discussion_r2221382981
Note, this patch has been generated with:
sed -i -e s/SOC_PART_NUMBER_MGM/SOC_MGM/ \
-e s/SOC_PART_NUMBER_EF/SOC_EF/ \
-e s/SOC_PART_NUMBER_SIM3/SOC_SIM3/ \
-e s/SOC_PART_NUMBER_SIWG/SOC_SIWG/ \
soc/**/*.soc boards/**/Kconfig.*
Signed-off-by: Jérôme Pouiller <jerome.pouiller@silabs.com>
