* Move ctors and init_array from the CPP library
to the kernel library, as this is common for both C
and C++ and it is the kernel who is running it.
* Rename the hidden kconfig option CPP_STATIC_INIT_GNU
STATIC_INIT_GNU instead.
* If STATIC_INIT_GNU is not selected verify there is
constructors left behind.
* Rename common-rom-cpp.ld to common-rom-init.ld
* Rename z_cpp_init_static to z_init_static,
and have the kernel always call it.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Signed-off-by: Keith Packard <keithp@keithp.com>
Replace the MMU initialization call with the new MMU re-initialization
API during the core context restore process in the ACE power management
code.
The previous code was directly calling `xtensa_mmu_init()` upon
restoring the core context, which is not appropriate when the MMU
context may have been preserved during low-power states. The new
`xtensa_mmu_reinit()` API is designed to re-establish the MMU context
without overwriting the existing page table, ensuring that any runtime
changes to the MMU configuration are retained.
Changes made in this patch:
- Removed the call to `xtensa_mmu_init()` from the
`_restore_core_context()` function.
- Added a call to `xtensa_mmu_reinit()` after restoring the
miscellaneous registers.
This update aligns the ACE power management code with the correct MMU
handling procedures when recovering from low-power states, as per the
recent changes in the Xtensa MMU support.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This patch updates the power control and status register bitfield
definitions in the ACE30 PTL ADSP power management header to match the
documented hardware specifications. The previous definitions contained
discrepancies that did not align with the actual hardware layout,
potentially leading to incorrect assumptions and usage within the
firmware.
Changes made in this patch:
- Renamed 'rsvd0' to 'rsvd4' to accurately represent the reserved bits
starting at bit position 4.
- Removed the 'rsvd6' field, which was incorrectly defined and is not
present in the hardware register layout.
- Adjusted the bit widths for 'ioxpgs' and 'mlpgs' to correctly reflect
the number of bits these fields occupy in the hardware.
- Introduced a new 'rsvd15' field in both 'ace_pwrctl2' and
'ace_pwrsts2' structures to account for the remaining reserved bits,
ensuring the structure sizes accurately represent the full register
width.
By correcting these bitfield definitions, the firmware's power
management code will now be consistent with the actual hardware design,
improving reliability and maintainability of the codebase.
Signed-off-by: Ievgen Ganakov <ievgen.ganakov@intel.com>
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
The implementation of formula, to calculate HFXO INTCAP code,
had a rounding error. That may lead so small deviation of HFXO
clock accuracy.
The IPS formula uses capacitance values in piko Fartd units.
That requires use of floating point data types. To avoid that
implementation of the formula uses femto Farats (1000 smaller unit).
In the former implementation conversion from femto Farad to piko Farad
was done just after reading of the desired capacitance from DTS.
To make sure the calculations are correct the change of unit must be
done at very end. Also rounding must be applied.
Also the formula was split and more comments were added to make the
implementation clear.
The commit fixes the implementation of the IPS formula.
Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
There were two errors in calculations of LFXO INTCAP code:
- The value provided by DTS files is internal desired capacitance.
The value from DTS has to be "encoded" before use in INTCAP
calculations formula. The formula for encoding is:
CAPACITANCE_CODE = (<desired_value> - 4pF) / 0.5
Subtract of 4 is related with lowest value in the allowed range.
Division by 0.5 is related with change to steps size.
In former code the subtration of 4pF was missing.
- The mid_val calcuation was wrong due offset_k left shift by 4.
It should be left shift by 3 to get total left shift of 9.
That matches the left shift of former part of the equation.
Final integer value was calculated by right shift 10, it should
be right shift 9. Then rounding was done by use of mod by (1 << 10)
It should be mod by (1 << 9) and compared with (1 << 8), that is
half of 0-512 range.
Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
- Fix flash_fill() for lpc55 and mcxnx4.
- Set FLASH_FILL_BUFFER_SIZE to the minimal size of data
which can be written to a device (by default is only 32).
- Fix the [flash_map.test_flash_area_erase_and_flatten]
failed test of tests/subsys/storage/flash_map.
Signed-off-by: Andrej Butok <andrey.butok@nxp.com>
Time it takes to "erase" one "page" of rram is too low.
Where getting timeouts.
"erase" of rram is done by writing all the words.
one "page" is 4096 bytes meaning 1024 32bit words.
worstcase time it takes to write one 32bit word from
0x00000000 to 0xffffffff is about 42us, giving 42ms
to write 1024 words.
Signed-off-by: Martin Tverdal <martin.tverdal@nordicsemi.no>
Fix linking error due undefined tdata entry.
After #72642, tdata could be undefined due to
missing TLS check.
Fixed#74852
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
The generic stack pointer checker in the architecture code is
enough so we can remove the platform specific one. Besides,
xtensa_dc233c_stack_ptr_is_sane() does not do much checking
either.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
When TLS is used, `__tdata_start` is PROVIDED by
"thread-local-storage.ld" using absolute address, which
makes it land in wrong flash address. This causes risc-v startup
code to fail during memcpy/memset.
This PR overrides `__tdata_start` to use ADDR, which will
make sure it is placed in DROM region due to AT keyword.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Currently iterable sections as per the documentation are added with
zephyr_linker_sources(SECTIONS ...) after bss/noinit.
This commit allows putting sections after common-rom.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
The nrfutil device v2.4.x now supports the recover operation. Configure
run once to ensure that domains are not unnecessarily erased.
Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
Removed PM device runtime support from drivers in PD_SYS domain.
Update the rest device drivers to call pm_device_runtime_get/put()
functions when CONFIG_PM_DEVICE_RUNTIME is enabled.
Signed-off-by: Ioannis Damigos <ioannis.damigos.uj@renesas.com>
Selection of these GIC Kconfigs have been deprecated
for more than 2 releases, users should use the devicetree
method instead, update the Kconfigs.
The SOCs below have been updated to not select `GIC_V3`, since
their devicetree already have the required compatible:
- fvp_aemv8r
- rzt2m
- rk3658
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Some stm32 series, do not have a LL_DBGMCU_SetTracePinAssignment
function to enable trace IO port, this is the case with the
stm32h7 serie.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Modify the winstream code in cavstool.py to use the Regs helper
class and get rid of byte array access when reading and writing
to winstream headers. This brings the cavstool.py implementation
closer to the Zephyr C reference implementation and ensures
the header fields are read and written to with 32bit access.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
- Allow more statical allocations by reordering the sections
in the mcuboot.ld and in default.ld.
- Reorder the ROM sections to cover the cases described in
the `common-rom-common-kernel-devices.ld`.
Changing the order of .rodata and .text we prevents to create an
overlapped segments issue.
Signed-off-by: Marek Matej <marek.matej@espressif.com>
intel_adsp_hda_set_buffer() asserts when the HDA buffer is
outside of RAM space. However, it uses CONFIG_SRAM_SIZE as
if it is bytes. In reality, CONFIG_SRAM_SIZE is in KB so
we need to multiply it by 1024, or simply use marco KB().
Fixes#74250
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
LPTIM is not available in STOP3 mode, so RTC needs to be used instead.
This code usese similar approach as STM32WBAx for suspend to ram.
The STOP3 is disabled by default in device tree.
Signed-off-by: Adam Berlinger <adam.berlinger@st.com>
Add RV PMP to the SoC configuration and to simulator options
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Kconfig, .ld and comments fixing
Fixed address of UART1, WDT and RTC timer disabled by default
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Fix to properly allocate IRQs for interrupt sources over 60.
It also screens out non-allocatable IRQs used by the CPU.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Fixes#72673
Follow-up to #70977 and #71590
The CMake linker generator doesn't have an API equivalent to `PROVIDE`,
but the existing `zephyr_linker_symbol()` function should do just fine.
It still lets us set `z_arm_platform_init = SystemInit` and thus keep
the reduced ROM space.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
At osc32k_init in the soc_samd5x.c file the start-up value of 7 which
is reserved. This fixes the startup timeout and control gain with the
correct values.
Signed-off-by: Marcel Birthelmer <marcel@carrietech.com>
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
By default, a post build step tries to fill gaps in the output
hex file. Since the AM62x, for example, has different,
non-contiguous memory sections, it tries to fill a gap over
multiple GBs. Disable this feature since the K3 architecture has no
dedicated flash for the firmware and stores it in a Linux rootfs.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
In case of no SW ISR table, `_isr_wrapper` does not exist.
Do not use it for exception handling.
Future improvements might include setting it to a user-defined handler.
Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
This covers the cases described in common-rom-common-kernel-devices.ld
Changing the order of .rodata and .text we prevents to create an
overlapped segments issue.
Signed-off-by: Marek Matej <marek.matej@espressif.com>
Change the MCUboot segments layout to incread the memory
available in the application.
Add missing symbols to mcuboot.ld
Signed-off-by: Marek Matej <marek.matej@espressif.com>
Kconfig options need CONFIG_ prefix when tested for in CMakeLists.txt.
Fixes regression introduced in e90c89d453
that causes all apps to fail to initialize on Silabs socs.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
DMM stands for Device Memory Management and its role is to streamline
the process of allocating DMA buffer in correct memory region
and managing the data cache.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
set DT node as Okay in board device tree;
add board level's d-cal, txcal45dp and txcal45dm to usbphy node;
enable usb clock; set USB_STACK_USE_DEDICATED_RAM for lpc55s69 and rt685;
load usb.ld for lpc55s69 and rt685.
Signed-off-by: Mark Wang <yichang.wang@nxp.com>
