Commit graph

5973 commits

Author SHA1 Message Date
Antonio Tessarolo
4598e6bf0a drivers/adc: imx6sx ADC support.
This commit adds support for adc_vf610 ADC.

Signed-off-by: Antonio Tessarolo <anthonytexdev@gmail.com>
2023-05-08 16:42:40 +02:00
Sreeram Tatapudi
883e40db51 soc: infineon_cat1: Support for .cy_ramfunc
- Add cy_ramfunc in to RAMFUNC_SECTION section

Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
2023-05-08 11:16:09 +02:00
Gerard Marull-Paretas
8b616ab24a soc: arm: atmel_sam0: use late PRE_KERNEL_1 level for samr3x radio off
Initialize in the late stage of PRE_KERNEL_1 instead of using
early PRE_KERNEL_2.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-05-05 18:57:07 +09:00
Gerard Marull-Paretas
6dde0056fc soc: arm: atmel_sam0: improve radio off handling for samr3x
Improve the radio off code, mainly:

- Compile the file only if necessary, ie, LORA radio not in use
- Use pin information from DT, so that we do not need to hardcode pins
  and can switch to dt-spec APIs.
- Improve error handling, includes, etc.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-05-05 18:57:07 +09:00
Andrzej Głąbek
7a54aed015 modules: hal_nordic: nrfx: Handle properly I2S0 instance
Although existing nRF SoCs have only one I2S instance, the nrfx_i2s
driver has now multi-instance API and the related nrfx configuration
symbols need to be used appropriately.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2023-05-05 11:47:53 +02:00
Daniel DeGrasse
b686f206b9 soc: arm: nxp: ensure code cache is enabled at boot for RT11xx
Ensure code cache is enabled at boot for RT11xx. CMSIS SystemInit should
enable the code cache, but if CONFIG_INIT_ARCH_HW_AT_BOOT=y and
CONFIG_CACHE_MANAGEMENT=y, then the cache will be disabled after
SystemInit is called. Since calling SCB_EnableICache will not
change hardware settings if the ICACHE is already enabled, just
call it unconditionally during init.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-05-04 20:50:37 +02:00
Markus Fuchs
4310853d07 boards: Add support for SiLabs xG24-PK6010A board
Add Silicon Labs xG24-PK6010A (BRD4187C radio plug-in board)
support to the efr32_radio board.

Signed-off-by: Markus Fuchs <markus.fuchs@ch.sauter-bc.com>
2023-05-04 20:49:12 +02:00
Jan Peters
b9235faf22 soc: arm: imx_rt10xx: enable code cache during boot
For certain combinations of configuration parameters,
z_arm_init_arch_hw_at_boot() disables the instruction cache. Make sure
to re-enable it if required.

Signed-off-by: Jan Peters <peters@kt-elektronik.de>
2023-05-04 10:47:23 +02:00
Filip Kokosinski
a30862455e treewide: rename Microsemi to Microchip
Do a treewide Microsemi to Microchip rename and update obsolete links in
the board docs.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2023-05-04 10:47:07 +02:00
Paul Olaru
fa5117225a nxp_adsp: Do not use xtensa hal with xcc-clang
Do not use XTENSA_HAL when building with xt-clang, instead use the HAL
that is provided by the toolchain, similarly to xt-xcc.

Signed-off-by: Paul Olaru <paul.olaru@nxp.com>
2023-05-02 11:12:52 -05:00
Nikolay Agishev
0d8292ab6b ARC: Add HS4x support
Minimal HSDK4xD support

Signed-off-by: Nikolay Agishev <agishev@synopsys.com>
2023-05-02 16:54:24 +02:00
Andriy Gelman
f2b61595f0 soc: arm: infineon_xmc: Add XMC4700 MCU series
Adds XMC4700 MCU series.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-05-02 12:34:55 +02:00
Tomasz Leman
04d97569d1 intel_adsp: power: add missing header
After commit e195739565 function bmemcpy require soc_util include.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-05-01 10:59:05 +01:00
Emil Obalski
52e203f800 ipc: Remove internal API for clearing shared memory
Clearing of shared memory by one side of the communication
is no longer required after
commit 0620cb1fe1
("ipc: ipc_service: icmsg: Increase reliability of bonding")
was merged.

Signed-off-by: Emil Obalski <Emil.Obalski@nordicsemi.no>
2023-04-29 12:24:17 +02:00
Lucas Tamborrino
b24d9ca7a6 drivers: flash: esp32s3: Add spiflash support
Add support for spiflash to esp32s3

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2023-04-28 10:08:16 +02:00
Declan Snyder
4b45928e86 drivers: lpadc: Move SOC code out of driver
To be consistent with the current NXP clocking scheme,
move the LPADC clocking code to the SOC files where
all of the other peripheral clocking is done.

Also remove any other SOC-specific code to the
respective SOC file and out of this driver.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2023-04-28 10:08:05 +02:00
Tomasz Leman
aba3b12e31 intel_adsp: power: ace: cache invalidation
This patch moves cache flush/invalidation to section executed only when
IMR context saving is enabled. If this option is disabled no FW context
is stored so any lost data doesn't matter.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-04-28 10:07:15 +02:00
Tomasz Leman
e5fc2093c2 intel_adsp: power: ace: interrupts on and off
Masking out all interrupt during power state transition and restoring
them after is now common thing for all power states. No need to
duplicate code.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-04-28 10:07:15 +02:00
Tomasz Leman
3df442a982 intel_adsp: ace: secondary core context restore
Reusing primary core context save/restore flow for purpose of secondary
core D0 -> D3 -> D0 transitions. If core is re-enabled we use
dsp_restore_vector as the FW entry point.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-04-28 10:07:15 +02:00
Tomasz Leman
9282ebef00 intel_adsp: ace: cpu context save refactor
This patch is preparing cpu context save and restore code so it can be
later used by the multiple cores.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-04-28 10:07:15 +02:00
Tomasz Leman
96bf4e8961 intel_adsp: ace: add stack for other cores
This patch replace temporary stack of the restore vector with interrupt
stack to reduce memory usage. Additionally we can assign seprate stack
for each core. This will allow to reuse this vector for secondary cores.

Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
2023-04-28 10:07:15 +02:00
Kai Vehmanen
c410ebe5fe soc: xtensa: intel_adsp: fix build error for cavs
Build of Intel cAVS2.5 platforms fails due to undefined reference
sys_cache_data_flush_and_invd_all(). Fix this by adding missing
header include to bring in the inline definition for this function.

Fixes: 6388f5f106 ("xtensa: use sys_cache API instead of custom interfaces")
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
2023-04-27 11:08:46 -05:00
Anas Nashif
6388f5f106 xtensa: use sys_cache API instead of custom interfaces
Use sys_cache instead of custom and internal APIs.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-04-26 07:31:22 -04:00
Anas Nashif
aa4f2bc81e xtensa: move arch non cache API code from cache.h to arch.h
Move additional cache code related to architecture support into arch.h
and leave cache.h with cache API implementation.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-04-26 07:31:22 -04:00
Anas Nashif
e195739565 intel_adsp: move utils to a new header
Move utility code into a new header and cleanup soc.h

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-04-26 07:31:22 -04:00
Anas Nashif
400c7950b6 soc: intel_adsp: use abstracted arch APIs for cache ops
Use architecture APIs for cache operations with this soc family.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2023-04-26 07:31:22 -04:00
Tim Lin
1a2874affb ITE: drivers/i2c: Disable pre-detect on IT82xx2 family
Disable the hardware I2C target detection on the IT82xx2 SoC family.

Note: The register setting of I2C target detection is different in
IT81XX2 and IT82XX2 SOC.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2023-04-26 12:55:02 +02:00
Balthazar Deliers
a0ad7b7752 dts/arm/st/u5: Support for STM32U59x
Added support for STM32U595 and STM32U599 with basic peripherals.

Signed-off-by: Balthazar Deliers <balthazar.deliers@psicontrol.com>
2023-04-25 20:00:28 +02:00
Roman Dobrodii
563cc014dd soc/arm/silabs/bg2x: enable flash driver
It is enabled by default if Device Tree includes a flash controller,
and disabled otherwise. SoC defconfig should not touch it.

Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
2023-04-25 12:20:20 +02:00
Ryan McClelland
e01a5c52ca soc: mps3: add pmu defines for cmsis
The mps3 soc is missing PMU defines required for CMSIS. This
adds the defines __PMU_PRESENT and __PMU_NUM_EVENTCNT
enabling the api for the PMU.

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2023-04-24 13:36:03 +02:00
Marc Desvaux
c4522be374 soc: arm: st_stm32: Move STM32H7_DUAL_CORE
Move STM32H7_DUAL_CORE to
soc/arm/st_stm32/stm32h7/Kconfig.soc
add select STM32H7_DUAL_CORE for SOC_STM32H745XX/H747XX
Cleanup old occurences where was set to y

Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com>
2023-04-24 13:30:46 +02:00
Jan Krautmacher
759b572711 soc: arm: Add CONFIG_STM32H7_BOOT_M4_AT_INIT
This new Kconfig option lets the developer configure if the Cortex M4
core should be force-booted during M7 init independent of the BCM4
option byte.

This allows to disable this default behaviour via Kconfig which was not
possible so far.

Signed-off-by: Jan Krautmacher <jan@krautmacher.org>
2023-04-24 13:30:39 +02:00
Jamie McCrae
f79a08d6c0 soc: arm: nordic: Deprecate reboot type in GPREGRET
Deprecates setting GPREGRET to the reset reason as this has been
replaced with the boot mode retention subsystem for nRF51/nRF52.

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2023-04-24 13:27:53 +02:00
Mateusz Sierszulski
0417d38d4d drivers/adc: add Gecko IADC driver
This commit adds the Gecko IADC driver and support for it to the
efr32bg_sltb010a board.

Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
2023-04-21 16:24:39 +02:00
Filip Kokosinski
f810094dc8 soc/arm/silabs_exx32/efr32mg24: enable Secure Element
Secure Element's mailbox is needed for entropy gathering purposes.
Enable it in the EFR32MG24 SoC series Kconfig.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2023-04-21 16:24:25 +02:00
Roman Dobrodii
cb14d8b099 soc/arm/silabs_exx32: fix PM implementation - wake up using BURTC timer
- Add Gecko BURTC sys_clock driver to handle wake up from EM2,3 states
- Remove custom PM policy and dependency on HAL sl_power_manager service
- EM1 supported in all configurations
- EM2,3 supported only if SysTick is replaced by BURTC

Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
2023-04-21 16:24:05 +02:00
Krzysztof Boronski
df7f10422e boards: arm: efr32bg27_brd2602: Initial support
Adds initial support for efr32bg27_brd2602 - Thunderboard-style board.
Supported features are:
* counter
* gpio
* uart

Signed-off-by: Krzysztof Boronski <kboronski@antmicro.com>
2023-04-21 12:55:06 +02:00
Manojkumar Subramaniam
d57363bc97 riscv: refactor: Utilize the available helper macro
use helper macros from csr.h instead of inline assembly which results
in cleaner and more maintainable code

Signed-off-by: Manojkumar Subramaniam <manoj@electrolance.com>
2023-04-21 12:54:55 +02:00
Jaroslaw Stelter
5ff2ca8415 intel_adsp: ace20_lnl: Add imr layout header to LNL
To enable IMR on LNL platform new header added to
support context save/restore must be added also to LNL.

Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
2023-04-20 13:14:34 -04:00
Filip Kokosinski
4a614de289 drivers/bluetooth/hci: add SiLabs BLE HCI driver
This commit adds the SiLabs Bluetooth HCI driver. It also enables this
BLE HCI driver on the efr32bg_sltb010a board.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2023-04-20 16:13:14 +02:00
Yves Vandervennet
788ba12137 nxp: hal: code update to reflect changes in SDK 2.13
HAL API changes in ethernet and pwm
SoC RT595 power management code change
west.yml update

Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
2023-04-20 08:11:19 -05:00
Jamie McCrae
794ab10827 soc: Only select HAS_SEGGER_RTT if module is available
This prevents configuration errors if a board is configured when
the SoC indicates segger RTT support but the segger module is
not available.

Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2023-04-20 14:57:51 +02:00
Daniel Leung
1e9d4602ab xtensa: add some structs for interrupt stack frames
This adds some structs for interrupt stack frames to make it
easier to access individual elements, and ultimately getting
rid of magic array element numbers in the code. Hopefully,
this would aid in debugging where you can view the whole
struct in debugger.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2023-04-20 04:45:52 -04:00
Ben Lauret
9cdc5d38b2 drivers: spi: Add driver for smartbond
This adds the SPI driver for the Renesas SmartBond(tm) DA1469x MCU family.
The driver only supports controller mode. All four SPI modes are supported.
Note that the lowest supported speed is 2285714Hz.
Requesting speeds higher than 16MHz, will result in a 16MHz SCLK.

Co-authored-by: Stan Geitel <stan@geitel.nl>

Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
2023-04-20 10:32:40 +02:00
Marek Matej
ddab8786fd soc: kconfig: Add config for ESP32 family
Introduce config for all ESP32 chips which
may be using different architectures but
shares common peripherals and features.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2023-04-19 17:12:26 +02:00
Sylvio Alves
a6c8c6e546 soc: esp32s3: add Wi-Fi support
This adds Wi-Fi linker areas and also bring wi-Fi entry
into SoC device tree.

Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
2023-04-19 17:11:58 +02:00
Filip Kokosinski
3583cd2d31 soc/arm/silabs_exx32/common/soc_power: add missing __weak symbol
This commit adds a missing `__weak` symbol to the `pm_policy_next_state`
function.

This is needed for e.g. `tests/kernel/profiling/profiling_api` to build
correctly.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2023-04-19 04:54:19 -04:00
Laurentiu Mihalcea
57ca49aaa9 soc: arm64: nxp: mimx9: Create identity mappings for regions in SOF dts
This commit creates identity mappings for all memory regions required
by SOF. This is needed because drivers using these memory regions have
not yet been ported to Zephyr.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2023-04-19 10:01:19 +02:00
Laurentiu Mihalcea
e1841a966d soc: arm64: nxp: mimx9: Modify linker script to include SOF sections
Since SOF uses some extra sections we need to add them to the linker
script. The used linker script is simply a copy of arm64 linker script
with SOF regions included. This is because conditionally adding sections
to the main arm64 linker script is not really desirable.

Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
2023-04-19 10:01:19 +02:00
Tim Lin
71b92265d7 ITE: dts: it82xx2: Increase sram to 256KB
1. Increase sram to 256KB.
   A block sram of SCAR0~15 is 4KB.
   A block sram of SCAR16~19 is 16KB.
   A block sram of SCAR20~23 is 32KB.

2. Removed the register of RVILMCR which has no effect.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2023-04-19 03:48:38 -04:00