Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier. Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.
By default all files without license information are under the default
license of Zephyr, which is Apache version 2.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This reverts commit d4b4b99272 as it
introduced unwanted side effect: It moved the k_busy_wait() to other
clock that the one driving system timer and k_cycle_get_32(). As result,
delays created using these interfaces not matched each other.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
Not all i.mx rt socs have the same number of irqs, so move the default
configuration from the soc series level to the individual socs. The
rt1020 hardware reference manual (IMXRT1020RM Rev.1 12/2018) incorrectly
documents 160 irqs (#142-159 reserved), but the soc actually has 142
irqs.
Fixes tests/kernel/gen_isr_table for the mimxrt1020_evk board.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add SYS_POWER_ prefix to HAS_STATE_SLEEP_, HAS_STATE_DEEP_SLEEP_
options to align them with names of power states they control.
Following is a detailed list of string replacements used:
s/HAS_STATE_SLEEP_(\d)/HAS_SYS_POWER_STATE_SLEEP_$1/
s/HAS_STATE_DEEP_SLEEP_(\d)/HAS_SYS_POWER_STATE_DEEP_SLEEP_$1/
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This commit cleans up names of system power management functions by
assuring that:
- all functions start with 'sys_pm_' prefix
- API functions which should not be exposed to the user start with '_'
- name of the function hints at its purpose
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
There exists SoCs, e.g. STM32L4, where one of the low power modes
reduces CPU frequency and supply voltage but does not stop the CPU. Such
power modes are currently not supported by Zephyr.
To facilitate adding support for such class of power modes in the future
and to ensure the naming convention makes it clear that the currently
supported power modes stop the CPU this commit renames Low Power States
to Slep States and updates the documentation.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Plain 'source' is globbing. 'gsource' is a leftover from an older
design, and works as a synonym for 'source'.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
On STM32F3 devices, a trick was required for normal use of registers.
This was actually an issue in flash registers defintions which should
be defined as volatile.
Fix this and additionaly, fix definition for STM32F1 which was also
lacking the volatile instruction.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The iMX RT1060 and RT1064 have additional dedicated 512KB on-chip ram.
This OCRAM2 is mapped at 0x20200000, formerly OCRAM1 (flexram) mapping
which is moved to 0x20280000 in order to guarentee global OCRAM memory
continuity regardless OCRAM1 size configuration (256KB by default).
In default configuration, this gives 768KB (512+256) on-chip ram:
0x20200000 to 0x202BFFFF.
OCRAM2: 0x20200000 - 0x2027FFFF
OCRAM1(FlexRam): 0x2028FFFF - 0x202BFFFF
Add this memory region as a single node in the rt1060 device tree.
Note: MPU expects power of two memory region, in case of 768KB, let
the MPU configure 1MB instead.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
On stm32f4 series, uart4 is not an usart, so generated with
'st,stm32-usart' compatible and hence generated defined should be
prefixed with DT_ST_STM32_UART_ rather than DT_ST_STM32_USART.
Fixes#14542
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The clang ARM assembler is a bit stricter than GNU as, make a few
changes so things build with both
Signed-off-by: Peter Smith <peter.smith@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Maybe this is some "just in case" thing that got copied around. There's
no need to have a blank line at the beginning or end of Kconfig files.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Redefining the config will not let another (out-of-source) driver be
chosen instead of the default. The driver is practically forced by the
soc settings. This commit moves default settings from soc/arm/nordic_nrf
into the drivers themselves.
Signed-off-by: Thomas Stenersen <thomas.stenersen@nordicsemi.no>
Update reserved function names starting with one underscore, replacing
them as follows:
'_k_' with 'z_'
'_K_' with 'Z_'
'_handler_' with 'z_handl_'
'_Cstart' with 'z_cstart'
'_Swap' with 'z_swap'
This renaming is done on both global and those static function names
in kernel/include and include/. Other static function names in kernel/
are renamed by removing the leading underscore. Other function names
not starting with any prefix listed above are renamed starting with
a 'z_' or 'Z_' prefix.
Function names starting with two or three leading underscores are not
automatcally renamed since these names will collide with the variants
with two or three leading underscores.
Various generator scripts have also been updated as well as perf,
linker and usb files. These are
drivers/serial/uart_handlers.c
include/linker/kobject-text.ld
kernel/include/syscall_handler.h
scripts/gen_kobject_list.py
scripts/gen_syscall_header.py
Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
The Kconfig.defconfig.efr32* files added redundant dependencies on
SOC_EFM32* that are already added in the Kconfig.defconfig.series files
that source them.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Adds a new config HAS_MCUX_FTFX to conditionalize the mcux flash driver
on socs that support it. Selects HAS_MCUX_FTFX on all kinetis socs
except kw40z, because even though this soc has the relevant hardware,
its CMSIS header file is not compatible with the mcux flash driver in
ext/.
This change also prevents enabling the mcux flash driver on lpc and imx
rt boards.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
There are some implicit rules in STM32 family Kconfig.defconfig
fragments organizations.
Add comments to explicit these rules.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
GPIO port H is available on all SoCs of L4 series.
Move Kconfig GPIO_STM32_PORTH symbol deifnition to series Kconfig
fragment Kconfig.defconfig.series.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This value always comes from DTS. No Kconfig symbol named
NS16550_REG_SHIFT ever existed.
Might've been missed in commit 603f068690 ("uart/ns16550: Use DT_ prefix
for remaining device configs").
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
nRF52810 Flash and SRAM sizes do not have power-of-two values.
This commit reduces the amount of MPU regions reserved at boot
time to enforce basic permissions in Flash and SRAM memory. It
does this by selecting the next power-of-two size for the Flash
and SRAM regions, respectively. In this way we can cover the
entire Flash and SRAM space each with a single MPU region, thus,
save two MPU regions to be used by the kernel/application.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Some more were added since the cleanup pass in June 2018. See e.g.
commit 2d50da70a1 ("drivers: ipm: Kconfig: Remove redundant 'default n'
properties") for a motivation. It also avoids people wondering whether
or not they need to put in 'default n'.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
Previous rename from CONFIG_* to DT_* left a few remaining
CONFIG_*. So rename them manually now.
Fix#13753
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
In the recent MDK brought by nrfx 1.6.2, these legacy peripherals have
been revealed as available also in nRF52810. This patch allows their
use in Zephyr drivers.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The i.MX RT1064 evk has one ethernet (10/100M) connector via KSZ8081RNB
phy. Enable related dts nodes and config flags
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
iMXRT1064 has 4MB on-chip Flash memory (flexspi2) mapped to 0x70000000.
Add it as configurable code location for MIMXRT1064-EVK board.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
CPU_LPS_n name used to indicate a low power state is cryptic and
incorrect. The low power states act on the whole SoC and not exclusively
on the CPU. This patch renames CPU_LPS_n states to LOW_POWER_n. Also
HAS_ pattern for Kconfig options is used in favor of a non standard
_SUPPORTED. Naming of deep sleep states was adjusted accordingly.
Following is a detailed list of string replacements used:
s/SYS_POWER_STATE_CPU_LPS_(\d)_SUPPORTED/HAS_STATE_LOW_POWER_$1/
s/SYS_POWER_STATE_CPU_LPS_(\d)/SYS_POWER_STATE_LOW_POWER_$1/
s/SYS_POWER_STATE_DEEP_SLEEP_(\d)_SUPPORTED/HAS_STATE_DEEP_SLEEP_$1/
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This commit removes dependency on SYS_POWER_LOW_POWER_STATES_SUPPORTED,
SYS_POWER_DEEP_SLEEP_STATES_SUPPORTED Kconfig options. Power management
SYS_POWER_LOW_POWER_STATES, SYS_POWER_DEEP_SLEEP_STATES options depend
now directly on specific power states supported by the given SoC. This
simplifies maintenance of SoC Kconfig files.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Follow the pattern we have for other peripherals in that if the driver
class (CAN) is enabled than enable the driver for that class
(CAN_STM32). Also have the STM32 CAN driver depend on being on a STM32
SoC.
Remove setting of CONFIG_CAN_STM32 in any .conf files as it will get set
of CONFIG_CAN is set/enabled.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit adds sys_set_power_state() function with support for EM1
Sleep, EM2 Deep Sleep, EM3 Stop power modes on Silabs SoCs.
Tested on efr32_slwstk6061a board.
Note: No support for efm32hg, efm32wg series at this point due to the
missing possibility of placing function code in RAM, required by errata
in SiLabs library code.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
'soc' logger module may be used by any SoC related code located in soc/.
An implementation file requiring logger services should include
LOG_MODULE_DECLARE(soc, CONFIG_SOC_LOG_LEVEL);
to use the 'soc' logger instance.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
We should be selecting CPU_HAS_ARM_MPU at this level and not
CPU_HAS_MPU. Change the cases of CPU_HAS_MPU to CPU_HAS_ARM_MPU.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit removes "select SYS_POWER_*_SUPPORTED" entries from
Kconfig on SoCs which are not implementing sys_set_power_state()
method used to control power mode.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
Some of power states used numerical suffix while otthers not.
This commit adds proper suffix to all power state names.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
f
This commit simplifies OS <-> Application interface controlling power
management. In the previous approach application-based PM required
overriding sys_suspend() and sys_resume() functions. As these functions
actually implemented power state change, in such case application
basically had to provide own implementation of all PM-related stuff,
which was not portable and hard to maintain.
This commit changes this scheme: The sys_suspend() and sys_resume()
are now system functions while the application could either use
built-in power management policies or provide its own. All details
of power mode switching are now handled by the OS.
Also, this commit cleans up the Kconfig options related to system-level
power management grouping them under common CONFIG_SYS_PM_ prefix.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
A common driver is shared between stm32 chips, which was not the case
for stm32f3 series. As a consequence stm32f3 was not maintained
equally and was missing features such as flash layout or dts based
configuration.
Besides, drivers had some flows such as wrong bus clock and
missing HSI clock activation which lead to issues on boards not
using HSI as main clock.
As a consequence this commit moves stm32f3 series flash driver to
common stm32 flash drivers.
Fixes#4197
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Refactor the imx rt code/data location config defaults such that we
default to on-chip memories at the soc level and override to external
memories at the board level. This means that we frequently override soc
defaults for evk boards, but it removes the assumption that all imx rt
boards (particularly non-evk boards) will have the same external
memories as evk boards.
The end result is that imx rt evk boards still have the same defaults as
before, but the way we get there is different.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The imx rt dts fixup was missing gpio 2,3,4 instances. This caused a
build error in the gpio driver when an application enabled:
CONFIG_GPIO_MCUX_IGPIO_2=y
CONFIG_GPIO_MCUX_IGPIO_3=y
CONFIG_GPIO_MCUX_IGPIO_4=y
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The imx rt family of socs has several options for linking code and data
into internal or external memories, and up until now we have handled
these options at the board level. This has resulted in several Kconfig
symbols being defined in multiple places and triggering warnings in
documentation builds:
warning: the default selection CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) of <choice> (defined at boards/arm/mimxrt1050_evk/Kconfig:9) is not contained in the choice
warning: the choice symbol CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) is defined with a prompt outside the choice
warning: the choice symbol CODE_HYPERFLASH (defined at boards/arm/mimxrt1050_evk/Kconfig:16, boards/arm/mimxrt1060_evk/Kconfig:16) is defined with a prompt outside the choice
warning: the choice symbol CODE_QSPI (defined at boards/arm/mimxrt1050_evk/Kconfig:19, boards/arm/mimxrt1060_evk/Kconfig:19) is defined with a prompt outside the choice
warning: the choice symbol CODE_ITCM (defined at boards/arm/mimxrt1050_evk/Kconfig:13, boards/arm/mimxrt1060_evk/Kconfig:13) is defined with a prompt outside the choice
warning: the choice symbol CODE_HYPERFLASH (defined at boards/arm/mimxrt1050_evk/Kconfig:16, boards/arm/mimxrt1060_evk/Kconfig:16) is defined with a prompt outside the choice
warning: the choice symbol CODE_QSPI (defined at boards/arm/mimxrt1050_evk/Kconfig:19, boards/arm/mimxrt1060_evk/Kconfig:19) is defined with a prompt outside the choice
The number of warnings increased as we added more imx rt boards. Fix the
warnings by moving code and data location configs from the board level
to the soc level.
The default memories for all imx rt boards are unchanged. The
mimxrt10{20,50,60}_evk boards still default to hyperflash/qspi for code
and sdram for data. The mimxrt1064_evk board still defaults to ITCM for
code and DTCM for data because jlink does not yet support programming
internal flash.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
soc.h references Kconfig symbols which aren't defined. Define the
specific SoC versions that are referenced in soc.h
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
In soc.h reference to CONFIG_SOC_PART_NUMBER_SAM4S18B should have been
CONFIG_SOC_PART_NUMBER_SAM4S8.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit changes the names of SYS_POWER_DEEP_SLEEP* Kconfig
options in order to match SYS_POWER_LOW_POWER_STATE* naming
scheme.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The SYS_POWER_LOW_POWER_STATE_SUPPORTED and SYS_POWER_LOW_POWER_STATE
suggests one low power state but these options control multiple
low power state. This commit uses plural in the names to indicate
that.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
Initial support for Microchip MEC1701 series is incorporated to the
tree. Additional support for UART is also included. This SOC supports
two operation modes for interrupts (Direct and Aggregated). For this
commit, the interrupts are configured in direct mode.
Signed-off-by: Francisco Munoz <francisco.munoz.ruiz@intel.com>
The eth mcux driver has been using non DT_ prefixed defines for DT
generated defines. Switch to use DT_ prefixed ones as we want to
deprecated the non DT_ prefixed defines.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The soc nxp_imx RDC code has been using non DT_ prefixed defines for DT
generated defines. Switch to use DT_ prefixed ones as we want to
deprecated the non DT_ prefixed defines.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Select CPU_HAS_FPU_DOUBLE_PRECISION in SAM E70 and NXP I.MX RT
series of MCUs to signify double-precision floating-point unit.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
SoC family STM32F769XI supports both double and single precision
floating-point unit. This commit enables double-precision by
default in this SoC.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit introduces a Kconfig option for ARM SoCs, to signify
that the SoC implements a double-precision floating point unit.
The option is utilized in cmake/fpu-for-gcc-m-cpu to select the
appropriate GCC compile option flag for FPU.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This patch adds basic support for the PWM devices available on the Atmel
SAM family. Beside enabling the driver, everything is selected through
the device tree, including enabling the PWM0 and PWM1 devices. Thus
CONFIG_PWM_0 and CONFIG_PWM_1 are ignored.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Provides a STM32 RTC driver using new counter API.
Driver does not support wrap related functions (set, get, ..)
Fixes#11373
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The CMSDK Timer can be used as a timer or as a counter.
The unified interface proposed in #8340 unifies counter.h and rtc.h to
provide a common interface.
This patch modifies the timer implementation of the single timer to
make it compliant with the new proposed interface.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add EPIT (Enhanced Periodic Interrupt Timer) peripheral support
for i.MX6SoloX soc.
Origin: Original
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Removing duplicates in selects for config SOC_NRF52832 and
SOC_NRF52840. Duplicates were unexpected merge artifacts.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Enables the mcux elcdif shim driver and clocks on imx rt socs when the
display driver interface is enabled.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
In case of !XIP, set defaults for CONFIG_FLASH_SIZE and
CONFIG_FLASH_BASE_ADDRESS in Kconfig.
Fixes: #13113
Signed-off-by: Gil Pitney <gil.pitney@linaro.org>
Now that the SAM Ethernet driver can work when the cached is enabled, it
is possible to unconditionally enable the data cache on the SAM E70 SoC.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Each platform is now specifying list of supported power states
as a Kconfig options. Some of the specified states could be
disabled in runtime. As result there is no need for the removed
interface.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
Currently each SoC has to define own list of power states.
However all these definitions have to be the same, as common power
management code uses them.
This commit replaces per-soc power state list by global definition.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
Use the new DT_<COMPAT>_<INSTANCE>_<PROP> defines to instantiate
devices. This commit adds also ability to define individual pin
locations on SoC series that support the feature. Definitions of GPIO
pins assigned to a given location have been moved from soc_pinmap.h file
to board DTS file.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Use the new DT_<COMPAT>_<INSTANCE>_<PROP> defines to instantiate
devices. This commit adds also ability to define individual pin
locations on SoC series that support the feature. Definitions of GPIO
pins assigned to a given location have been moved from soc_pinmap.h file
to board DTS file.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This commit ports power management code from nRF52 to the nRF51 SoC,
enabling usage of Zephyr Power Management policies on this platform.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
This commit updates the power management code for nRF52 SoC
series after recent changes in Zephyr power management subsystem.
Changes:
- Removed LPS modes, as they are not supported by HW.
(previous implemntation used CONSTLAT and LOWPWR settings
in NRF_POWER to implement low power modes, however these
knobs should be used only when application needs ultra low
CPU wake-up time).
- Reworked code in order to allow adding custom power levels
on the application level and provide better integration
with power management subsystem.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
exti driver implementation does not fit all SoCs because
some EXTI ip does not match stm32_exti register map provided.
Instead of providing exti register map for all SoCs, use LL API
which abstracts IP variations and enable uniform use of the drivers
on all STM32SoCs.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use the new DT_<COMPAT>_<INSTANCE>_<PROP> defines to instantiate
devices. This commit adds also ability to define individual pin
locations on SoC series that support the feature. Definitions of GPIO
pins assigned to a given location have been moved from soc_pinmap.h file
to board DTS file.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Now that a hw-flow-control DTS binding has been added for MCUX uart,
let's check for the DT_ define and enable support in the MCUX HAL
layer.
Signed-off-by: Michael Scott <mike@foundries.io>
Add sam0_rtc_driver that implements system timer API on top of the RTC
and can be used as a replacement for the default systick timer.
Signed-off-by: Martin Benda <martin.benda@omsquare.com>
Adds a new config HAS_MCUX_ENET to constrain which socs can enable the
mcux ethernet driver. This will prevent users from enabling the driver
on socs like kl25z or kw41z which do not have ethernet mac hardware.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
In soc.h of nRF9160 SoC we need to explicitly include
nrfx_config_nrf9160.h to have the standard peripheral
base address macro mappings in Zephyr builds for nRF9160
SoC. (We need to do this spefically for nRF9160, as those
macros are not present in the nRF9160 MDK header).
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Adds STM32 L452 soc with L452xC variant. L452 has 160 KB SRAM;
therefore, mpu mem config has been extended; IRQ number is based on
'stm32l452xx.h'.
Signed-off-by: Georgij Cernysiov <g.cernysiov@elco-automation.de>
Enables the mcux ethernet driver and pin muxes on the mimxrt1020_evk
board, the same way it is done on the mimxrt1050_evk board. Updates the
board documentation and yaml supported list accordingly.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The ENET PLL should be enabled if the SoC is the MIMXRT1021 (it used by
the ARM core) or if the ENET device is enabled.
The 500MHz clock should be enabled if the SoC is the MIMXRT1021.
The ENET clock should be enabled if the ENET device is enabled.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Kconfig currently emits a warning when building for a MIMXRT1021 SoC:
warning: INIT_ENET_PLL (defined at
soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt1052:66) has direct
dependencies NET_L2_ETHERNET && SOC_MIMXRT1052 && SOC_SERIES_IMX_RT
with value n, but is currently being y-selected by the following
symbols:
- SOC_MIMXRT1021 (defined at soc/arm/nxp_imx/rt/Kconfig.soc:12),
with value y, direct dependencies <choice> (value: y), and select
condition <choice> (value: y)
This is due to the fact the ENET PLL is the one used by the ARM core on
the MIMXRT1021 so it is always enabled, while it is declared protected
by NET_L2_ETHERNET and SOC_SERIES_IMX_RT.
Fix that by declaring the symbol in Kconfig.defconfig.series.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Remove redundant inclusion of nrf.h (included by nrfx.h).
Group the logging/log.h inclusion together with the other
inclusions in this file (make inclusions' list look as in
nrf9160/soc.c).
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Remove the locally-defined macros which define the base
addresses for XICR, Peripheral space and PPB. The macros
are not used.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Enables the mcux lpi2c shim driver and clocks on all imx rt socs when
the i2c driver interface is enabled.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds dts fixups for lpuart instance 2, which will be used for the
arduino_serial connection on the mimxrt1020_evk board.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Clean up a left over from GPIO driver factorization.
Definition of GPIO_REG_SIZE and GPIO_PORTS_BASE do not need anymore
to be spread accross SoCs.
Put these definitions directly in STM32 pinmux driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit introduces a new Kconfig symbol to signify
that a CPU implements the Nordic-specific security
attribution unit. The symbol is meant to be selected
by Nordic SoCs that implement the System Protection
Unit (SPU) peripheral.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit adds the nRF9160 fixup and the source files
for SOC and MPU boot configuration.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit introduces the Kconfig file structure for nrf9160
SoC in the Zephyr tree.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Support musca board as a variant, it is a Cortex-M33 based SoC.
Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
Signed-off-by: Minos Galanakis <minos.galanakis@arm.com>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
SAMD2x series have available the Optional Vector Table Offset Register
(VTOR). If this option is not selected, SCB->VTOR is not configured
properly and the application hangs if it's located in an offset
different than 0.
Removed select CPU_CORTEX_M from SAMD20, as it's already selected by
select CPU_CORTEX_M0PLUS
Signed-off-by: Miguel A. Borrego <jimjim17@gmail.com>
This commit renames the CLOCK_CONTROL_NRF5 Kconfig symbol to
CLOCK_CONTROL_NRF. The change is required to aleviates confusion
when selecting the symbol in nRF9160 SOC definition.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
In the wake of 9cbe468a470fe6a103557d4352d37604a632b2fe we need
to update the nomenclature of DT_FLASH_DEV_NAME macros.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
The CIAA and QFAB variants of the nRF52832 were missing in Kconfig,
although present in Device Tree. Add the relevant Kconfig entries in
order to be able to select them.
Fixes#12417
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Add support for the TRNG device contained in the i.MX RT SoCs. It uses
the existing MCUX driver, and mostly consists in adding the Kconfig and
DTS entries.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The original implementation of gpio functions access registers
directly. Using LL library can add a set of unifying access
functions for all series of stm32 for avoiding accessing low level
code, and improve readability.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
All series STM32 have mostly the same GPIO architecture
and can share the same code for GPIO manipulation.
Functions of the external interrupt line control are also the same.
This patch extracts common code from them and put them into the 'common'
folder.
Functions of control GPIO of these series scattered in
soc/arm/st_stm32/stm32xx/ folders contain these functions:
stm32_gpio_flags_to_conf(), stm32_gpio_configure(), stm32_gpio_set(),
stm32_gpio_get, stm32_gpio_enable_int().
This patch merges them into the gpio_stm32.c file.
Signed-off-by: Song Qiang <songqiang1304521@gmail.com>
Adds support for the device configuration data (DCD), which provides a
sequence of commands to the imx rt boot ROM to initialize components
such as an SDRAM.
It is now possible to use the external SDRAM instead of the internal
DTCM on the mimxrt1020_evk, mimxrt1050_evk, and mimxrt1060_evk. Note,
however, that the default board configurations still link data into
internal DTCM, therefore you must use a device tree overlay to override
"zephyr,sram = &sdram0"
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Moves the default TEXT_SECTION_OFFSET from the board level to the soc
level for the imx rt series. This offset is used to reserve space for
the imx boot header for external xip flash images.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds support for the boot data, image vector table, and FlexSPI NOR
config structures used by the imx rt boot ROM to boot an application
from an external xip flash device.
It is now possible to build and flash a bootable zephyr image to the
external xip flash on the mimxrt1020_evk, mimxrt1050_evk, and
mimxrt1060_evk boards via the 'ninja flash' build target and jlink
runner. Note, however, that the default board configurations still link
code into internal ITCM, therefore you must set CONFIG_CODE_HYPERFLASH=y
or CONFIG_CODE_QSPI=y explicitly to override the default. You must also
set CONFIG_NXP_IMX_RT_BOOT_HEADER=y to build the boot header into the
image.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This commit configures ETM/TPIU clock upon startup in case SWO logger
backend is enabled on Atmel SAM E70 SoC.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
By default, after reset SWO signal is not connected to GPIO pin.
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
By default, after reset SWO signal is not connected to GPIO pin. This
commit adds required initialization code to enable support for SWO
logger. Not all SoC series support the feature.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This commit adds Serial Wire Output (SWO) logger backend. SWO is an
extension of Serial Wire Debug (SWD) port developed by ARM.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
On STM32L4, 14 pins (Port G[15:2]), require external power supply.
Activate this at port G init when PWR_CR2_IOSV is defined.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Zephyr gecko drivers depend on libraries provided by the vendor. The
same libraries may also be used directly by the application code or
RAIL library. To facilitate the latter use case scenario this commit
adds Kconfig options to independently enable compilation of vendor
HAL library modules.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
* Add DTS support for gpio controller driver
Signed-off-by: Ashokkumar B <ashokkumar@zilogic.com>
Signed-off-by: Subash G <subash@zilogic.com>
Signed-off-by: Vishnu K <vishnu@zilogic.com>
Signed-off-by: Vaishnavi D <vaishnavi.d@zilogic.com>
By adding 'aliases' node in SoC .dtsi file it is possible to generate
DT_ defines which specify a logical name rather than relay on module
location on APB bus. E.g. DT_SILABS_GECKO_USART_40010000_LABEL becomes
DT_SILABS_GECKO_USART_USART_0_LABEL. Thus it is possible to remove
dts_fixup.h defines.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Fixes an ethernet build error introduced with MCUXpresso SDK 2.5.0,
caused by a slight change in the ethernet pll configuration structure.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add uart5 nodes to stm32f1 series dts.
Provide matching dts_fixup add-on.
Signed-off-by: Chen Han <qq1433255094@outlook.com>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Updates the MCUXpresso SDK to version 2.5.0 for applicable SoCs.
Wireless (KW*) and legacy (KL25) SoCs were not included in this
MCUXpresso SDK release and are therefore not updated here.
New in this release is SoC-level and board-level support for external
xip flash in the i.MX RT family.
For RT1050, we are now using the MCUXpresso SDK for the EVKB version of
the board, which correponds to an upgrade from A0 to A1 silicon.
However, we don't yet have Kconfigs in place to support A1 silicon part
numbers, and therefore add a simple cmake hack to convert A0 part
numbers to A1 part numbers.
The SDK flash driver interface also changed slightly in this release,
and thus the zephyr flash shim driver is updated accordingly.
Origin: MCUXpresso SDK
License: BSD 3-Clause
URL: mcux.nxp.com
Purpose: Provide device header files and bare metal peripheral drivers
for Kinetis, LPC, and i.MX SoCs.
Maintained-by: External
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add support for Low Speed External 32.768 kHz oscillator (LSE ).
Add support for MSI PLL-Mode offering an automatic calibration feature
in combination with the LSE. This allows the MSI to reach an accurate
+/-0,25% clock perfectly suitable for USB full-speed clock.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
SPI devices almost always require chip selects, which are configured
through GPIOs. Make the GPIO infrastructure available by default when
SPI is enabled.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
In the wake of introducing nRF9160 .dtsi header, we are
adding several HAS_HW_NRF_xxxx Kconfig symbols, for the
peripherals present in nrf9160 SoC.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Make the following nRF peripheral drivers:
- ADC
- GPIO
- I2C
- SPI
- UART
- USB_DEVICE
enabled by default so that users do not need to explicitly enable them
in their applications after choosing an nRF SoC as the build target.
Kconfig options enabling these drivers depend on both a given hardware
feature (e.g. I2C) and an nRF family SoC selected, so effectively they
will be automatically enabled only when it is adequate (and in most
cases these drivers are the only option for a given hardware feature
on nRF SoCs).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Implementations of both flavors of serial drivers for Nordic SoCs
are no longer dependent on the gpio driver. Remove the dependency
from Kconfig.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Added board definitions for nucleo_f756zg. Features include gpio,
pinmux, uart (ST Zio, ST-Link and Arduino Uno v3 interfaces).
Added basic documentation and some soc definitions for the
stm32 f756XX soc.
Signed-off-by: AJ Palmer <ajpcode@hotmail.com>
The early boot watchdog init for kinetis was incorrectly disabling and
reenabling interrupts to preserve timing during the unlock sequence.
However, interrupts are already disabled before this routine executes
and the kernel is not yet ready to enable them when this routine exits.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This patch adds a flash driver for the STM32F7x series, inspired from
the STM32F4x one. It has been tested on the STM32F723, but should also
work on other SoCs of the family.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This patch cleans up the code in the recently added dts_fixup.h,
restoring the original alignment of the file.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
The dts.fixup for v2m_beetle contains a wrong setting for the IRQ fixup
for the Dual Timer IRQ.
This patch fixes the symbol included in the generated header.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This commit simplifies Kconfig options related to handling SoC series,
part numbers. This is a first step required to add remaining part
numbers to the existing configuration.
This change is possible since all SiLabs SoCs within a single series
have a very uniform structure.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
The driver can be tested using different networking emulation
approaches.
This approach will work across multiple Qemu instances. There can be
more than one Qemu instance, run using the following command. They
would appear to be on the same Ethernet network.
$ qemu-system-arm -M lm3s6965evb \
-serial stdio \
-net nic \
-net socket,mcast=230.0.0.1:1234 \
-kernel zephyr.elf
This approach will work with other virtualization technologies that
support connecting to a VDE switch, like VirtualBox and User Mode
Linux. The switch can be started using the following command.
$ vde_switch --sock /tmp/switch
Qemu can be connected to the switch using the following command.
$ qemu-system-arm -M lm3s6965evb \
-serial stdio \
-net nic \
-net vde,sock=/tmp/switch \
-kernel zephyr.elf
Signed-off-by: Fadhel Habeeb <fadhel@zilogic.com>
Signed-off-by: Nirav Parmar <niravparmar@zilogic.com>
Signed-off-by: Vijay Kumar B <vijaykumar@zilogic.com>
Add configuration values for HAS_HW_NRF_BPROT and HAS_HW_NRF_MPU.
Select these configurations where applicable.
Signed-off-by: Håkon Øye Amundsen <haakon.amundsen@nordicsemi.no>
Within a single series pin mapping between location setting and pin name
is uniform. The only difference is availability of the module, i.e. i2c1
may be missing on some part numbers, or availability of the pin, i.e.
32 pin package will not provide all the pins available on 48 pin
package. It's better to manage these differences at the DTS/Kconfig
level.
This commit removes dependency of soc_pinmap.h files on part numbers.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Implementation taken from Nordic nrfx version 1.3.1 soc/nrfx_coredep.h,
modified to remove material from other series and to conform to Zephyr
coding standards.
Note that unlike standard k_busy_wait this is susceptible to
longer-than-intended delays due to the impact of interrupt handling.
Fixes#11626
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
The Cortex-M7 CPU included in the SAM e70 SoCs has a data cache that
significantly boost the performances. However the SAM GMAC Ethernet
driver is using a scatter-gather technique to exchange data with the
Ethernet driver. This requires the use use of a non-cached memory area.
This is currently not supported on Zephyr, but support for it is being
discussed in PR#11199.
In the meantime, enable the data cache during the SoC initialization,
unless the SAM GMAC Ethernet driver is enabled.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The Cortex-M7 CPU included in the SAM e70 SoCs has an instruction cache
that significantly boost the performances. Enable it during the SoC
initialization.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The Silicon Labs EFM32 Pearl Gecko MCU includes:
* Cortex-M4F core at 40MHz
* up to 1024KB of flash and 256KB of RAM
* multiple low power peripherals
Ported from EFM32WG:
https://www.silabs.com/documents/public/application-notes/an0918.0-efm32_to_efm32jgpg_migration_guide.pdf
Signed-off-by: Gil Benkö <gil.benkoe@pm.me>
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Declare and define nxp_mpu_config and nxp_mpu_regions
structs as const, as they are not modified in run-time.
Fixes#10320
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Declare and define arm_mpu_config and arm_mpu_regions
structs as const, as they are not modified in run-time.
Fixes#10320
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit adds support for STM32L471xG. Since STM32L475 only adds
USB, stm32l475.dtsi now includes stm32l471.dtsi
Signed-off-by: Kiril Zyapkov <k.zyapkov@allterco.com>
This patch adds a flash driver for the Atmel SAM E70 SoC. The driver has
been kept simple by considering that the flash is only composed of 8-KiB
blocks. Indeed an area at the beginning of the flash might be erased
with a smaller granularity, and the other blocks can also be erased with
a higher granularity. It also only handles the global read/write
protection, not the 128-KiB lock regions. A write error is returned if
a region is locked.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Enables Networking hardware on i.MX-RT 1050-EVKB board.
Pinout enabled board specific etherenet connection, also pin
initialization was moved later to PRE_KERNEL_2 in order to have
sysclock initialized before.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Convert the Atmel SAM0 watchdog driver to the new watchdog API and
enable DTS support.
This fixes#10914.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Add Messaging Unit B peripheral support for i.MX6SoloX soc so it can
use IMX IPM.
Origin: Original
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
When the WNC-14A2A modem binding was originally introduced, I thought
the base_label would shorten the define keeping the result short and
easily portable. Turns out with the latest changes, it has a side
effect of removing the "DT_*" prefix which is breaking the build.
Let's remove "base_label" from the modem binding and adjust all of
the dts_fixups referring to the WNC14A2A defines.
NOTE: This commit moves the left-over WNC14A2A dts_fixup defines from
the nRF52 soc into samples/net/lwm2m_client as the new values.
They will stay there until the modem can be re-configured as a shield.
Signed-off-by: Michael Scott <mike@foundries.io>
Kinetis device K64F's PTP interrupt crashed the system becase it was not
generated from dts. Device interrupt correctly set now.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
All drivers require DTS for their primary SPI settings.
Removing SPI_[0-9]_NAME config option added some more samples changes.
Usage of these options there was anyway not relevant.
Fixes#11064
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now that all SPI controllers support DTS we can remove the Kconfig
support for non-DTS options. We also cleanup some defines that should
have be DT_MCR20A_ instead of CONFIG_MCR20A_.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The majority of cases of CONFIG_I2C_x_IRQ_PRI should be
DT_I2C_x_IRQ_PRI. So go ahead and fix them up. Only the i2c_nios
driver still uses Kconfig for getting priority.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The majority of bits where already in place, but some minor support
get the driver name from DTS was needed. Now we select HAS_DTS_WDT
for the driver.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move to using Kconfig (like other Atmel SAM drivers do) to specify the
pinmux setting for SAMe70 SoCs. Updated the sam_e70_xplained board to
set the default in Kconfig.defconfig instead of via board.h
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This can help find unused symbols. Those end up without a type if
'default' is used instead of 'def_bool', which generates a warning.
Search for "Kconfig.defconfig" in
https://docs.zephyrproject.org/latest/application/kconfig-tips.html for
a longer explanation.
Keep the 'def_bool' for the following symbols, which seem to be
deliberately defined only in Kconfig.defconfig files:
- ALTERA_AVALON_I2C
- ALTERA_AVALON_MSGDMA
- ALTERA_AVALON_PIO
- ALTERA_AVALON_QSPI
- ALTERA_AVALON_SYSID
- CLOCK_CONTROL_IMX_CCM
- CPU_EM4_DMIPS
- CPU_EM4_FPUDA
- CPU_EM4_FPUS
- FP_FPU_DA
- I2C_GECKO
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
These changes were obtained by running a script created by
Ulf Magnusson <Ulf.Magnusson@nordicsemi.no> for the following
specification:
1. Read the contents of all dts_fixup.h files in Zephyr
2. Check the left-hand side of the #define macros (i.e. the X in
#define X Y)
3. Check if that name is also the name of a Kconfig option
3.a If it is, then do nothing
3.b If it is not, then replace CONFIG_ with DT_ or add DT_ if it
has neither of these two prefixes
4. Replace the use of the changed #define in the code itself
(.c, .h, .ld)
Additionally, some tweaks had to be added to this script to catch some
of the macros used in the code in a parameterized form, e.g.:
- CONFIG_GPIO_STM32_GPIO##__SUFFIX##_BASE_ADDRESS
- CONFIG_UART_##idx##_TX_PIN
- I2C_SBCON_##_num##_BASE_ADDR
and to prevent adding DT_ prefix to the following symbols:
- FLASH_START
- FLASH_SIZE
- SRAM_START
- SRAM_SIZE
- _ROM_ADDR
- _ROM_SIZE
- _RAM_ADDR
- _RAM_SIZE
which are surprisingly also defined in some dts_fixup.h files.
Finally, some manual corrections had to be done as well:
- name##_IRQ -> DT_##name##_IRQ in uart_stm32.c
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Update a couple of labels generated from DTS used directly (not through
dts_fixups) in TI CC2650 system initialization code and a few drivers
for this SoC.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
All labels containing "_<8-hex-digits>_" or "16550_<3or6-hex-digits>_"
in their names, assumed to be generated by the extracting script,
are updated with the DT_ prefix, to reflect the recent changes made
to the script.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Now that Cortex-M7 cache issues have been fixed in commits 828ae6b8 and
13972693, it is possible to safely enable the MPU on the STM32F7 SoC
series.
Note that the ITCM area is not mapped into an MPU region. This should
not be an issue for now, as Zephyr does not provide yet a way to
populate and use this area.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
STM32F103 micros starting from 64-pin (xE) packages upward have
available port G. This patch defines a dts binding for them.
Signed-off-by: Pavel Kral <pavel.kral@omsquare.com>
Provide CONFIG macros for clocks bits and bus properties in fixup
files and use them to simplify logic in uart devices instanciation
code
Fixes#10448
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The information extracted from the device tree is now used to initialize
GPIO device instances. Up until now the GPIO device driver made no use
of this information. Actual instance creation is still controlled using
the Kconfig method. Missing GPIO device tree nodes were added in the
process for STM32L073, STM32F413 and STM32F373.
The information for gpio instance initialization has already been
present for supported STM32 SoCs but remained unused. Changes in the
device tree had no effect on GPIO functionality and was essentially
redundant. Using the device tree for hardware description seems
plausible and less painful than a myriad of defines in some SoC
description header.
The change was implemented under the assumption that current device
trees provide a correct description of the SoCs. Base register addresses
and RCC register bits were not explicitly checked for each device.
Manual tests were executed on:
- NUCLEO-F103RB
- STM32F429I-DISCO
- STM32F746G-DISCO
- NUCLEO-F767ZI
Manual tests consisted of blinky on different GPIOs and pins on each
board.
sanitycheck was executed for all STM32 based boards
Fixes: #10629
Signed-off-by: Martin Bertsche <martin72216@googlemail.com>
The only difference between the F413xH and F413xG is flash memory size.
STMF413xH: 1536 Kbytes
STMF413xG: 1024 Kbytes
Signed-off-by: Benoit Leforestier <benoit.leforestier@gmail.com>
This patch adds a USB device driver for the USBHS device that can be
found on Atmel SAM E70 SoC family. Only the FIFO mode is supported
(as opposed to DMA). It supports LS, FS and HS modes, but defaults to
FS mode as Zephyr does not fully support HS mode yet.
Tested examples on an Atmel SMART SAM E70 Xplained Board:
* usb/cdc_acm
* usb/hid-mouse
* usb/mass
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Add dts binding and info for TRNG device and enable basic support to
get the device name from DTS. We leave for now the base addresses
coming from the MCUX HAL.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add dts binding and info for RNGA device and enable basic support to
get the device name from DTS. We leave for now the base addresses
coming from the MCUX HAL.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert gpio_cc32xx driver over to using device tree. Added binding
files, updates to dts for various SoCs that use cc32xx.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The define NRF51822 has no in-tree users and is believed to have been
added by accident. The define NRF51 should be referenced in it's
place.
To avoid users accidentally referencing NRF51822 instead of NRF51, and
to avoid confusing users into believing that NRF51822 has semantics we
remove it.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
The build script ext/hal/nordic/CMakeLists.txt manages the MDK
dependency. The MDK is not aware of Zephyr and uses it's own defines
to indicate what HW we are building for.
This commit moves these MDK-specific defines out of the 'soc' build
scripts and into the MDK build script where they belong.
This is expected to be a pure refactoring without side-effects.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Fix misspellings in Kconfig files that show up in the configuration
documentation (and make menuconfig screens).
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Adding watchdog driver for sam SoC. The current implemntation just
diables the watchdog on device boot.
This PR adds the following support for SAM3X, SAM4S and SAME70
1. Activate processor reset
2. Activate all reset
3. Generate interrupt on watchdog timer expiration.
Signed-off-by: Subramanian Meenakshi Sundaram <subbu147@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit contributes a Kconfig symbol hierarchy which allows
the user to build Zephyr Secure and Non-Secure images on ARMv8-M
MCUs with support for Trusted Execution. However, the high-level
configuration structure is generic, thus, can be potentially
used for any platform that supports Trusted Execution.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
The Cypress PSoC6 specifies some input sections in the startup
scripts. These sections (.heap, .stack, etc.) need to be placed
at correct location.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The Silicon Labs EFR32MG12P Mighty Gecko MCU includes:
* Cortex-M4F core at 40MHz
* up to 1024KB of flash and 256KB of RAM
* integrated Sub-GHz and/or 2.4GHz radio
* multiple low power peripherals
Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
Signed-off-by: Endre Karlson <endre.karslon@gmail.com>
Partially replaces Kinetis MCUX driver configuration from Kconfig to
Device Tree. Interrputs moved from defines configuration to DT.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
Introduces the location property and adds the ability to use values
generated by the device tree configuration.
Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Simulated NRF boards based on the POSIX ARCH cannot directly
use the current SOC_*NRF options as these pull options from
the ARM CPU and other peripherals.
This commit adds a new set of hidden SOC_COMPATIBLE_* options to
be selected both by the real SOCs and the simulated ones.
In this manner we can have the common code depend on the
SOC_COMPATIBLE* options instead of the current ones where
neccessary.
Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
(f) arm kconfig
* Add usbd_dc_nrfx shim
The shim is based on the previous one usbd_dc_nrf5.
For handling the USBD hardware, tested nrfx_usbd driver from nRF SDK
was used.
Briefly tested examples:
* usb/cdc_acm
* usb/dfu (USB communication only due to flash handling issues)
* usb/hid-mouse
* bluetooth/hci_usb
Signed-off-by: Paweł Zadrożniak <pawel.zadrozniak@nordicsemi.no>
For the stm32f4xx family the SPI and I2S are sharing same
controller, so we can reuse same definitions.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
stm32f4xx_ll_spi.h include file is shared between I2S and SPI
(controller is same). So we need to include it even when I2S_STM32
is enabled.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The USART fixup in the board dir really are SoC level fixup's. So move
them there and remove the board fixup file since there isn't anything in
it now.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The Silicon Labs EFM32 Happy Gecko MCU includes:
* Cortex-M0+ core at 24MHz
* Up to 64KB of flash and 8KB of RAM
* Full speed (12 MHz) USB 2.0 Device
* Multiple low power peripherals
Signed-off-by: Marcio Montenegro <mtuxpe@gmail.com>
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
Convert gpio_gecko driver over to using device tree. Added binding
files, updates to dts for various SoCs that use gpio_gecko.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The Cypress PSoC6 specifies some input sections in the startup
scripts. These sections (.heap, .stack, etc.) need to be placed
at correct location.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The Zephyr configuration system uses many different files in many
different formats. It makes it a lot easier for users to understand
what these files do if when we use the correct file extensions.
To this end we rename the dts.fixup files to the correct file
extension '.h'.
This is a breaking change for out-of-tree fixup files. Such files will
be detected and given an appropriate error message.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
added sam4s16b, sam4s8c, sam4s8b, sam4s4c, sam4s4b,
sam4s4a, sam4s2c, sam4s2b and sam4s2a.
Used the same order as in the data sheet and code structure
equal to same70. Updated the sam4s_xplained board to match
the altered .dtsi location of the specific SoC.
Signed-off-by: Vincent van der Locht <vincent@vlotech.nl>
This patch adds timers and PWM nodes to STM32 F7 series, as well as the
corresponding dts fixup entries.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Every board that uses dts-enabled spi drivers has a board-level dts, so
there is no need to have separate configs HAS_DTS_SPI_DEVICE and
HAS_DTS_SPI.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Every board that uses dts-enabled i2c drivers has a board-level dts, so
there is no need to have separate configs HAS_DTS_I2C_DEVICE and
HAS_DTS_I2C.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Enables instance 3 of the lpuart driver, adds dts fixups, and configures
pinmuxes to use bluetooth hci on the mimxrt1050_evk board. Updates board
documentation accordingly.
Tested with samples/bluetooth/peripheral_hr, with frdm_kw41z attached as
an arduino shield running the nxp hci controller application.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Use the generated "_CLOCK_CONTROLLER" macro for the lpuart clock name.
This change is similar to commit
e81d9b98fe, but applied to nxp_imx.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Remove the selection of MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT
in SOC_MPS2_AN3385, as this is selected automatically by
ARM_MPU option (for ARMv7-M MCUs).
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Added initial support and created the corresponding device tree part for
building PSoC6 SoC as part of Zephyr.
Signed-off-by: Nazar Chornenkyy <nazar.chornenkyy@cypress.com>
Signed-off-by: Oleg Kapshii <oleg.kapshii@cypress.com>
Commit introduces support for ARM TrustZone CryptoCell 310
for Nordic Semiconductor nRF SoCs in device tree.
Signed-off-by: Dominik Kilian <Dominik.Kilian@nordicsemi.no>
This patch will enable the MPU in MPS2_AN385 soc.
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Added required files/support for the MPU in MPS2-AN358 (Cortex-M3).
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit removes all MPU-related (ARM_CORE_MPU and NXP_MPU)
options exept ARM_MPU, which becomes master switch controlling
MPU support on ARM.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
This commit introduces CPU_HAS_ARM_MPU and CPU_HAS_NXP_MPU options,
which indicate which flavour of MPU is supported by given SoC family.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The HAS_SYSMPU option is just selecting NXP_MPU option,
which could be also controlled through menuconfig.
This commit removes the HAS_SYSMPU option and replaces
its usage by NXP_MPU option.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The ARM_MPU_IMX_RT option is just selecting ARM_MPU option,
which could be also controlled through menuconfig.
This commit removes the ARM_MPU_IMX_RT option and replaces
its usage by ARM_MPU option.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The ARM_MPU_NRF52X option is just selecting ARM_MPU option,
which could be also controlled through menuconfig.
This commit removes the ARM_MPU_NRF52X option and replaces
its usage by ARM_MPU option.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The ARM_MPU_ENABLE option is just selecting ARM_MPU option,
which could be also controlled through menuconfig.
This commit removes the ARM_MPU_ENABLE option and replaces
its usage by ARM_MPU option.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The STM32_ARM_MPU_ENABLE option is just selecting ARM_MPU option,
which could be also controlled through menuconfig.
This commit removes the STM32_ARM_MPU_ENABLE option and replaces
its usage by ARM_MPU option.
Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
The differentiation between the MCUs is handled in the HAL from Silabs.
So all EXX32 MCUs should use the same soc.c file.
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
As far as possible SoC-specific code should be contained to it's
directory and core systems should not be referencing specific
SoCs. This keeps the common code clean and makes it easier to maintain
out-of-tree SoCs.
To this end we move CONFIG_SOC_TI_LM3S6965_QEMU's soft-reset related
code out of arch/arm/core/cortex_m and into arch/arm/soc/ti_lm3s6965.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Move the SoC outside of the architecture tree and put them at the same
level as boards and architectures allowing both SoCs and boards to be
maintained outside the tree.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
