Heartbeat publication sent callback can be used
as a watch mechanism to determine whether
the mesh stack is still capable of sending messages or not.
Signed-off-by: Aleksandr Khromykh <aleksandr.khromykh@nordicsemi.no>
We emulate the interrupt by sending the IPI to core itself by
the local APIC for x86 platfrom.
But in X2APIC mode, this no longer works. So we emulate the
interrupt the by writing the IA32_X2APIC_SELF_IPI MSR to send
IPI to the core itself via LOAPIC also. According to SDM vol.3
chapter 10.12.11.
Fixes#42108
Signed-off-by: Enjia Mai <enjia.mai@intel.com>
Zephyr's timeslice implementation has always been somewhat primitive.
You get a global timeslice that applies broadly to the whole bottom of
the priority space, with no ability (beyond that one priority
threshold) to tune it to work on certain threads, etc...
This adds an (optionally configurable) API that allows timeslicing to
be controlled on a per-thread basis: any thread at any priority can be
set to timeslice, for a configurable per-thread slice time, and at the
end of its slice a callback can be provided that can take action.
This allows the application to implement things like responsiveness
heuristics, "fair" scheduling algorithms, etc... without requiring
that facility in the core kernel.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Zephyr is migrating into hardware where memory ordering is starting to
matter. The existing gcc-based defaults have always been specifying
__ATOMIC_SEQ_CST, which is safe and correct. And all the
arch-specific assembly we have currently are either safe or for
platforms where barriers aren't needed.
Discussion in #42831 made the case that it would be nice if we were to
formally promise this, and require it from future implementations. So
let's do that.
Fixes: #42831
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Add support for configuring pins of the following nRF peripherals:
SPI, SPIM, SPIS, TWI, and TWIM.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
In the Armv8R AArch64 profile[1], the Armv8R AArch64 is always in secure
mode. But the FVP_BaseR_AEMv8R before version 11.16.16 doesn't strictly
follow this rule. It still has some non-secure registers
(e.g. CNTHP_CTL_EL2).
Since version 11.16.16, the FVP_BaseR_AEMv8R has fixed this issue. The
CNTHP_XXX_EL2 registers have been changed to CNTHPS_XXX_EL2. So the
FVP_BaseR_AEMv8R (version >= 11.16.16) cannot boot Zephyr. This patch
will fix it.
[1] https://developer.arm.com/documentation/ddi0600/latest/
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
Change-Id: If986f34dc080ae7a8b226bba589b6fe616a4260b
This commit adds the API for USB Type-C Port Controllers (TCPC) and support
Power Delivery (PD) structures
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
When pac_notify is called it will notify the
actual PAC records for the specific type (sink/source).
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Add macro similar to existing UTIL_LISTIFY but with option
to provide separator which is used between evaluation of each
iteration. Separator is not added after the last iteration.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Adds an official behavior in response to null response from HTTP
endpoint.
Fixes#42988
Signed-off-by: Georges Oates_Larsen <georges.larsen@nordicsemi.no>
Add STM32_FOO_ENABLED and STM32_FOO_FREQ to STM32 fixed clocks:
HSI, HSE, MSI(S), CSI, LSI, LSE..
Replace STM32_LSE_CLOCK by STM32_LSE_FREQ and when possible
replace by new STM32_LSE_ENABLED when making sense.
Fix STM32_PLL3_FOO_ENABLE to STM32_PLL3_FOO_ENABLED
Additionally, add STM32_PLL_FOO_ENABLED definitions.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Tweak some macros definitions so that they can be used in
IS_ENABLED utility macro.
Finality is to rework STM32 clock_control driver to a more
readable format.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Remove conditions around some definitions since these symbols
and the node itself are mandatory.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add macros DT_CLOCKS_HAS_NAME and DT_CLOCKS_HAS_IDX.
These macros allow to check the presence of a specific clock name
or a specific cell at a given index in a clocks property.
Matching _INST_ macro variants are also provided.
Also add DT_NUM_CLOCKS and its _INST_ variant that counts
the number of clocks available for a given node.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following introduction of DT_PROP_HAS_NAME,
update DT_DMAS_HAS_NAME definition to reuse
this helper.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add a DT_PROP_HAS_NAME which helps verifying if a given string
matches an existing value in a prop-names type property.
Also add matching DT_INST_PROP_HAS_NAME
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Rename the data and metadata callbacks to _read(), for consistency
with the corresponding function calls.
Signed-off-by: Asbjørn Sæbø <asbjorn.sabo@nordicsemi.no>
Move the instance as the first parameter of the client function calls
and callbacks, for consistency with the server implementation.
Signed-off-by: Asbjørn Sæbø <asbjorn.sabo@nordicsemi.no>
Merge the metadata types for client and server.
This is part of merging the ots_client and ots header files.
Signed-off-by: Asbjørn Sæbø <asbjorn.sabo@nordicsemi.no>
Move the metadata request bitfields to the common header files.
This is part of merging the ots_client and ots header files.
Signed-off-by: Asbjørn Sæbø <asbjorn.sabo@nordicsemi.no>
Merge Kconfig file for OTS server and client.
Rename the client config from _OTC to _OTS_CLIENT
Signed-off-by: Asbjørn Sæbø <asbjorn.sabo@nordicsemi.no>
Update the Object Transfer Client to use OTS defines and types instead
of the ones left over from the previous "le-audio local" object
transfer service:
DIR_LIST, object ID size, OACP and OLCP
Remove the no longer used defines and types from the OTC header file.
Exception: The OLCP sort order defines have not been removed, but
moved to the olcp internal header file, for expected later use.
Signed-off-by: Asbjørn Sæbø <asbjorn.sabo@nordicsemi.no>
Introduces new kconfig option CONFIG_BT_DEVICE_APPEARANCE_DYNAMIC.
New API `bt_set_apperance` allows dynamic setting of apperance. The
dynamic setting is saved in the settings subsys. `bt_set_apperance` is
analogous to `bt_set_name`.
Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
The this change is a step towards make the GAP appearance runtime
settable and ATT writable.
The new function bt_get_appearance() wraps CONFIG_BT_DEVICE_APPEARANCE
and should replace all its uses in code.
Signed-off-by: Aleksander Wasaznik <aleksander.wasaznik@nordicsemi.no>
Kconfig options now belong to the Kconfig domain, therefore, the
:kconfig:option: role needs to be used.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add a new API to support multipart hash calculation. The API allows
split the data input to be split in small chunks.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Several HW with crypto accelerators have also hash capabilities.
The semantic for hashing is different of ciphers, so this commit
introduce support for hashing within crypto drivers.
The API is following the driver with the operation assigned /
associated with the session.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
The API to set a callback has the namespace cipher but the driver
function pointer was using the namespace crypto. As this API belongs
to the cipher subgroup, just rename the function pointer in the driver
to be consistent.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Capabilities are for the driver, though most of options apply only
for ciphers some of them also apply for hashes.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Just give a better name to this file since now we have changed the
file where crypto driver API is defined.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
This file defines the crypto driver API, cipher is supposed to be just
one type of capability (other can be hash) of these drivers, just
change the file name to be consistent with it.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>