Commit graph

11,885 commits

Author SHA1 Message Date
Tran Van Quy
c91e0db1f7 dts: renesas: Update dts property for ra4-cm4-common
- Remove redundant node adc1 on ra4-cm4-common due to unsupported
- Update interrupt number for spi1

Signed-off-by: Tran Van Quy <quy.tran.pz@renesas.com>
2025-02-03 14:01:59 +01:00
Krzysztof Chruściński
e737895368 dts: bindings: serial: nordic,nrf-uart-common: Extend baudrate enum
Add faster baudrates (2M, 4M and 8M).

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-02-03 11:17:31 +01:00
Christian Galante
9f563b4685 dts: arm: silabs: instantiate acmp nodes for xg2x parts
Defines an acmp node for xg21, xg23, xg24, xg27 and xg29
parts, which are all compatible with the silabs,acmp
binding.

Signed-off-by: Christian Galante <christian.galante@silabs.com>
2025-02-03 11:16:57 +01:00
Christian Galante
dc4929c9c3 dts: bindings: comparator: define silabs,acmp bindings
Defines bindings that are compatible with silabs acmp.
`input-positive` and `input-negative` are required
properties to be configured by an application.
It is recommended to use the bindings generated in
`include/zephyr/dt-bindings/comparator/silabs_acmp.h`
and reference your part's design book when configuring
values for these properties.

Signed-off-by: Christian Galante <christian.galante@silabs.com>
2025-02-03 11:16:57 +01:00
Holger Adams
e4b04b41c0 dts: arm: st: u0: usb_fs_phy was erroneously placed under soc
Fixes warning:

Warning (simple_busi_reg): /soc/usbphy: missing or empty reg/ranges
property

Fixes #84880

Signed-off-by: Holger Adams <mail@dm5tt.de>
2025-02-01 00:26:22 +01:00
Sven Ginka
0c6a367d36 dts: sy1xx: add trng support
With this commit we add the trng functionality to
the sensry soc sy1xx.

Signed-off-by: Sven Ginka <s.ginka@sensry.de>
2025-01-31 19:50:43 +01:00
Sven Ginka
8d07f6b4d6 drivers: entropy: sy1xx add support for trng
Add entropy support for the sensry soc sy1xx, based
on trng.

Signed-off-by: Sven Ginka <s.ginka@sensry.de>
2025-01-31 19:50:43 +01:00
Titouan Christophe
c525e7a0a5 usb: device_next: add new MIDI 2.0 device class
This adds a new USB device class (based on usb/device_next) that implements
revision 2.0 of the MIDIStreaming interface, a sub-class of the USB audio
device class. In practice, the MIDI interface is much more simple and has
little in common with Audio, so it makes sense to have it as a separate
class driver.

MIDI inputs and outputs are configured through the device tree, under a
node `compatible = "zephyr,usb-midi"`. As per the USB-MIDI2.0 spec,
a single usb-midi interface can convey up to 16 Universal MIDI groups,
comprising 16 channels each. Data is carried from/to the host via
so-called Group Terminals, that are organized in Group Terminal Blocks.
They are represented as children of the usb-midi interface in the device
tree.

From the Zephyr application programmer perspective, MIDI data is exchanged
with the host through the device associated with the `zephyr,usb-midi`
interface, using the following API:

* Send a Universal MIDI Packet to the host: `usb_midi_send(device, pkt)`
* Universal MIDI Packets from the host are delivered to the function passed
  in `usb_midi_set_ops(device, &{.rx_packet_cb = handler})`

Compliant USB-MIDI 2.0 devices are required to expose a USB-MIDI1.0
interface as alt setting 0, and the 2.0 interface on alt setting 1.
To avoid the extra complexity of generating backward compatible USB
descriptors and translating Universal MIDI Packets from/to the old
USB-MIDI1.0 format, this driver generates an empty MIDI1.0 interface
(without any input/output); and therefore will only be able to exchange
MIDI data when the host has explicitely enabled MIDI2.0 (alt setting 1).

This implementation is based on the following documents, which are referred
to in the inline comments:

* `midi20`:
    Universal Serial Bus Device Class Definition for MIDI Devices
    Release 2.0
    https://www.usb.org/sites/default/files/USB%20MIDI%20v2_0.pdf
* `ump112`:
    Universal MIDI Packet (UMP) Format and MIDI 2.0 Protocol
      With MIDI 1.0 Protocol in UMP Format
    Document Version 1.1.2
    https://midi.org/universal-midi-packet-ump-and-midi-2-0-protocol-specification

Signed-off-by: Titouan Christophe <moiandme@gmail.com>
2025-01-31 19:50:26 +01:00
Marek Matej
b40419f6e8 dts: common: espressif: update partition tables
Updated list of partition tables generated using the following schemes:

- 'default' for most single core applications,
- 'amp' for the multi core applications using AMP.

The allocation rate for PROCPU and APPCPU usage is 3:1.
Added partitions for low-power (LP) cores to allow updates.

Signed-off-by: Marek Matej <marek.matej@espressif.com>
2025-01-31 09:39:38 +01:00
Terry Geng
49308e45d2 drivers: adc: ads1x4s0x: Add ADS124S0X support into existing drivers
Refactor code for ADS114S08 (12 ch, 16 bit) to accommodate ADS114S06
(6 ch, 16 bit), ADS124S06 (6 ch, 24 bit), and ADS124S08 (12 ch, 24 bit).

Signed-off-by: Terry Geng <terry@terriex.com>
2025-01-31 09:39:07 +01:00
Terry Geng
cbcb2d8f12 drivers: adc: ads1x4s0x: Rename files, preparing for adding new devices
Renamed ads114s0x/8 to ads1x4s0x.

Signed-off-by: Terry Geng <terry@terriex.com>
2025-01-31 09:39:07 +01:00
Terry Geng
43079c8086 drivers: adc: ads114s0x: Rename variables, preparing for adding new devices
Renamed ads114s0x/8 to ads1x4s0x.

Signed-off-by: Terry Geng <terry@terriex.com>
2025-01-31 09:39:07 +01:00
Martí Bolívar
de9db18e78 dts: bindings: improve base.yaml descriptions
This file defines some of the most important properties in the
devicetree, including core concepts like 'compatible', 'reg', and
'interrupts'. For some reason, we've never prioritized writing up
proper descriptions that indicate their importance or show where the
user can get more information about them in the specs or elsewhere.

Give this file a once-over to improve the situation.

Signed-off-by: Martí Bolívar <mbolivar@amperecomputing.com>
Signed-off-by: Martí Bolívar <marti.bolivar@oss.qualcomm.com>
2025-01-30 22:59:03 +01:00
Yasin Ustuner
65997dce76 dts: bindings: adc: Add AD7124 binding
This commit adds ad7124 binding.

Signed-off-by: Yasin Ustuner <Yasin.Ustuner@analog.com>
2025-01-30 20:33:10 +01:00
Declan Snyder
9966d29957 dts: nxp,lpspi: Fifo property and fix delay desc
Add properties for describing RX and TX fifo sizes.

Also reformat some descriptions and fix the description of the
transfer-delay property which was incorrect. Since zephyr spi bufs are
not continuous, every possible Zephyr LPSPI driver must use
continuous transfer mode, for which the meaning of this delay has
nothing to do with the chip select.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-01-30 20:26:36 +01:00
Benjamin Cabé
0e4a5ac6cb drivers: audio: dmic: remove compatible from nxp,dmic child binding
There is no such thing as associating a compatible to a child binding
so remove this from the nxp,dmic binding definition and devicetree files
that incorrectly set one.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-01-30 20:26:19 +01:00
Aksel Skauge Mellbye
120691a155 drivers: pinctrl: silabs: Add support for analog bus allocation
The GPIO peripheral on Silabs Series 2 devices is responsible for
allocating analog buses to analog peripherals. Enable support for
this in the pinctrl driver. Since these bus allocations are not
digital pins, introduce a new property silabs,analog-bus for this
purpose.

Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
2025-01-30 18:30:01 +01:00
Mahesh Mahadevan
85bdab00de soc: mimxrt1180: Add USB support
This was tested on the MIMXRT1180 EVK board

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2025-01-30 18:29:33 +01:00
Lucien Zhao
819a17f3d4 boards: nxp: mimxrt700_evk: enable mrt0 channel0 for cm33_cpu0
enable mrt0 channel0 for cm33_cpu0
test counter_basic_api case passed on cm33_cpu0

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-01-30 09:27:05 +01:00
Lucien Zhao
69bb26494a dts: arm: nxp: add mrt0 instance for cm33_cpu0
add mrt0 instance for cm33_cpu0

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-01-30 09:27:05 +01:00
Raffael Rostagno
c77daa8d64 soc: adc: esp32c2: Add support
Add ADC support to ESP32-C2 and ESP8684.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2025-01-29 20:34:20 +01:00
Raffael Rostagno
3423a6b3ba soc: adc: esp32c6: Add support
Add ADC support to ESP32-C6.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2025-01-29 20:34:08 +01:00
Quy Tran
a9c0fcafa1 dts: renesas: ra: Fix interrupt numbers bug for ra4w1
- Update the overlapping irq number between port_irq4 and spi1
- Remove irq number for sci9 as it exceeds the limit (32 irq numbers)
Now users will define the irq numbers themselves

Signed-off-by: Quy Tran <quy.tran.pz@renesas.com>
2025-01-29 17:55:13 +01:00
Jilay Pandya
333f25d2aa dts: bindings: hwspinlock: replace underscore with hyphen
replace underscore with hyphen as per device tree specification

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2025-01-29 15:17:55 +01:00
Karol Lasończyk
057de458e2 drivers: adc: Add support for gain 2/7 in nRF devices
Extend current adc gains with new entry 2/7.

Signed-off-by: Karol Lasończyk <karol.lasonczyk@nordicsemi.no>
2025-01-29 15:13:19 +01:00
Sergei Ovchinnikov
2d343589bb drivers: regulator: npm1300: workaround for LDO HW bug
There is a HW bug in nPM1300 LDO which causes the LDO output voltage to
reach its target very slowly in specific cases. This is worked around by
performing an additional i2c read shortly after an LDO is enabled.

Signed-off-by: Sergei Ovchinnikov <sergei.ovchinnikov@nordicsemi.no>
2025-01-29 15:12:40 +01:00
Alexandre Rey
903a3aa6d9 dts: nxp: Add usbfs0 configuration
USBFS0 configuration is missing in Devicetree for NXP MCX N94x.
Add the configuration to dtsi file.

Signed-off-by: Alexandre Rey <alx.rey@icloud.com>
2025-01-29 11:03:18 +01:00
Yasin Ustuner
efe94a9a29 dts: arm: adi: Fix MAX32XXX RTC addresses
This commit fixes RTC addresses of MAX32662,
MAX32670, MAX32672 and MAX32675 boards.

Signed-off-by: Yasin Ustuner <Yasin.Ustuner@analog.com>
2025-01-29 09:29:04 +01:00
Marcin Lyda
5100850767 drivers: rtc: Add Texas Instruments BQ32002 RTC driver
This PR adds support for BQ32002 RTC chip.

Supported functionalities:

* Time setting/reading
* Alarm setting/reading
* Calibration setting/reading
* IRQ frequency configuration

Tested on nRF52833-DK board.

Signed-off-by: Marcin Lyda <elektromarcin@gmail.com>
2025-01-29 07:08:28 +01:00
Holger Adams
0e9a1c2d26 dts: arm: st: u0: add missing USART4 to .dtsi
Sources of information:
- address: "RM0503 Reference Manual", p. 60
- interrupts: "RM0503 Reference Manual", p. 260

Fixes: #84459

Signed-off-by: Holger Adams <mail@dm5tt.de>
2025-01-28 23:42:28 +01:00
Neil Chen
3aa71a0c40 dts: arm/nxp: Add lpspi nodes to NXP MCXA156 dtsi file
Add lpspi nodes to NXP MCXA156 dtsi file

Signed-off-by: Neil Chen <cheng.chen_1@nxp.com>
2025-01-28 23:41:08 +01:00
Declan Snyder
b54ed8026b dts: nxp,mcux-i2s: Fix pinmux names after change
After a recent change for the imx gpr binding, the i2s driver was
changed to reflect the new names of the cells, but apparently also the
sai node can refer to itself with a phandle and need cells names to
match also.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-01-28 18:16:57 +01:00
Guillaume Gautier
661d20ce0e dts: arm: st: n6: add all u(s)art instances
Add U(S)ART2 to 10 to the device tree.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-01-28 18:14:45 +01:00
Guillaume Gautier
fb59aeebc9 dts: arm: st: n6: add dtsi for stm32n6 series
Add dtsi files for STM32N6 series

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-01-28 18:14:45 +01:00
Guillaume Gautier
bcad9cb891 dts: bindings: clock: add stm32n6 rcc clocks
Add STM32N6 RCC clock bindings

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-01-28 18:14:45 +01:00
Dario Binacchi
2c3294b079 dts: arm: st: re-enable master can gating clock for can2
Commit 57723cf405 ("dts: arm: st: Refactor DTSI files to use macro"),
which replaced raw hex codes by using STM32_CLOCK macro, causes
regression in the case of the CAN device where the previous raw value
contained more than one bit set to 1. The macro is in fact correct only
for values with a single bit set. In all other cases, raw values must
continue to be used.

Tested on STM32F429I-DISC1 board

Fixes: 57723cf405
Co-authored-by: Michael Trimarchi <michael@amarulasolutions.com>
Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
2025-01-28 14:30:36 +01:00
Matthias Alleman
d0e98b2425 drivers: input: cy8cmbr3xxx: add support for cy8cmbr3xxx input driver
Support for the cy8cmbr3xxx input driver is added.

Signed-off-by: Matthias Alleman <matthias.alleman@basalte.be>
2025-01-28 14:13:08 +01:00
Lucien Zhao
bce1b59a5f dts: arm: nxp: correct lpi2c base address
correct lpi2c base address for RT700
Add lpi2c15 instance to RT700 cm33 cpu1

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-01-28 09:47:32 +01:00
Khoa Nguyen
305ae84457 dts: arm: renesas: ra: Add support for Renesas RA4E1 soc
Add support for r7fa4e10d2cfm, r7fa4e10d2cne soc

Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-01-28 07:57:03 +01:00
Marcin Lyda
87a15967bb drivers: rtc: Add DS1307 SQW output config property
This PR adds a devicetree property enabling to
configure DS1307 SQW pin output frequency.

Signed-off-by: Marcin Lyda <elektromarcin@gmail.com>
2025-01-27 21:04:36 +01:00
Lucien Zhao
2400287260 dts: arm: nxp: add edma instances and correct spi node name
add edma0/1 instances
correct spi node name from lpspi to spi

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-01-27 21:03:26 +01:00
Maximilian Werner
73e8fa25d5 dts: arm: nxp: mcxc141: Fix sram base address
The current nxp_mcxc141.dtsi sets the SRAMs base address
to 0x1FFF_F000. This leads to the mcxc141 faulting during
initialization when the first write to SRAM occurs:

z_prep_c -> z_bss_zero -> z_early_memset -> memset

The correct base address is 0x1FFF_F800. This information
is not obvious in the "MCX C24X Sub-Family Reference Manual,
Rev. 1, 07/2024". The address was taken from an MCUXpresso
IDE sample project.

Link: https://www.nxp.com/webapp/Download?colCode=MCXC24XP64M48RM

Signed-off-by: Maximilian Werner <maximilian.werner96@gmail.com>
2025-01-27 17:09:52 +01:00
Raffael Rostagno
472bee3f6f soc: esp32c3: adc: Remove support for ADC2
ADC2 is no longer supported on ESP32C3 due to HW limitations.
Check silicon errata on Espressif website for more details.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2025-01-27 17:08:30 +01:00
Raffael Rostagno
5ee8600a59 drivers: adc: esp32: Clock init
Peripheral clock init.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2025-01-27 17:08:30 +01:00
Krzysztof Chruściński
43f442be46 dts: common: nordic: nrf54l: Add clocks to cpu
Add clocks property to CPUs. nRF54Lx series is using hfpll as clock
source for CPU (and fast peripherals). CPU clock frequency can be
derived from frequency of the source clock so clock-frequency property
is removed from cpu as it is redundant.

nrfx/MDK expects that NRF_CONFIG_CPU_FREQ_MHZ define is set to correct
CPU frequency. Modified nrfx CMakeLists.txt to use clock frequency of
hfpll instead of CPU clock-frequency property.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-01-27 17:08:01 +01:00
Declan Snyder
31a2b4f374 drivers: spi_nxp_lpspi: Add tristate output config
Add DT property to configure the LPSPI instance to use tristated output
instead of retained output when PCS is negated.

Turn on the config on a couple boards for test coverage.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-01-27 08:55:13 +01:00
Ruijia Wang
b1395eabce drivers: rtwdog: add NXP rtwdog driver
Port NXP rtwdog driver to Zephyr.

Signed-off-by: Ruijia Wang <ruijia.wang@nxp.com>
2025-01-25 20:07:05 +01:00
Benjamin Cabé
7b1031a233 drivers: dac: rename max22017 dac binding file to max22017-dac.yaml
Avoid clashing with the existing max22017.yaml binding file used for the
MFD.

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-01-25 20:06:19 +01:00
Nikola Petrovic
f48d6ff762 docs: Adapt ICM42688 example to new dt option names.
Example for creating ICM42688 dt node uses old dt option names.
Fix by changing to newest dt option names.

Signed-off-by: Nikola Petrovic <nikolaptr6@gmail.com>
2025-01-25 01:40:58 +01:00
Declan Snyder
e1f578325d dts: i2s_mcux_sai: Clarify IOMUXC GPR binding
Improve the documentation of the IOMUXC GPR binding so that it is
clear what the cells in the specifier space of "pinmux" space mean. And
change the names of the cells to be more appropriate. "offset" instead
of "pin" and "mask" instead of "function" describes more precisely what
the cells in the specifier mean.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-01-24 22:09:15 +01:00