Commit graph

8801 commits

Author SHA1 Message Date
Keith Short
443986159e dts: vendor-prefixes: Add diodes prefix
Needed for the diodes,pi3usb9201 binding.

Signed-off-by: Keith Short <keithshort@google.com>
2023-03-30 17:34:36 -04:00
Francois Ramu
70f9acd926 dts: arm: stm32l1 fix Timers 11 node definition
In the stm32l1 family, the Timers11 node has a register
at 0x40011000.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-03-30 14:04:45 +00:00
Anisetti Avinash Krishna
acef57e350 dts: x86: intel: raptor_lake: Added UART instances
Added UART instances and changes to enabled
support for PCIe UART instances.

Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2023-03-30 09:43:29 -04:00
Anisetti Avinash Krishna
26133e995d drivers: serial: ns16550: Enable simultaneous support of IO, MMIO and PCIe
Enabled simultaneous support by adding a DTS variable named “io-mapped”.
There are 3 possibilities through instance in dtsi file.
Under PCIe, PCIe ns16550.
Under soc and has a variable io-mapped, legacy(IO mapped).
Under soc and don’t have a variable io-mapped, MMIO mapped.
Simultaneous access can be enabled by a Kconfig.
For PCIe instances UART initialization should be done post-kernel as it
depends on PCIe initialization.

Co-authored-by: Najumon BA <najumon.ba@intel.com>
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
2023-03-30 09:43:29 -04:00
Francois Ramu
155d6a35b9 dts: arm: stm32H7 have pll1_q for sdmmc clock source by default
The sdmmc clock source is either pll1_q or pll2_r according to the
refMan of the stm32h7 devices. HSI48 is not a vaild clock source.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-03-30 10:38:52 +00:00
Christian Spinnler
c94ed0306a dts: arm: st: adding address-cell to exti to fix warning
Fixes warnings produced by dtc 1.6 due to missing address-cell
in all arm st exti definition.

Signed-off-by: Christian Spinnler <christian.spinnler@fau.de>
2023-03-30 10:22:28 +00:00
Jordan Yates
db3d51bb7d pm: device_runtime: add zephyr,pm-device-runtime-auto
Add the `zephyr,pm-device-runtime-auto` flag to `pm.yaml` and
`struct pm_device`.

This flag is intended to signify to the boot system that device runtime
PM should be automatically enabled on the device after the init function
has run.

Only run `pm_device_runtime_auto_enable` function on a device if
initialisation succeeded. This prevents actions being run on devices
that are not ready.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
2023-03-29 12:21:13 -04:00
Adrian Warecki
c558fd5323 dts: adsp: ace: Changed used watchdog device
Changed the watchdog driver used by the ACE platform from
snps,designware-watchdog to intel,adsp-watchdog.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2023-03-29 09:45:49 -04:00
Adrian Warecki
ea405eb49e drivers: wdt: Add wdt_intel_adsp driver
Added a new watchdog driver which can handle a multiple wdt_dw instances
and can control the pause signal.

The mlt platform has three designware watchdogs, one for each core.
I decided to create a separate intel watchdog driver for the following
reasons:

1. All three devices share the same interrupt number. Each watchdog reports
an interrupt to the core to which it has been assigned. The same interrupt
number cannot be used by multiple devices in the device tree. So, it would
be assigned to only one device. The other dw watchdog devices would use
this assignment, even though it would not be described for them in the dt.
The interrupt handler function in dw watchdog checks the interrupt flag.
If the interrupt was connected to the first watchdog, and the second or
third watchdog signal an interrupt, the interrupt handler of the first
device would ignore it because it would not have set the interrupt flag.
The watchdog device don't knows anything about the existence of the others
devices.

2. The designware watchdog only supports a hardware pause signal. It cannot
be paused programmatically. On the mtl platform, there is a separate group
of control registers for all per-core watchdogs. There are GPIO-like
registers that allows control of a hardware pause signal for subordinate
watchdogs. This separate block is shared by all three watchdogs.

3. The base addresses of the subordinate watchdogs are read from the
aforementioned control registers. As a result, in the device tree we have
only one base address for the intel watchdog, which points to the pause
control registers and containing the base addresses of the subordinate
devices.

Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
2023-03-29 09:45:49 -04:00
Francois Ramu
429be3608c dts: arm: stm32h5 serie adds nodes for rng and watchdogs
Adds the nodes for the window and independent watchdog peripherals
plus the rng to the stm32h5 serie

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-03-29 10:04:39 +02:00
Fabio Baltieri
a9735abf84 kscan: input: add input to kscan adapter
Add a driver that listens for input events and reports them on a kscan
API. This allows porting kscan drivers to the input APIs while
maintaining compatibility with the existing kscan based applications.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-03-28 20:57:53 -04:00
Patryk Duda
417368e63d drivers: flash: Add support for defining custom RDP1 byte value
This patch makes possible to choose custom byte which should be used
to enable non-permanent readout protection (RDP1). Actually, any byte
except 0xAA and 0xCC (which are used by RDP0 and RDP2 respectively)
can be used to enable RDP1 but in multi-image environment, some other
image could check if RDP1 is enabled by comparing it to some hardcoded
value.

If property is not defined, 0x55 will be used to enable RDP1. The
default value comes from STM32 HAL.

Signed-off-by: Patryk Duda <pdk@semihalf.com>
2023-03-28 15:43:16 +00:00
Marc Desvaux
4ed905f19b dts: bindings: Update DMA bindings with DMA config macros
Update DMA bindings with DMA config macros
only for st,stm32-dma-v2.yaml and st,stm32-dma-v2bis.yaml

Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com>
2023-03-28 15:08:06 +02:00
Francois Ramu
ea7bf8bab1 dts: bindings: interrupt controller for the new stm32h5 serie
Adds the new stm32h5 serie to the list of st,stm32g0-exti
compatible : now the matching targets is C0/G0/H5/U5/L5/MP1.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-03-28 15:07:51 +02:00
Francois Ramu
4555eb94c8 dts: arm: stm32h5 devices
Creates the device tree for the new stm32h5 serie:
from stm32h5 and other derivative mcus.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2023-03-28 15:07:51 +02:00
Jeppe Odgaard
40ec70fd2a drivers: sensor: mcux qdec single-phase option
Add binding and sensor attribute to allow single phase
mode where only one signal is required from the encoder.
The signal must be connected to Phase A input.

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2023-03-27 22:13:56 +00:00
Alexander Mihajlovic
9d50b143ae dts: bindings: Add Pmod connector GPIO nexus
Add a GPIO nexus binding for Pmod interface connectors.
This commit also includes a header file with macros
that map signal names in the Pmod specification to
the corresponding indices in the GPIO nexus, meant for
use in devicetree files.

Signed-off-by: Alexander Mihajlovic <alexander@eub.se>
2023-03-27 09:51:08 +02:00
Fabian Blatz
6180f96799 serial: Add driver for emulated UART
The emulated UART controller will aid in automated
integration testing.

Signed-off-by: Fabian Blatz <fabianblatz@gmail.com>
2023-03-27 09:50:44 +02:00
Fabio Baltieri
5b36b4fa16 input: add a longpress device
Add an input device to take input key events as an input and generates
short press or long press devices as output.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-03-24 13:48:28 +00:00
Fabio Baltieri
12b863067c bindings: test: add a test input device binding
Add a vnd,input-device binding to be used for testing.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
2023-03-24 13:48:28 +00:00
Gerard Marull-Paretas
92d6df6620 dts: arm: nordic: introduce easydma-maxcnt-bits
The number of available EasyDMA MAXCNT bits is now defined per-instance
in Devicetree.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-03-24 10:31:32 +01:00
Jay Vasanth
b0ce525b90 drivers: espi: Microchip MEC172x eSPI VW initialization update
Change device tree VW routing to a form allowing overrides.
Add two new DT optional properties for specifying the reset
source and reset value of each virtual wire. Only virtual
wires that are enabled using the status property are modified.
NOTE: eSPI virtual wires are controlled in groups of 4 by
hardware. The optional reset signal source properties applies
to all four virtual wires in the group. If this field is
changed from the hardware default, it should be changed for
only one virtual wire in the group. If the property exists
in more than one wire in the group it must be set to the
same value.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2023-03-23 11:58:26 -04:00
Jay Vasanth
f6619a8688 drivers: espi: Update Microchip MEC172x eSPI virtual wires to use DT
Modify Mircrochip MEC172x eSPI driver to get eSPI virtual wire
hardware routing from device tree.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2023-03-23 11:58:26 -04:00
Manimaran A
c42a155988 driver: clock control: Microchip XEC fix missing domain parameter
The clock control driver requires three pieces of information:
PCR register index, bit position, and clock domain. Clock domain
was missing from DT information and MCHP macros.

Signed-off-by: Manimaran A <manimaran.a@microchip.com>
2023-03-23 11:55:19 -04:00
Manimaran A
c3b2dbd1fb driver: adc: microchip: Keep single adc driver for MEC devices
Deleted adc_mchp_xec.c and microchip,xec-adc.yaml file.
DTSI, yaml, CMakeLists.txt and Kconfig.xec files are
updated for compatible.

Signed-off-by: Manimaran A <manimaran.a@microchip.com>
2023-03-23 11:43:30 -04:00
Manimaran A
51b1c5b9d6 driver: adc: microchip: Merged MEC172x and MEC15xx version drivers.
Updated the "adc_mchp_xec_v2.c" adc driver to support both MEC172x and
MEC15xx SOC.
ADC smapling clock configuration updated using DTS.

Signed-off-by: Manimaran A <manimaran.a@microchip.com>
2023-03-23 11:43:30 -04:00
Jaska Uimonen
95168e6776 soc: intel_adsp: cavs: start using zephyr power management
Start using zephyr power management in cavs platform in a similar way
that is already done in ace. This commit only addresses the power off/on
sequence. Runtime power management is not implemented.

Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
2023-03-23 07:57:14 -04:00
Pieter De Gendt
33f7c2e786 dts: arm: atmel: Add ADC support to Atmel SAM4S
Add ADC device tree entry for the Atmel SAM4S SoC.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2023-03-23 09:41:00 +01:00
Pieter De Gendt
0b45710219 drivers: adc: adc_sam: Introduce Atmel SAM ADC driver
This commit adds support for Atmel SAM ADC driver with up to
16 channels.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2023-03-23 09:41:00 +01:00
Lucas Tamborrino
7486fe7a83 dts: esp32s3: add TRNG support
Add True Random Number Generator support on esp32s3

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2023-03-23 09:40:50 +01:00
Andy Sinclair
a00713bc45 drivers: regulator: Added initial voltage configuration
The regulator driver has a configured min/max range that is used
to limit set values, and to initialise the regulator.

A new init value has been added, so that the startup voltage can
be higher than the lowest permitted value.

Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
2023-03-22 21:19:51 +01:00
Alvaro Garcia
2380710020 drivers: Added fuel gauge max17048
Added support for fuel gauge max17048

Signed-off-by: Alvaro Garcia <maxpowel@gmail.com>
2023-03-22 14:51:33 -04:00
Nazar Palamar
f91e35d447 driver: bluetooth: Added Infineon cyw43xxx BT driver
Added initial version of Infineon cyw43xxx BT (
H4 HCI extension drivers/bluetooth/hci/CMakeLists.txt)

Add initial version of binding file for Infineon CYW43xx BT
HCI extension driver.

Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2023-03-22 16:40:55 +01:00
Dean Sellers
8eddd48615 drivers: uart: esp32: Add RS485 half duplex hardware mode
Support for the hardware mode where pin configured as DTR
is asserterted when UART transmits.

Signed-off-by: Dean Sellers <dsellers@evos.com.au>
2023-03-22 13:52:25 +01:00
Andrei Emeltchenko
a42ab2729f smbus: Convert to use runtime BDF lookup
Convert PCH SMBus driver, tests and samples to use new dynamic BDF
lookup.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2023-03-22 08:16:23 -04:00
Andrei Emeltchenko
f2b6fb9cd2 board: elkhart_lake: Add smbus to the board's DTS
Add PCH SMBus to Elkhart Lake device tree.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2023-03-22 08:16:23 -04:00
Andrei Emeltchenko
fe9dfcfcd1 board: raptor_lake: Add smbus to the board's DTS
Add PCH SMBus driver to Raptor Lake device tree.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2023-03-22 08:16:23 -04:00
Andrei Emeltchenko
cb2a10c254 smbus: dts: Add Intel PCH SMBus driver bindings
Add bindings for Intel PCH SMBus driver.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2023-03-22 08:16:23 -04:00
Andrei Emeltchenko
0633b8c75c smbus: dts: Add bindings for SMBus peripherals
Add bindings for SMBus peripheral devices on a bus.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2023-03-22 08:16:23 -04:00
Andrei Emeltchenko
70f1e83c21 smbus: dts: Add bindings for SMBus controllers
Adds bindings for SMBus controllers.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2023-03-22 08:16:23 -04:00
Johan Hedberg
2fe4a4a218 drivers: watchdog: Add Intel TCO Watchdog driver
This adds a basic Intel TCO watchdog driver. The driver doesn't support
windowed timeouts (a non-zero window.min value) or callbacks. The driver
currently assumes TCO version 6, which can be found e.g. on Elkhart Lake
and Raptor Lake platforms. The driver also expects the TCOBA base
address to be specified through DTS, rather than doing runtime lookup
(using e.g. ACPI or PCIe).

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2023-03-22 11:38:59 +01:00
Raul Pando
a7c011b0be Drivers: I2S: STM32: Mishandling of Master Clock output (MCK)
Remedial rework to handle the enabling of the I2S master clock
output based on the presence of an introduced DT property.
For details see issue/54841.

Signed-off-by: Raul Pando <raul.pando@bytegrity.co.uk>
2023-03-22 10:06:11 +01:00
TOKITA Hiroshi
08606eac44 drivers: dma: rpi_pico: add support for RaspberryPi Pico DMA
Adding RaspberryPi Pico DMA driver.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2023-03-22 09:33:52 +01:00
Gerson Fernando Budke
1dce3c3ee2 drivers: eefc: sam: Update to use clock control
This update Atmel SAM eefc devicetree to use clock control information.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2023-03-21 14:12:25 -07:00
Gerson Fernando Budke
2a24bb263a drivers: wdt: sam: Update to use clock control
This update Atmel SAM wdt devicetree to use clock control information.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2023-03-21 14:12:25 -07:00
Gerson Fernando Budke
6951160dd2 drivers: afec: sam: Enable sam4e SoCs
Add support to Atmel SAM SAM4E AFEC feature.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2023-03-21 14:12:25 -07:00
Gerson Fernando Budke
6634d6b4ff drivers: afec: sam: Update to use clock control
This update Atmel SAM afec driver to use clock control driver.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2023-03-21 14:12:25 -07:00
Gerson Fernando Budke
dc45d7a922 drivers: sensors: qdec_sam: Update to use clock control
This update Atmel SAM QDEC driver to use clock control driver.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2023-03-21 14:12:25 -07:00
Gerson Fernando Budke
f1b68beca1 drivers: ssc: sam: Update to use clock control
This update Atmel SAM ssc driver to use clock control driver.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2023-03-21 14:12:25 -07:00
Gerson Fernando Budke
9f0255131a drivers: pwm: sam: Enable sam3x and sam4e SoCs
Add support to Atmel SAM SAM3X and SAM4E PWM feature.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2023-03-21 14:12:25 -07:00