Commit graph

8801 commits

Author SHA1 Message Date
Lucas Tamborrino
c530eca285 dts: esp32s3: Add timers support
Add timer support for esp32s3

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2023-03-14 10:50:37 +01:00
Marc Desvaux
08720b0d2a dts: arm: st: nodes moved from <boards>.dts to <soc>.dtsi
stm32l5x/u5x/g4x/l4x/g0x/wlx/wbx power-states node moved
from <boards>.dts to <soc>.dtsi

Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com>
2023-03-14 10:50:09 +01:00
Lucas Tamborrino
fa358f9757 dts: esp32s3: Add SPI support
Add SPI support for esp32s3

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2023-03-13 14:02:06 +01:00
Lucas Tamborrino
1adec07f01 drivers: spi: esp32xx: refactor SPI DMA preprocessor identifiers
Change the preprocessor identifier from CONFIG_SOC_ESP32C3 to
SOC_GDMA_SUPPORTED so it can include ESP32S3 in GDMA routines.

Remove hardcoded values from hal calls to use dma_host instead.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2023-03-13 14:02:06 +01:00
Gerard Marull-Paretas
65512e9445 boards: arm: nrf5340_audio_dk_nrf5340: add bindings for audio codec
The board embeds an audio codec IC, Cirrus CS42L73. While there is no
in-tree driver for it, we need a binding to describe how it is wired in
the board, e.g. for IRQ/RESET lines.

Following Linux binding for the same IC, create one in
dts/bindings/sound. Note that Linux binding is less complete/outdated.

Ref. https://statics.cirrus.com/pubs/proDatasheet/CS47L63_DS1249F2.pdf

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2023-03-13 11:45:53 +01:00
Iuliana Prodan
9d5c21d580 dts: xtensa: nxp: remove unused include
Remove unused include file from dtsi.

Signed-off-by: Iuliana Prodan <iuliana.prodan@nxp.com>
2023-03-11 08:44:07 +02:00
Siyuan Cheng
f9d155b7d5 dts: boards :emsdp: add SPI support
There is a spi-flash fl256s on emsdp board, which can be
contolled by DesignWare SPI driver. Now add DW SPI and
SPI-FLASH support for emsdp board.

Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
2023-03-10 11:39:24 +01:00
Guillaume Gautier
be0f9684f7 dts: arm: st: f0: add stm32f042 dtsi
Add a dtsi for STM32F042 for the support of Nucleo F042K6

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-03-07 15:49:30 +01:00
Guillaume Gautier
1f43512891 dts: arm: st: f0: add supplementary usart for stm32f0
Add some more USART for F070xB, F071 and F091.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-03-07 15:49:30 +01:00
Guillaume Gautier
d7cca49e1e dts: arm: st: f0: add can1 to stm32f091
Add CAN1 to STM32F091 dtsi.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-03-07 15:49:30 +01:00
Guillaume Gautier
16997099d6 dts: arm: st: f0: add usb to stm32f072
Add USB to STM32F072 dtsi.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-03-07 15:49:30 +01:00
Guillaume Gautier
4d8399a1f6 dts: arm: st: f0: refactor stm32f0 dac1 driver
Remove DAC1 from F072 and F091 since it alfready defined in F051.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-03-07 15:49:30 +01:00
Guillaume Gautier
ac0a54f6c2 dts: arm: st: f0: refactor stm32f0 gpioe driver
Add GPIOE to F071, and remove it from F072 and F091.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-03-07 15:49:30 +01:00
Guillaume Gautier
48fbfc606c dts: arm: st: f0: refactor stm32f0 hsi48 driver
Add HSI48 to F071, and remove it from F072 and F091.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-03-07 15:49:30 +01:00
Guillaume Gautier
64e5691778 dts: arm: st: f0: remove duplicate of rtc backup registers
RTC backup registers are already defined in F031, so no need to include
them again.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-03-07 15:49:30 +01:00
Guillaume Gautier
8cf01914cc dts: arm: st: f0: refactor stm32f0 spi2 driver
Remove SPI2 from F070 (not present on F070x6) and add it to F070xB.
Add it to F051 and remove it from F091 (since it is already defined).

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-03-07 15:49:30 +01:00
Guillaume Gautier
ad6bd5c4c1 dts: arm: st: f0: refactor stm32f0 flash erase-block-size
Flash erase-block-size is 2048 for F030xC, F070xB, and F071 and higher.
For all others, it is 1024, default value in base dtsi.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-03-07 15:49:30 +01:00
Guillaume Gautier
730d788297 dts: arm: st: f0: refactor stm32f0 temperature driver
Remove calibrated temperature measure from base dtsi since it does not
exist for STM32F0x0, and add it only for the other STM32F0.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-03-07 15:49:30 +01:00
Guillaume Gautier
78c03b914a dts: arm: st: f0: refactor stm32f0 dma1 interrupt channels
Fix DMA1 interrupt channels. There are 7 for STM32F071 and higher, and 5
for all others, default value for the series.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-03-07 15:49:30 +01:00
Guillaume Gautier
6c3068132a dts: arm: st: f0: refactor stm32f0 timer drivers
Remove TIM6, 7 & 15 from base dtsi, and add TIM6 & 15 to F030x8, TIM7 for
F030xC, TIM15 for F070, TIM6 & 7 for F070xC, TIM6 & 15 to F051, and TIM7
for F071.
Remove TIM2 from F072 and F091 dtsi since it is already included in F031.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-03-07 15:49:30 +01:00
Guillaume Gautier
b3a08d4177 dts: arm: st: f0: refactor stm32f0 i2c2 driver
Remove I2C2 from base dtsi, and add it to F030x8, F070xB & F051

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-03-07 15:49:30 +01:00
Guillaume Gautier
03aad04c06 dts: arm: st: f0: refactor stm32f0 usart2 driver
Remove USART2 from base dtsi, and add it to F030x8, F070 & F051

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-03-07 15:49:30 +01:00
Guillaume Gautier
6830c7d797 dts: arm: st: f0: Refactor stm32f0xx inclusion tree
Modify the successive dtsi include to better reflect the underlying
structure of the F0 family.
There are two main subfamilies: STM32F0x0 on one side, and STM32F0x1, x2
and x8 on the other

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2023-03-07 15:49:30 +01:00
Marc Herbert
68c1cafb41 intel_adsp: dts: ace: lower case 71C00 to fix DTC warning
Fixes the warning below. This commit does not change the firmware
binary. Thanks Kumar Gala for the suggestion.

  build-mtl/zephyr/zephyr.dts:279.42-285.5: Warning (simple_bus_reg):
  /soc/ace_comm_widget@71C00: simple-bus unit address format error,
  expected "71c00"

Signed-off-by: Marc Herbert <marc.herbert@intel.com>
2023-03-07 08:33:30 +01:00
Seppo Takalo
edae1bed3d drivers: kscan: Add driver for XPT2046
Add driver for Xptek XPT2046 resistive touch controller on SPI.
Only interrupt driven mode supported, does not do polling.

Signed-off-by: Seppo Takalo <seppo.takalo@iki.fi>
2023-03-06 17:21:17 +01:00
Hiroki Tada
01a44000e8 samples: die_temp_polling: Add esp32c3 overlay
- Add overlay for the esp32c3 board to die_temp_polling sample.
- Add aliases for the die_temp_polling sample to esp32c3 dtsi.

Testing Environment:
esp32c3-devkitC-02

Signed-off-by: Hiroki Tada <tada.hiroki@fujitsu.com>
2023-03-06 09:34:18 -06:00
Daniel DeGrasse
5364c1106e dts: arm: nxp_rt5xx: add MIPI and LCDIF nodes
Add MIPI and LCDIF node definitions, including clock devices for
the MIPI controller.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-03-04 09:19:26 +01:00
Daniel DeGrasse
0105a85ed2 drivers: display: introduce driver for NXP DCNANO LCDIF peripheral
Introduce driver for NXP DCNANO LCDIF (lcd interface) peripheral,
present on iMX.RT500. Currently this driver only supports updating
the primary framebuffer, and does not implement support for the cursor
buffer present on this IP.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-03-04 09:19:26 +01:00
Daniel DeGrasse
5cc33d2a3c drivers: mipi: introduce MCUX MIPI DSI 2L driver
Introduce driver for MCUX MIPI DSI 2L. This IP block differs slightly from
the existing MCUX MIPI peripheral, and uses a different hardware
abstraction layer. For these reasons, a new driver was introduced rather
than extending the existing mcux_dsi implementation.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-03-04 09:19:26 +01:00
Daniel DeGrasse
5455c556f1 drivers: memc_mcux_flexspi: enable configuring AHB RX buffer allocation
Allow configuration of AHB RX buffer allocation. This allows sections
of the AHB RX buffer to be reserved for specific masters, which can
enhance performance.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-03-04 09:19:26 +01:00
Marc Desvaux
bc5fbc929b dts: arm: st: l4: remove node SDMMC in stm32l432.dtsi
STM32L432 SDMMC issue
RM0394 :SDMMC
Not available on STM32L42xxx, STM32L432xx and STM32L442xx devices.


Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com>
2023-03-03 17:20:25 +01:00
Andriy Gelman
33d1792e3d drivers: spi: Add xmc4xxx driver
Adds spi driver for xmc4xxx SoCs.

Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
2023-03-03 17:20:17 +01:00
Mark Watson
1f178ca935 drivers: sensor: VL53L1X time-of-flight sensor.
The driver utilizes ST Microelectronics library (which
exists in modules\hal\st\sensor\vl53l1x. Platform specific
headers and source files used by the library are included
and adapted for Zephyr.

The driver can be configured in proj.conf to use a
interrupt/polling methods and the use of the XSHUT pin on
the VL53L1X. All uses were tested successfully.

Signed-off-by: Mark Watson <mwatson@prosaris.ca>
2023-03-03 10:01:55 -06:00
Ben Lauret
70c6befa88 drivers: watchdog: implement Smartbond watchdog driver
This patch adds watchdog driver for Renesas Smartbond SOCs.

Co-authored-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>

Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
2023-03-03 11:02:37 +01:00
Ben Lauret
36ac1ee2a2 drivers: entropy: add Renesas SmartBond entropy generator driver
This adds driver for SmartBond TRNG peripheral that with separate
ISR an thread data pools.

Co-authored-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>

Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
2023-03-03 11:01:36 +01:00
Matthias Hauser
d4e9e5f46c drivers: sensor: Added driver for the Würth Elektronik WSEN-TIDS sensor
Added sample for the WSEN-TIDS temperature sensor.

Signed-off-by: Matthias Hauser <Matthias.Hauser@we-online.de>
2023-03-03 11:01:10 +01:00
Daniel DeGrasse
01b9a9cdbb drivers: sdhc: add support for configurable power on delay to SPI SDHC
Add support for configuring power on delay when using SPI SDHC. This
allows cards that reliably initialize with a shorter (1ms) delay to
avoid the long initialize delay otherwise imposed.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2023-03-03 09:18:47 +01:00
Maxmillion McLaughlin
2f9335d20a drivers: i2c: stm32: add bus recovery support
Add I2C bus recovery support to the STM32 v1 and v2 driver. The STM32 i2c
peripheral does not natively support I2C bus recovery so recovery is
performed using GPIO bitbanging. This mirrors the bus recovery
implementation for NXP MCUX LPI2C driver.

Fixes: zephyrproject-rtos#54917

Signed-off-by: Maxmillion McLaughlin <github@maxmclau.com>
2023-03-03 09:18:29 +01:00
TOKITA Hiroshi
47f52bba42 drivers: regulator: add support for RaspberryPi Pico regulator.
Add support for rpi_pico regulator.

Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
2023-03-02 21:14:34 +01:00
Jay Vasanth
e56721b8f0 dts: gpio: Add Microchip XEC GPIO macros for use in device tree
Microchip XEC devices specify GPIO pin using octal numbering and
organize pins in banks of 32. Chip documentation does not use
bank naming rather naming each pin by its octal number. This has
led to the developer having to calculate the bit position of a pin
in its 32-bit bank when a specifying the pin for GPIO usage. We
created a set of defines for all possible GPIO pins that specify
the DT GPIO bank name used in the chip level DTSI files and the
bit position in that bank.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2023-03-02 13:52:03 +01:00
Grant Ramsay
9df37fff79 drivers: serial: Add pinctrl support to the NS16550 driver
This enables configuring pins for the UART

Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
2023-03-02 13:50:06 +01:00
Grant Ramsay
76a4b44227 soc: arm64: ti_sitara: Add pinctrl support for TI AM6X A53 SoC
TI Sitara processors use the K3 architecture

Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
2023-03-02 13:50:06 +01:00
Grant Ramsay
026105c883 drivers: pinctrl: Add pinctrl support for TI K3 devices
K3 is a common architecture used between different TI
processor families

Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
2023-03-02 13:50:06 +01:00
Marc Desvaux
028c7df93e dts: arm: st: l4 SDMMC nodes on L4 missing
SDMMC nodes on L4 missing or not completed on l431, L432, l452


Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com>
2023-03-02 10:56:57 +01:00
Dominik Chat
6bbaa29a13 dts: Nordic: Enable NFCT for capable SoC
Enable NFCT peripheral for NFC capable Nordic SoC.

Signed-off-by: Dominik Chat <dominik.chat@nordicsemi.no>
2023-03-02 10:56:41 +01:00
Hein Wessels
9e7518f0f9 dts: arm: stm32h6a3: fix incorrect dmamux dma-requests
The dma-requests specified for dmamux is changed to
the correct number of 107. This can be found in the
Reference Manual RM0455 Section 17.1.

Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
2023-03-01 15:58:27 +01:00
Hein Wessels
7d76842fdf drivers: dma: stm32: dmamux: support dmamux2 and bdma
Extends dmamux driver to support DMAMUX 2,
which supports the BDMA on STM32H7 devices.

Co-authored-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
2023-03-01 15:58:27 +01:00
Hein Wessels
e01270793e drivers: dma: stm32: bdma support for H7
Implement STM32H7 BDMA driver.

Co-authored-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
2023-03-01 15:58:27 +01:00
Jay Vasanth
f8d9465332 pm: adc: MEC172x adc device PM support
update MEC172x adc driver to support device PM.
Implement pm resume and suspend actions to put adc
pins in proper state for suspend and resume.
Notify kernel of busy when adc sampling is in progress.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2023-03-01 08:41:16 -06:00
Nazar Palamar
bc638f38db drivers: gpio: Add Infineon CAT1 GPIO driver
Added initial version of Infineon CAT1 GPIO driver.
Added initial version of binding file for Infineon CAT1 GPIO driver.

Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2023-03-01 11:44:57 +01:00