The `ok` state is deprecated and very few files are using this.
The DTS spec also does not have this value.
This PR removes this value once and for all.
Signed-off-by: Kyle Micallef Bonnici <kylebonnici@hotmail.com>
This change introduces stm32l5xx clock definitions and separates
it from L4xx series. This change comes because of CCIPR missmatch
of SAI between L4xx and L5xx series.
Signed-off-by: Mario Paja <mariopaja@hotmail.com>
Add Clock Control nodes to Renesas RZ/A3UL, V2L devicetree
Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Add Clock Control driver support for Renesas RZ/A3UL, V2L
Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Extract common DTS bindings to zephyr,cellular-modem-device.yaml
as these are referred in the modem_cellular.c in the
MODEM_CELLULAR_DEFINE_INSTANCE() macro.
Signed-off-by: Seppo Takalo <seppo.takalo@nordicsemi.no>
Add support for the UltraChip UC8151D e-paper display (EPD) controller.
The UC8151D is part of the UC81xx family of display controllers commonly
used in e-ink displays.
This implementation extends the existing UC81xx driver infrastructure by
adding device tree bindings, Kconfig options, and the necessary driver
code to support the UC8151D variant.
Signed-off-by: Marc Espuña <mespuna@cactusiot.com>
Add HCI info and BLE interrupt.
Lower peripheral interrupt prio to make sure
LL irq have the highest one.
This is a prerequisite of the system.
Signed-off-by: Yassine El Aissaoui <yassine.elaissaoui@nxp.com>
This is a SOC based on AE350. In addition to the core, some
modifications have been made to the peripheral functions,
including the integration of built-in USB.
Signed-off-by: Jacky Lee <jacky.lee@egistec.com>
Add st,stm32-qdec child nodes (disabled) under TIM nodes in STM32U5
DTSI files. Nodes are disabled by default; boards can enable encoder
mode via overlays. No functional change.
Signed-off-by: Ritesh Kudkelwar <ritesh.kumar0793@gmail.com>
Add st,stm32-qdec child nodes (disabled) under TIM nodes in STM32L5
DTSI files. Nodes are disabled by default so boards can enable encoder
mode via overlays. No functional change.
Signed-off-by: Ritesh Kudkelwar <ritesh.kumar0793@gmail.com>
Add st,stm32-qdec child nodes (disabled) under TIM nodes in STM32L4
DTSI files. Boards can enable them in overlays. No functional change.
Signed-off-by: Ritesh Kudkelwar <ritesh.kumar0793@gmail.com>
Add st,stm32-qdec child nodes (disabled) under TIM nodes in STM32L1
DTSI files. Boards can enable them in overlays. No functional change.
Signed-off-by: Ritesh Kudkelwar <ritesh.kumar0793@gmail.com>
Add st,stm32-qdec child node (disabled) under TIM nodes in STM32L0
DTSI files. Boards can enable it in overlays. No functional change.
Signed-off-by: Ritesh Kudkelwar <ritesh.kumar0793@gmail.com>
Add st,stm32-qdec child nodes (disabled) under TIM nodes in STM32H7
DTSI files. Nodes are disabled by default; boards may enable them via
overlays. No functional change.
Signed-off-by: Ritesh Kudkelwar <ritesh.kumar0793@gmail.com>
Add st,stm32-qdec child nodes (disabled) under TIM nodes in STM32G4
DTSI files. Nodes are disabled by default; boards may enable them via
overlays. No functional change.
Signed-off-by: Ritesh Kudkelwar <ritesh.kumar0793@gmail.com>
Add st,stm32-qdec child nodes (disabled) under TIM nodes in STM32G0
DTSI files. Boards can enable them in overlays. No functional change.
Signed-off-by: Ritesh Kudkelwar <ritesh.kumar0793@gmail.com>
Add st,stm32-qdec child nodes (disabled) under TIM nodes in STM32F7
DTSI files. Nodes are disabled by default; boards may enable them via
overlays. No functional change.
Signed-off-by: Ritesh Kudkelwar <ritesh.kumar0793@gmail.com>
Add st,stm32-qdec child node (disabled) under TIM nodes in STM32F3
DTSI files. Boards can enable the node via overlays. No functional change.
Signed-off-by: Ritesh Kudkelwar <ritesh.kumar0793@gmail.com>
Add st,stm32-qdec child nodes (disabled) under TIM nodes in the
STM32F1 DTSI files. Boards can enable encoder/decoder functionality
using overlays. No functional change.
Signed-off-by: Ritesh Kudkelwar <ritesh.kumar0793@gmail.com>
Added driver and bindings for the coresight nrf submodule.
add integrated it for the nrf54h20.
The coresight subsystem is a combination of ARM Coresight peripherals
that get configured together to achieve a simplified configuration based
on a desired operating mode.
This also replaces the previous handling in the nrf54h20 soc.c which was
powering the subsystem up but not configuring it.
Signed-off-by: Karsten Koenig <karsten.koenig@nordicsemi.no>
Moved the nrf_etr driver from the drive/misc folder into the recently
established driver/debug folder where it is a better fit. Moved the
associated files such as bindings and headers accordingly as well.
Signed-off-by: Karsten Koenig <karsten.koenig@nordicsemi.no>
Add a devicetree binding and corresponding dt-bindings header for
the ArduCam FFC-40 pin GPIO connector used by camera shields.
- Add dts binding schema for arducam,ffc-40pin-connector
- Add dt-bindings header with GPIO pin definitions
Signed-off-by: Khanh Nguyen <khanh.nguyen.wz@bp.renesas.com>
This commit introduces shared QSPI partition configurations for Arduino
STM32H7 boards, using the factory partitioning scheme that is compatible
with the Arduino IoT Cloud services.
Signed-off-by: Luca Burelli <l.burelli@arduino.cc>
Add a new top-level, transport independent library to respond to UMP Stream
Discovery messages. This allows MIDI2.0 clients to discover UMP endpoints
hosted on Zephyr over the UMP protocol.
The endpoint specification can be gathered from the device tree, so that
the same information used to generate USB descriptors in usb-midi2.0
can be delivered over UMP Stream.
Signed-off-by: Titouan Christophe <titouan.christophe@mind.be>
Enable support for latest GINF method which requires 3 paramters
for each GPIO group and enables gpio support for intel_ptl_h
platform.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Unify external analog inputs type to be consistent
in COMP, LPCOMP and SAADC nordic drivers.
Signed-off-by: Jakub Zymelka <jakub.zymelka@nordicsemi.no>
Add Clock Control nodes to Renesas RZ/N2L, T2M devicetree
Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Add Clock Control driver support for Renesas RZ/N2L, T2M
Signed-off-by: Quang Le <quang.le.eb@bp.renesas.com>
Signed-off-by: Tien Nguyen <tien.nguyen.zg@renesas.com>
Added wlan wakeup pin in IW610 overlay file. This WLAN wakeup
support is for IW610 and MIMXRT1060-EVK acts as host. Add wakeup
pin configuration when doing device related initialization.
Signed-off-by: Hui Bai <hui.bai@nxp.com>
Fix the MAX32690 flash1 node's address and erase size properties to match
the datasheet. Add a test for that platform as well to verify the
functionality of the FLC1 peripheral instance.
Signed-off-by: Pete Johanson <pete.johanson@analog.com>
Fix compatible name on device tree, to allow RTC timer based
counter driver to be enabled. Disable rtc_timer node for all
devices to keep standard.
Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
Extend the LIS2DU12 accelerometer driver with SENSOR_TRIG_DELTA
support. The detection is based on the slope between successive
channel readings. Support for setting SENSOR_ATTR_SLOPE_TH and
SENSOR_ATTR_SLOPE_DUR is added as well. In line with other sensors,
SENSOR_ATTR_SLOPE_TH is configured in SI units (m/s^2) and
SENSOR_ATTR_SLOPE_DUR in samples relative to the ODR. The new trigger
can be mapped either to the same GPIO as the data-ready interrupt or
to a dedicated one.
Signed-off-by: Jan Kablitz <jan.kablitz@8tronix.de>
Add basic testing to validate the API of the NVMEM subsystem.
Add testing with an EEPROM backend.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
