Convert the hci_stm32wba.c driver to the new HCI API. Unlike in most cases,
the devicetree node is already enabled on the SoC level (rather than board
level). This is in order to mirror how the Kconfig option was originally
enabled, i.e. on the SoC level.
Signed-off-by: Johan Hedberg <johan.hedberg@gmail.com>
Convert the spi.c and hci_spi_st.c drivers to use the new HCI driver API.
Both drivers are converted in one go since one derives from the other's
devicetree binding.
Signed-off-by: Johan Hedberg <johan.hedberg@gmail.com>
Update the native controller to the new HCI driver API. The devicetree
node is placed under existing `radio` nodes, which seemed like the most
intuitive option.
Signed-off-by: Johan Hedberg <johan.hedberg@gmail.com>
Convert the H4 driver to the new HCI driver API. This includes updating
also any boards that use the driver, i.e. adding the appropriate
devicetree node and chosen property to them.
Signed-off-by: Johan Hedberg <johan.hedberg@gmail.com>
Add a base binding for Bluetooth HCI drivers. All HCI drivers should
extend this binding (through an include directive) to create their own
binding files.
Signed-off-by: Johan Hedberg <johan.hedberg@gmail.com>
Add a shield for NXP ov5640 camera modules. This shield uses a 44-pin
board-to-board connector which is supported on NXP RT1170 and RT1160 EVKs.
Signed-off-by: Phi Bang Nguyen <phibang.nguyen@nxp.com>
nxp,unique-mac actually is not meant to be universally
unique, the LAA bit should therefore be set, and fix the
description of the property in the binding to clarify
the intended usage of this property.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Added a single instance lptmr node on the
mcxn947 soc dts. Updated counter lptmr to
have max value property.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
This driver can be used for both mcux and
s32k series SoCs which have flexio IP.
PWM channel is automatically allocated by
flexio driver based on the available timers.
Signed-off-by: Sumit Batra <sumit.batra@nxp.com>
Fix KSZ8081 binding properties:
- reset-gpios and interrupt-gpios are generally standard
properties and therefore should not be using a special name
- mc, is not the correct vendor prefix for microchip
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Fix simple bus reg / ranges warning from GPIO
nodes by giving the parent nodes addresses
and describing a ranges other than empty.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
On STM32G0, the backup memory is defined as part of the TAMP peripheral.
Use the same workaround as on STM32WL to add the node as part of the
RTC.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Adds channel 15 to the pool of grtc channels available
for allocation (i.e. with 'z_nrf_grtc_timer_chan_alloc')
on nRF54H20.
The change is motivated by lack of available channels
for the nrf_802154_timestamper when building for nRF54H20.
Signed-off-by: Piotr Koziar <piotr.koziar@nordicsemi.no>
This commit should address the #73803 issue
where the DMA node does not provide support
for the #dma-cells binding. Peripherals should
specify one or more DMA channels via the dmas
and optionally dma-names DT properties.
Signed-off-by: Ioannis Karachalios <ioannis.karachalios.px@renesas.com>
Declare power state constraints for a device in devicetree.
It allows a map between device instances and power states that disable
their power. This information is used by a new API
(pm_policy_device_power_lock_put/get) that automically set/release
pm state constraints.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
adsp_memory.h is pretty much the same for all ace platforms.
Generalize it getting register address from devicetree and
and move it to a common place.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Support NXP ENET_1G on mimxrt1170_evk/mimxrt1176/cm7 platform.
Added test configuration sample.net.zperf.nxp_enet1g and
documented the usage of the ethernet driver with ENET_1G
peripheral.
Fixes: #66348
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Add driver for Realtek RTL8211F 10/100/1000M ethernet PHY.
This driver implements vendor specific behaviour like
detecting link state change by GPIO interrupt, which is not
present in the generic MII driver.
Fixes: #66348
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
- Added nxp,enet1g compatible to distinguish between ENET (nxp,enet)
and ENET_1G (nxp,enet1g) peripherals within the same driver.
- Added config ETH_NXP_ENET_1G to enable 1G mode of operation on ENET_1G.
- Support RGMII mode of connection between MDIO and PHY to be
able to work with ENET_1G peripheral and support 1000M speed.
- Removed performing of PHY reset before configuring link - it is
not desirable for RTL8211F PHY connected to ENET_1G on RT1170.
Reset of other PHYs can be performed by PHY driver itself if required.
Fixes: #66348
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Add option for RGMII connection type between the MAC and the PHY
device into the ethernet controller binding.
Fixes: #66348
Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
Introduce driver for ov7670 camera, supporting QCIF,QVGA,CIF, and VGA
resolution in YUV and RGB mode.
Support was verified on the FRDM-MCXN947, using the SmartDMA camera
engine, which is enabled in the following PR:
https://github.com/zephyrproject-rtos/zephyr/pull/72827
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The byteSENSI-L is a fun LoRa device based on nRF52 MCU that integrates
many sensors.
Signed-off-by: Rico Ganahl <rico.ganahl@bytesatwork.ch>
Signed-off-by: Guy Morand <guy.morand@bytesatwork.ch>
Configure the quad-spi in DualFlash Mode
This property of the stm32 boards will access simultaneously
two identical quad-flash external memories connected to
2 quad-spi banks (pins).
Dual Flash Mode is possible on stm32 series with QUADSPI_CR_DFM
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add devicetree nodes for the two FlexCAN instances present on the
MCXN94x. Only CAN classic is enabled for now due to issues with FlexCAN FD
in relation to the implementation on this SoC.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add devicetree nodes for the Reset Information registers on nRF54H20,
along with a new binding.
Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
Introduce the stm32h7RS serie to the clock_controller,
based on the stm32h7 clock driver
Datasheet DS14359 rev 1 gives CPU max freq of 500MHz
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add the new stm32h7rs serie with stm32H7R3, stm32H7R7,
stm32H7S3, stm32H7S7 devices from STMicroelectronics
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Introduce the stm32h7RS serie to the clock rcc controller,
and the exti interrupt controller based on the stm32h7 rcc bindings.
Three PLL clocks are available.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add the property of drive-strength to drive a high or low current
selection. If this property is not configured, it is the default
setting. According to the SPEC, the default drive current selection
varies from different pins.
Define the high level 0b: 8mA
low level 1b: 4mA or 2mA
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Add support for configuration of the ARM PLL on the iMXRT1170/1160
series SOCs. This PLL is used to generate the M7 core frequency, and is
an integer pll. Provide default configurations for the RT1160 and RT1170
targeting 600MHz and 1GHz respectively.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
