boards: nxp: add uhc support for frdm_k22f, rt1060, lpc55s69 and lpc55s28
add uhc related items to dts. add clock initialization add BM4 if CONFIG_USB_UHC_NXP_KHCI is enabled add pin mux update board related CMakeLists.txt update sdk-ng CMake to include NXP controller drivers update west.yml to contain the hal_nxp pr Signed-off-by: Mark Wang <yichang.wang@nxp.com>
This commit is contained in:
parent
abfa9455cc
commit
a8796ca6ee
23 changed files with 274 additions and 15 deletions
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@ -178,6 +178,10 @@ zephyr_udc0: &usbotg {
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num-bidir-endpoints = <8>;
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};
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zephyr_uhc0: &usbh {
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status = "okay";
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};
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&gpioa {
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status = "okay";
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};
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@ -46,4 +46,22 @@
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};
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};
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pinmux_usbhfs: pinmux_usbhfs {
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group0 {
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pinmux = <USB0_VBUS_PIO0_22>,
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<USB0_OVERCURRENTN_PIO0_28>,
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<USB0_PORTPWRN_PIO1_12>;
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bias-pull-up;
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slew-rate = "standard";
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};
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};
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pinmux_usbhhs: pinmux_usbhhs {
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group0 {
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pinmux = <USB1_OVERCURRENTN_PIO1_30>,
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<USB1_PORTPWRN_PIO1_29>;
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bias-pull-up;
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slew-rate = "standard";
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};
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};
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};
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@ -127,3 +127,23 @@
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zephyr_udc0: &usbhs {
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status = "okay";
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};
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zephyr_uhc0: &usbhfs {
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pinctrl-0 = <&pinmux_usbhfs>;
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pinctrl-names = "default";
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status = "okay";
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};
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zephyr_uhc1: &usbhhs {
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pinctrl-0 = <&pinmux_usbhhs>;
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pinctrl-names = "default";
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status = "okay";
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phy_handle = <&usbphy1>;
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};
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&usbphy1 {
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status = "okay";
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tx-d-cal = <5>;
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tx-cal-45-dp-ohms = <10>;
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tx-cal-45-dm-ohms = <10>;
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};
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@ -2,7 +2,7 @@
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* NOTE: File generated by gen_board_pinctrl.py
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* from LPCXpresso55S69.mex
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*
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* Copyright 2022 NXP
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* Copyright 2022,2024 NXP
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -108,4 +108,23 @@
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slew-rate = "standard";
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};
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};
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pinmux_usbhfs: pinmux_usbhfs {
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group0 {
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pinmux = <USB0_VBUS_PIO0_22>,
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<USB0_OVERCURRENTN_PIO0_28>,
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<USB0_PORTPWRN_PIO1_12>;
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bias-pull-up;
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slew-rate = "standard";
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};
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};
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pinmux_usbhhs: pinmux_usbhhs {
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group0 {
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pinmux = <USB1_OVERCURRENTN_PIO1_30>,
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<USB1_PORTPWRN_PIO1_29>;
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bias-pull-up;
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slew-rate = "standard";
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};
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};
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};
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@ -155,6 +155,19 @@ zephyr_udc0: &usbhs {
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phy-handle = <&usbphy1>;
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};
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zephyr_uhc0: &usbhfs {
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pinctrl-0 = <&pinmux_usbhfs>;
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pinctrl-names = "default";
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status = "okay";
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};
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zephyr_uhc1: &usbhhs {
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pinctrl-0 = <&pinmux_usbhhs>;
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pinctrl-names = "default";
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status = "okay";
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phy_handle = <&usbphy1>;
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};
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&usbphy1 {
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status = "okay";
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tx-d-cal = <5>;
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@ -188,6 +188,16 @@ zephyr_udc0: &usb1 {
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phy-handle = <&usbphy1>;
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};
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zephyr_uhc0: &usbh1 {
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status = "okay";
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phy_handle = <&usbphy1>;
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};
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zephyr_uhc1: &usbh2 {
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status = "okay";
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phy_handle = <&usbphy2>;
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};
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&usbphy1 {
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status = "okay";
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tx-d-cal = <12>;
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@ -195,6 +205,13 @@ zephyr_udc0: &usb1 {
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tx-cal-45-dm-ohms = <6>;
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};
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&usbphy2 {
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status = "okay";
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tx-d-cal = <12>;
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tx-cal-45-dp-ohms = <6>;
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tx-cal-45-dm-ohms = <6>;
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};
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&csi {
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pinctrl-0 = <&pinmux_csi>;
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pinctrl-names = "default";
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@ -1,5 +1,6 @@
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/*
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* Copyright (c) 2018 Prevas A/S
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* Copyright 2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -375,6 +376,14 @@
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status = "disabled";
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};
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usbh: usbh@40072000 {
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compatible = "nxp,uhc-khci";
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reg = <0x40072000 0x1000>;
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interrupts = <53 1>;
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interrupt-names = "usb_otg";
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status = "disabled";
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};
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rnga: random@40029000 {
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compatible = "nxp,kinetis-rnga";
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reg = <0x40029000 0x1000>;
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@ -320,6 +320,27 @@
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num-bidir-endpoints = <6>;
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status = "disabled";
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};
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usbhfs: usbhfs@A2000 {
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compatible = "nxp,uhc-ohci";
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reg = <0xa2000 0x1000>;
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interrupts = <28 1>;
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maximum-speed = "full-speed";
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status = "disabled";
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};
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usbhhs: usbhhs@A3000 {
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compatible = "nxp,uhc-ip3516hs";
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reg = <0xa3000 0x1000>;
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interrupts = <47 1>;
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status = "disabled";
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};
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usbphy1: usbphy@38000 {
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compatible = "nxp,usbphy";
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reg = <0x38000 0x1000>;
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status = "disabled";
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};
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};
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&nvic {
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@ -390,6 +390,21 @@
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status = "disabled";
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};
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usbhfs: usbhfs@A2000 {
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compatible = "nxp,uhc-ohci";
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reg = <0xa2000 0x1000>;
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interrupts = <28 1>;
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maximum-speed = "full-speed";
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status = "disabled";
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};
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usbhhs: usbhhs@A3000 {
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compatible = "nxp,uhc-ip3516hs";
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reg = <0xa3000 0x1000>;
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interrupts = <47 1>;
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status = "disabled";
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};
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usbphy1: usbphy@38000 {
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compatible = "nxp,usbphy";
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reg = <0x38000 0x1000>;
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@ -1,5 +1,5 @@
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/*
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* Copyright 2017,2023 NXP
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* Copyright 2017,2023,2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -846,6 +846,24 @@
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status = "disabled";
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};
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usbh1: usbh@402e0000 {
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compatible = "nxp,uhc-ehci";
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reg = <0x402E0000 0x200>;
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interrupts = <113 1>;
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interrupt-names = "usb_otg";
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clocks = <&usbclk>;
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status = "disabled";
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};
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usbh2: usbh@402e0200 {
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compatible = "nxp,uhc-ehci";
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reg = <0x402E0200 0x200>;
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interrupts = <112 1>;
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interrupt-names = "usb_otg";
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clocks = <&usbclk>;
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status = "disabled";
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};
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usbphy1: usbphy@400d9000 {
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compatible = "nxp,usbphy";
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reg = <0x400D9000 0x1000>;
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12
dts/bindings/usb/nxp,uhc-ehci.yaml
Normal file
12
dts/bindings/usb/nxp,uhc-ehci.yaml
Normal file
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# Copyright 2024 NXP
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# SPDX-License-Identifier: Apache-2.0
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description: NXP EHCI USB host controller
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compatible: "nxp,uhc-ehci"
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include: [usb-controller.yaml]
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properties:
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phy_handle:
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type: phandle
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12
dts/bindings/usb/nxp,uhc-ip3516hs.yaml
Normal file
12
dts/bindings/usb/nxp,uhc-ip3516hs.yaml
Normal file
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# # Copyright 2024 NXP
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# SPDX-License-Identifier: Apache-2.0
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description: NXP IP3516HS USB host controller
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compatible: "nxp,uhc-ip3516hs"
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include: [usb-controller.yaml, pinctrl-device.yaml]
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properties:
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phy_handle:
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type: phandle
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8
dts/bindings/usb/nxp,uhc-khci.yaml
Normal file
8
dts/bindings/usb/nxp,uhc-khci.yaml
Normal file
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# # Copyright 2024 NXP
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# SPDX-License-Identifier: Apache-2.0
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description: NXP KHCI USB host controller
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compatible: "nxp,uhc-khci"
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include: [usb-controller.yaml]
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8
dts/bindings/usb/nxp,uhc-ohci.yaml
Normal file
8
dts/bindings/usb/nxp,uhc-ohci.yaml
Normal file
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# # Copyright 2024 NXP
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# SPDX-License-Identifier: Apache-2.0
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description: NXP OHCI USB host controller
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compatible: "nxp,uhc-ohci"
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include: [usb-controller.yaml, pinctrl-device.yaml]
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@ -34,7 +34,7 @@
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#define BM4_WE_SHIFT 24
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#define BM4_RE_SHIFT 25
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#if CONFIG_USB_KINETIS || CONFIG_UDC_KINETIS
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#if CONFIG_USB_KINETIS || CONFIG_UDC_KINETIS || CONFIG_UHC_NXP_KHCI
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#define BM4_PERMISSIONS ((1 << BM4_RE_SHIFT) | (1 << BM4_WE_SHIFT))
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#else
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#define BM4_PERMISSIONS 0
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@ -20,7 +20,7 @@ if(${MCUX_DEVICE} MATCHES "RW61")
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endif()
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endif()
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if(CONFIG_USB_DEVICE_DRIVER OR CONFIG_UDC_DRIVER OR CONFIG_BT)
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if(CONFIG_USB_DEVICE_DRIVER OR CONFIG_UDC_DRIVER OR CONFIG_UHC_DRIVER OR CONFIG_BT)
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set(CONFIG_USE_component_osa_zephyr ON)
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endif()
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@ -36,6 +36,22 @@ if(CONFIG_UDC_DRIVER)
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zephyr_include_directories(${MCUX_SDK_NG_DIR}/middleware/usb/include)
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endif()
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if (CONFIG_UHC_DRIVER)
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zephyr_include_directories(middleware)
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set(CONFIG_MCUX_COMPONENT_middleware.usb.common_header ON)
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set_variable_ifdef(CONFIG_DT_HAS_NXP_USBPHY_ENABLED CONFIG_MCUX_COMPONENT_middleware.usb.phy)
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set_variable_ifdef(CONFIG_UHC_NXP_EHCI CONFIG_MCUX_COMPONENT_middleware.usb.host.ehci)
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set_variable_ifdef(CONFIG_UHC_NXP_KHCI CONFIG_MCUX_COMPONENT_middleware.usb.host.khci)
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set_variable_ifdef(CONFIG_UHC_NXP_OHCI CONFIG_MCUX_COMPONENT_middleware.usb.host.ohci)
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set_variable_ifdef(CONFIG_UHC_NXP_IP3516HS CONFIG_MCUX_COMPONENT_middleware.usb.host.ip3516hs)
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# For soc.c build pass
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zephyr_include_directories(.)
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zephyr_include_directories(${MCUX_SDK_NG_DIR}/middleware/usb/phy)
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zephyr_include_directories(${MCUX_SDK_NG_DIR}/middleware/usb/include)
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endif()
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add_subdirectory(${MCUX_SDK_NG_DIR}/middleware/usb
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${CMAKE_CURRENT_BINARY_DIR}/usb
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)
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@ -1,5 +1,5 @@
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/*
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* Copyright 2017-2023 NXP
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* Copyright 2017-2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -245,8 +245,9 @@ __weak void clock_init(void)
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kIOMUXC_GPR_ENET2RefClkMode, true);
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#endif
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#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(usb1)) && \
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(CONFIG_USB_DC_NXP_EHCI || CONFIG_UDC_NXP_EHCI)
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#if ((DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(usb1)) && \
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(CONFIG_USB_DC_NXP_EHCI || CONFIG_UDC_NXP_EHCI)) ||\
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(DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(usbh1)) && (CONFIG_UHC_NXP_EHCI)))
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CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_Usb480M,
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DT_PROP_BY_PHANDLE(DT_NODELABEL(usb1), clocks, clock_frequency));
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CLOCK_EnableUsbhs0Clock(kCLOCK_Usb480M,
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@ -256,8 +257,9 @@ __weak void clock_init(void)
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#endif
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#endif
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#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(usb2)) && \
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(CONFIG_USB_DC_NXP_EHCI || CONFIG_UDC_NXP_EHCI)
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#if ((DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(usb2)) && \
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(CONFIG_USB_DC_NXP_EHCI || CONFIG_UDC_NXP_EHCI)) ||\
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(DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(usbh2)) && (CONFIG_UHC_NXP_EHCI)))
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CLOCK_EnableUsbhs1PhyPllClock(kCLOCK_Usb480M,
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DT_PROP_BY_PHANDLE(DT_NODELABEL(usb2), clocks, clock_frequency));
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CLOCK_EnableUsbhs1Clock(kCLOCK_Usb480M,
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@ -1,5 +1,5 @@
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#
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# Copyright (c) 2020, NXP
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# Copyright (c) 2020,2024 NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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@ -19,6 +19,7 @@ zephyr_library_include_directories(
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zephyr_compile_definitions_ifdef(CONFIG_USB_DEVICE_DRIVER USB_STACK_USE_DEDICATED_RAM=1)
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zephyr_compile_definitions_ifdef(CONFIG_UDC_DRIVER USB_STACK_USE_DEDICATED_RAM=1)
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zephyr_compile_definitions_ifdef(CONFIG_UHC_DRIVER USB_STACK_USE_DEDICATED_RAM=1)
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if(CONFIG_FLASH_MCUX_FLEXSPI_XIP)
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zephyr_code_relocate(FILES flash_clock_setup.c LOCATION RAM)
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@ -3,6 +3,7 @@
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* Copyright (c) 2016, Freescale Semiconductor, Inc.
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* Copyright (c) 2018 Prevas A/S
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* Copyright (c) 2019 Thomas Burdick <thomas.burdick@gmail.com>
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* Copyright 2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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@ -102,7 +103,7 @@ __weak void clock_init(void)
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CLOCK_SetSimConfig(&simConfig);
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#if CONFIG_USB_KINETIS || CONFIG_UDC_KINETIS
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#if CONFIG_USB_KINETIS || CONFIG_UDC_KINETIS || CONFIG_UHC_NXP_KHCI
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CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcPll0,
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CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC);
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#endif
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@ -1,5 +1,5 @@
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#
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# Copyright (c) 2019, NXP
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# Copyright (c) 2019,2024 NXP
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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@ -16,9 +16,12 @@ zephyr_linker_sources_ifdef(CONFIG_USB_DEVICE_DRIVER
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SECTIONS usb.ld)
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zephyr_linker_sources_ifdef(CONFIG_UDC_DRIVER
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SECTIONS usb.ld)
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zephyr_linker_sources_ifdef(CONFIG_UHC_DRIVER
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SECTIONS usb.ld)
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zephyr_compile_definitions_ifdef(CONFIG_USB_DEVICE_DRIVER USB_STACK_USE_DEDICATED_RAM=1)
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zephyr_compile_definitions_ifdef(CONFIG_UDC_DRIVER USB_STACK_USE_DEDICATED_RAM=1)
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zephyr_compile_definitions_ifdef(CONFIG_UHC_DRIVER USB_STACK_USE_DEDICATED_RAM=1)
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endif()
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# CMSIS SystemInit allows us to skip enabling clock to SRAM banks via
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@ -1,4 +1,4 @@
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/* Copyright 2017, 2019-2023 NXP
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/* Copyright 2017, 2019-2024 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifdef CONFIG_GPIO_MCUX_LPC
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#include <fsl_pint.h>
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#endif
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#if CONFIG_USB_DC_NXP_LPCIP3511 || CONFIG_UDC_NXP_IP3511
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#if CONFIG_USB_DC_NXP_LPCIP3511 || CONFIG_UDC_NXP_IP3511 || CONFIG_UHC_NXP_IP3516HS
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#include "usb_phy.h"
|
||||
#include "usb.h"
|
||||
#endif
|
||||
|
@ -287,6 +287,48 @@ __weak void clock_init(void)
|
|||
|
||||
#endif /* CONFIG_USB_DC_NXP_LPCIP3511 */
|
||||
|
||||
#if CONFIG_UHC_NXP_OHCI
|
||||
|
||||
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(usbhfs), nxp_uhc_ohci, okay)
|
||||
/* set BOD VBAT level to 1.65V */
|
||||
POWER_SetBodVbatLevel(kPOWER_BodVbatLevel1650mv, kPOWER_BodHystLevel50mv, false);
|
||||
NVIC_ClearPendingIRQ(USB0_IRQn);
|
||||
NVIC_ClearPendingIRQ(USB0_NEEDCLK_IRQn);
|
||||
/*< Turn on USB Phy */
|
||||
#if defined(CONFIG_SOC_LPC55S36)
|
||||
POWER_DisablePD(kPDRUNCFG_PD_USBFSPHY);
|
||||
#else
|
||||
POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY);
|
||||
#endif
|
||||
RESET_PeripheralReset(kUSB1H_RST_SHIFT_RSTn);
|
||||
RESET_PeripheralReset(kUSB1D_RST_SHIFT_RSTn);
|
||||
RESET_PeripheralReset(kUSB1_RST_SHIFT_RSTn);
|
||||
RESET_PeripheralReset(kUSB1RAM_RST_SHIFT_RSTn);
|
||||
CLOCK_EnableUsbfs0HostClock(kCLOCK_UsbfsSrcPll0, 48000000U);
|
||||
#if defined(FSL_FEATURE_USBHSD_USB_RAM) && (FSL_FEATURE_USBHSD_USB_RAM)
|
||||
memset((uint8_t *)FSL_FEATURE_USBHSD_USB_RAM_BASE_ADDRESS, 0, FSL_FEATURE_USBHSD_USB_RAM);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
#if CONFIG_UHC_NXP_IP3516HS
|
||||
|
||||
#if DT_NODE_HAS_COMPAT_STATUS(DT_NODELABEL(usbhhs), nxp_uhc_ip3516hs, okay)
|
||||
/*< Turn on USB Phy */
|
||||
#if !defined(CONFIG_SOC_LPC55S36)
|
||||
POWER_DisablePD(kPDRUNCFG_PD_USB1_PHY);
|
||||
#endif
|
||||
CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_UsbPhySrcExt, CLK_CLK_IN);
|
||||
CLOCK_EnableUsbhs0HostClock(kCLOCK_UsbSrcUnused, 0U);
|
||||
USB_EhciPhyInit(kUSB_ControllerLpcIp3511Hs0, CLK_CLK_IN, NULL);
|
||||
#if defined(FSL_FEATURE_USBHSD_USB_RAM) && (FSL_FEATURE_USBHSD_USB_RAM)
|
||||
memset((uint8_t *)FSL_FEATURE_USBHSD_USB_RAM_BASE_ADDRESS, 0, FSL_FEATURE_USBHSD_USB_RAM);
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
||||
DT_FOREACH_STATUS_OKAY(nxp_lpc_ctimer, CTIMER_CLOCK_SETUP)
|
||||
|
||||
DT_FOREACH_STATUS_OKAY(nxp_ctimer_pwm, CTIMER_CLOCK_SETUP)
|
||||
|
|
2
west.yml
2
west.yml
|
@ -210,7 +210,7 @@ manifest:
|
|||
groups:
|
||||
- hal
|
||||
- name: hal_nxp
|
||||
revision: 73d478f7afff753c9cf60248e0c0fff4ac572ee0
|
||||
revision: cea5006f1829520e40db1b550a9f49cc69ceba7d
|
||||
path: modules/hal/nxp
|
||||
groups:
|
||||
- hal
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue