For the SAI peripheral, the MCLK signal input/output direction is
independent from the TX or RX bit clocks directions (TCR2[BCD] and
RCR2[BCD]). Introduces mclk-output property.
Signed-off-by: Derek Snell <derek.snell@nxp.com>
This commit adds the Device Tree include files
for the STM32WBA65x device
Adding GPIO D/E/G banks.
Renaming JTAG reset pin.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Make the IOVDD settling delay configurable, instead of hardcoding a
delay that happens to work for the dev kits. For example, the nPM1300
load switches have a soft-start time of 1.8 ms.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Add STM32N6 USB OTG HS compatible 'st,stm32n6-otghs'
that doesn't require pinctrl-0 and pinctrl-names.
Signed-off-by: IBEN EL HADJ MESSAOUD Marwa <marwa.ibenelhadjmessaoud-ext@st.com>
We fixed some minor bugs and one missing component for
Microchip MEC5 HAL based chips, MEC174x and MEC175x.
These changes are in preparation for board check-in and
hello world sample. Added the clock-frequency property
to the cpu and rtimer nodes. This properity is used
derive the Kconfig's for the kernel tick.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
The tmp116 sensor driver also supports tmp117 and tmp119. Therefore rename
to indicate that is supports a range of tmp devices.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Adds support for the CVA6 CPU on a Genesys 2 FPGA board
(https://github.com/openhwgroup/cva6).
The SoC currently contains the CVA6 CPU with the SV39 MMU, interrupt
controllers (CLINT and PLIC), UART, a SPI for booting from SD, a boot
ROM, and I2C controller for on-board audio, a GPIO and the lowRISC
ethernet subsystem.
Two slightly different versions of the board are added, with a 64-bit
and a 64-bit configuration of CVA6, respectively.
Signed-off-by: Eric Ackermann <eric.ackermann@cispa.de>
Adds support for the CVA6 family of RISC-V CPUs.
CVA6 is commonly found as a soft core CPU on FPGA designs.
Different configurations and instruction set extensions can be
configured, and different SoCs targeting various FPGA boards are
available.
This commit adds support for the 32-bit and 64-bit configurations
of CVA6, as well as three slightly different SoCs (a minimal 32-bit
configuration, a 64-bit configuration without FPU, a 64-bit
configuration with FPU).
Signed-off-by: Eric Ackermann <eric.ackermann@cispa.de>
Create a driver implementation for the battery charge controller
TI BQ25713.
It includes the ability to enable / disable the controller and also
to setup max current and voltage charge parameters at initialization
time but also at run time.
On the other hand, it is possible to assign / obtain input voltage
and current regulation.
Signed-off-by: Kiara Navarro <knavarro@paltatech.com>
inherit from base.yaml instead of sd-device since this device is not
meant to be used on an SD bus.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Accidentall chosen wrong interrup level for flash controller
fixed to be inline with other devices flash controller level
Signed-off-by: Petri Pitkanen <petri.pitkanen@silabs.com>
Add support for Nuvoton numaker m55m1x series EMAC controller.
Also include NOCACHE_MEMORY allocation.
Support to generate random mac address and remove emac data flash.
Signed-off-by: cyliang tw <cyliang@nuvoton.com>
Add a way to assign the dynamic address for a primary controller. This
is the address that is broadcasted out with the ccc DEFTGTS, and is the
address that secondary controllers use to communicate with the primary
controller.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Renamed the drv8424 stepper driver to indicate its support of the drv8424,
drv8425, drv8426, drv8434 and drv8436 stepper controllors. Also made the
microstep pins optional. All test files are renamed as well.
Signed-off-by: Jan Behrens <jan.behrens@navimatix.de>
ADC output values can have noise, even if the input is 0V. Add a noise
threshold so that raw ADC readings below the threshold can be zeroed
out. By default the threshold is disabled.
Signed-off-by: Jordan Yates <jordan@embeint.com>
Update exit-latency-us with newly measured values. Measurement is
taking into account additional timing compared to wakeup from
WFI.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
This renames the STM32_PWR_WKUP_PIN_SRC_x symbols to better match
their meaning. It also adds a new symbol (STM32_PWR_WKUP_PIN_NOT_MUXED)
for SoCs without wake-up mux support.
Signed-off-by: Tomáš Juřena <jurenatomas@gmail.com>
The IT8xxx2 timer driver uses timer 7 and timer 8 to implement the alarm
timer and the top timer, respectively.
Signed-off-by: Yunshao Chiang <Yunshao.Chiang@ite.com.tw>
Add possibility to use pinctrl to configure pins that should be assigned
to nRF VPR coprocessors and also provide a way of preventing activation
of the nordic_vpr_launcher driver for an enabled VPR so that it can be
supplied with the code to execute and launched in a custom way.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
