Add the watchdog controller node to the PSoC4 SoC definition.
Signed-off-by: Dharun krithik k <dharunkrithik@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
Add device Self Test procedure. It is required to enable the
per device self-test DT property as well as the LSM6DSV16X_SELF_TEST
configuration.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add vendor-specific compatible strings to RCM and SIM nodes:
- "nxp,rcm-hwinfo" for Reset Control Module (hwinfo-reset functionality)
- "nxp,sim-uuid" for System Integration Module (hwinfo-UUID functionality)
Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
Modify the description format of all SCMI-related bindings such that the
SCMI/SHMEM acronym is spelled out in between parentheses and not the other
way around. This will make the generated documentation more compact.
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Sort ble radio feature properties alphabetically according to
the coding standard.
Certain features on xg22 and xg28 depend on the specific SoC
selected, move the properties from the generic .dtsi file to
the SoC specific one.
Signed-off-by: Aksel Skauge Mellbye <aksel.mellbye@silabs.com>
Enable automatic runtime power management for all LPI2C instances
to support interrupt-driven when suspend and resume device
by scmi firmware interface.
On i.MX943 with System Manager firmware, clock operations require
SCMI communication which needs interrupts. The system-managed PM
approach locks interrupts during device suspend/resume, preventing
SCMI from completing.
Although lpi2c mcux driver have enabled pm runtime in driver init,
set lpi2c auto runtime in dts to record this issue that only
device runtime can be supported now.
Signed-off-by: Yongxu Wang <yongxu.wang@nxp.com>
This commit adds support for the Parade Tech TMA525B capacitive touch
controller. The driver supports both interrupt-driven and polling modes,
and can handle up to 4 simultaneous touch points.
Key features:
- I2C communication interface
- Multi-touch support (up to 4 touch points)
- Interrupt mode with GPIO callback support
- Polling mode with timer
- Power management support with PM notifier
- Reset and power control via GPIO
- Touch event tracking (down, contact, up)
Signed-off-by: Kate Wang <yumeng.wang@nxp.com>
Add support for named clocks in the WDOG32 driver to properly handle
different clock sources. The driver now uses clock-names property to
identify which clock source is being used, based on the clk-source
property.
This change enables proper clock configuration and control for platforms
where the clock frequency is not statically defined in the device tree.
The driver will now configure and enable the appropriate clock during
initialization.
Updated all affected device tree files to include the clock-names
property aligned with their clk-source configuration.
Signed-off-by: Albort Xue <yao.xue@nxp.com>
The STM32H7RS series embeds a parallel interface based DCMIPP
block allowing to capture data from sensors and store them into
memory.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Only st,stm32-dcmipp is described and only st,stm32n6-dcmipp
was used within the driver to decide if CSI / PIXEL_PIPES
are available. Instead of this, look at HAL provided macros
to know if the selected soc has the functionalities or not.
Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
-Change base register for TCPWM to 0x40200000
which controls the entire IP block.
- enabling/disabling counters and handling
global interrupts.
Signed-off-by: Deepika R <deepika@aerlync.com>
Signed-off-by: Sayooj K Karun <sayooj@aerlync.com>
- Decouple interrupt settings from gpio drivers, making them configured
and handled independently by tint and ext_irq drivers.
- Remove device-specific hardware definitions in gpio_renesas_rz.h and
take advantage of pinctrl data type and dtsi for certain series.
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Remove required tag from `req` and `reg-names` as the pinctrl node is
changed into a dummy node to avoid cycle in devicetree between irq,
gpio and pinctrl so these properties are not required for Renesas
RZ/A,G,V series.
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Added `#irq-cells` to `renesas,rz-ext-irq` nodes to reflect the update
of `renesas,rz-ext-irq` binding.
Signed-off-by: Nhut Nguyen <nhut.nguyen.kc@renesas.com>
Implement power management with IDLE, STOP, PSTOP1, and PSTOP2 modes.
- Add power state definitions with timing parameters
- Implement pm_state_set() with proper SLEEPDEEP handling
- Add XIP-safe WFI execution from RAM
- Enable SMC driver and power mode protection
- Remove forced timer Kconfig defaults
Signed-off-by: Holt Sun <holt.sun@nxp.com>
It seems there is currently no impact except a warning displayed when
building: "unit address and first address in 'reg' (0x40113000) don't
match for /soc/peripheral@50000000/opamp@113000"
Signed-off-by: Joel Guittet <joelguittet@gmail.com>
For STM32F446, F469, F479 and F7x, add the clk48 node in the dtsi.
This allows configuring the clock source of the CLK48 clock.
It is necessary to add it for the SDIO peripheral that can have either
SYSCLK or CLK48 as clock source.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add some missing clock sources and reorganize them to class the PLL outputs
together for STM32F4 and F7.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
For all STM32F2, F4 and F7, use the new binding instead of the various ones
previously defined.
For F411 and F446, this removes the need to define the PLLI2S since it is
already included in F401.
For F7, this commit also adds the PLLI2S that was missing.
Also update post-div-x properties for some boards and overlays.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
STM32F2, F4 and F7 have up to 3 PLLs: PLL, PLLI2S and PLLSAI. These PLLs
are very similar, the principal differences are which outputs are available
for which PLL of each SoC.
Instead of having a large number of files to describe all the possible
very similar variants, use one single binding to rule them all.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add ewm dts node for mimxrt1170.
Enable ewm clock for frdm_mcxe247.
Enable wdog for frdm_mcxe247 and frdm_ke15z.
Signed-off-by: Yves Wang <zhengjia.wang@nxp.com>
This renames the dtsi files in the dts/vendor/nordic
to include the cpuapp in the filename.
At the same time it updates the inclusion of these files
to include the vendor in the path because the same filenames
exists in both:
dts/vendor/nordic
dts/arm/nordic
Signed-off-by: Georgios Vasilakis <georgios.vasilakis@nordicsemi.no>
Rename all dtsi files for Nordic boards for non secure builds
to have a _ prefix before "ns" to increase readiblity.
At the same time, change the path to include the arm
folder in order to be able to differentiate with the
vendor folder which has similar files.
Signed-off-by: Georgios Vasilakis <georgios.vasilakis@nordicsemi.no>
Refactor the SRAM partitioning for TF-M builds for the Nordic
nRF54L devices. Instead of using the reserved-memory node this
just partitions the normal SRAM node. This aligns the design with
the rest of the Nordic devices.
Signed-off-by: Georgios Vasilakis <georgios.vasilakis@nordicsemi.no>
Update the memory layout of nrf54l10 for TF-M builds so that
it does not reserve any memory for FLPR since it is not supported
with TF-M.
This affects both the SRAM and the RRAM partitioning.
I moved the SRAM partitioning to the nrf54l10_ns_partition.dtsi
and removed it from individual board files so it can be updated
for all the platforms in one place.
Signed-off-by: Georgios Vasilakis <georgios.vasilakis@nordicsemi.no>
