Commit graph

8801 commits

Author SHA1 Message Date
Yishai Jaffe
0df6736bb9 drivers: serial: define default values for basic options
Defined default values for baudrate, parity, stop bits, and data bits.
This removes complexity and obfuscation from the code.

Signed-off-by: Yishai Jaffe <yishai1999@gmail.com>
2025-01-15 19:04:56 +01:00
Tomas Galbicka
d4d180c216 dts: drivers: Add DTS MBOX entry for NXP MCXN947
This commit adds MBOX device tree entry for MCXN947.
Adds support for MCXN in NXP ipm and mbox drivers.

Signed-off-by: Tomas Galbicka <tomas.galbicka@nxp.com>
2025-01-15 19:04:42 +01:00
Pierrick Curt
8250cc68b7 drivers: adc: ad4114: add driver support
The AD4114 is a low power, low noise, 24-bit, sigma-delta ADC.
This driver allows to use it with the Zephyr ADC API. It uses
the continuous acquisition ADC feature.

This ADC allows many configutations, but this driver uses it as the
most generic way :
- each can channel can be enable or disable using the device
tree configuration
- configure two setups (one for unipolar inputs, one for bipolar inputs)
- use an external clock

Signed-off-by: Pierrick Curt <pierrickcurt@gmail.com>
2025-01-15 19:04:20 +01:00
Jianxiong Gu
391008b097 drivers: tcpc: Add TCPC driver for RT1715
Add support for RT1715.

Signed-off-by: Jianxiong Gu <jianxiong.gu@outlook.com>
2025-01-15 19:03:27 +01:00
Yangbo Lu
7c57fec0d0 drivers: firmware: scmi: add power domain protocol
Added helpers for ARM SCMI power dmomain protocol.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
2025-01-15 19:03:00 +01:00
Jianxiong Gu
4e201f21c8 dts: riscv: include riscv,cpus.yaml in qingke-v2
This commit updates the qingke-v2 binding to include `riscv,cpus.yaml`
instead of `cpu.yaml`.

Signed-off-by: Jianxiong Gu <jianxiong.gu@outlook.com>
2025-01-15 11:58:58 +01:00
Jianxiong Gu
957ec63897 dts: wch: add all ch32v003 packages
Add support for all ch32v003 packages.

Signed-off-by: Jianxiong Gu <jianxiong.gu@outlook.com>
2025-01-15 11:58:58 +01:00
Jianxiong Gu
a7e15654eb dts: wch: move ch32v00x.dtsi to ch32v0/ch32v003.dtsi
The CH32V003 belongs to the CH32V0 series. To improve code organization
and maintainability, all related files should be grouped together in a
dedicated subdirectory.

Signed-off-by: Jianxiong Gu <jianxiong.gu@outlook.com>
2025-01-15 11:58:58 +01:00
Jilay Pandya
c5aed65a54 dts: bindings: gpio: use hyphens instead of underscore
replace underscore with hyphens to comply with device tree spec

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2025-01-15 11:51:33 +01:00
James Roy
32e42856bc dts: bindings: display: Change the property names in the overlay
Unify property names in bindings and overlay, using
hyphens (-) instead of underscores (_) as separators.

Signed-off-by: James Roy <rruuaanng@outlook.com>
2025-01-15 11:51:23 +01:00
Jilay Pandya
ef8cb37cd2 dts: bindings: sdhc: replace underscore with hyphen
Adhering to device tree spec, underscore is replaced with hyphen

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2025-01-15 01:37:45 +01:00
Henrik Brix Andersen
c46247b550 dts: arm: atmel: samx7x: move SAM E70/V71 DMA header to dt-bindings
Move the Atmel SAM E70/V71 DMA PERIDs header file to
include/zephyr/dt-bindings/dma and unify it for use with the entire product
family (SAM E70/S70/V70/V71).

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2025-01-14 22:54:33 +01:00
Henrik Brix Andersen
b76d592966 dts: arm: atmel: samx7x: synchronize SAM E70/V71 DMA PERIDs
Synchronize the Atmel SAM E70/V71 DMA Peripheral Hardware Requests HW
Interface Numbers and adjust them to match those listed in the SAM
E70/S70/V70/V71 datasheet.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2025-01-14 22:54:33 +01:00
Henrik Brix Andersen
6d6441db3b dts: arm: atmel: samx7x.dtsi: sort devicetree nodes according to address
Sort the Atmel SAMx7x periheral devicetree nodes according to their address
in the memory map.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2025-01-14 20:49:45 +01:00
Mathieu Choplain
be8669107b dts: arm: st: wb0: add timers
Add nodes for all timer peripherals to DTSI of the STM32WB0 series.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
2025-01-14 20:49:30 +01:00
Gerson Fernando Budke
ea7922195b clocks: atmel: sam0: Fix gclk and mclk clock bindings
The Atmel SAM0 SoC enable peripherals clocks in distinct places: PM and
MCLK. The old devices had defined the peripheral clock enable bit at PM.
On the newer devices this was extracted on a dedicated memory section
called Master Clock (MCLK). This change excludes the dedicated bindings
in favor of a generic approach that cover all cases.

Now the clocks properties is complemented by the atmel,assigned-clocks
property. It gives the liberty to user to customize the clock source
from a generic clock or configure the direct connections.

All peripherals drivers were reworked with the newer solution.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2025-01-14 20:49:03 +01:00
Gerson Fernando Budke
ecd0267508 dts: clock: Add atmel,assigned-clock property
Some platforms require special clock selection options. This could be
made using the already defined assigned-clocks from Linux clocks.

  See 93ee800895/dtschema/schemas/clock/clock.yaml (L24)

This introduces the vendor atmel,assigned-clocks and
atmel,assigned-clock-names properties to generalize those conditions
in Zephyr for Atmel sam0 SoC series.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2025-01-14 20:49:03 +01:00
Tom Chang
54a714a61d dts: flash: npcx: add property for SPI device size
This commit adds two properties. One is used to set size of the low
flash device and the other is used to select the low flash device. Then,
the eSPI TAF request can access between two flash devices base on this
setting.

Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
2025-01-14 17:57:50 +01:00
Lucien Zhao
87e4db9b86 drivers: gpio: update gpio_mcux.c driver
update gpio driver to adapt rt7xx gpio model:
1. There is no PORT_Type on RT7xx,so set PORT_Type as void
2. Add port_no parameter in gpio_mcux_config to adapt IOPCTL driver
3. Add gpio-port-offest parameter in blinding, it will help map the
   relation between index n and gpio port when some soc have domain
   access attribution.
3. Splite gpio_mcux_configure function into two functions(
   gpio_mcux_iopctl_configure and gpio_mcux_port_configure)
   according to CONFIG_PINCTRL_NXP_IOCON macro
4. Add code to adapt RT700 GPIO attribute configuration

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-01-14 17:56:53 +01:00
Lucien Zhao
1aa49ae28f dts: bindings: add the first version binding for nxp,xspi IP
add nxp,xspi-device.yaml
add nxp,xspi-mx25um51345g.yaml
add nxp,xspi.yaml

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-01-14 17:56:53 +01:00
Lucien Zhao
83fab799e8 dts: arm: nxp: add RT7xx dts files
add RT7xx dts files
add iocon/gpio/flexcomm/clock instances in dts

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-01-14 17:56:53 +01:00
Tim Lin
7114989c4e dts: mfd: it8801: Require irq-gpios to prevent driver crashes
Marked the irq-gpios property as "required: true" in the yaml file.
This ensures that the property is always defined in the device tree,
preventing the driver from crashing when irq-gpios is missing.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2025-01-14 17:55:51 +01:00
Pisit Sawangvonganan
4b7a6bf2b6 dts: arm: st: stm32h5: relocate power-states node
Relocate the `power-states` node from under the `soc` node to
the `cpus` node, making it consistent with other STM32 SoC series.

This resolves the device-tree warning:
(simple_bus_reg): /soc/power-states: missing or empty reg/ranges property.

Signed-off-by: Pisit Sawangvonganan <pisit@ndrsolution.com>
2025-01-14 13:25:25 +01:00
James Roy
d1b782e5b3 dts: bindings: counter: Change the property names in the overlay
Rename the following properties in binding and overlay:
-- primary_source => primary-source
-- secondary_source => secondary-source
-- filter_count => filter-count
-- filter_period => filter-period

Signed-off-by: James Roy <rruuaanng@outlook.com>
2025-01-14 13:24:14 +01:00
Lucien Zhao
1b791775d3 dts: arm: nxp: rt118x: add lpspi and edma instances for RT118X
add lpspi and edma instances for RT118X
Find mpu description missed for RT1180X, add mpu in dts
add dmas controller setting for lpspi instances

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-01-13 10:08:36 +01:00
Lucien Zhao
605ade6bc4 drivers: dma: dma_mcux_edma: support EDMA IP in edma drivers
Multi channels share one IRQ, add channels-shared-irq-mask on RT1180
attribution to describe the channel shared status, and add code
implementation to register the handler function for each channel
in different interrupts.

Fix legacy building warning issue

Signed-off-by: Lucien Zhao <lucien.zhao@nxp.com>
2025-01-13 10:08:36 +01:00
Khoa Nguyen
cb71f66bbc dts: arm: renesas: ra: add support entropy driver using SCE9
Add support entropy for RA6M5, RA6M4, RA6E1, RA4M3, RA4M2 soc

Signed-off-by: Danh Doan <danh.doan.ue@bp.renesas.com>
Signed-off-by: Khoa Nguyen <khoa.nguyen.xh@renesas.com>
2025-01-13 08:44:53 +01:00
Minh Hoang
0b5e17f69b drivers: entropy: Add support for SCE9 to entropy driver
add support SCE9 to entropy driver for Renesas RA

Signed-off-by: Minh Hoang <minh.hoang.wm@bp.renesas.com>
Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
2025-01-13 08:44:53 +01:00
Henrik Brix Andersen
8998b1a78b dts: bindings: can: infineon: xmc4xxx: rename clock_div8 to clock-div8
Rename the Infineon XMC4xxx CAN node devicetree property clock_div8 to
clock-div8 (prefering hyphens over underscores to separate devicetree
property names).

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2025-01-10 21:08:31 +01:00
Scott Worley
cbf867ff2c drivers: serial: mec5: Microchip MEC5 UART serial driver
We add a serial UART driver for Microchip MEC5 HAL based chips.
The driver supports polling, interrupts, and runtime configuration
features. Power management will be implemented in a future PR.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2025-01-10 18:58:58 +01:00
Nazar Palamar
01252ad877 drivers: dma: initial implementation CAT1 DMA driver
Initial implementation of DMA driver for CAT1 device

Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
2025-01-10 14:48:24 +01:00
Lin Yu-Cheng
a3c0b03915 driver: serial: Add UART driver initial version of RTS5912.
Add UART driver for Realtek RTS5912.

Signed-off-by: Lin Yu-Cheng <lin_yu_cheng@realtek.com>
2025-01-10 11:58:02 +01:00
Lin Yu-Cheng
2656029c3a driver: gpio: Add gpio driver initial version of RTS5912.
Add gpio driver for Realtek RTS5912.

Signed-off-by: Lin Yu-Cheng <lin_yu_cheng@realtek.com>
2025-01-10 11:58:02 +01:00
Lin Yu-Cheng
cfb2074a5e driver: timer: Add timer driver initial version of RTS5912.
Add timer driver for Realtek RTS5912.

Signed-off-by: Lin Yu-Cheng <lin_yu_cheng@realtek.com>
2025-01-10 11:58:02 +01:00
Lin Yu-Cheng
471cc3512d soc: realrek: ec: Add debug_swj initial version of RTS5912.
Add swj driver for Realtek RTS5912.

Signed-off-by: Lin Yu-Cheng <lin_yu_cheng@realtek.com>
2025-01-10 11:58:02 +01:00
Lin Yu-Cheng
2c25182572 driver: pinctrl: Add pinctrl initial version of RTS5912.
Add pinctrl driver for Realtek RTS5912.

Signed-off-by: Lin Yu-Cheng <lin_yu_cheng@realtek.com>
2025-01-10 11:58:02 +01:00
Lin Yu-Cheng
6ea7560ce2 driver: clock_control: Add clock controller initial version of RTS5912.
Add clock controller driver for Realtek RTS5912.

Signed-off-by: Lin Yu-Cheng <lin_yu_cheng@realtek.com>
2025-01-10 11:58:02 +01:00
Lin Yu-Cheng
041bf2e4c6 dts: realtek: Add RTS5912 device tree files
Add Realtek RTS5912 chip and driver device tree files.

Signed-off-by: Lin Yu-Cheng <lin_yu_cheng@realtek.com>
2025-01-10 11:58:02 +01:00
Marcin Lyda
5c8cf4c127 drivers: rtc: Add Micro Crystal RV-8803-C7 RTC driver
This PR adds support for Micro Crystal RV-8803-C7
RTC chip.

Supported functionalities:
* Update interrupt
* Alarm interrupt
* Time setting/reading
* Alarm setting/reading
* Aging offset calibration setting/reading
* CLKOUT configuration

Tested on nRF52833-DK using rtc_api test set.

Signed-off-by: Marcin Lyda <elektromarcin@gmail.com>
2025-01-09 23:26:37 +01:00
Dhruv Menon
96cadba815 boards: beagle: Enable I2C6 on BeagleBone AI64 board
Provide I2C Support to BeagleBone AI64 board.

Signed-off-by: Dhruv Menon <dhruvmenon1104@gmail.com>
2025-01-09 23:26:23 +01:00
Dhruv Menon
1d8ea45a8d drivers: i2c: Base OMAP I2C support for TI-K3 processor
The OMAP I2C provides support for I2C serial interface on TI K3 series.
It is compatible with Philips I2C physical layer.
The commit includes:
Zephyr i2c api implementation
Polling Mode

Signed-off-by: Dhruv Menon <dhruvmenon1104@gmail.com>
2025-01-09 23:26:23 +01:00
Franciszek Pindel
5aeda6fe7d alder lake: Add missing intel,x86_64 compat
Second core doesn't have `intel,x86_64` compat, this commit adds it.

Signed-off-by: Franciszek Pindel <fpindel@antmicro.com>
2025-01-09 18:12:07 +01:00
Omeed Baboli
f9e4bc3af2 dts: boards: stm32h562: add timer 8
TIM8 was missing from the dts board file. This is one of the
advandaced-control timers on the STM32H562xx/STM32H563xx processors.

Signed-off-by: Omeed Baboli <omeedbaboli@gmail.com>
2025-01-09 11:51:22 +01:00
Gerard Marull-Paretas
b56c61a1d8 dts: bindings: nordic,nrf-can: require clock-names
Specify two source clocks: AUXPLL and HSFLL.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2025-01-09 09:51:52 +01:00
Gerard Marull-Paretas
332a3354f3 dts: nordic: nrf9280: define hsfll120
Define HSFLL120 clock.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2025-01-09 09:51:52 +01:00
Sven Ginka
fb53ea024a dts: sensry: add pinctrl
Add pin ctrl to the sy1xx device tree.

Signed-off-by: Sven Ginka <s.ginka@sensry.de>
2025-01-09 04:04:06 +01:00
Sven Ginka
804e3f6497 soc: sensry: add pinctrl
Add pin control support for the sy1xx soc.

Signed-off-by: Sven Ginka <s.ginka@sensry.de>
2025-01-09 04:04:06 +01:00
Junho Lee
337d27141f boards: raspberrypi: add PCIe support for Raspberry Pi 5
Enable two PCIe controllers for Raspberry Pi 5.

Signed-off-by: Junho Lee <junho@tsnlab.com>
2025-01-08 21:03:03 +01:00
Junho Lee
5edfd02691 drivers: pcie: add brcmstb pcie controller driver
Add PCIe controller driver for brcmstb, required by Raspberry Pi 5.

Signed-off-by: Junho Lee <junho@tsnlab.com>
2025-01-08 21:03:03 +01:00
Stephan Linz
7cd7c82aa1 drivers: mipi-dbi-spi: use string for xfr-min-bits property
Use a string for the xfr-min-bits property over an integer value, as this
significantly improves the readability of the MIPI DBI SPI device binding.

Signed-off-by: Stephan Linz <linz@li-pro.net>
2025-01-08 21:01:51 +01:00