dts: bindings: gpio: use hyphens instead of underscore

replace underscore with hyphens to comply with device tree spec

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
This commit is contained in:
Jilay Pandya 2025-01-11 14:43:15 +01:00 committed by Benjamin Cabé
commit c5aed65a54
9 changed files with 30 additions and 30 deletions

View file

@ -34,9 +34,9 @@
compatible = "snps,creg-gpio";
reg = <0xf0000014 0x4>;
ngpios = <6>;
bit_per_gpio = <1>;
off_val = <0>;
on_val = <1>;
bit-per-gpio = <1>;
off-val = <0>;
on-val = <1>;
gpio-controller;
#gpio-cells = <2>;

View file

@ -135,9 +135,9 @@
compatible = "snps,creg-gpio";
reg = <0xf00014b0 0x4>;
ngpios = <12>;
bit_per_gpio = <2>;
off_val = <0>;
on_val = <2>;
bit-per-gpio = <2>;
off-val = <0>;
on-val = <2>;
gpio-controller;
#gpio-cells = <2>;

View file

@ -135,9 +135,9 @@
compatible = "snps,creg-gpio";
reg = <0xf00014b0 0x4>;
ngpios = <12>;
bit_per_gpio = <2>;
off_val = <0>;
on_val = <2>;
bit-per-gpio = <2>;
off-val = <0>;
on-val = <2>;
gpio-controller;
#gpio-cells = <2>;

View file

@ -97,7 +97,7 @@
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
vbatts_pins = <2 3 4>;
vbatts-pins = <2 3 4>;
status = "disabled";
};

View file

@ -11,7 +11,7 @@ properties:
reg:
required: true
pin_mask:
pin-mask:
type: int
required: true
description: |
@ -21,7 +21,7 @@ properties:
NCT3808: <0xdc>
others: <0xff>
pinmux_mask:
pinmux-mask:
type: int
description: |
NCT38XX series port 0 has Pin Multiplexing functionality. However, not

View file

@ -23,8 +23,8 @@ description: |
gpio-controller;
#gpio-cells = <2>;
ngpios = <8>;
pin_mask = <0xff>;
pinmux_mask = <0xf7>;
pin-mask = <0xff>;
pinmux-mask = <0xf7>;
};
gpio@1 {
@ -33,7 +33,7 @@ description: |
gpio-controller;
#gpio-cells = <2>;
ngpios = <8>;
pin_mask = <0xff>;
pin-mask = <0xff>;
};
};
};
@ -53,8 +53,8 @@ description: |
gpio-controller;
#gpio-cells = <2>;
ngpios = <8>;
pin_mask = <0xdc>;
pinmux_mask = <0xff>;
pin-mask = <0xdc>;
pinmux-mask = <0xff>;
};
};
};
@ -74,8 +74,8 @@ description: |
gpio-controller;
#gpio-cells = <2>;
ngpios = <8>;
pin_mask = <0xdc>;
pinmux_mask = <0xff>;
pin-mask = <0xdc>;
pinmux-mask = <0xff>;
};
};
};

View file

@ -15,7 +15,7 @@ properties:
type: int
required: true
vbatts_pins:
vbatts-pins:
type: array
description: Array of vbatt pin on port

View file

@ -11,15 +11,15 @@ properties:
reg:
required: true
bit_per_gpio:
bit-per-gpio:
type: int
required: true
off_val:
off-val:
type: int
required: true
on_val:
on-val:
type: int
required: true

View file

@ -172,8 +172,8 @@
gpio-controller;
#gpio-cells = <2>;
ngpios = <8>;
pin_mask = <0xff>;
pinmux_mask = <0xf7>;
pin-mask = <0xff>;
pinmux-mask = <0xf7>;
};
gpio@1 {
@ -182,7 +182,7 @@
gpio-controller;
#gpio-cells = <2>;
ngpios = <8>;
pin_mask = <0xff>;
pin-mask = <0xff>;
};
};
};
@ -201,8 +201,8 @@
gpio-controller;
#gpio-cells = <2>;
ngpios = <8>;
pin_mask = <0xdc>;
pinmux_mask = <0xff>;
pin-mask = <0xdc>;
pinmux-mask = <0xff>;
};
};
};
@ -221,8 +221,8 @@
gpio-controller;
#gpio-cells = <2>;
ngpios = <8>;
pin_mask = <0xdc>;
pinmux_mask = <0xff>;
pin-mask = <0xdc>;
pinmux-mask = <0xff>;
};
};
};