drivers: pwm: Add driver for LiteX PWM peripherial
PWM driver for LiteX SoC builder was created. Because LiteX supports only one channel for each PWM device, an appropriate restriction was made. Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com> Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
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6 changed files with 189 additions and 0 deletions
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@ -155,6 +155,7 @@
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/drivers/pcie/ @andrewboie
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/drivers/pinmux/stm32/ @rsalveti @idlethread
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/drivers/pinmux/*hsdk* @iriszzw
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/drivers/pwm/*litex* @mateusz-holenko @kgugala @pgielda
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/drivers/sensor/ @MaureenHelm
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/drivers/sensor/ams_iAQcore/ @alexanderwachter
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/drivers/sensor/ens210/ @alexanderwachter
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@ -14,6 +14,7 @@ zephyr_library_sources_ifdef(CONFIG_PWM_LED_ESP32 pwm_led_esp32.c)
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zephyr_library_sources_ifdef(CONFIG_PWM_SAM pwm_sam.c)
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zephyr_library_sources_ifdef(CONFIG_PWM_MCUX pwm_mcux.c)
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zephyr_library_sources_ifdef(CONFIG_PWM_XEC pwm_mchp_xec.c)
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zephyr_library_sources_ifdef(CONFIG_PWM_LITEX pwm_litex.c)
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zephyr_library_sources_ifdef(CONFIG_USERSPACE pwm_handlers.c)
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zephyr_library_sources_ifdef(CONFIG_PWM_SHELL pwm_shell.c)
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@ -59,4 +59,6 @@ source "drivers/pwm/Kconfig.mcux"
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source "drivers/pwm/Kconfig.xec"
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source "drivers/pwm/Kconfig.litex"
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endif # PWM
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22
drivers/pwm/Kconfig.litex
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drivers/pwm/Kconfig.litex
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#
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# Copyright (c) 2019 Antmicro <www.antmicro.com>
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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menuconfig PWM_LITEX
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bool "LiteX PWM driver"
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depends on SOC_RISCV32_LITEX_VEXRISCV
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depends on HAS_DTS
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help
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Enable support for LiteX PWM driver
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if PWM_LITEX
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config PWM_LITEX_INIT_PRIORITY
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int "Init priority"
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default 70
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help
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PWM device driver initialization priority.
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endif # PWM_LITEX
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148
drivers/pwm/pwm_litex.c
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drivers/pwm/pwm_litex.c
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/*
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* Copyright (c) 2019 Antmicro <www.antmicro.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <device.h>
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#include <drivers/pwm.h>
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#include <zephyr/types.h>
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#define REG_EN_ENABLE 0x1
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#define REG_EN_DISABLE 0x0
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/* PWM device in LiteX has only one channel */
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#define NUMBER_OF_CHANNELS 1
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struct pwm_litex_cfg {
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u32_t reg_en_size;
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u32_t reg_width_size;
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u32_t reg_period_size;
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volatile u32_t *reg_en;
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volatile u32_t *reg_width;
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volatile u32_t *reg_period;
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};
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#define GET_PWM_CFG(dev) \
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((const struct pwm_litex_cfg *) dev->config->config_info)
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static void litex_set_reg(volatile u32_t *reg, u32_t reg_size, u32_t val)
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{
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u32_t shifted_data;
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volatile u32_t *reg_addr;
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for (int i = 0; i < reg_size; ++i) {
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shifted_data = val >> ((reg_size - i - 1) * 8);
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reg_addr = ((volatile u32_t *) reg) + i;
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*(reg_addr) = shifted_data;
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}
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}
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int pwm_litex_init(struct device *dev)
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{
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const struct pwm_litex_cfg *cfg = GET_PWM_CFG(dev);
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litex_set_reg(cfg->reg_en, cfg->reg_en_size, REG_EN_ENABLE);
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return 0;
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}
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int pwm_litex_pin_set(struct device *dev, u32_t pwm, u32_t period_cycles,
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u32_t pulse_cycles, pwm_flags_t flags)
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{
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const struct pwm_litex_cfg *cfg = GET_PWM_CFG(dev);
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if (pwm >= NUMBER_OF_CHANNELS) {
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return -EINVAL;
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}
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litex_set_reg(cfg->reg_en, cfg->reg_en_size, REG_EN_DISABLE);
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litex_set_reg(cfg->reg_width, cfg->reg_width_size, pulse_cycles);
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litex_set_reg(cfg->reg_period, cfg->reg_period_size, period_cycles);
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litex_set_reg(cfg->reg_en, cfg->reg_en_size, REG_EN_ENABLE);
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return 0;
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}
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int pwm_litex_get_cycles_per_sec(struct device *dev, u32_t pwm, u64_t *cycles)
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{
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if (pwm >= NUMBER_OF_CHANNELS) {
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return -EINVAL;
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}
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*cycles = sys_clock_hw_cycles_per_sec();
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return 0;
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}
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static const struct pwm_driver_api pwm_litex_driver_api = {
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.pin_set = pwm_litex_pin_set,
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.get_cycles_per_sec = pwm_litex_get_cycles_per_sec,
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};
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/* Device Instantiation */
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/* LiteX regisers use only first byte from 4-bytes register, that's why they
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* occupy larger space in memory. We need to know the size that is
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* actually used, that is why the register size from dts is divided by 4.
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*/
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#define PWM_LITEX_INIT(n) \
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static const struct pwm_litex_cfg pwm_litex_cfg_##n = { \
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.reg_en = \
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(volatile u32_t *) \
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DT_INST_##n##_LITEX_PWM_ENABLE_BASE_ADDRESS, \
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.reg_en_size = DT_INST_##n##_LITEX_PWM_ENABLE_SIZE / 4, \
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.reg_width = \
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(volatile u32_t *) \
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DT_INST_##n##_LITEX_PWM_WIDTH_BASE_ADDRESS, \
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.reg_width_size = DT_INST_##n##_LITEX_PWM_WIDTH_SIZE / 4, \
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.reg_period = \
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(volatile u32_t *) \
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DT_INST_##n##_LITEX_PWM_PERIOD_BASE_ADDRESS, \
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.reg_period_size = DT_INST_##n##_LITEX_PWM_PERIOD_SIZE / 4, \
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}; \
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\
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DEVICE_AND_API_INIT(pwm_##n, \
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DT_INST_##n##_LITEX_PWM_LABEL, \
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pwm_litex_init, \
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NULL, \
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&pwm_litex_cfg_##n, \
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POST_KERNEL, \
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CONFIG_PWM_LITEX_INIT_PRIORITY, \
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&pwm_litex_driver_api \
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)
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#ifdef DT_INST_0_LITEX_PWM_LABEL
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PWM_LITEX_INIT(0);
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#endif
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#ifdef DT_INST_1_LITEX_PWM_LABEL
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PWM_LITEX_INIT(1);
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#endif
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#ifdef DT_INST_2_LITEX_PWM_LABEL
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PWM_LITEX_INIT(2);
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#endif
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#ifdef DT_INST_3_LITEX_PWM_LABEL
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PWM_LITEX_INIT(3);
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#endif
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#ifdef DT_INST_4_LITEX_PWM_LABEL
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PWM_LITEX_INIT(4);
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#endif
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#ifdef DT_INST_5_LITEX_PWM_LABEL
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PWM_LITEX_INIT(5);
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#endif
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#ifdef DT_INST_6_LITEX_PWM_LABEL
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PWM_LITEX_INIT(6);
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#endif
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#ifdef DT_INST_7_LITEX_PWM_LABEL
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PWM_LITEX_INIT(7);
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#endif
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#ifdef DT_INST_8_LITEX_PWM_LABEL
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PWM_LITEX_INIT(8);
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#endif
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15
dts/bindings/pwm/litex,pwm.yaml
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15
dts/bindings/pwm/litex,pwm.yaml
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#
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# Copyright (c) 2019 Antmicro <www.antmicro.com>
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#
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# SPDX-License-Identifier: Apache-2.0
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#
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description: LiteX PWM controller
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include: [pwm-controller.yaml, base.yaml]
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compatible: "litex,pwm"
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properties:
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reg:
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required: true
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