Adds device tree configs for dppic and ipct connections
between the Radio core and the Global domains.
The connections are required by the radio driver.
Signed-off-by: Piotr Koziar <piotr.koziar@nordicsemi.no>
Currently flash controller driver builds and runs only on M7.
This patch supports enablement of the driver on M4 CPUs. The
main issue in using the driver on M4 is that LL_GetFlashSize()
to read the flash size works only on M7 as the internal register
is not accessible from M4. So to use the driver on M4, add a dt
property, bank2-flash-size, to configure flash size of bank2.
this will allow gradual support of flash controller driver
on M4 of all supported STMH7 boards by defining the above
dt property and testing it. Currently this is verified only
on STM32H747i-disco board.
Signed-off-by: Murali Karicheri <murali.karicheri@sandc.com>
GR716A has two GRGPIO2 controllers.
This adds the GPIO controller description to the DTS and
makes the GPIO option available in the kernel configuration.
Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
This commit adds a description for the lsm9ds1 sensor,
with a .h file containing all configuration options.
Signed-off-by: Miguel Gazquez <miguel.gazquez@bootlin.com>
This commit introduces the ability to set the CAN
interface from command-line. This is helpful
if we want to run multiple instances of the app
with different CAN interfaces without making
separate compilations for each instance.
Signed-off-by: Kacper Dalach <dalachowsky@gmail.com>
The driver right now only allows inverting the input value, which can be
useful for differential channels but is quite confusing for single ended
ones. Implement a simple output inversion flag instead to make up for
that.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Updates dts files to use the same GPIOTE interrupt lines as NRFX
for zephyr when TF-M is used.
Signed-off-by: Vidar Lillebø <vidar.lillebo@nordicsemi.no>
In S32K1 devices, Arm Systick clock frequency is equal to the
CPU core clock frequency, and its value can be obtained from
devicetree.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Correct license identifiers in two files copied from internal Nordic
repositories that were not properly adjusted for Zephyr:
- dts/bindings/flash_controller/nordic,rram-controller.yaml (added in
commit 3a8ee7df91)
- dts/bindings/misc/nordic,nrf-dppic-local.yaml (added in commit
796d09d2a6)
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This patch adds support for the rx-invert and tx-invert device-tree
properties to the uart_lpc11u6x driver for USARTs 1, 2, 3 and 4.
Note that this feature is not supported by USART 0.
Signed-off-by: Simon Guinot <simon.guinot@sequanux.org>
remove litex,sys-clock-frequency from litex,clk,
because we already define that in the clock-frequency of cpu0.
This can be accessed via
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
These properties are not used by the driver at all, but are
inconveniently marked as required. Lets just remove them.
Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
DTC warning caused by reg address not matching unit address,
but SRAM node address is translated by ranges property anyways.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The unit address didn't match reg which causes the warning, but
flexspi should be part of the peripheral node space anyways.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add new property 'nxp,reference-cells' for vref node.
Remove lpadc nodes 'nxp,reference-supply' property.
Add new property 'nxp,references' for lpadc nodes.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Add specifier cells for nxp vref, when some other
peripherals use the vref to provide reference voltage,
this cells can be used to pass-in vref target voltage.
Signed-off-by: Zhaoxiang Jin <Zhaoxiang.Jin_1@nxp.com>
Remove d0i1 and change threshold for d0i2 to 10ms for pm setting
according to the requirements to pass CTS for chrome projects.
Signed-off-by: Leifu Zhao <leifu.zhao@intel.com>
According to the RV32M1 Series Manual, Rev 1.1 RV32M1 series supports the C
extension, and doesn't support the A extension. Apply fixes accordingly.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
Currently imx8mm/n use pinctrl binding of nxp,imx8m-pinctrl.yaml which
is used for imx8mq series platforms, but imx8mm/n have different pinctrl
hardware module with imx8mq, so change imx8mm/n to use binding of
nxp,imx8mp-pinctrl.yaml as imx8mm, imx8mn and imx8mp have the same
pinctrl hardware module.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Add CANXL MRU handler, use the same RX, TX IRQ number.
Update the error priority that is lower priority than
the the tx_rx_mru priority incase the error interrupt
happens continuously, mru interrupt priority must be
higher to get report error counter. Otherwise the mru
interrupt can be delayed by error interrupt and
never call to MRU handler. This fixes#75022.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
Fix the devicetree bindings to actually be used as the default
configuration, following the example set by various ST sensor devices.
This requires sadly dropping enums and using #defines for various
options as well as repeating many numbers, but presumably is the way to
do it given the precedent set by ST with sensors like the lsm6dso.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Add support for the EK RA8M1 board
This board is using Renesas RA8M1 MCU.
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
This is the initial commit to support for gpio driver
for RA8M1 MCU, the coding is base on renesas fsp hal
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
Add initial support for the Cortex-M85 Core which is an implementation
of the Armv8.1-M mainline architecture.
The support is based on the Cortex-M55 support that already exists in
Zephyr.
Signed-off-by: Duy Nguyen <duy.nguyen.xa@renesas.com>
