On new SoCs, certain pins need to enable the clock setting on the pin
for it to work properly. For now, this has been handled internally in
the pinctrl driver, however, it appears to be an instance-specific
property (e.g. UARTE/SPIM instances in the fast domain do not require
such setting). Move the configuration of this settings to DT, the best
place where to have instance-specific hardware settings.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
HSFLL120 is a clock used by fast peripherals, and it is controlled by
the system controller. From an application perspective, it is a fixed
clock. Note that it has multiple outputs (clk_main @ 320MHz, and
clk_main2|4 which provide the main clock divided by 2 and 4,
respectivelu). Only the main frequency is represented for now.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Programming of the MLCS register was performed on the incorrect bits.
Additionally, saving the new version did not erase the previously set
value, which could result in an incorrect register value.
Signed-off-by: Damian Nikodem <damian.nikodem@intel.com>
nRF53X HV regulator differs from eg nRF52X as it offers a silent mode
option. For this reason, a new compatible is used, even if now such
capability is not exposed yet.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The SoC main supply is part of the POWER IP block. The POWER IP is a
kind of multi-purpose block, so each of its functions is described as a
child node in DT, like similar other MFD. This allows to have specific
properties, e.g. for DC/DC mode.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Some Nordic SoCs, like nRF52 contain an internal regulator for the main
SoC supply. Depending on the SoC, the regulator can have multiple
configurations (e.g. single/double stage), which mainly depends on
supporting "high-voltage" mode or not (VDDH pin supply). This patch adds
bindings for nRF5X regulator and nRF52X HV regulator.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The TMAG3001 is quite similar to the tmag5273 and can be used with just
some small modifications.
Signed-off-by: Fabian Pflug <fabian.pflug@grandcentrix.net>
Enable the Software Watchdog Timer instance on this board.
Now that SWT is enabled for this board and made the default watchdog,
sample.task_wdt.no_hw_fallback can be removed as is no longer needed.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Convert NXP SWT watchdog driver to a native driver and extend the
SWT supported functionalities and configuration options.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Convert power management to native drivers retaining existing
functionalities. Presently only SoC reset support and power control
initialization is supported, but these drivers will be extended to
support power management as well.
MC_ME and MC_RGM peripherals are common enough to be reused by other NXP
S32 devices, whereas PMC has specific implementations for each SoC
series.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
... so that a clear devicetree error is reported when the pinctrl-names
property is missing, not a quite cryptic compilation error about an
undeclared PINCTRL_STATE_*_UPPER_TOKEN symbol in pinctrl.h.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Necessary for supporting for EastRising 0.42 OLED display/board.
Some boards don't have external Iref set up. This is probably done in an
effort to save on component cost. This command is only documented in the
V1.1 revision of the SSD1306 datasheet.
See issue https://github.com/olikraus/u8g2/issues/1047
Signed-off-by: Théo Battrel <theo.battrel@nordicsemi.no>
This commit removes the requirement for pinctrl in the STM32 ADC binding.
This allows usage of ADC with internal channels only (no GPIO pin waste).
Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
1. Support USB-C drivers TCPC, PPC, and VBUS with UTCPD H/W IP
2. UTCPD is interconnected with Timer-triggered EADC for updating
VBUS/VCONN voltage periodically
Signed-off-by: Chun-Chieh Li <ccli8@nuvoton.com>
Add support of sys_poweroff API on m46x series.
It could support SPD standby or DPD deep power down mode.
Signed-off-by: cyliang tw <cyliang@nuvoton.com>
Rename it from litex,eth to litex,liteeth
to reflect the new name of the driver.
Zero got removed from the litex
ethernet compatible, as it now supports
multiple instances.
Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
Convert pin control, GPIO and external interrupt controller drivers
based on SIUL2 peripheral to native drivers. This must be done in a
single commit to preserve atomicity, as these drivers depend on each
other.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Add FPIO support for NXP frdm_ke17z and frdm_ke17z512,
the Fast GPIO(FGPIO) and GPIO share physical pins on the board.
Signed-off-by: Anke Xiao <anke.xiao@nxp.com>
