Commit graph

11,885 commits

Author SHA1 Message Date
Sadik Ozer
10475e4b11 dts: arm: adi: Add MAX32666 SPI instances
This commits add MAX32666 SPI instances in dts file

Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
2024-08-14 14:45:27 -04:00
Mert Ekren
b0cab6474c dts: arm: adi: Add MAX32675 SPI instance and binding file
Add SPI nodes to MAX32675 dtsi file and add binding

Signed-off-by: Mert Ekren <mert.ekren@analog.com>
2024-08-14 14:45:27 -04:00
Tahsin Mutlugun
ea088fc420 dts: arm: adi: Add MAX32680 SPI instances
This commit adds MAX32680 SPI instances in dtsi file.

Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
2024-08-14 14:45:27 -04:00
Furkan Akkiz
097a1fcc02 dts: arm: adi: Add MAX32672 SPI instances
Add SPI instances of MAX32672 to dtsi file.

Signed-off-by: Furkan Akkiz <hasanfurkan.akkiz@analog.com>
2024-08-14 14:45:27 -04:00
Mert Ekren
cac7b9470e dts: arm: adi: Add MAX32670 SPI instance and binding file
Add SPI nodes to MAX32670 dtsi file and add binding

Signed-off-by: Mert Ekren <mert.ekren@analog.com>
2024-08-14 14:45:27 -04:00
Tahsin Mutlugun
15f099594f dts: Add MAX32655 SPI nodes and bindings
Insert spi0 and spi1 in MAX32655 devicetree and add devicetree bindings
for MAX32 SPI driver.

Co-Authored-By: Sadik Ozer <sadik.ozer@analog.com>
Signed-off-by: Tahsin Mutlugun <Tahsin.Mutlugun@analog.com>
2024-08-14 14:45:27 -04:00
Jiafei Pan
7380e287ef dts: binding: refine nxp rdc property
Define rdc property in a yaml file and include it in the peripheral's
dts binding.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2024-08-14 14:43:46 -04:00
Henrik Brix Andersen
ec85b0b4ef dts: arm: nxp: lpc55sxx: fix sram node address
Add missing "0" to the SRAM devicetree node addresses.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2024-08-14 14:43:24 -04:00
Duy Phuong Hoang. Nguyen
356d331db5 soc: renesas: add support for RA8T1 SoC
Initial commit to support RA8T1 SoC

Signed-off-by: The Nguyen <the.nguyen.yf@renesas.com>
Signed-off-by: Duy Phuong Hoang. Nguyen <duy.nguyen.xa@renesas.com>
2024-08-14 10:46:27 +01:00
Duy Phuong Hoang. Nguyen
fbb7d503c5 soc: renesas: Add support for RA8D1 SoC
Initial commit to suppor RA8D1 SoC
This is deveop base on RA8M1 so it will have similar stucture and
feature

Signed-off-by: Duy Phuong Hoang. Nguyen <duy.nguyen.xa@renesas.com>
2024-08-14 10:46:27 +01:00
BH Li
41381fa707 dts: arm: ambiq: add ambiq adc to dtsi file
Add Ambiq adc to DTSI

Signed-off-by: BH Li <bli@ambiq.com>
2024-08-14 10:45:47 +01:00
BH Li
c61792cd7c dts: bindings: adc: add ambiq adc
Add Ambiq adc binding

Signed-off-by: BH Li <bli@ambiq.com>
2024-08-14 10:45:47 +01:00
Sadik Ozer
4df17deb74 dts: arm: adi: Enable sysclk for MAX32690
MAX32690 support sysclk div property
This commit enables this feature

Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
2024-08-13 18:21:57 -04:00
Raffael Rostagno
708783a93e boards: esp32c3_devkitc: Added support
Add support to esp32c3_devkitc-02

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2024-08-13 18:21:10 -04:00
Anke Xiao
20820b40fa dts: arm: nxp: add rtc support for ke17z512
Add RTC driver support for NXP frdm_ke17z512, rtc doesn't exist on
frdm_ke17z board, delete rtc node from its dtsi file.

Signed-off-by: Anke Xiao <anke.xiao@nxp.com>
2024-08-13 09:50:13 +01:00
Anke Xiao
7c7760f4cd drivers: counter: update counter_mcux_rtc.c
Set LPO 1KHZ clock for RTC if clock source 'LPO' is selected.
The frdm_ke17z512 has no 32KHZ OSC, the RTC clock comes from SOSC,
RTC_CLKIN, LPO 1KHZ. But usually the SOSC is connected with 8MHZ
oscilator, so only 1kHZ LPO is usable.
Update the nxp,kinetis-rtc.yaml to select RTC clock source.

Signed-off-by: Anke Xiao <anke.xiao@nxp.com>
2024-08-13 09:50:13 +01:00
Anke Xiao
bbdb5aa575 dts: nxp: nxp_ke1xz.dtsi: add PWT and FTM drivers support
Add pwt and ftm drivers support for MKE17Z.

Signed-off-by: Anke Xiao <anke.xiao@nxp.com>
2024-08-13 09:50:06 +01:00
Anke Xiao
f21d473523 dts: nxp: nxp_ke1xz.dtsi: add adc driver support
Added ADC0 driver support for ke1xz, disabled by default.

Signed-off-by: Anke Xiao <anke.xiao@nxp.com>
2024-08-13 09:49:40 +01:00
Teresa Zepeda Ventura
1f9f335882 soc: silabs: add configuration for silabs soc EFR32MG24B020F1536IM40
Added configurations and dts for soc part number EFR32MG24B020F1536IM40

Signed-off-by: Teresa Zepeda Ventura <teresa.zvent@gmail.com>
2024-08-12 15:14:56 +02:00
Gerard Marull-Paretas
1c689fce18 dts: bindings: nordic,nrf-pinctrl: remove pinctrl nordic,clock-enable
Property is no longer used.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-08-12 12:58:58 +02:00
Gerard Marull-Paretas
746133a24a dts: nordic: nrf54h20: add nordic,clockpin-enable settings
Define which signals require CLOCKPIN enablement at SoC dts files.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-08-12 12:58:58 +02:00
Gerard Marull-Paretas
f463e6d88a soc: nordic: pinctrl: rework nordic,clock-enable
Instead of forcing users to provide this setting, allow to describe
which signals require CLOCKPIN enablement at device nodes. This is later
captured by the pinctrl macros and applied in the pinctrl driver. Note
that name has been adjusted to nordic,clockpin-enable to avoid confusion
with clock related settings.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2024-08-12 12:58:58 +02:00
Jiafei Pan
52f26689c4 board: imx8mn_evk: enable ENET ethernet on Cortex-A Core
Enabled ENET ethernet port on Cortex-A Core for imx8mn EVK board.
Updated document for supported features.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2024-08-12 12:43:54 +02:00
Jiafei Pan
f8f359d2c8 board: imx8mm_evk: enable ENET ethernet on Cortex-A Core
Enabled ENET ethernet port on Cortex-A Core for imx8mm EVK board.
Updated suported featues in board document.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2024-08-12 12:43:54 +02:00
Jiafei Pan
f690b823f9 dts: binding: ethernet-phy: add 1G fixed-link support
Added 1G link support for fixed-link.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2024-08-12 12:43:54 +02:00
Jiafei Pan
f498644106 drivers: eth: phy: add AR8031 PHY driver
Add PHY driver support for Qualcomm AR8031, it can use fixed link
or use auto negotiation.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
2024-08-12 12:43:54 +02:00
Furkan Akkiz
cfcfea4a26 dts: arm: adi: Add watchdog inside devicetree
Add watchdog peripheral definiton inside device tree file
Add watchdog binding file

Signed-off-by: Furkan Akkiz <hasanfurkan.akkiz@analog.com>
Co-authored-by: Mert Vatansever <Mert.Vatansever@analog.com>
2024-08-11 19:18:56 -05:00
Raffael Rostagno
3dc2e83c7a usb: esp32c6: Add support for USB serial port
Device tree configuration for USB serial node and clock control
fix for proper device initialization.

Signed-off-by: Raffael Rostagno <raffael.rostagno@espressif.com>
2024-08-11 19:16:35 -05:00
Richard Wheatley
16a2f862ea dts: arm: ambiq: add ambiq rtc to dtsi file
Add Ambiq RTC to DTSI

Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
2024-08-09 17:58:35 +01:00
Richard Wheatley
8f2413fbe2 dts: bindings: rtc: add ambiq rtc
Add Ambiq rtc binding

Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
2024-08-09 17:58:35 +01:00
Yuval Peress
690134356c i2c_emul: Add support for CONFIG_I2C_TARGET_BUFFER_MODE
Add emulation and test to support the buffered target mode.

Signed-off-by: Yuval Peress <peress@google.com>
2024-08-09 08:40:51 -04:00
Yuval Peress
c394b2e6f8 test: Add i2c emulation for targets
Update i2c_emul.c to support i2c_target_register and i2c_target_unregister
function calls as well as support address forwarding in emulation.
Address forwarding helps us test IPCs in native sim. Instead of having to
emulate 2 separate cores, we can forward read/write requests from one bus
to another bus (effectively creating a loop). This way the same image can
simulate both the controller and the target.

Signed-off-by: Yuval Peress <peress@google.com>
2024-08-09 08:40:51 -04:00
Armin Brauns
054cc09c88 drivers: add bindings for all existing mcp23xxx variants
This allows getting rid of the ngpios property, which is implicit in the
part number. It also prepares for configuring pins as open-drain on
supporting chips in the next commit.

Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
2024-08-09 09:55:30 +02:00
Armin Brauns
75b3bf5b6c drivers: remove legacy mcp23s17 driver
This chip is handled by the more generic mcp23xxx driver, which will get a
microchip,mcp23s17 compatible binding in the next commit.

Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
2024-08-09 09:55:30 +02:00
Sadik Ozer
6b41240038 soc: Add the MAX32666 SoC
Add MAX32666 Kconfig and dts files

Co-authored-by: Okan Sahin <okan.sahin@analog.com>
Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
2024-08-09 09:55:01 +02:00
Jason Yu
83c801965e dts: nxp,lcd-8080: Add dts binding for nxp lcd 8080 interface gpio
- Currently this interface is used by panel LCD-PAR-S035

Signed-off-by: Jason Yu <zejiang.yu@nxp.com>
2024-08-09 09:54:51 +02:00
Ricardo Rivera-Matos
ab6a738d83 dts: haptics: Adds the DRV2605 devicetree bindings
Adds the devicetree bindings for the DRV2605 haptic driver IC.

Signed-off-by: Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>
2024-08-08 15:57:12 +02:00
Jordan Yates
76d43a8f62 dts: spi: move overrun-character from Nordic to base
Move the `overrun-character` property from the common Nordic SPI
binding to the `spi-controller` base binding. This gives users of the
SPI interface a way to query what the default value is at compile-time,
and potentially avoid allocation of large constant buffers.

Signed-off-by: Jordan Yates <jordan@embeint.com>
2024-08-08 06:17:45 -04:00
Anke Xiao
878d417020 dts: arm: nxp: nxp_ke1xz.dtsi: add lpspi and dma support
Add spi and dma dts configurations information for frdm_ke17z and
frdm_ke17z512 boards.

Signed-off-by: Anke Xiao <anke.xiao@nxp.com>
2024-08-08 06:07:51 -04:00
Richard Wheatley
edcfef92a5 drivers: pinctrl: updated to add interrupt direction
Updated to add pinctrl interrupt direction

Signed-off-by: Richard Wheatley <richard.wheatley@ambiq.com>
2024-08-08 06:06:21 -04:00
Sadik Ozer
7323757e36 soc: Add the MAX32662 SoC
Add MAX32662 Kconfig and dts files

Co-authored-by: Maureen Helm <maureen.helm@analog.com>
Signed-off-by: Sadik Ozer <sadik.ozer@analog.com>
2024-08-07 19:04:26 -04:00
Grzegorz Swiderski
79b0154f5e dts: nordic: Remove cpu property from VPR nodes
It's a superfluous value which used to be required by tooling, but now
we can remove it.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2024-08-07 19:01:55 -04:00
Grzegorz Swiderski
fa2240ba31 dts: nordic: nrf54h20: Fix PPR CLIC address
Between SoC revisions, the address was moved from 0x5F909000 in the
global domain, to 0xF0000000 in PPR's private address space.

Move the corresponding DT node out of `cpuppr_vpr` range to a separate
bus node, which is considered inaccessible to all cores but `cpuppr`.
This is expressed by selectively leaving out the `simple-bus` compatible
and `ranges` property, i.e., they're only set in `nrf54h20_cpuppr.dtsi`.

This lets the interrupt controller node remain visible at system level,
for the purpose of describing IRQ mappings between cores in devicetree.

Signed-off-by: Grzegorz Swiderski <grzegorz.swiderski@nordicsemi.no>
2024-08-07 19:01:55 -04:00
Scott Worley
a698b77fb4 dts: microchip: mec5: Base MEC5 MEC174x, MEC1752, MECH172x DTSI files
Add the base DTSI chip files for Microchip MEC174x, MEC175x,
and MECH172x using new MEC5 HAL.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2024-08-07 07:18:09 -04:00
Jonathan Rico
36c9fdcb85 boards: Add support for 01space esp32c3 0.42 oled
From https://github.com/01Space/ESP32-C3-0.42LCD/

Adapted from the XIAO ESP32C3 board.

Signed-off-by: Jonathan Rico <jonathan.rico@nordicsemi.no>
2024-08-07 07:17:54 -04:00
Maochen Wang
5583518c78 dts: arm: nxp_rw6xx: add imu interrupts
Add imu and wakeup done interrupts.

Signed-off-by: Maochen Wang <maochen.wang@nxp.com>
2024-08-07 07:17:23 -04:00
Maochen Wang
0495d890b5 dts: wifi: add nxp wifi device tree compatible
Add nxp wifi device tree yaml file.

Signed-off-by: Maochen Wang <maochen.wang@nxp.com>
2024-08-07 07:17:23 -04:00
Felipe Neves
af91d06b00 drivers: mbox: mbox_esp32: add support for esp32 MBOX driver
as an alternative for IPM driver.

Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
2024-08-07 07:17:01 -04:00
Duy Phuong Hoang. Nguyen
0c93268e52 driver: clock: Update clock control driver for RA8
This update is to support clock API for RA8
Move the clock initialize function into clock driver
Peripheral clock now has 2 more property in clock cell for enable
and disable clock to peripheral module

Signed-off-by: Duy Phuong Hoang. Nguyen <duy.nguyen.xa@renesas.com>
2024-08-07 07:16:45 -04:00
Yiding Jia
eb351436ad drivers: pinctrl: rp2040: oe-override option
This change adds the device tree property for specifying oe-override
(output-enable override behavior), as well as defines for possible values
of the property.

RP2040 GPIOs can be configured to automatically invert the output-enable
signal from the selected peripheral function. This is useful for tasks like
writing efficient PIO code, such as in the i2c example in the rp2040
datasheet.


Signed-off-by: Yiding Jia <yiding.jia@gmail.com>
2024-08-07 07:16:28 -04:00