Newer ESP32 series MCUs like the ESP32-C3 contain some register changes
incompatible to the original ESP32 and the SJA1000.
The additions in this commit consider these changes and fix the
incompatibilities in the TWAI front-end for the SJA1000 driver.
Signed-off-by: Martin Jäger <martin@libre.solar>
Enable GPIO driver on s32z270dc2_r52 boards. S32Z27 pads are grouped
into GPIO ports A to N.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Implement GPIO driver minimal API's for NXP S32 devices, based on SIUL2
peripheral. SIUL2 allows to control the pins electrical characteristics
such as internal pull resistors, pin direction and more.
GPIO driver API's for interrupts will be implemented in a future patch.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
This patch introduces support for NXP S32 LINFlexD peripheral operating
in UART mode. Polling and interrupt-based serial API's are supported.
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Introduce support for Pinctrl driver on NXP S32Z/E SoC's.
The NXP S32 pin controller is a singleton node responsible for
controlling the pin function selection and pin properties, based on the
pin node group approach. The pinmux configuration is encoded in a
32-bit value.
Each S32 SoC implementing Pinctrl must create a `pinctrl_soc.h` header
which define SoC-specific macros to initialize the pinctrl structure.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Introduce Pinctrl driver for SIUL2 module present on NXP S32 devices,
which provides control over all pins, such as function selection and
electrical characteristics that appear on external chip pins.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
This patch introduces support for NXP S32 devices, specifically for
S32Z27 from S32Z/E family.
NXP S32Z27 processors are composed of two Real-Time Units (RTU)
containing each four ARM Cortex-R52 cores with flexible split/lock
configuration, and dedicated internal SRAM.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Ethernet MAC dts definition for STM32F107, similar to STM32F207 but with
different clocks, especially no PTP clock.
Signed-off-by: Pierre-Emmanuel Novac <piernov@piernov.org>
Add mode selection properties for regulator-pmic compatible. These
mode selection properties will be used with regulators that support
multiple modes, with each mode enabling specific voltage and current
limits.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Refactor binding to use root PMIC IC, so that properties can be shared
between regulator devices. Each individual regulator output is still
created as an individual device, since the regulator API aligns with
these devices better than the PMIC IC itself.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Convert timer driver to use a light weight syscon and DTS and convert
register information to use offsets and sys_read/sys_write instead of
structs.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This is not guaranteed to match the physical layout of the memory, so
get them individually based on node label.
For initialization, use bbzero.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Some windows might need to be set as writtable, so add a flag read-only
to DTS bindings which is set to true for all windows right now. This can
be set to false where needed.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Instead of just declaring the memory window register in DTS and have
everything else all over the place (headers, Kconfig, etc.) this change
defines the memory window instances in DTS and uses the device model to
initialize the windows. Code is still part of the SoC, given that we do
not have a driver subsystem suitable for this type of device yet.
Move FW status to own workflow and separate from window setup.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
If the flash is used in 4-byte addressing, reading SFDP will fail after
a system reset if the flash isn't power cycled or hardware reset, since
Zephyr will try to use 3-byte addressing while the flash (still) expects
4-byte addressing.
This commit adds the ability to send a reset command to the flash as part
of initialization, which complements the existing reset-gpio
functionality, and is useful on low-pincount flashes which do not have a
hardware reset.
Signed-off-by: Ole Morten Haaland <omh@icsys.no>
This is an AArch64 board. We also add RK3399 SoC support,
as well as a very simple Synopsys 8250dw UART driver.
Signed-off-by: Henri Xavier <datacomos@huawei.com>
Added support for the AMS AS621x series of temperature sensors as a
variant of the TI TMP108 temperature sensor.
Signed-off-by: Jared Baumann <jared.baumann8@t-mobile.com>
Signed-off-by: James Johnson <james.johnson672@t-mobile.com>
Adding ethernet in the DTS file and corresponding binding
for Cyclone V SoC FPGA board..
Signed-off-by: Esteban Valverde <esteban.valverde.vega@intel.com>
rt1170 has two group fast gpio and shared the same
interrupt source. Now add the dts definition for the
fast gpio
Signed-off-by: Crist Xu <crist.xu@nxp.com>
Add Intel dmic dai dts definitions for ace15, cavs15 and cavs25
platforms.
Add also pre dts cmake files as the dmic nodes use same address and emit
warnings otherwise.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Add a fifo address as int value into dmic yaml to separate different
outputs (corresponds to different dais) from the same hw block. Also
change shim address from array to int value.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Add successive inclusion for STM32F072 dts by including
STM32F070 dts instead of STM32F0 dts.
This allows to reuse the definition of
- Flash
- SPI
- USB
from the new parent.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Replace the hardcoded kPWM_Prescale_Divide_128
driver prescaler with the ones defined in the dtsi file
that allow overriding them by the user.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
This commit adds a driver to simulate GPIO state and interrupts
using the keyboard when using SDL.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Add 2 properties to configure the "any movement" event.
* Ability to disable the interrupt latch
* Select movement mode
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Update RT11xx SOC DTSI files to use DT nodelabels on RT11xx SOCs,
instead of reencoding the base address of each peripheral in the M7
and M4 DTSI files.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Include files should not have compatible properties set. These do not
represent real hardware and should therefore not appear to do so, e.g.
by appearing in the bindings index as if they were a real hardware
peripheral.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Fix ordering of IOMUXC pinctrl selections for gpio pinmux setting.
This will allow the gpio_configure call to correctly set
mux settings for this SOC.
Fixes#50502
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The vref has to be set to 3000mV.
It is the voltage to find on the stm32F3.
is fixed by the platform to be lower or equal to VDDA.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
