The 200ns reset time are a minimum value, there is no need to enforce
precise timing (and thus manual per-device calibration) here.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
From FPGA-TN-02001-3.3 "iCE40 Programming and Configuration":
> After driving CRESET_B High or allowing it to float High, the AP must
> wait a minimum of 1200 µs, allowing the iCE40 FPGA to clear its internal
> configuration memory.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Besides of standard flash operations like write or erase, flash
controllers also support additional features like write protection or
readout protection. These features are not available in every flash
controller, what's more controllers can implement it in a different way.
It doesn't make sense to add a separate flash API function for every
flash controller feature, because it could be unique (supported on small
number of flash controllers) or the API won't be able to represent the
same feature on every flash controller.
Extended operation interface provides flexible way for supporting flash
controller features. Code space is divided equally into Zephyr codes
(MSb == 0) and vendor codes (MSb == 1). This way we can easily add
extended operations to the drivers without cluttering the API or
problems with API incompatibility. Extended operation can be promoted
from vendor codes to Zephyr codes if the feature is available in most
flash controllers and can be represented in the same way.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
The current implementation always sets the voltage before enabling,
even if the current voltage is in the allowed range.
This has some side effects, i.e. for PMIC regulators that are
pre-programmed for a specific value but allow voltage changes during
runtime. The side effect being that the regulator will always be reset
to the lower value of the voltage range at init.
Another usecase would be when a bootloader sets a specific voltage then
loads an application that uses the same driver.
The proposed fix is to evaluate the current voltage and try to bring
the actual voltage in range if the current voltage is not valid
according to the min/max constraints.
Tested on custom SAMD20 board with a custom RK816 PMIC driver.
Signed-off-by: Ionut Catalin Pavel <iocapa@iocapa.com>
Currently the driver only support software controlled CS
defined by cs-gpios property.
This commit enables the possibility of using dedicated CS
by setting the pins on pinctrl and omitting the cs-gpios
property.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Change the preprocessor identifier from CONFIG_SOC_ESP32C3 to
SOC_GDMA_SUPPORTED so it can include ESP32S3 in GDMA routines.
Remove hardcoded values from hal calls to use dma_host instead.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
This is a fix for a driver bug that assumes a
user will want a new pwm channel for a new
pwm signal if they decide to change the
period length of the pwm. In some cases,
this creates a noticable change of
duty cycle accuracy.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
i2c_bitbang_init takes a context as void *, so discarding const
qualifier of the driver's config. Explicitely cast to void * to fix the
problem.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Currently the 2.4G radio driver for CC1352 has few implementations which
prevents both the radios to be used in a single build, thus preventing
applications to have different builds to switch the RF bands even though
the hardware supports dual bands simultaneously.
The following updates are made:
* Remove RF patches from stack.
* Implement if_stop() to stop the interface and yield the interface.
* Use RF_runCmd() instead of RF_runImmediateCmd() so that two RF handles
can work simultaneously.
All the updates are similar to the more recent cc13xx subg driver which
implements all these recommended practices already.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
During extended testing, rx_done() callback was seen to be invoked with
zero-length packets.When RAW_MODE is enabled, CRC is being appended to
these packets thus making downstream consumers think the packet is valid.
Root cause of the callback being invoked with zero-length packet is
unknown, but appending CRC to these packets is incorrect, thus fix it.
Also fix a minor error which causes build failure when
CONFIG_NET_L2_IEEE802154_SUB_GHZ is not defined.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
This PR fixes MCP7940N initialization failure on Sunday if
external battery is used to keep the RTC running over the
MCU or Zephyr OS restarts.
Signed-off-by: Rainer Paat <rapaat@gmail.com>
System uptime is not getting incremented when TICKLESS_KERNEL is enabled.
This fixes it by changing the clock_annouce and updating
last_count increment accordingly.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Removed struct variables for storing states: sx, plt_rst, espi_rst.
While Sx & espi_rst state variables were totally redundant, plt_rst
variable had a use-case to prevent sending multiple callbacks to app.
Experimentally proven that use-case was not valid, as plt_rst isr
itself gets called only upon rising/falling edge.
Removing the condition to check plt_rst's current and previous state,
also solves the problem where global reset do not update plt_rst state.
Signed-off-by: Aditya Bhutada <aditya.bhutada@intel.com>
The Dead Battery resistors interfere with port partner
detection. So, Dead Battery is disabled after the system
starts and sets the Rd or Rp resistors on the CC lines.
Tested on b_g474e_dpow1 with JP5 set to USBC.
Tested on stm32g081b_eval with JP17 set to D5V.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
Adding an Openthread radio API `otPlatRadioSetMacFrameCounterIfLarger`
implementation and the corresponding call to the IEEEE802154 driver.
Signed-off-by: Przemyslaw Bida <przemyslaw.bida@nordicsemi.no>
In the adc_stm32_init() function, when adc_stm32_calib() is called,
the ADC is not yet enabled but still disabled.
This patch makes sure to Disable the ADC before its calibration.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The STM32H730 series has a variant built with SMPS. It uses
`stm32h730xxq.h` header file instead of `stm32h730xx.h`, which has the
SMPS macro defined.
This commit adds the `SOC_STM32H730XXQ` configuration option to allow
the build system include the proper header file. With this change,
boards can enable `CONFIG_POWER_SUPPLY_DIRECT_SMPS` to set up the power
supply for the CPU.
Signed-off-by: Chen Xingyu <hi@xingrz.me>
Update flexspi driver init priority to be the
memc driver init priority. This fixes a bug where
the flexspi flash drivers on i.MX RT platforms were
being initialized before the flexspi memc driver.
Since those flash drivers depend on the flexspi
spi bus controller being initialized, the flash drivers
would fail to initialize and cause runtime failures.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This change implements the following, necessary for remote wakeup to be
supported:
- implement usb_dc_wakeup_request() call to trigger remote wakeup
- implement interrupts to detect supsended/resumed state
- implement extra logic to simulate resumed state when the resume
is a result of remote wakeup. In this case the rp2040 chip doesn't
send a USB_INTR_DEV_RESUME_FROM_HOST interrupt, or any other
interrupts when the resume condition is detected to be extended
by the upstream port, so we need to simulate this event when we
see activity on the bus.
Signed-off-by: Purdea Andrei <andrei@purdea.ro>
Add driver for Xptek XPT2046 resistive touch controller on SPI.
Only interrupt driven mode supported, does not do polling.
Signed-off-by: Seppo Takalo <seppo.takalo@iki.fi>
esp32_wifi_dev_init() currently starts Wi-Fi stack before
the interface is properly configured, which happens in function
esp32_wifi_init(). This can trigger a ESP32_WIFI_EVENT_STA_START event
before interface initialization, causing a crash.
Moving esp_wifi_start() to esp32_wifi_init() will guarantee that
this won't happen.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Make sure that the interrupt and event routing enable bits have the
reset values in case the Zephyr firmware image is chain-loaded.
When started by MCUboot, these registers values aren't the reset values,
but then Zephyr initializes them in same way. Yet, when the Zephyr
firmware image is chain-loaded by nRF5 bootloader, they may have values
that cause the scheduler to behave in unexpected ways.
Signed-off-by: Giancarlo Stasi <giancarlo.stasi.co@gmail.com>
Fix support for GT911 touchscreen driver when not using interrupt.
The controller still requires that the INT pin be set to input in
order to correctly respond to I2C queries.
Also, the GT911 requires that the INT pin is not configured until the
RESET pin has been low at least 10 ms after reset, so add an additional
delay during initialization to account for this.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add clock rate definitions for MIPI and LCDIF peripherals, to enable
retrival of these peripheral clock rates at runtime.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Introduce driver for NXP DCNANO LCDIF (lcd interface) peripheral,
present on iMX.RT500. Currently this driver only supports updating
the primary framebuffer, and does not implement support for the cursor
buffer present on this IP.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Introduce driver for MCUX MIPI DSI 2L. This IP block differs slightly from
the existing MCUX MIPI peripheral, and uses a different hardware
abstraction layer. For these reasons, a new driver was introduced rather
than extending the existing mcux_dsi implementation.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Allow configuration of AHB RX buffer allocation. This allows sections
of the AHB RX buffer to be reserved for specific masters, which can
enhance performance.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The driver utilizes ST Microelectronics library (which
exists in modules\hal\st\sensor\vl53l1x. Platform specific
headers and source files used by the library are included
and adapted for Zephyr.
The driver can be configured in proj.conf to use a
interrupt/polling methods and the use of the XSHUT pin on
the VL53L1X. All uses were tested successfully.
Signed-off-by: Mark Watson <mwatson@prosaris.ca>
This patch adds watchdog driver for Renesas Smartbond SOCs.
Co-authored-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
This adds driver for SmartBond TRNG peripheral that with separate
ISR an thread data pools.
Co-authored-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
Remove modulus feature and return degrees larger than
count_per_revolution.
This makes it possible to detect if a full rotation has occured.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Add support for configuring power on delay when using SPI SDHC. This
allows cards that reliably initialize with a shorter (1ms) delay to
avoid the long initialize delay otherwise imposed.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add I2C bus recovery support to the STM32 v1 and v2 driver. The STM32 i2c
peripheral does not natively support I2C bus recovery so recovery is
performed using GPIO bitbanging. This mirrors the bus recovery
implementation for NXP MCUX LPI2C driver.
Fixes: zephyrproject-rtos#54917
Signed-off-by: Maxmillion McLaughlin <github@maxmclau.com>
Allow the uart_console console_out implementation to integrate with
'Device Runtime Power Management'.
Without using runtime PM, it is impossible for the application to manage
the power state of a UART instance, given that any module in the
application could theoretically LOG_* or printk at any point in time.
This removes the need to manually call `pm_device_state_set` when the
lowest power states must be reached, while still allowing console and
printk messages to be output.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Couple issues:
- `sys_clock_set_timeout()` should not base its `mtime` on the current
time either. Tracking the `last_tick` and `last_elapsed` values avoids
the need for all the tick rounding computation.
- The MIN_DELAY thing is pointless. The hardware performs a signed
comparison. If the delay gets close or even behind current time then
the IRQ will be triggered right away. This is unlikely to happen very
often anyway so the constant overhead is uncalled for.
- Runtime 64-bits divisions on 32-bits hardware are very expensive.
- The timer must be enabled before the count can return a sensible
value during driver init (at least on qemu_cortex_a9).
Discussion in PR #54919 applies here too.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
The sbs gauge emulator intercepts SMBus messages for an sbs gauge
compatible IC. However, it was incorrectly interpreting the byte order of
received register write values based on the endianness of the SoC
architecture instead of SMBus' defined little-endianness. This fault was
not caught earlier because native posix and the majority of qemu
architectures use little-endian.
Explicitly interpret the write values as little-endian.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Change message to make allow distinguishing between error while
getting page info for disk configuration and page layout
verification.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Description of the bad behaviour before this change:
The arming of the control EP0_OUT endpoint was not kept under
control. It could happen that the EP0_OUT endpoint was left
armed, after the completion of a complete control transfer.
It is clear that the intention was to NOT keep EP0_OUT constantly
armed while idle, because usb_dc_ep_enable() doesn't arm it,
and the intention was for when usb_dc_ep_read() is called to
collect the Setup-Stage 8-byte data, that is when EP0_OUT is armed,
and before this call is performed, the host will keep getting NAKs
for the Data-Stage of the to_device control transfer.
This happens correctly on the first to_device control transfer with
wLength > 0. However, because usb_dc_ep_read_continue() indiscriminately
re-arms all OUT endpoints, in the case of to_device control transfers
with wLength > 0, on the Data-Stage, the endpoint is also re-armed,
which is wrong, because then the endpoint will be left armed after
the control transfer is over.
In this case when a new to_device control transfer starts, the
Data-Stage will be accepted on the first try. This would still
have worked without a failure if the Setup-Stage would have been
processed immediately, but because we process everything in a work
queue at a later time, when the Setup-Stage associated 8-byte data
buffer is read both the Setup-Stage and Data-Stage have arrived.
At the end of handling the Setup-Stage we try to re-arm the EP0_OUT,
which already contains data, thereby corrupting the received length
portion of the buf_ctl register. (Obviously other fields are changed
too, but the length field is the one that first causes chaos, cause
it's written to the maximum, which is 64.) The above mentioned Data-Stage
already has a message in its workqueue for it to be processed, but
it is picked up only after the length field has been corrupted.
Because of this usb_dc_ep_read() thinks there is more data in the buffer
than there really is, and everything becomes de-synchronized, with
later reads accessing uninitialized parts of the buffer.
This sounds like a fundamental failure, that should make it impossible
to operate USB, however the reason this behaviour doesn't make it
impossible to enumerate the device is that this only affects
to_device control transfers with wLength > 0, and during enumeration
there are not many of those happening.
When enumerating a HID keyboard, there is only _one_ of those
happening, and it is the initial setting of the lock light led status.
And that first one succeeds because it's the first one. (However, later
lock light setting control transfers can cause problems, which is how
this problem was encountered.)
The solution in this commit is to keep better control over when EP0_OUT
is armed. This forces the Data-Stage to arrive later (the host will keep
re-trying), and that way the corruption of the buffer control register
is avoided.
Summary of the changes:
- Rework the logic around deciding wether to re-arm the out endpoint
after a read. For non-0 endpoint the previous behaviour is kept,
however for EP0 it is only re-armed if more OUT transactions are
expected for that SETUP transfer (be it data-stage or status-stage)
- Force un-arm the EP0_OUT endpoint in case a stall condition is observed.
- When a setup transfer is received check if EP0_OUT is already armed.
If armed then log a warning message, and force-disarm it.
- When a setup req interrupt fires, don't immediately force the next
read to get it, instead, it will be read only after a setup message
is extracted from the message queue.
- When a setup packet is received abort any unfinished previous control
transfers:
- cancel any data buffers given to the EP0_IN endpoint
- drop any new ep0_in writes that are attempted before this newest
setup packet's associated message is extracted from the message
queue.
- In the ISR, check buffer interrupts before setup req interrupts.
This is to make sure that the final 0-length status message from the
previous setup packet is consumed before the new setup packet.
(this is the only case now when both interrupts could be seen as
having fired by the time the interrupt handler routine executes.
Signed-off-by: Purdea Andrei <andrei@purdea.ro>
Co-authored-by: Johann Fischer
The pwm_mchp_xec driver doesn't clear the divisor or clock select fields
of the config register value before writing it back. If the register
was previously written, the new values were being logically OR'd with
the prior values.
Signed-off-by: Jeff Daly <jeffd@silicom-usa.com>
Voltage comparator driver submits notifications into system work queue,
this change will make driver to use dedicated work queue, and priority
of dedicated work queue are configurable as well.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Extends dmamux driver to support DMAMUX 2,
which supports the BDMA on STM32H7 devices.
Co-authored-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Wrap calls to DMA drivers through fops to allow
different dmamuxes to point to different types of
dma with different function calls.
In preperation to add support for BDMA and DMAMUX2.
Co-authored-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
update MEC172x adc driver to support device PM.
Implement pm resume and suspend actions to put adc
pins in proper state for suspend and resume.
Notify kernel of busy when adc sampling is in progress.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Added initial version of Infineon CAT1 GPIO driver.
Added initial version of binding file for Infineon CAT1 GPIO driver.
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
Added initial version of Infineon CAT1 UART driver.
Added initial version of binding file for Infineon CAT1 UART driver.
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
Add initial version of Infineon CAT1 clock control driver.
- supports clock initialization based on board DT configuration.
Added initial version of system_clocks.dtsi for Infineon PSoC 6 SOC.
Includes: clk_imo, path_mux0..4, fll0, pll0, clk_hf0..4, clk_fast,
clk_slow and clk_peri.
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
Added initial version of Infineon CAT1 Pin controller driver.
Added initial version of binding file for Infineon CAT1 Pinctrl driver.
Added initial version of dt header for Infineon CAT1 pinctrl driver.
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
Add PLLI2S support within clock_control driver.
This implementation is compatible with "st,stm32f412-plli2s-clock"
binding.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add PLLI2S support within clock_control driver.
This implementation is compatible with "st,stm32f4-plli2s-clock"
binding.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Polarity support added to XEC PWM driver. This allows (for example) PWM
controlled LEDs that are active low to actually be turned off when set
to off.
Signed-off-by: Jeff Daly <jeffd@silicom-usa.com>
Generalize the driver for PCAL6408A into a more abstract base
and reuse this abstraction to implement a driver for
PCAL6416A.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Fixed th02_channel_get() code to return -ENOTSUP when the channel is not
supported.
Fixes#55160.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Since PINCTRL and pinctrl-0 is now required, there's no point in doing
extra validation at driver level. Modify the macro to just check that
sleep state is present when needed, since it was the only remaining
assertion that was not covered. Renamed the macro to make it more clear
what it does: NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This change produces more quickly in the stream valid
audio samples. The start fade-in ramp can be shortened to
100 ms for 48 kHz and 200 ms for 16 kHz. It was before 200 ms
and 400 ms. The updated DMIC hardware in allows to do this
change.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@intel.com>
The Host Commands can be used with different transport layers e.g. SHI
or eSPI. The code that provides the peripheral API and allows sending
and receiving Host Commands via different transport layers is not
actually drivers of a peripheral, so move it to the
subsys/mgmt/ec_host_cmd folder.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
This commit finish to fix the bug describe by 85e2a0679a68f02f7ef.
With the previous correction, the uptime read could be in the past:
if the counter rewinds just after testing ARRM flag, we had lost
some counts.
Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
Move to using 'select SPI' instead of 'depends on SPI'
(see commit df81fef for more details)
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
The interrupt status of the GPIO was not cleared when a new
interrupt configuration was set. This prevents the driver from
passsing all the gpio tests.
Fixes#54833
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Note: RP2040 can support single-ended IO, by setting the GPIO_OUT
register to a constant value, and then changing the GPIO_OE register
instead, when the output has to change. To do this, the output-setting
functions need to know which pins have been configured as single-ended,
and for that reason the data structure has been extended to include
this information.
Another change is the PR, is that setting of the pull-ups/pull-downs
now applies to both inputs and outputs as well. Previous solution was
wrong, because if the user wanted to set up an input with a pull
resistor enabled, and then reconfigure it to an output without any
pulls, then the pulls remained in place for the output. Now pulls
are correctly set based on the gpio flags for outputs too, and this
is especially useful for single-ended outputs too.
Signed-off-by: Purdea Andrei <andrei@purdea.ro>
Populate the `channel` index when constructing configuration structs for
secondary RTT channels. Originally missed in #27704.
Fixes#54955.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add the implementation for the akm09918c magnetometer driver.
Additionally, add the appropriate node to the TDK robokit1 device
tree. In order to prevent regressions, add the sensor to the sensor
build_all tests and specific tests using an emulator.
Signed-off-by: Yuval Peress <peress@google.com>
Add a driver implementation that uses the I2S peripheral.
Based off this blog post:
https://electronut.in/nrf52-i2s-ws2812/
Should help with #33505, #29877 and maybe #47780, as there is no garbage
data at the end of transmissions on nRF52832, and no gaps.
Signed-off-by: Jonathan Rico <jonathan@rico.live>
The icm42688 introduced a safe configure function to make the
configuration more atomic, but the main driver was never updated
to call it so the new config values were discarded.
Signed-off-by: Yuval Peress <peress@google.com>
Avoid implementations in the subsys emul directory to keep the directory
focused on emulator subsystem instead of consumers. Consumers should be
implemented side-by-side to their drivers
Signed-off-by: Yuval Peress <peress@google.com>
Allow the emulator to sit in the same directory as the driver
implementation. This will make working on the emulator much easier and
keep the emulator subsystem directory clean by allowing it to focus on
the actual subsystem and not the use cases of the subsystem.
Signed-off-by: Yuval Peress <peress@google.com>
No need to read back the CR (NOR flash config or control register)
to check if entering the 4-Byte Address Mode is effective.
The action of this command is immediate and the result
(bit field of the CR) is NOR flash vendor-specific.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Drop STM32 pinmux driver in favor of pinctrl. Some definitions located
in pinmux headers were used by the pinctrl driver, so they have been
moved there.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use proper format for size_t type eliminating warnings of type:
...
error: format '%u' expects argument of type 'unsigned int', but
argument 2 has type 'size_t' {aka 'long unsigned int'}
[-Werror=format=]
...
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Commit 00adb2a539 ("drivers: udc: remove no more required pending
state flag") removed state parameter from udc_buf_peek and udc_buf_get.
Adapt udc virtual driver so the code compiles.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
STM32L4plus mcu has SDMMC internal DMA which works without any
configuration and it's handled by SDMMC HAL driver. This commit adds
option to enable it and use it.
Signed-off-by: Petr Hlineny <development@hlineny.cz>
The LoRa modem has been staying in STATE_BUSY
after sx12xx_lora_test_cw() call
because Radio.SetTxContinuousWave() doesn't configure the PHY
to raise 'TX done' event.
It runs TxTimeoutTimer instead,
so we have to handle 'TX timeout' event to correctly release the modem.
This fix has been tested on custom board with STM32L4 and SX1276.
Signed-off-by: Petr Sharshavin <sharshavin@mail.ru>
Move the can_sja1000.h header file to the public
include/zephyr/drivers/can/ include path. This allows writing out-of-tree
SJA1000 based driver front-ends.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename the can_utils_filter_match() utility function to
can_frame_matches_filter(), move it to the public
include/zephyr/drivers/can.h header file, and add a missing mismatch for
standard (11-bit) ID frames passing extended (29-bit) filters.
This allows using the utility function in out-of-tree CAN drivers.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
When checking if any UART TX/RX IRQs are pending, the driver should also
consider whether these IRQs are enabled. Or we still get pending status
set even if the related interrupts are disabled.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
In order to avoid concurrency situation during writing UFTCTL register,
this CL adds critical sections to prevent the unexpected result if the
driver wants to set/clear bits of this register.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
It is advised to stop any ongoing ADC conversion before
disabling the peripheral.
Added some comments so that ADC state isn't left into
intermediate state that would prevent correctly
enabling or disabling the peripheral
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
This is necessary to prevent stack overflows when building with
non-standard configurations (e.g. CONFIG_DEBUG).
Adding them as hidden kconfig options to avoid the stuck kconfig syndrome.
Users are free to redefine them in their app to force a value.
The userchan.c driver is only built for posix, and the help text for
ARCH_POSIX_RECOMMENDED_STACK_SIZE states that the real stack comes from
somewhere else (the pthread stack), hence why it doesn't use the new
kconfig options.
Signed-off-by: Jonathan Rico <jonathan.rico@nordicsemi.no>
There are just list of child files to include, right now there's a hint
of that trying to be alphabetical but then entries have been added with
various logic, so one has to figure where stuff has to be added.
Rewrite these to:
- keep the list alphabetical, for CMakeLists unconditional first,
conditional after so one just has to select and sort
- drop the spaces in the Kconfig
- use a single space between target and directory
- rename from "Sub Systems" to "Subsystems" (single word)
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The fuel gauge API doesn't make use of syscalls with device drivers, which
is not congruent with Zephyr's security model.
Correct the fuel gauge API to only allow access to fuel gauge device
drivers functionality via syscalls to keep with Zephyr's security model.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Fuel gauge API struct type is currently named battery_driver_api, this is
inaccurate as the API struct represents functions for interacting with fuel
gauge drivers in particular.
Rename the API struct type to fuel_gauge_driver_api to clearly signal its
functionality.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
The int config and fifo config register addresses were wrong, fix those.
Adds lots of debug information (when LOG_DBG=y) to the configuration of the
device which is incredibly helpful for diagnosing configuration issues.
Disables the device interrupts while reconfiguring. Adds a safely
reconfigure function which will rollback to previous configuration
on misconfiguration.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Several issues:
- `last_count` should not be updated with current time or this will
cause a time drift and induce jitter due to IRQ servicing latency.
- `sys_clock_set_timeout()` should not base its `mtime` on the current
time either. Tracking the `last_tick` and `last_elapsed` values avoids
the need for all the tick rounding computation.
- The MIN_DELAY thing is pointless. If the delay gets close or even behind
current time then the IRQ will be triggered right away. This is unlikely
to happen very often anyway so the constant overhead is uncalled for.
- Runtime 64-bits divisions on 32-bits hardware are very expensive.
Fix the above, and improve the following:
- Prime the accounting by simply invoking the IRQ handler from the init
code. That will make the "ticks since boot" counter right.
- Remove excessive casts, especially a few wrong ones.
- Simplify the code overall.
Here's the output from the timer_jitter_drift test.
Before this patch:
|timer clock rate 60000000, kernel tick rate 10000
|period duration statistics for 10000 samples (0 rollovers):
| expected: 1000 us, 60000.000000 cycles
| min: 907.600000 us, 54456 cycles
| max: 1099.750000 us, 65985 cycles
| mean: 1008.594633 us, 60515.678000 cycles
| variance: 2.184205 us, 7863.136316 cycles
| stddev: 1.477906 us, 88.674332 cycles
|timer start cycle 995589, end cycle 606152369,
|total time 10085946.333333 us, expected time 10000000.000000 us,
|expected time drift 0.000000 us, difference 85946.333333 us
After this patch:
|timer clock rate 60000000, kernel tick rate 10000
|period duration statistics for 10000 samples (0 rollovers):
| expected: 1000 us, 60000.000000 cycles
| min: 992.116667 us, 59527 cycles
| max: 1030.366667 us, 61822 cycles
| mean: 1000.001902 us, 60000.114100 cycles
| variance: 0.105334 us, 379.201081 cycles
| stddev: 0.324551 us, 19.473087 cycles
|timer start cycle 987431, end cycle 600988572,
|total time 10000019.016667 us, expected time 10000000.000000 us,
|expected time drift 0.000000 us, difference 19.016667 us
The mean, variance and standard deviation number differences speak for
themselves, even in the absence of competing ISRs and/or IRQ-disabled
periods which would have made the comparison even worse.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Create and use a new `zephyr,i2c-target-eeprom` compatible
within I2C eeprom target driver that allows to use
that driver along with real atmel at24 EEPROM simultaneously.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
This patch is in preparation of uart async support. There are no
functional changes. The patch changes the ordering of functions to
organize shared functions between async/interrupt driven in the same order.
Also move uart_xmc4xxx_init() so that a forward declaration can be
removed.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
In preparation for async support. In async uart, service requests are
forwarded to separate dma lines. This patch splits up tx/rx into
separate service requests to enable this.
Also put service request enable code into a separate function. Before,
the same code was generated for different uart devices.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
This allows to fetch information about currently connected WiFi network,
e.g. with WiFi mgmt shell commands:
uart:~$ wifi status
Status: successful
==================
State: COMPLETED
Interface Mode: STATION
Link Mode: UNKNOWN
SSID: Tp-Link
BSSID: xx:xx:xx:xx:xx:xx
Band: 2.4GHz
Channel: 13
Security: UNKNOWN
MFP: UNKNOWN
RSSI: -39
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
For development and debugging purposes it is good to know what is the
version of ESP-AT firmware used on modem. This can be fetched with AT+GMR
command.
Fetch this information during driver init and log all available version
strings, so they look like that:
wifi_esp_at: AT version: 2.1.0.0(883f7f2 - Jul 24 2020 11:50:07)
wifi_esp_at: SDK version: v4.0.1-193-ge7ac221
wifi_esp_at: compile time: (0ad6331):Jul 28 2020 02:47:21
wifi_esp_at: Bin version: 2.1.0(WROOM-32)
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Use the appropriate kernel function, i.e. `k_cpu_atomic_idle()`,
instead of directly executing the WFE instruction.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This fixes a regression introduced in:
16a0e314ea drivers: net: Move Ethernet device definition for SLIP to
ethernet
Where the module would fail to build with:
log_core.h:153:20: error: '__log_level' undeclared (first use in this
function)
Registering a module fixes the build.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
It is undesirable referencing to cfb.h because it form
reverse dependency from the driver layer to the subsystem layer.
Including drivers/display.h can solves all references in this file,
so replace it with this.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Update machine timer drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on NIOSV devicetree.
Signed-off-by: Khor Swee Aun <swee.aun.khor@intel.com>
C language does not allow declarations after labels, only statements are
allowed. Add {} around the `NRFX_USBD_EVT_SETUP` case to fix build
issues (`error: a label can only be part of a statement and a
declaration is not a statement`)
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
An invalid macro name was used to check whether the watchdog device has
configured interrupts. As a result, the interrupt were never configured.
This issue has been fixed.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
The check_arr used the TEST_ARR_SIZE value for the size, but
has been removed and replaced with CONFIG_FLASH_SHELL_BUFFER_SIZE.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Fixes spi_nor_erase to return -EINVAL instead of -ENODEV
when erase requested is out of flash range.
This makes the SPI NOR return the same error as all other errors.
Fixes#54897
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Currently, if CONFIG_SLIP_TAP is enabled (default for QEMU), and no
other Ethernet driver is enabled, the following warning is printed by
CMake:
No SOURCES given to Zephyr library: drivers__ethernet
This happens because SLIP_TAP enabled Ethernet L2, but has no actual
sources in drivers/ethernet. This commit fixes this, by moving the
actual definition of the SLIP TAP Ethernet interface into a separate
file, within drivers/ethernet. Technically, in that configuration SLIP
defines a Ethernet device, implementing Ethernet API, so such a change
is justifiable, and prevents unwanted warning from being generated.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Fix DNS resolver config for IPv6 only setup.
Check validity of the DNS addresses before trying to
configure the resolver.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
These global variables should be under the mutex lock, otherwise they
will be overwritten by other transfers.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Ensure DNS resolver is stopped if modem is turned off.
All IO connected to the HL7800 need to be de-asserted
in order for the HL7800 to power off.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Previously when the repeat argument wasn't supplied to the shell
command it would falsely seem to succeed, even though the
test was never run. Instead of displaying an error message this
rather overrides the repeat to 1, so that the test is run once.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Previously cmd_test could falsely give the indication that the
flash driver is functioning properly, because the written data
isn't validated and could have silently failed.
This commit adds a verify step to ensure the data was written successfully.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Updates the meteor-lake TLB MM driver to use the memory bank module
to track page usage statistics.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
If the host sends Port80 postcodes frequently while EC is busy handling
other tasks, the Port80 FIFO (16-byte depth) might overflow easily,
especially when the host sends the postcode with the 4-byte format.
This change defers the handling and sending (to the upper layer)
postcodes to the system workqueue thread. It can reduce a lot of
(but not all) the overflow case. Also in practice, we usually care
about the latest postcodes. The older codes are not significant to the
developer. This commit also lowers the printing of the overflow warning
to LOG_DEBUG.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
`#defines` do NOT sepecify a type. They will either adopt a native
system type or type of the value that was passed into the expression.
This can lead to warnings such as, "warning: comparison of integer
expressions of different signedness: 'uint32_t' {aka 'unsigned int'}
and 'int' [-Wsign-compare]".
By casting expressions, such as `MAX_TICKS` to `k_ticks_t`, we can
force the appropriate types and resolve these warnings.
Signed-off-by: Zachary J. Fields <zachary_fields@yahoo.com>
This commit adds the activity/inactivity recognition as well as the
stationary/motion detection as defined in the IIS2DLPC application
note.
For now, there is no possibility to configure this interrupt using
device tree binding, as I would like to keep the configuration updatable
and not set at boot time. This behaviour is fine for prototypes and
samples, but is too restrictive on products that may want to change the
interrupt configuration at run-time.
The interrupt is configured using the attributes SENSOR_ATTR_SLOPE_TH and
SENSOR_ATTR_SLOPE_DUR.
Signed-off-by: Giuliano Franchetto <giuliano.franchetto@intellinium.com>
This commit adds support for BH1750 ambient light sensor.
The driver works using I2C peripheral in one-time mode.
Signed-off-by: Michal morsisko <morsisko@gmail.com>
Intel SSP configuration can have auxiliary data embedded after it in a
variable length tlv array. Enable the parsing of this data and add the
data structs to describe the contents.
For now add support only for new version 1.5 blob. This is because
legacy blob doesn't have size field to describe its variable size.
Auxiliary data parsing has currently only 1 setting for link clock
needed in ACE platforms.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Add support for newer data blob version 1.5. Refactor the code to re-use
the common register setting. Clock setting will be handled differently
with legacy and version 1.5 blob.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Modify dai_config_get function to have the config struct as argument.
This was not a showstopper but a request in the API review.
In the same patch modify all Intel dai drivers using the API to preserve
bisect/compile.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
When enabling trigger mode of bmi160 on i2c bus, I've come across
an issue where the readings register STATUS. The issue comes from
the dummy byte in the beginning of the buf.raw which is not necessary.
In addition, for bmi160 on spi bus, the dummy byte has already been
handled in bmi160_transceive while reading register.
So the dummy byte should be removed.
Signed-off-by: Zhang Lixu <lixu.zhang@intel.com>
The Microchip XEC (MEC172x and MEC152x) have a breathing-blinking
LED (BBLED) block which implements a simple PWM mode. The BBLED
PWM frequencies are 32KHz and 48MHz selectable in device tree.
Frequency divider is 12-bit resolution from 256 to (256 * 4096).
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
The Microchip XEC family of microcontrollers includes a
simple DMA block implementing multiple channels. DMA supports
memory to memory, memory to peripheral, and peripheral to
memory transfers. Peripheral support is limited by each
chip to I2C and SPI controllers. DMA hardware does not support
scatter-gather or linked transactions.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Allow DMA channel to be stopped even if it is in suspended state.
The current code in dw_dma_stop() supports this, but the recently
added early check for dw_dma_is_enabled() results in DMA stop
sequence to be skipped if the channel was in suspended state.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
The conditional definitions are not correct as "chan_data"
is used without any include guards, but defined only if
CONFIG_DMA_DW_HW_LLI or CONFIG_DMA_DW_SUSPEND_DRAIN is defined.
Correct the declaration to match usage.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
This is a follow-up to commits cf871aec64
and 205e684958.
It turns out that the current implementation of the nrf_rtc_timer may
still fail to properly handle a timeout if that timeout is set in very
specific conditions - when a previously set timeout is about to expire.
When that happens, the new timeout is handled 512 seconds later (when
the system timer overflows) than it should be.
A recently added nrf_rtc_timer test case (test_tight_rescheduling)
exposes this problem and this commit fixes it by adding examination
of COMPARE events that appear during setting of the CC register value
for a given timeout.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This function name is misleading as the absolute time values handled
by the driver are 64-bit and this function receives a 32-bit parameter,
which is supposed to be a CC register value, not the target time.
Correct the name of this function and its parameter, and remove a now
unnecessary masking from its body.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
I believe this comment and condition may have found its way into the
rp2040 driver from other drivers where it makes more sense. For
example for the stm32 driver performing a read on the EP0_IN endpoint
turns it silently into a read on the EP0_OUT endpoint. As far as I can
tell, this really was only used to consume 0-length Status-Stages of
to_host control transfer in the other drivers.
Note that usb_dc_ep_start_read() is never called in an IN endpoint
in the rp2040 driver, and furthermore, even if it would have been
called like that, the current implementation would not do the silent
change into actually performing a read on the EP0_OUT endpoint instead,
so the condition and comment is just wrong.
Note that 0-length Status-Stage of to_host control transfers is
currently consumed in this driver by usb_dc_ep_read_continue().
Signed-off-by: Purdea Andrei <andrei@purdea.ro>
Since not all GPIOs support voltage selection, voltage flag
is only set if voltage selection register is present.
fixes: #54366
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
The data stage of Control transfers that are sent from Host to Device, can
be made out of multiple OUT transactions, if the amount of data to be
transmitted is larger than the endpoint size. When this happens, the DATA
pid should be toggling. The USB Device driver of the pico must correctly
prime the EP0_OUT buffer with the correct data PID, otherwise the hardware
will reject the received transaction.
Before this change the driver used to always prime EP0_OUT with a DATA1
pid.
After this change the driver only uses DATA1 pid after a setup transaction,
and then toggles the pid for each transaction.
Signed-off-by: Purdea Andrei <andrei@purdea.ro>
On a repeated dma_start, the stm3u5 dma driver should return
immediately if it is already started.
On a repeated dma_stop, the stm3u5 dma driver should return
immediately if it is already stopped.
This like the dma driver does for other stm32 series.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Correct bit mask for RF2XX_RX_TRAC_BIT_MASK. Current mask produce dead
code warnings when comparing to value:
RF2XX_TRX_PHY_STATE_TRAC_INVALID = 0x07
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
cy8c95xx I2C GPIO support was broken in commit 4b30008 due
to wrong i2c bus and addr were wrote during GPIO_PORT_INIT.
Now fix this issue.
Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
Address map used for config item `uart_dev` and `uart_regs` is
currently derived using the rpi hal macros `uart0` and `uart1`
which map to the same register address as given in the `reg` property
of the devicetree.
However, the sdk macro is generated using `uart##idx` which zephyr does
not necessarily map to uart0 or uart1.
This is, for example, the case when disabling uart0 with the devicetree
status "disabled"
and enabling uart1 for which then the idx==0 and not 1 which therefore
maps to the wrong controller address space.
This can simply be fixed by deriving the base address from
`DT_INST_REG_ADDR(idx)` instead
Signed-off-by: Ramon Aerne <ramon.aerne@axelera.ai>
PR #30403 implemented nocache regions for ethernet DMA buffers in sram3 to
fix issue #29915. Unfortunately, some STM32H7 variants do not have any
sram3 so they still suffer from #29915.
All H7 variants have sram2 though, so use that for targets without sram3.
Signed-off-by: Björn Stenberg <bjorn@haxx.se>
ETH MAC config for STM32H7X and STM32_HAL_API_V2
too late and fails #54409
call HAL_ETH_SetMACConfig before HAL_ETH_Start_IT()
check the return of HAL_ETH_SetMACConfig()
Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com>
On the stm32U5, when modifying the DIER register of the LPTIM peripheral,
a new write operation to can only be performed when the previous write
operation is completed and before going-on.
This is done with a function call for better readability.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
When the LOG_WRN is used on stm32 uart driver it could block
execution : when pin state for sleep mode is not defined by the DTS
even if no error is raised, LOG_ msg is crashing when entering sleep mode.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit changes the ability to keep the RTC value between resets, and
turns it off by default.
Though this feature makes sense for an RTC counting the time and date,
here it is used as a counter. As such the registers used for coutning
should be reset after each MCU reset.
This change puts back in place the previous behavior before the Kconfig
CONFIG_COUNTER_RTC_STM32_BACKUP_DOMAIN_RESET was removed.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
With CONFIG_ETH_STM32_MULTICAST_FILTER=n, MACFFR was being set to 0 instead
of ETH_MULTICASTFRAMESFILTER_NONE, blocking all multicast traffic.
Instead, reset all the relevant bits first, then set either
ETH_MULTICASTFRAMESFILTER_HASHTABLE or ETH_MULTICASTFRAMESFILTER_NONE
depending on Kconfig.
This issue was introduced in #53850, `git diff a5f9fc2~2 a5f9fc2` (the
total diff of that PR) shows what happened - the
`tmp |= ETH_MULTICASTFRAMESFILTER_NONE;` line was removed completely
instead of being gated by `!defined(CONFIG_ETH_STM32_MULTICAST_FILTER)`.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Requesting page layout triggers filling bank array
only once, and returns pre-filled array on consequential calls.
But ignores array size.
Remember size of this array as well.
Fixes#54563
Signed-off-by: Maciej Zagrabski <mzi@trackunit.com>
MMC was using SDMMC kconfigs to build disk driver.
This is incorrect, MMC and SDMMC should not be sharing
Kconfigs. Split the drivers/disk/Kconfig.sdmmc into
drivers/disk/Kconfig.mmc and drivers/disk/Kconfig.sdmmc.
Also update disk tests to account for new MMC Kconfigs.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The fast tx/rx/txrx functions will leave the SPI bus in an
inoperable state if interrupted, potentially spinning forever waiting on
some data. Wrapping these operations in what amounts to a critical section
using spin locks to avoid the issue.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Add support for side B channels in MCUX LPADC driver. Given
that no instances of the IP block have more than 8 a side channels,
use channel numbers over 8 to indicate side B channel is desired.
Fixes#51076
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
PSM hibernate mode would draw excessive current
because the UART would be enabled if CTS went low.
In hibernate mode, do not use CTS to power on the UART.
Fix reading of input pin states for low power by reading
the raw value.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Change event callback lock to a semaphore to avoid
priority issues the mutexes can cause.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
This driver enables a number of interrupts it does not attempt to handle.
This results in "unhandled IRQ: 0x...." messages being printed, and the
interrupt handler retriggers immediately again, and this happens again
and again forver, because nothing ends up clearing the interrupt.
This change implements very limited handling of these interrupts. A custom
warning is logged, and the interrupt is cleared.
This change does not imply that doing this is sufficient. More changes may
need to be implemented to more gracefully re-start transactions or
re-arm some endpoints, but this is one step in the right direction,
and at least the OS doesn't freeze up.
Signed-off-by: Purdea Andrei <andrei@purdea.ro>
Align driver with changes introduced in the hal. `nrf_timer_frequency_set`
was changed to `nrf_timer_prescaler_set`, update driver accordingly.
Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The driver currently stores num_keys in both config and data. Drop the
data copy, save 4 bytes of RAM.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add code that acts accordingly when a transaction does not complete
in the expected time. It makes sure that the transaction is aborted
so that no unexpected interrupt occurs afterwards and it also cleans
up after that abort so that the driver can handle further requests.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
UNUSED_L2_START_ALIGNED is a marker of first page not used by the
linker. Starting from this page, the memory may be re-mapped.
assertion <= is banning remapping of the first unused page
changing to <
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
Update the calculation of the row and column.
Issues were seen when running the LVGL sample.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The driver is missing the GPIO initialization entirely, meaning that
flags like PULL_UP are not currently being applied. Add the missing
call.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The introduction of cc2c05a90c caused
CONFIG_MCUX_LPTMR_TIMER to always be enabled for boards where the NXP LPTMR
is enabled in the board devicetree.
Using this low-power timer as system timer only makes sense when using
power management. Otherwise, it just results in a lower tick resolution and
non-tickless operation.
Add dependency on CONFIG_PM for CONFIG_MCUX_LPTMR_TIMER.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
New Zephyr WDT driver for TI CC13xx/CC26xx family.
Supports interrupts & MCU soft reset on timeout.
Signed-off-by: Stancu Florin <niflostancu@gmail.com>
Fix two "unused variable" warnings when compiling with assertions
disabled. The two variables are used only in the __ASSERT() call.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Fix a build error when the driver is built with:
CONFIG_PM=y
CONFIG_PM_DEVICE=n
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_UART_CONSOLE_INPUT_EXPIRED=y
due to uart_xec_pm_policy_state_lock_get() and rx_refresh_timeout_work()
declared under different configuration options.
Fixes: 343d1919f1 "uart: microchip: add low power & wake support"
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
To follow the IWDG configuration sequence, the timeout install is
just preparing the reload and prescaler parameters.
Then during the iwdg setup the watchdog is enabled and configured
at the same time.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
1. Do not copy over the data to the local buffer,
it can be directly sent to the controller. The
cache is flushed before calling the HAL send
function. Also do not allocate a buffer from
the heap pool for the write operation.
2. Remove a length check as this is handled by
the HAL driver.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Add support for automatically configuring GPIO hogs defined in the
devicetree during system initialization.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
It is not guaranteed that a multi-core RISC-V hart numbering scheme
will match Zephyr's sequential cpu numbering scheme. Read the hartid and
use that value in calculation to get mtime_cmp reg, instead of the
current_cpu id.
Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
changes to support low power and wake support in microchip xec uart
driver. Add support for wakerx_gpio config in dts to select the wake gpio.
Configure for wake in PM_DEVICE_ACTION_SUSPEND state and clear
interrupt in wake isr. Also added support for
CONFIG_UART_CONSOLE_INPUT_EXPIRED
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
New capability is to be used by the stack to adjust the corresponding
field in the device descriptor.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
udc_ep_flush() is not implemented by the driver and is not
used by the USB device stack. Remove it for less confusion
when porting drivers.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
The ISR prototype was changed some time ago
(6df8b3995e)
to (const void*) => fix the prototype used when
CONFIG_IEEE802154_NRF5_EXT_IRQ_MGMT is not set
to avoid a compile warning.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Fix the low readability read command which was swapped with high
readability. This should fix an issue which caused a sensor fetch
fail in low repeatability single shot mode (no data ready)
Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
Fixes using wrong status bit for ADS1119_STATUS_MASK_ID. Moreover
using BIT(8) does not make much sense for working with uint8_t.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Added new CC1352P1 LaunchXL board supporting 20dBm TX for its
sub-GHz radio.
Note that the board has a multiplexer circuit to switch between
2.4GHz, High-Power TX and Sub1GHz states, for which a custom board
module was implemented, together with board-specific device-tree
bindings and pinctrl definitions for each of the RF states.
Signed-off-by: Stancu Florin <niflostancu@gmail.com>
Enhance IEEE802154 Sub-GHz driver to support CC13x2P's internal power
amplifier (20dBm) for TX.
Note: requires board-specific antenna switching for it to work
properly.
Signed-off-by: Stancu Florin <niflostancu@gmail.com>
When turned on, the existing i2c dump code is use to log every I2C
transaction at debug level.
This can be very useful for detecting problems with I2C peripherals.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
If an i2c message is for just one byte, instead of logging it with a
hexdump after logging the other message info, just added the one byte to
the same log message.
Since most i2c messages are one byte, this significantly reduces the
number of messages and lines needed to log i2c transactions, from three
line per message to just one. It's also a lot easier to read.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
Add an argument to i2c_dump_msgs() to log the data from reads too. And
then rename the function to i2c_dump_msgs_rw() so the API doesn't
change. If the dump is done after a transaction is processed, as
opposed to before, then the read data is valid and can be very useful.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
When estimating the time that a given SPI transfer will take, whole
buffer sets for TX and RX need to be taken into account, not only their
first parts. Correct `spi_context_wait_for_completion()` accordingly.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
spi_nor_sfdp_read is now called from spi_nor_process_sfdp for the
CONFIG_SPI_NOR_SFDP_RUNTIME case and that could be defined without
CONFIG_FLASH_JESD216_API being defined
Signed-off-by: Michael Larson <larson@whisper.ai>
Adjust the size of the stm32_flash_layout[] table depending on the
bank configuration of the stm32u5 or stm32l5 devices.
That will avoid div by zero error in flash_get_page_info()
if the layout_size is not correct.
Assign the *layout_size only once with the correct value : 3 or 1.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Lock I2C device state when used so that Power Manager doesn't
suspend the device.
Initial state is a suspended device.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
Clock and pins used by the I2C device are suspended when power
manager requires it.
Do not compile function i2c_stm32_suspend when PM_DEVICE isn't
enabled as it is left unused and will make the compiler throw
a warning.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
Common STM32_EXTI_LINE_NONE for declaration and setting
of wakeup EXTI line when configured.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
This commit aims at updating the drivers stop function to better
follow the CAN header file which specifiec that stopping the CAN
controller should "abort any pending CAN frame transmissions".
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
Zero data payload size for isochronous endpoints is a
is a valid setting for default interface.
Also do not update MPS of control endpoint since it is
set by the driver.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
The change enables the ethernet driver to save statistics in a
structure in the ethernet driver API structure. In addition, the
change also attempts to update error statistics based on errors
reported in the STM32 ethernet HAL API.
Fixes#53995
Signed-off-by: Chamira Perera <chamira.perera@audinate.com>
The CAAM hardware needs to read RNG values into a non-cache
buffer. Since the contract to Zephyr RNG functions do not
require non-cache buffers, we use an intermediate non-cache
buffer to retrieve results.
Added a Kconfig to control the size of the intermediate buffer.
Fixes#53035
Signed-off-by: David Leach <david.leach@nxp.com>
This commit fixes a bug in the STM32 ospi flash driver when attempting
to erase an area that spans more than one erase sector.
Without this fix, only the first sector is actually erased, the rest
silently fails the erase.
Issue is that the write enable latch command is only sent for the first
erase command.
Signed-off-by: Brian Juel Folkmann <bju@trackunit.com>
This enables the MCO clock output pin to be configured through Kconfig on
stm32l4 devices.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
This enables the MCO clock output pins to be configured through Kconfig on
stm32f7 devices.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Add 2 new sub-commands to the sensor command (attr_get and attr_set).
These commands can be used to access the driver's attr_set and attr_get
functions.
Signed-off-by: Yuval Peress <peress@google.com>
Remove the CAN_HAS_CANFD Kconfig helper symbol in order to allow enabling
CAN-FD support in the API regardless of driver support.
Change default to CAN-FD support being disabled and have samples and tests
that require CAN-FD support turn it on. This aligns the default
configuration across CAN controller drivers regardless of their
capabilities.
The rationale behind this is that we are starting to see MCUs with multiple
CAN controllers, some CAN-FD compatible, some not (e.g. NXP i.MX RT1060 and
FPGAs). Automatically enabling CAN-FD support based on the presence of a
CAN-FD capable CAN controller leads to different application default
settings based on the CAN controller(s) in use.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Remove the CAN_HAS_RX_TIMESTAMP Kconfig helper symbol in order to allow
enabling CAN RX timestamps in the API regardless of driver support.
This simplifies application prj.conf settings across board supporting/not
supporting RX timestamps considerably.
CAN drivers not supporting RX timestamps already initialize the timestamp
to 0 for received frames.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Now that we have the information of internal channel number for STM32
ADCs in the dts, we can use it to remove a lot of specific code and
make it clearer.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Slightly refactor STM32_ADC_INIT macro.
adc_stm32_cfg_##index declaration is now part of ADC_STM32_INIT
and extracted from CONFIG_ADC_STM32_SHARED_IRQS #ifdef.
Aim is to minimize code duplication when adding new adc_stm32_cfg_X
or adc_stm32_data_Y entries
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This is a follow-up to commit 205e684958.
The recently added nrf_rtc_timer test case (test_next_cycle_timeouts)
revealed a problem in the current implementation of this function.
Adjust it to avoid missing COMPARE events in specific circumstances.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
RP2040 requires watchdog load time in us, but Zephyr
watchdog window values are in ms. Make sure that it is
adjusted to hardware requirements.
Signed-off-by: Marcin Jabrzyk <marcin.jabrzyk@gmail.com>
Currently we setup irq trigger type (pulse or level) in IDU
before we Mask (disable) IRQ line.
The IDU is disabled at this moment, however we still may
accidentally generate interrupt by trigger setup.
To avoid that let's mask (disable) IRQ before trigger type setup.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
bugfix for Cyclone V Ethernet Phy error and timeout overflow.
- p->instance was incorrectly assumed to be a reference to
the emac device, this is ammended
- the volatile uint16_t timeout would often overflow
- code cleanup and added more macros for housekeeping
Signed-off-by: Benjamin Kyd <benjamin.kyd@intel.com>
Add a driver for the NXP MCUX Quadrature Decoder. The driver
is simple and only implements the phase a and phase b inputs. The
module has additional features which can be added in future PRs.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Change the name of the custom macro defined for the stm32 devices
to fit the VND_PWM_xxx model
Keeping old deprecated macro, though.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Introduce Ethernet low-level driver for NXP S32 Network Controller
(NETC). Current driver allows to manage from Zephyr a Physical Station
Interface (SI) and/or a Virtual SI. The NETC has an integrated Ethernet
Switch. Currently the Switch is initialized from this driver with a
default configuration, and all ports are enabled and transparent for
the user. A separate Switch driver should be addressed in future patches.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Introduce NXP S32 NETC External MDIO controller driver. Driver supports
a single instance, as current support is based on NXP S32Z/E SoCs.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Advertise Gigabit Ethernet if the PHY supports it. As with the
other speeds, it is assumed the PHY supports both duplex modes.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Introduce NXP S32 Message Receive Unit (MRU) driver based
of Mbox API. The MRU couples with a processor and allows to
receive messages from senders, which are other modules or
processors.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
This change enables the ISR Hard Reset sent bits, so that
an interrupt is generated when a Hard Reset is sent or
the Hard Reset failed.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
The Hard Reset sent signal was tested twice in the same
"if else" structure but only handled in the last test. This
change removes the first detection so that Hard Reset can
be correctly detected.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
Only run the `PM_DEVICE_ACTION_TURN_ON` and `PM_DEVICE_ACTION_TURN_OFF`
actions for child devices that have refered to the domain via the
`power-domain` property.
This prevents multiple actions being run for devices that refer to
several power domains, e.g.
```
test_dev: test_dev {
compatible = "test-device-pm";
status = "okay";
power-domain = <&test_reg_1>;
alternate-domain = <&test_reg_chained>;
};
```
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
The struct sensor_value type does NOT require val2 to be positive. The
removed code is in fact a rather serious bug, probably put in place
because it makes printing sensor_values easier.
Signed-off-by: Benjamin Lindqvist <benjamin@eub.se>
It's not necessary to busy wait 150 µs after changing register banks.
Nothing in the data sheet nor app note suggests this. ST's own HAL,
which is used by this driver, does not delay when changing banks. It
does a bank change around every function that accesses a non-user bank
register (it's quite inefficient).
So if it was necessary it would be broken now, as most of the bank
changes have no delay.
One of the few page changes that did have this delay are the those done
before and after reading a sensor sample. Which is where the speed is
significant and is limiting the update rate the driver is capable of.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
The code in the ST HAL does a read/modify/write to change the bits in
the LSM6DSO_FUNC_CFG_ACCESS register that control which register bank is
active.
All the other bits in the register are defined as zero. It's possible
to simply set the register to the desired value without reading the
contents first.
This bank switch needs to be done twice for every sensor read when the
sensor hub is used. The driver as it is can not keep up with the higher
update rates of the lsm6dso. So any speed increase in this code allows
for a higher update rate as well as reduced latency.
Previously, a read of the lsm6dso's accel and gyro on a 400 kHz I2C bus
with a 3-axis magnetometer on the sensor hub takes 2.69 ms. This drops
that to 2.26 ms. This is enough to support the 417 Hz ODR.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
There is a flaw with I2C communication to peripherals behind the shub
that causes sporadic failures. Especially calls to configure a device
after the lsm6dso initialization is finished, e.g. to set the ODR, can
fail to work correctly.
Access to shub peripheral registers is done by putting the parameters of
the operation into SLV0 and then waiting for the lsm6dso to perform the
xfer on the shub I2C bus. The lsm6dso does this in sync with the
accelerometer update rate. Once the shub is enabled, it peforms the
xfer repeatedly as the accelermeter is sampled.
The wait has a problem: It might detect that a previous shub xfer has
finished, which was done before SLV0 was programmed with new parameters.
The shub status register is read-to-clear. This isn't in the data sheet
or app note, but it is. By reading the status before enabling the
sensor and after programming SLV0, we can be sure when it becomes set it
has finished the current operation and not a previous one.
Also set the write-once flag before shub init. This causes the shub to
only perform I2C writes once instead of continuously. This was set at
the end of init, so any writes done during it would repeat until the
shub was disabled.
Put a timeout in the code that polls for the sensor hub op complete. It
could possibly poll forever. More importantly, if there is no device
connected to the sensor hub, the lsm6dso does not timeout on the
operation for ~13 seconds. Since the shub init does a probe for devices
on startup, this will happen if shub support is enabled but a lsm6dso
has no sensor hub devices. There could be multiple devices, some with
additional sensors and some without. Initialization of the devices
without additional sensors takes tens of seconds without this timeout
being added.
Add a 300 µs wait after disabling the sensor hub. This is necessary
according to the ST app note AN5192 §7.2.1.
Read the shub status from the main bank register instead of the shub
bank register. This avoids an extra bank switch before and after each
status poll. Actually two bank switches on each side, since the lsm6dso
driver switched banks and then the ST HAL function to get the status
register switches again.
The wait for the shub I2C transaction to finish is not needed when the
shub is enabled at the end of init. We aren't starting a new I2C write
or reading the result of a read.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
The lsm6dso initialization will fail if the device is not already set to
the user register bank. All the registers used will be the wrong ones
from whatever bank it is in, e.g. sensor hub bank. This includes the
registers to reset the device!
The bank will default to the user bank on reset, but the chip has no
hardware reset line. On a reboot it will be in whatever bank it was
last in. If the sensor hub is enabled, it will switch banks on every
sample, so it's entirely possible to reset or reboot when it happens
to be set to the sensor hub bank, which will cause the driver to
fail to initialize. It will not work again until the lsm6dso is power
cycled.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
Per an ST app note, the sensor hub I2C controller should be disabled
before doing a software reset. Possibly, this is because the sensor hub
could be in the middle of the an I2C transaction to a sensor when it is
reset. Disabling it and then waiting makes sure it has quiesced before
resetting.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
The initialization code would configure the lsm6dso interrupt, then
configure the rest of the chip. The chip init includes a reset that
would undo the register setting done during interrupt configuration.
It's also not a good idea to enable the interrupt on the SoC when the
lsm6dso has not yet been reset or configured. It might be generating
interrupts.
The lsm6dso has no hardware reset line, so it will not be reset on
reboot unless a power cycle is involved.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
The DMA API contract specifies that start/stop may be called multiple
times. Prior to adding power management this was perfectly fine as it was.
In adding power management, there are additional side effects that can
cause issues. Instead check the state of the channel prior to start/stop
and do nothing if already in the desired state.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
When transceiver is overload on reception a frame can be stored on
the internal buffer without processing a frame start interrupt. The
frame will complete and system will received a interrupt and signal
receiver thread with an isr_status equal to 0x2c.
The current implementation process one flag at time and it may hang
when status is 0x2c. This issue can be reproduced using two nodes
where one perform a regular TX broadcast and tThe other one should
be wait for frames. The receptor should run on debug mode and system
should be started normally. The problem happens when pressing CTRL+C
on the debugger, which will cause system to stop. However, the
transceiver still can receive one last frame. After a few transmission
user can continue application and a isr_status of 0x2c will be visible
if CONFIG_IEEE802154_DRIVER_LOG_DEBUG is enabled.
This fixes the current issue by processing all RF2XX_TRX_END events.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
A call to exit_dpd mode for the nrf QSPI nor flash should always be
made, even if the currently executing image is compiled with
CONFIG_PM_DEVICE=n, because a previously executing image could have set
the device into DPD mode, and a call to exit_dpd is required for proper
functionality. Call `exit_dpd` regardless of the setting of
CONFIG_PM_DEVICE during QSPI nor initialization.
Signed-off-by: Nickolas Lapp <nickolaslapp@gmail.com>
Previously channels could be tore down before a sequence completes,
either when using async, or when ADC_ACTION_REPEAT was specified
The teardown is now moved to after an entire context is complete
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
This optional function allows a driver to do operations
after a complete sampling sequence is completed.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Add dependency on SYS_CLOCK_EXISTS to all timer configurations.
This would avoid a situation where a possible timer configuration would
be wrongfully selected but SYS_CLOCK_EXISTS is disabled.
This simplifies code that wants to check for system clock capabilities
don't have to check if the system clock exists in addition.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Minor rework to perform the PLLI2S VCO computations in floating point as
per the original seemingly intent.
Signed-off-by: Raul Pando <raul.pando@bytegrity.co.uk>
Point to the modified version of hal_stm32 which allow to use
ETH HAL V2 on stm32F7.
Update zephyr driver to allow it.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Similarly to what was done in USB or RNG drivers, configure 48MHz domain
clock using device tree.
By default a freq clock check is enabled.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Fix handling of failed NXP FlexCAN RX mailbox reads. Instead of re-enabling
the RX MB in the ISR, we need to handle a failed RX MB read (e.g. due to a
busy MB bit).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add a locking semaphore so that multiple threads
doing transfers with the same i2c will not produce
unexpected results. The lock will ensure that only one
transfer will happen at a time and it must be completed
before another thread can request a new transfer.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Program the right trim control register for mec150x.
This fixes uart debug console output issue.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
This change takes advantage of line information coming from new properties
to simplify exti_irq_table definition and isr routing related code.
All __stm32_exti_isr_x routing functions are removed and instead,
stm32_exti_isr is now taking a exti_range structure which provides,
for each irq, start line and range length.
This argument is provided by IRQ_CONNECT macro instead of previous
dev info (which is constant and doesn't need to be provided as argument).
line_range_x variables are generated at driver init thanks to a
mix of dt magic and runtime implementation:
DT_FOREACH_PROP_ELEM iterates over each irq line (counted as
interrupt-names property) call a macro which instantiates populated
line_range_x variables, and calls IRQ_CONNECT for each IRQ.
Additionally, at each iteration stm32_fill_irq_table() is called to
fill exti_irq_table.
Since not required anymore, Kconfig symbols EXTI_STM32_EXTIX_Y_IRQ_PRI
are removed. IRQ prio is now supposed to be configured in device tree.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The hda driver uses -EPIPE to signal xrun, as proposed in the alsa lib
https://www.alsa-project.org/alsa-doc/alsa-lib/pcm.html. This commit
changes the xrun error code in dw dma driver from -ENODATA to -EPIPE to
make it consistent across drivers.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
The uart_mux_recv() documentation was wrong, the function parameters
were incorrectly documented.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
There are various call to z_soc_cached_ptr() which returns values
in the cached address space and are stored in temporary variables
that are not marked as in the cached address space. This results
in sparse complaining about discarding the cached address space
attribute. These temporary variables are then passed to other
internal memory management related functions which do not have
the concept of cached address space (as it is currently Xtensa
specific). Because of this, we cannot change the signature of
these functions. Instead, we force a change of address space
when those temporary variables are being assigned to suppress
sparse warnings.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
To support the repeated start/stop, the stm32 dma driver is
returning 0 if the channel is already started/stopped.
This is not done at the dmamux level if any.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
- Applied changes on the most recent version of the driver
- Using CONFIG_ETH_MULTICAST_FILTER to enable/disable the hash filter
- Using read-modify-write the hash table for a single address
when joining
- When leaving rebuild the entire hash table and ensure that multicast
addresses used for the hash calcuation doesn't have the joined flag set
I have tested these conditions:
- IGMP enabled and disabled on my ethernet network
- Observed the network utilisation on a STM32H7 device running these
changes with the hash filter enabled and disabled while the device is
on a ethernet network with high rate multicast traffic
- When the application closes a socket for a multicast receive, ensure
it doesn't affect the receiption of existing sockets as well as IGMP
Fixes#53773
Signed-off-by: Chamira Perera <chamira.perera@audinate.com>
Use the MAC's hash table to filter incoming multicast frames that are
targeted to subscribed multicast groups and discard all others.
Signed-off-by: Markus Fuchs <markus.fuchs@ch.sauter-bc.com>
# Conflicts:
# drivers/ethernet/eth_stm32_hal.c
This reverts commit 271b306.
In rare conditions, this commit causes the uart shell mechanism to
corrupt on Cros ec system. Revert this commit on upstream repo first to
avoid blocking the development. Will dig out why this symptom occurs
later.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
When the PAUSE or STOP command was triggered, the driver was first
requesting the PDM peripheral to stop by calling nrfx_pdm_stop() and
then it was setting a flag that was in turn checked in an interrupt
that was generated when the PDM actually stopped (what happens a moment
after the stop request is made). But that setting of the flag could get
preempted and the interrupt handler could get executed first causing
the stopping to be not handled properly and leaving the driver falsely
considering the peripheral as still active.
This commit reverses the order of these two operations to avoid
the described race condition.
Same sequence is corrected also in event_handler(), but this is
done only for consistency (it is in the interrupt handler itself
so there is no race possible in this case).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The number of HPSRAM memory blocks in use is reported to the
PMC via the sideband channel supported by the communication widget.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
the watchdog is enabled by the wdt_setup()
coming after the wdt_install_timeout.
Due to PR #44972, the code did not follow that.
This PR fixes the correct other in the sequence.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
RNG clock configuration constraints differ between each series.
Rather than providing complex build time code to verify RNG clock
configuration is correct, take advantage of CECS bit (Clock error
current status) to assess clock configuration.
This check is implemented under a specific ENTROPY_STM32_CLK_CHECK
Kconfig option. This allows user to disable this feature in specific
conditions:
- CED bit disabled in application (in which case CECS status is not valid)
- Clock configuration is deemed as correct by user. Note that RNG number
are always generated, whatever the clock status.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
RNG domain source clock is now configured via call to clock_control
driver.
Besides, add static checks to verify domain clock configuration
is correct:
- If HSI48 is used because it is default domain clock config,
it should be enabled
- If no HSI48 is available, a specific domain clock should be set
- In L0 case, PLL could be used as domain clock only at a specific freq.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use STM32_DT_INST_CLOCKS to populate device clock information.
This will allow to add clock source information in next commits.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The interrupt is used to wake up EC from low power mode.
So EC does not defer eSPI bus while transaction is accepted.
Fixes EC host commands slow issue.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
This commit makes the peripheral-id property optional and removes it's
usage from the Gecko SPI driver.
Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
Update usage of zephyr_code_relocate to follow new API. The old method
of relocating a file was the following directive:
zephyr_code_relocate(file location)
The new API for zephyr_code_relocate uses the following directive:
zephyr_code_relocate(FILES file LOCATION location)
update in tree usage to follow this model. Also, update the NXP HAL SHA,
as NXP's HAL uses this macro as well.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
There is no need to disable interrupts while just checking if
a channel needs to be processed in the ISR, as that section
does not contain anything that needs to be protected against
overwriting from some other context. In particular, if a given
timeout is changed or even aborted while its event is being
checked, this will be correctly handled in the code that follows
and that checks the expiration time.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Values to be set to the comparator need to be specified in RTC cycles,
not ticks, so the initial value used in the tickless mode needs to be
MAX_CYCLES, otherwise when CONFIG_SYS_CLOCK_TICKS_PER_SEC is set to
a value less then the RTC frequency, the initially configured timeout
will be unnecessarily shorter.
On the occassion, remove also the call to counter() when setting the
initial timeout value in non-tickless mode. RTC is cleared a few lines
above, so at this point it will most likely be 0, and even if it was
not, compare_set() would properly handle a target time value that had
already passed.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
In non-tickless mode, the timeout handler always announced maximum 1
tick to kernel, but in fact it cannot be guaranteed that the handler
execution is not delayed and that the number of elapsed ticks does not
exceed 1. Use the actual number instead.
Switch also to using a 32-bit value for `dticks` to get a bit simpler
generated code (ticks delta is not supposed to be that huge).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Align the condition checked in compare_set_no_locks() with what
set_absolute_alarm() actually provides (and slightly correct the
latter function so that it provides what it is supposed to).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add missing masking against `BIT(chan)` when handling a forced ISR
to avoid unnecessary processing of multiple channels instead of just
the one that actually requires it.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Remove a piece of code that was supposed to bring an extra update
of the anchor value but which in fact was not able to provide it,
because of the target time checking performed in process_channel(),
and which is anyway unnecessary because the timeout span is limited
to MAX_CYCLES in sys_clock_set_timeout(), so the timeout handler is
guaranteed to be executed at least twice per each RTC overflow.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Eliminate waiting for a potential COMPARE event when setting a CC
value close to the previously set one and rely instead on checking
target time when processing channel events in the ISR.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Remove unnecessary decreasing of the number of ticks by 1 (it was then
increased by 1 when it was converted to the number of cycles) and add
a comment that clarifies the way that ticks < 1 are handled.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This is important for applications which are chain-loaded by a broken
bootloader which doesn't reset the peripheral before handing over control.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Regulator voltage needs to be within allowed range before enabling. It
could happen that regulator default voltage is out of the allowed range,
so the regulator could be enabled at boot time producing a not-allowed
voltage.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The existing linear_range API did not allow values or windows outside of
the linear range (returned -EINVAL). With this change values are allowed
outside of the range, being adjusted to the edge values (min/max)
instead. In the case of windows, it is allowed to have partial
intersection. In both cases, the API assigns a valid index (nearest) and
returns -ERANGE. This change is useful because the main client of the
linear range API, regulators, needs such behavior. For example, If an
application specifies a voltage range from 1.0V to 1.5V and the
regulator supports from 1.2V to 2.7V, the regulator can configure a
voltage that satisfies the condition: 1.2V. With the current API, the
input would be refused because 1.0V lies outside of the 1.2V-2.7V range.
Also, for constant ranges, the minimum index is returned.
Tests have been updated/extended accordingly.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In order to clean up clock related code, replace static build time
clock configuration code by a runtime check.
Since I'm not able to guarantee this check will provide a correct
verdict in 100% of the cases (I'm thinking to ULPI or exotic configurations
like F7 OTG-HS), add a config option to disable it if needed.
It also doesn't apply on F1/F3 series. Keep the build time check for now.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This change doesn't consider STM32F1 series.
There are 5 categories of STM32 regarding USB domain clock:
A] USB domain clocks directly driven by CK48 clocks
B] USB domain clocks which can select either CK48 or an alternative clock
C] USB domain clocks which can select between MSI or PLL
D] USB domain clocks relying statically on a PLL output
E] USB domain clocks which can be set on 2 different PLL ouputs
For case A], there is nothing to be done. Clk48 was already configured
in a previous change (51c7643295b02ba26ddcd0fd915484114db7101c).
For case B] and C] USB domain clocks will need to be configured in
each board.
For case D] and E] relying on existing dts configuration. Though
there is no easy build time chekc that can be done.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use STM32_DT_INST_CLOCKS() to access usb device clock information.
This will help accessing domain clock information from dt nodes.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Remove this code to clean up the driver.
Clock activation is done from device tree configuration in clock_control
driver.
Users are informed by warning about missing configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
On stm32wb, M0 core may enable and disable CLK48 when using RNG.
Lock related hsem to prevent M0 to disable CLK48 when it doesn't need it
anymore.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add kscan pins gpio driver for KSI[7:0], KSO[15:0] pins that
they can be configured to gpio mode. These pins registers address,
bit fields and function are different from GPIO group, so I create
a new compatible driver for these pins.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Add stub code for SDIO support, capable of verifying card responds to CMD5.
This commit also changes the architecture of the SDIO probe step to make
adding new protocol support more streamlined, and enable compiling out
support for undesired protocols.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Since nPM1100 may be configured statically in some circuits, BUCK node
may note be defined, so neither API ops or init call are used in the
code. Add __unused attribute to account for such case.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
While nPM1100 is to be operated in fixed configuration for some
applications, it has some degree of configuration via GPIOs. For
example, mode (auto/PWM) can be configured via MODE pin. VBUS current
can also be adjusted using ISET pin, even though there is no API yet to
limit the PMIC input current.
This patch adds a new regulator class driver for nPM1100 PMIC, so that
it can be used with the standard regulator API when needed.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
It is recommended that choices in Kconfig have names
so this commit adds missing one for the type of
host commands peripheral.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
In some case, we may need to describe a domain clock for a device
while there is no way to configure it (ex: USB clock set on PLL_Q output
on F405 devices > It is not selectable).
Then, configuring a device clock domain in the clock_control driver
will allow to retrieve its subsys rate.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The dai.h interface does not prohibit calling dai_config_get()
with different direction values. The dmic driver should handle
invalid direction value explicitly and not rely on an assert.
Link: https://github.com/thesofproject/sof/issues/6896
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Periodic enqeueu of buffers can cause a attempt to start
a new transfer even though an endpoint is already busy.
Split usbfsotg_xfer_start() into two function, one to start
next transfer and another to continue the transfers, and use
busy state flags to explicitly mark an endpoint busy.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Pending state flag was only used by the UDC nRF USBD driver.
With the introduction of busy state flag it is no longer needed
and can be removed.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Periodic enqeueu of buffers can cause a attempt to start
a new transfer to host even though an IN endpoint is already busy.
Use busy state flags to explicitly mark an endpoint busy.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Provide a Kconfig option to enable HW RX and TX checksum, which
can increase throughput performances.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add missing "default y" to the Kconfig option so that it gets selected
automatically when a matching devicetree node is enabled.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
With ETH_STM32_HAL_API_V2 avoid log error message
if error log report:
we have problems if the traffic is high
Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com>
For NPCX SMB/I2C SMB modules in FIFO mode, the registers include:
* Common registers, offset 0x00-0x0f, accessible regardless of the value
of BNK_SEL
* Bank 0 registers, offset 0x10-0x1e, accessible if BNK_SEL is set to 0
* Bank 1 registers, offset 0x10-0x1e, accessible if BNK_SEL
is set to 1
In the current driver, it uses two structures, `smb_reg` and
`smb_fifo_reg`, to access `Common + Bank 0` and `Common + Bank 1`
registers. But It might be easy to misunderstand that they are two
different modules.
This CL tries to simplify this by the following steps:
1. Use `union` to combine `Bank 0/1` registers in the same structure.
2. Remove `smb_fifo_reg`. We needn't use two structures to present
SMB registers.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
The find_lsb_set is giving the position of the first '1' found,
starting from 1. "Bits are numbered starting at 1
from the least significant bit."
So that the find_lsb_set(64MBytes) is 27.
The HAL_QSPI_Init() accepts Init.FlashSize where "FlashSize+1
is effectively the number of address bits
required to address the flash memory."
To get 64MBytes = 2^26, the value of the Init.FlashSize must be 25.
and bit written to the DCR = 25.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The find_lsb_set is giving the position of the first '1' found,
starting from 1. "Bits are numbered starting at 1
from the least significant bit."
So that the find_lsb_set(64MBytes) is 27.
To get 64MBytes = 2^26, the value of the Init.DeviceSize must be 26.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Change the stm32_ospi_read_sfdp to have AddressSize
prepared in one single condition.
Add more debug msg.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit adds the support for host commands being transported
by the Serial Host Interface on the IT8xxx2 SoC.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
This commit adds the support for host commands being transported
by the Serial Host Interface on the NPCX SoC.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Adds a driver for TDK InvenSense 42688 six axis IMU. Verified using
the sensor shell sample app via:
- sensor info
- sensor get icm42688p@0
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Signed-off-by: Yuval Peress <peress@google.com>
The stm32 devices shows a x2 factor on the LPTIM1,3,4
clock source but it acts as a prescaler.
The max lptim counter (timebase) is counting 4 sec
In that case, the LPTIM count unit is double.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
During flash operation, you have to disable XiP which force function
to be located in RAM. On top of that, the function `flash_put_cmd_addr`
is time critical so we need to declare as inline. For some reason,
sometimes the function was not really inline. Changed it to
ALWAYS_INLINE fixed the bug.
Signed-off-by: Mathis Raemy <mathis.raemy@gmail.com>
The `fcntl.h` header has never been a part of ISO C so move it to
`include/zephyr/posix`.
To ensure a smooth migration, a header was left in
`lib/libc/minimal/include` that prints a deprecation warning.
Users should either include `<zephyr/posix/fcntl.h>` or switch to
`CONFIG_POSIX_API=y`.
Signed-off-by: Chris Friedt <cfriedt@meta.com>
In case user didn't set mac address in any way (locally defined or
randomly generated), define mac address using device unique id.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Deprecate Kconfig mac address related symbols and replace by existing
device tree properties:
- local-mac-address
- zephyr,random-mac-address
User who wants to keep using deprecating method of defining random
MAC address using Kconfig should set CONFIG_ETH_STM32_HAL_RANDOM_MAC=y.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to ease deprecation of these methods (in favor of dt based
configuration), introduce a choice for MAC address configuration method.
Default to random method (no change).
User wanting to still use ETH_STM32_HAL_MACX symbols should define
CONFIG_ETH_STM32_HAL_USER_STATIC_MAC=y
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Setting a detected packet family (ipv4 or ipv6) in net_context level
instead in lower layers for AF_PACKET/SOCK_RAW/IPPROTO_RAW type sockets
when sending data.
Signed-off-by: Jani Hirsimäki <jani.hirsimaki@nordicsemi.no>
BUCK1/2 are defined as "always on" regulators, however, there is a
special override register that allows to turn them on/off.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some regulators are enabled by default, however, such condition cannot
be captured now by the regulator driver API. Refactor
regulator_common_init_enable to regulator_common_init (enable removed,
as it also sets mode) and add a new argument to specify such condition.
With this change, regulator_disable() and regulator_is_enabled() work as
expected without a first call to regulator_enable().
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Vbus detection is required by self-powered, with external non-USB
supply, devices to have an operational USB peripheral. The voltage
sensing, when enabled, is performed via a designated pin (PA9 is
the most common).
For greater details see section 2.6, ST application note AN4879.
Signed-off-by: Raul Pando <raul.pando@bytegrity.co.uk>
When using watchdog which doesn't support callbacks (e.g. STM32 IWDG)
it's very useful to have counter based watchdog with shorter timeout.
This way we can gather useful information before IWDG resets SOC.
In above case it's usually not desired to reset SOC when counter
watchdog is triggerd, because we can lose information about reset cause.
For example, STM32 can determine if the reset was caused by watchdog.
Another use case for counter watchdog without SOC reset is to detect
slow code paths.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Now that both RTC source clock Kconfig symbols are disabled by default,
we invert the ifdef so that in the absence of configuration we still
fall in the LSI configuration.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Following #50104, properly deprecates old Kconfig symbols concerning
RTC source clock and makes them optional to have them disabled by
default.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Now that compatible is directly linked with driver version,
use DT compat based Kconfig flag to build the correct flash driver
version.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Instead of introducing a vX driver version, use series name.
With this commit F0, F1, F3, L0 and L1 series are using F1 flash driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Instead of relying on STM32Cube API, use clock_control framework
for clock configuration inside this driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In preparation of the introduction of dt configured clock in this
driver, refactor clock related clocks.
- remove start_ble_rf()
- Move IPCC clock activation in c2_reset()
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
As long as LSE clock is set in device tree, configuration will be
done in clock control driver, no need to do it here.
Besides, remove back up domain related code as this is also already
handled in clock_control driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Remove code related to LSI used as clock source for RF wakeup,
it isn't a valid clock source.
Also don't disable LSI when LSE is selected.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update the SBS Gauge driver that implements the fuel_gauge API to implement
a set_property function allowing the writing of an SBS word to the
manufacturer access register per the SBS spec.
Includes an update to the SBS Gauge emulator and SBS fuel gauge tests to
weakly verify the code runs.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Implement and weakly test fetching the manufacturer access word from an SBS
compatible fuel gauge.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Current divisor is 10000000 (should be 1000000).
For example, ESP32_CLK_CPU_240M / 10000000 == 24 MHz (incorrect).
Signed-off-by: Chris Wilson <christopher.david.wilson@gmail.com>
This change for addressing the below symptoms.
Two FW images have different h2ram offset settings.
Jumping to each other will cause offset setting errors.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
At default, IBF (input buffer full) interrupt status will be cleared
after reading keyboard data input register (KBHIDIR) in ISR.
For request to clear OBF (output buffer full), we need to enable clear
mode. In the mode, IBF status cannot be cleared by reading KBHIDIR
register. It means that if AP output data to 60h/64h port during the
mode enable, IBF interrupt will keep triggering until the watchdog is
reset. This patch addresses this issue.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Following updates previously done for other drivers, rename all
occurrences of S32 to NXP S32 to avoid ambiguity.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Following updates previously done for other drivers, rename all
occurrences of S32 to NXP S32 to avoid ambiguity.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Following updates previously done for other drivers, rename all
occurrences of S32 to NXP S32 to avoid ambiguity.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Add support FD frame filter to configure type frame for
each Rx msg to receive corresponding frames (classic, FD frames).
The Bosch M_CAN driver does not support FD frame filter,
so inmplement driver to handle it in software.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
The number of extended filters can be up to 15 for MCUs like the NXP
LPC55Sxx series, so the flags don't fit into uint8_t.
Fixes#53417
Signed-off-by: Martin Jäger <martin@libre.solar>
hal_espressif systimer HAL calls are based on 1MHz reference.
This changes systimer driver to allow max clocking reference of 16MHz
and increases soc tick resolution by reducing min delay interval.
This also sets all ESP32-C3 socs to 16MHz hardware cycles reference.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
ISO/IEC 9899:1999 (C Standard), §7.4 Character handling <ctype.h>:
In all cases the argument is an int, the value of which shall be
representable as an unsigned char or shall equal the value of the macro
EOF. If the argument has any other value, the behavior is undefined.
So add a cast to unsigned char to make sure we do not trigger UB.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Introduce driver for APS6408L PSRAM, built on top of the MCUX memc
driver for flexSPI. This driver supports operating the PSRAM in high
speed mode (200MHz or more). Note that in order to support this
PSRAM's alignment requirements, either ahb-read-addr-opt or
ahb-prefetch must be set for the FlexSPI instance.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
memc driver was setup to always assume the flexSPI would be in XIP mode,
and skip init. This is only true for the active flexSPI, which is
typically FlexSPI1. Fix this check to only skip init for FlexSPI1
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Rename flexspi-hyperram driver to flexspi-s27ks0641, and update
function names. This driver is only capable of supporting the
s27ks0641 HyperRAM chip, as the lookup table given in this driver
is specific to the s27ks0641.
Rename the flexspi-hyperram binding to reflect this, to
prevent confusion from users.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Printing of NACK messages should be set to LOG_DBG to avoid spamming.
When we scan whether there is a target device through I2C, if we use
LOG_ERR, it will frequently print out NACK messages. So it is set to
LOG_DBG in the case of NACK.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Fix a bug that causes not handling an IDLE line detection interrupt for
some STM chips, e.g. STM32F412. It impacts the async UART
communication - an information that data have been recieved is lost.
The issue occurs when the IDLE flag is set during handling another UART
interrupt, e.g Transmission complete. The ISR calls uart_stm32_err_check
function, which clears the noise error flag with LL_USART_ClearFlag_NE
without any additional checks. Unfortunately, clearing the noise flag
also clears the IDLE flag for some chips(an read to the USART_SR
register followed by a read to the USART_DR register for STM32F412
clears PE, FE, NF, ORE and IDLE flags), hence the ISR is not called
again for the IDLE event. The IDLE flag is no longer set.
Add checking the noise flag before clearing it.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
ESP32 and ESP32-S2 HW clock are tied to DTS clock configuration.
This changes updates the default configuration to retrieve
this information from DTS.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Only relocate memc driver when CONFIG_FLASH=y.
CONFIG_FLASH_MCUX_FLEXSPI_XIP previously was dependent on
CONFIG_FLASH, but the scope of this Kconfig has changed.
Due to this, the memc driver now must have two checks, as it should not
relocated when the driver is being used for a memory controller that does
not expose the flash driver interface.
Since the NXP HAL also relocates the underlying FlexSPI driver
using a similar check, it is updated in this commit as well.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The addresses of the flash and flash controller of the RP2040
SoC were mixed up. There was no clear distinction between the
flash and the flash controller, which was unclear but also
caused a DTC warning.
This commit makes the distinction clearer: The SSI peripheral at
0x18000000 is the flash controller, and the flash itself starts
at 0x10000000. The flash driver and rpi_pico.dts were fixed
accordingly.
Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
It should never be intended to return an uninitialized
variable from a function.
Remove the use of the uninitialized variable to fix the bug.
Signed-off-by: Chao Song <chao.song@linux.intel.com>
The adc1 & 2 of the stm32g4 devices share the same irq
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Since the FLEXCAN_TransferSendNonBlocking() function has
read-modify-write operations on global resources, then
if interrupts are enabled and/or if there is more than
one thread with a different priority, threads with
a lower priority can overwrite global resource changes
made by higher priority threads.
Fixes#52673.
Signed-off-by: Mikhail Siomin <victorovich.01@mail.ru>
pwm_set_wrap() sets the TOP value, not the number of cycles.
Counter will run from 0 to TOP inclusive, generating TOP + 1 cycles.
To get n cycles, we need to set TOP to (n - 1).
The wrong setting made it impossible to achieve 100 % duty cycle, as
there was always one extra cycle.
Fixes: 7e0fff24c7 ("drivers: pwm: add pwm driver for rpi_pico")
Signed-off-by: Oliver Barta <o.barta89@gmail.com>
Change Summary: The TX/RX FIFO was not flush on initialization thus
causing bad transactions. Thus, we need to flush the FIFO, and
according to Synopsys DW I2C spec, we can flush TX/RX FIFO by clearing
the enable bit. This is verified with our own I2C test on the SoC with
Synopsys DW I2C IP.
Signed-off-by: Dennis Wang <dennisjw@fb.com>
Add support for Microchip MEC15xx to the XEC clock control driver.
MEC15xx 32KHz clock support uses the same 32KHz source for both the
PLL and peripherals. MEC152x does not include the PCR clock monitor
present in MEC172x. MEC15xx and MEC172x support internal silicon
oscillator, parallel and single ended crystal inputs, and the
32KHZ_PIN input. MEC152x supports fall back to internal silicon
OSC when VTR and 32KHZ_PIN are turned off. Therefore in MEC152x the
internal silicon oscillator can only be disabled if using an external
32KHz which is always on. For MEC152x the driver will only use the
PLL source clock device tree value.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Fix Microchip XEC clock control driver single-ended XTAL2 pin
initialization. Add support for external 32KHZ_IN pin as a
clock source including PINTRL to switch the GPIO to 32KHZ_IN
function. Add device tree option to disable internal silicon
oscillator if it is not required by the configuration. Add
device tree tuning options based on crystal and board layout.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Some baudrates are not supported in certain SoCs.
Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The ADC4 requires particular sequencer configuration.
Clean section that are not used for the configuration.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Depending on the ADC instance, internal channels
temperature sensor or vbat differ.
That must be adapted so that each internal channels
of ADC4 are operational.
ADC4 is using CommonChannel config for the Sampling time.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
- Refactor the regulator shell so that it exposes all regulator APIs
- vset/iset commands allow to specify a single value (equal min/max) or
a range
- Voltage/current input is now more user friendly, e.g. user can specify
units and decimals: 3.3v, 200mv, -4mv, etc.
- Reported values are also printed in a more user friendly way, e.g.
1800000 uV will be printed as 1.800 V.
- Added new command to list supported voltages
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add a new API to query the configured regulator mode. Updated fake
driver and API tests.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Apply initial mode (regulator-initial-mode) as part of the
regulator_common_init_enable call. Update tests to cover this change.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
If present, get the clock value for STM32 I2C from the clock source defined
in the dts.
Otherwise, use pclk.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add support of STM32_DT_INST_DEV_DOMAIN_CLOCK_SUPPORT to condition the
configuration of an source clock for STM32 I2C.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
This commit modifies the way we define the I2C driver by using device tree
instance macros instead of node label names.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Now that USB clock prescaler is done is clock_control driver.
Remove similar part in USB driver.
Note that behavior is different: it is now up to the user to provide
the proper configuration.
Add a warning during the transition period.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
On STM32F1 series, configure USB(/OTGFS) prescaler based on DT.
When prescaler is set, PLL output clock is not divided.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use dma_slot for peripheral request instead of linked_channel.
This is a more suitable usage as described in dma_config.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
This Kconfig is moved to the soc level since it determines
the flexspi clock initialization for XIP.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Fix handling of gpio-reserved-ranges within MCUX iGPIO driver, to ensure
that the configuration IDX will be correctly calculated for pins where
multiple reserved ranges are present on the GPIO controller
Fixes#52506
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Added information about pin output direction into
Z_PINCTRL_STM32_PINCFG_INIT if output_low or output_high is provided.
GPIO output flag is set in configuration struct and this will end up
being loaded into MODE register. Because of that it is no longer
required for pinctrl_configure_pins() to set MODE register value for
GPIO input/output.
Fixes#53141.
Signed-off-by: Lukasz Mazur <lukasz.mazur@hidglobal.com>
Add uart_configure and uart_config_get functionality to
MCUX flexcomm driver to be able to dynamically configure
flexcomm uart at runtime.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
If the bootloader changes iof_en/iof_sel settings before zephyr launching,
GPIO does not behave correctly.
These values should be 0 initially, Initialize to 0 at GPIO initialize.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
When checking if any UART TX/RX IRQs are pending, the driver should also
consider whether these IRQs are enabled. Or we still get pending status
set even if the related interrupts are disabled.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Add the possibility to use the clock parameter in dts to set the clock
source of I2C devices for all STM32 MCUs.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Fix the driver so that after a call to uart_rx_disable() it does not
allow re-enabling RX until the UART_RX_DISABLED is generated (what
means that the disabling procedure is complete). Otherwise, it is
possible that the RXTO event from the previous RX is handled right
after a new RX is started, and the RX buffer pointer gets corrupted
in the `rx_flush()` function.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
NPCX9 series chips include a SHA hardware accelerator, which supports
SHA256/SHA384/SHA512 hashing and a library (APIs) in the on-chip ROM.
This commit adds the driver support by wrapping the on-chip ROM APIs.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Clean up occurrences of "#if IS_ENABLED(CONFIG_FOO)" an replace
with classical "#if defined(CONFIG_FOO)".
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Bug occurs when polling kernel uptime. Uptime was suddenly
jumping because lptim counter was counted twice
(from CNT and ARR registers) in case reload happens between
values are fetched.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
peripheral-id property should be eventually removed.
For now set it as optional and allow skipping the usage
in UART driver.
Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
peripheral-id property should be eventually removed entirely.
For now set it as optional and allow skipping the usage
in GPIO driver.
Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
Common GPIO driver needs to be initialized before e.g UART driver
to ensure correct GPIO clock configuration when configuring UART pinout
Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
This commit adds initial support for Silabs Real-Time counter
Co-authored-by: Filip Kokosinski <fkokosinski@antmicro.com>
Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
This commit adds a series of driver-related changes to
Gecko pinctrl.
Co-authored-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
This commit adds initial support for gecko pinctrl driver
Co-authored-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
The ADC module has four conversion groups, each one is set up as a zephyr
device. The start-up calibration is initiated globally for all groups
and it is run in each device init function. The ADC module supports post
calibration per group. Post calibration is run automatically after each
group acquires the samples.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Add region calculations and implementation of
sys_mm_drv_query_memory_regions to pass calculated regions down
the line.
Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
Add FFF-based fake regulator driver. This driver can be used as a stub
or mock in testing.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The edge voltages within a range need to be included as part of the
supported comparison.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Fixed the following compile warnings:
../include/zephyr/sys/util.h:108: warning: "ARRAY_SIZE" redefined
hal/nxp/mcux/mcux-sdk/drivers/common/fsl_common.h:236: note:
this is the location of the previous definition
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
When operating as a Source, the driver will wait indefinitely for
a GoodCRC message from a Sink. This PR adds a timer to trigger a
no response when a GoodCRC message isn't received.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
Since all UCPD devices share the same ISR, the interrupt
should be enabled after all UCPD devices are initialized.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
At system startup, the SYSCFG ITLINE registers might not
indicate an interrupt even though a UCPD interrupt is pending.
This cause the ISR to be called repeatedly without being serviced,
resulting in a system lockup. Reading the UCPD Status Reg instead
of the SYSCFG ITLINE register fixes the issue.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
The nRF5340 product specification states that the QSPI peripheral
supports 192 MHz and 96 MHz PCLK192M frequency, thus the default /4
divider for HFCLK192M (from which PCLK192M is derived) can only be
used when the QSPI peripheral is idle. Correct the shim accordingly
and improve related comments.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
On some STM32 series (H7, MP1), iwdg and wwdg have multiple instances.
Due to current driver implementation, these wdg instances were not
checked in the function.
Fixes#53002
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Implement usb_dc_wakeup_request for STM32 USB DC and default to enable
remote wakeup functionality when the drivers is selected.
This allows the device to wake the host up by calling
usb_wakeup_request().
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Add support for virtual USB host controller intended for use
together with virtual bus and virtual device controllers.
This driver is not an emulation of any real host controller.
The driver has initial support for handling control and bulk
transfers.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add support for virtual USB device controller intended for use
by virtual bus and virtual UHC controllers. This driver is not
an emulation of any real host controller.
The driver has initial support for handling control and bulk
transfers.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add support for virtual USB bus (UVB) intended for use
by virtual UDC and UHC controllers. UVB is not an emulation
of the USB bus or protocol but a simplified service to connect
a virtual host controller to one or more virtual device
controllers.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add common layer of UHC API and MAX3421E host controller driver.
This implements the bare minimum necessary to communicate with
one peripheral device.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Enable Zephyr device runtime power management mechanisms in Intel HDA
DMA driver. This allows Zephyr to track usage reference for power domain
gating.
PM action handler is currently empty and will be fill out later.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Switch all imxrt boards to use the systick timer by default, and only
enable the GPT timer when using low power modes. This is desirable
because the systick has a higher resolution, but the GPT can run
while the core clock is gated, making it useful for low power modes.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Enable Zephyr device runtime power management mechanisms in Intel GP DMA
driver. This allows Zephyr to track usage reference for power domain
gating.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Support for the measuring the CPU die temperature
for the ESP32 targets S2,C3. The ESP32 support
was ommited due to lack of offset calibration.
Signed-off-by: Marek Matej <marek.matej@espressif.com>
In case of errors in the status register and to
unblock Flash, it is advised to clear the errors.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
Add a new API for drivers that can be called to initialize the regulator
at init time if `regulator-boot-on` or `regulator-always-on` are set.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
PCA9420 PMIC offers of multiple operation states, or DVS (Dynamic
Voltage Scaling). Such states may be automatically changed by hardware
using MODESEL0/1 pins. Certain MCUs allow to automatically configure
certain output pins when entering low power modes so that PMIC state is
changed without software intervention. This means that application just
needs to configure the voltages for each state using
`nxp,modeN-microvolt`, set `nxp,enable-modesel-pins` in devicetree and
forget about configuring regulators.
This patch introduces a new _parent_ API to expose such functionality in
a vendor agnostic way. Consider this API as experimental for now, until
we have other usecases.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Most of devicetree properties for regulator, such as:
- regulator-min/max-microvolt
- regulator-min/max-microamp
- regulator-allowed-modes
- etc.
Are meant to specify limits on what consumers may set. They are **NOT**
meant to describe the hardware capabilities. For example, I could have a
BUCK converter that supports 0-5V output voltage, but my circuit may
only allow working on the 2.7-3.3V range.
This patch reworks the API so that the API class layer manages this
information. This is done by drivers collecting all such fields in a
common configuration structure that is later accessed by the class
layer. This simplifies drivers implementation. For example, if A
consumer calls regulator_set_voltage() with a voltage that is supported
but not allowed, driver code won't be called. Similarly, if a regulator
is configured to be `always-on`, enable/disable driver code will never
be called.
Drivers have been adjusted. PCA9420 mode settings have been removed from
devicetree in this commit as they are not actual modes but PMIC states.
This will be refactored in a follow-up commit.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Remove redundant comments
- Remove internal *_mode functions, as they were only used once.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Define regulator mode as an opaque type, same as we do in other
subsystems like GPIO (e.g. gpio_flags_t).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Clarify the API for regulators that have the option to set mode
externally, such as PCA9420. Adjust the PCA9420 driver to comply with
the interface.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Function now returns error, value is obtained by reference. This
allows to propagate potential bus errors.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Mode specific APIs repeat the same functionality offered by non-mode
specific APIs
- The same functionality can be achieved by the non-mode APIs, since
they apply to the active mode which can be set using
regulator_set_mode() first.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The function can be implemented by using regulator_count_voltages() +
regulator_list_voltage(), so there's no need to defer the job to each
driver.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Rename to regulator_list_voltage (it is listing a single voltage)
- Function returns the value via a parameters, so that we can indicate
wether the given index is valid or not. If a driver doesn't implement
this call, function returns -EINVAL (as it should be).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The regulator_count_modes was an API that was not useful. Unlike with
voltages where the interface guarantees they are zero-indexed, modes can
take an arbitrary identifier. So counting supported modes doesn't
provide any useful information such as if a mode is allowed.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Interface guarantees that voltage indices start from zero to
regulator_count_voltages()
- Function always return an unsigned number. If the device doesn't
implement the API returned value is zero, as expected.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In the case that IN endpoint is not busy there will be
no notification from the HAL driver.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Adds an attribute that describes the maximum number of scatter gather
blocks that the DMA will accept. Useful in cases where DMA is used as
the abstraction for moving data around (e.g. SoF audio streams) and
variances of the hardware need to inform decisions about how to use
the DMA API.
Co-authored-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Co-authored-by: Jaska Uimonen <jaska.uimonen@intel.com>
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
The SBS fuel gauge driver did not return a count of the number of
properties that failed.
Fix this and add a test that verifies the sbs_gauge returns the number of
failing properties as well as a test that verifies a negative return code
if all properties failed.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
zephyr kernel header file should be included otherwise gcc will report
the warning: implicit declaration of function 'k_aligned_alloc' and
the return value of 'k_aligned_alloc' will be treated as an int type,
which will cause an error on the 64 bits platform.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
According to section 5.1.9.3.5 and 5.1.9.3.6 of the I3C Specification
v1.1.1. This CCC is may be optionally supported if the target device
has no settable limit.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Rename is_primary to is_secondary. The justification for this is
because it is less likely to have something configured to be
secondary, and the 0 value would be if it is primary.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Previously, a call to set the net_context state was added here to
accommodate a new KConfig scenario that permitted disabling offload
sockets. This code path is used by both local and offloaded sockets.
While it is necessary to update the state of the net_context for a
locally managed socket, setting the net_context for an offloaded socket
is an error, as the net_context is invalid (in fact, it points to a
hard-coded dummy socket), as observed in #52346 and #38544.
A prior commit (a9ac0a88) attempting to remedy the offload socket
scenario removed this line, which resulted in problems for the local
socket scenario. The socket never got updated to the connected state,
and thus was unusable.
Adding this guard allows the eswifi socket to set the socket net_context
only if the socket is NOT offloaded.
Signed-off-by: Brian Dunlay <brian@nubix.io>
In Infineon XMC4XXX SoCs, gpio interrupts are triggered via an
Event Request Unit (ERU) module. A subset of the gpios are
connected to the ERU. The ERU monitors edge triggers and creates
a SR.
This driver configures the ERU for a target port/pin combination
for rising/falling edge events. Note that the ERU module does
not generate SR based on the gpio level. Internally the ERU
tracks the *status* of an event. The status is set on a positive
edge and unset on a negative edge (or vice-versa depending on
the configuration). The value of the status is used to implement
a level triggered interrupt; The ISR checks the status flag and
calls the callback function if the status is set.
The ERU configurations for supported port/pin combinations are
stored in a devicetree file dts/arm/infineon/xmc4xxx_x_x-intc.dtsi.
The configurations are stored in the opaque array
uint16 port_line_mapping[].
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Config NOCACHE_MEMORY depend on ARCH_HAS_NOCACHE_MEMORY_SUPPORT. Enable
ARCH_HAS_NOCACHE_MEMORY_SUPPORT for Cortex-R52 to run NXP S32Z/E with
nocache attibute.
Enable nocache in each driver use it.
Signed-off-by: Duong Vu Nam <duong.vunam@nxp.com>
Adds support for GD32 timer
Note: Currently, it is not supporting RISC-V(GD32V) devices.
It needs some work on the interrupt controller first.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
The timer_ids contain timers that belong to any bus.
So, It should recognize with entire id, not only the CLOCK_ID_BIT part.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
DT_COMPAT_GET_ANY_STATUS_OKAY is not suited for the node's existing check.
(This macro returns the stem of the DTS macro name,
the stem part is not a defined symbol.)
Instead, it should use the DT_HAS_COMPAT_STATUS_OKAY macro.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Change Summary:
Update Base addr to set direction to use Aligned IP base address instead
of Port Base Address. Port Base Address + offset to direction register
will set incorrect value for Port B,C & D. For ex: In cases when more than
1 port is configured on the same IP, the DTS node for port B will start
at offset 0xC. Calculating the port using Port Base will yield offset of
PORTB DIR register which is at offset 0x10 from Aligned Base, and as a
result will result in setting DIR register of PORTC instead.
Signed-off-by: Ravik Hasija <ravikh@fb.com>
Change Summary:
Moving the setting of Pin direction before setting/clearing the pin
configured as output for the change to correctly take place.
Signed-off-by: Ravik Hasija <ravikh@fb.com>
For architectures that rely on a PCIe controller (for example, ARM64),
scanning the PCI space will only succeed after the controller has
initialized. Therefore, in the presence of PCIe controller, the PCIe
initialization is bumped to the next system init level.
In the past, drivers like ivshmem would do a late scan of the PCI space
in case the early scan failed; however, the cited commit removed this
feature and ivshmem fails for ARM64. This commit fix this by making the
early scan succeed.
Fixes: a96016d747 ("drivers: ivshmem: Remove unnecessary BDF lookup ...")
Signed-off-by: Rodrigo Cataldo <rodrigo.cataldo@huawei.com>
Co-authored-by: Henri Xavier <datacomos@huawei.com>
Only include the MSI header when ivshmem-doorbell is employed, as the
ivshmem data structures already use the same protection for msi-related
structures.
Signed-off-by: Rodrigo Cataldo <rodrigo.cataldo@huawei.com>
Co-authored-by: Henri Xavier <datacomos@huawei.com>
The ivshmem code does not use any platform-specific code; therefore,
remove the dependency to the soc interface.
No functional change intended.
Signed-off-by: Rodrigo Cataldo <rodrigo.cataldo@huawei.com>
Co-authored-by: Henri Xavier <datacomos@huawei.com>
Add a Kconfig option allowing users to configure the transfer timeout
value, as the default 500 ms may not be sufficient in specific cases.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
In multi-image environment, after jump to the image we can have UART in
unexpected state. Reset UART to default state to make sure that UART is
initialized properly and won't cause system to crash or hang.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
In multi-image environment, after jump to the image we can have running
timer with interrupts enabled. If interrupt is triggered, the asserts
in the driver can cause a crash.
This patch also adds 'resets' property for all timer nodes.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
To deassert reset in STM32MP1 RCC the driver needs to set the bit in
reset clear register.
This patch extends existing implementation to support this type of
register.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
This driver exposes STM32 RCC reset functionality through reset API.
Information about RCC register offset and bit is encoded just like GD32.
The first 5 least significant bits contains register bit number.
Next 12 bits are used to keep RCC register offset. Remaining bits are
unused.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
This function is responsible for checking if combination of msize,
mburst and FIFO level is allowed. Possible combinations can be found in
ST documentation, eg. Table 36. FIFO threshold configurations, RM0402
9.3.13 FIFO chapter.
Previously there was no 'break' or '__fallthrough' in msize switch which
caused compilation errors. Since we are confirming that combination is
correct, 'break' statements should be used.
Besides of introducing missing 'break' statements, this patch moves
'return false' from switch to the end of the function. This makes code
shorter and easier to understand, because we have only correct
combinations.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
The poll_in function of the NuMicro UART driver was using the UART_Read
function from the Nuvoton HAL, which is blocking. Replace it with a
non-blocking implementation.
Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
Add the resume API function for the dma driver of the stm32U5 serie.
That completes the suspend API function.
Controlling the SUSPF bit of the GPDMA CR register is enough
to suspend/resume the channel.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
There is no need to reset the channel else DMA config is lost and
channel should be enabled again in case of resume.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The USB_DC_STM32 help message started to miss some
STM32 MCU families. Overtime, the message will
get bigger if we continue to list family names.
Removed family names to simplify the message and
avoid periodic modifications.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
STM32 battery-backed RAM is organized in 4 byte registers. Number of
registers can vary between models from 5 to 32 registers.
Usually, the registers are part of RTC. On some variants they are part
of tamper module. On STM32F1 the registers are in separate module. For
now, only backup registers from RTC are supported.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
`spi_is_ready` function is being deprecated in favor of
`spi_is_ready_dt` so let's replace the old usage in the tree.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
STM32 counter driver uses switch statement in which cases don't end
with break or return intentionally.
Affected switches in counter driver check status of all timer channels
(maximum 4 channels), but the number of channels is not determined
during compilation. In switch, we jump to channel with highest number
and then check other channels with lower numbers.
Compiler can warn about it, so this patch adds information that it was
intentional.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
NXP LPUART IP supports rs485 mode when transceiver driver enable
using RTS. Allow setting rs485 mode up via the "nxp,rs485-mode"
dts property. "nxp,rs485-de-active-low" dts property can be used
for set RTS polarity.
Signed-off-by: Grixa Yrev <GrixaYrev@yandex.ru>
The HSI48 is enabled by clock control driver.
It is no more done by each driver that requires this clock
However when using rng or sdmmc or bluetooth/ipm or usb,
the HSI48 clock must be present in the DTS.
Add a warning for this particular check but keep the deprecated
HSI48 clock enable : keeping for legacy but to remove later.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
For the stm32 devices that have a HSI48 clock,
the driver enables it, like any other fixed clock,
if needed and supported by the serie.
For stm32L0, SYSCFG VREFINT is also required.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit adds support for get_config and get_direction functions
for the nct38xx IO expander family.
Also applies the clang-format changes.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
This commit fixes the comment and adds the missing assignment of
return value from i2c read byte command in the nct38xx driver.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
- Similar to what was done for other parts of the driver, remove any
register specification from Devicetree (modesel-reg/mask)
- Keep all the information in the driver, and define modes as "numbers",
e.g. PCA9420_MODE0: 0, PCA9420_MODE1: 1, etc.
- Bindings provide IC defaults now (all modes allowed 0/1/2/3 and
initial mode set to 0).
- When mode is controlled via the MODESEL0/1 pins (ie directly by an iMX
MCU using the dedicated PMIC_MODE0/1 pins), the driver will not allow
to select a mode (it is not possible). This mode is now enabled by
setting `nxp,enable-modesel-pins` in Devicetree. When enabled, all the
allowed modes are configured to be selectable via pins. When disabled,
mode can be set via I2C (using TOP_CNTL3 MODE0/1_I2C fields)
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add support for setting the help description for each entry in a dictionary
command. Currently the syntax string alone may not provide sufficient
description of its entry. This commit also helps keep the help messages
consistent with existing style.
Signed-off-by: Xinyang Tan <xinyang.tan@delve.com>
Now, multiple tx buffers can be used to send packets,
so that the packet size can exceed tx buffer size.
Signed-off-by: Bjarne von Horn <B.von_horn@wzl.rwth-aachen.de>
STM32H7X and STM32F4X ETH HAL Drivers now provide a new api.
This commit only adds a new Kconfig option
Signed-off-by: Bjarne von Horn <B.von_horn@wzl.rwth-aachen.de>
The transmit mutex is not needed while checking the packet size,
so we acquire the lock after checking the size and
return early if it is too big.
Signed-off-by: Bjarne von Horn <B.von_horn@wzl.rwth-aachen.de>
It is possible for nrfx usbd driver to send NRFX_USBBD_EP_ABORTED during
endpoint disable. The event is passed to event handler registered with
nrfx_usbd_init(). The nrfx_usbd_uninit() removes the registered event
handler, replacing it with NULL. If any event is sent after uninit, the
NULL pointer is executed and device crashes.
Do not uninit nrfx usbd driver on detach so it is possible for the
usb_disable() to disable all the endpoints.
Fixes: 460ca86527 ("drivers: usb_dc_nrfx: Always allow endpoint disable")
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Depending on the timing of the edges of the signal to be captured, a timer
overflow interrupt flag may appear in the same ISR as a channel event (1st
or 2nd edge capture complete) flag. Change the timer overflow math to
compensate the timer overflow count based on whether the channel event
happened before or after the overflow flag occured.
For continuous PWM period captures, only the very first edge of the first
period requires an interrupt to be captured. Subsequent "first edges" are
the same edges as the second edge of the previous period. Depending on the
timing of the captured signal, enabling the 1st edge interrupt in this case
can cause the overflow count for subsequent first edges to be captured at
the wrong point in time.
Fixes: #52452
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
AST10x0 series SOCs provide the reset controller through the syscon
hardware block. The current driver supports the reset line assert,
deassert and status for the hardware IPs embedded in the SOC. Each
reset line has an ID that can simply map to a bit in syscon registers
RESET_CTRL0_ASSERT (group 0) or RESET_CTRL1_ASSERT (group 1). Write bits
to RESET_CTRL0_DEASSERT or RESET_CTRL1_DEASSERT will clean the
corresponding bits in RESET_CTRL0_ASSERT or RESET_CTRL1_ASSERT
registers.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Enable the PSA RNG driver by default. This option
will only be enabled when BUILD_WITH_TFM is enabled
and a device with the required compatible field
(zephyr,psa-crypto-rng) is defined in the device tree.
When a vendor includes such a device and enables the
ENTROPY_GENERATOR subsystem it is fair to assume
that wants to use the PSA Crypto RNG driver.
Signed-off-by: Georgios Vasilakis <georgios.vasilakis@nordicsemi.no>
Add support for regulator mode related APIs to regulator shell, so that
the user can select new operation modes for the regulator and configure
target voltages
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Cleanup regulator shell to use strtol() over atoi(), as strtol features
error detection. Remove device_is_ready() checks, and replace them with
NULL checks as device_get_binding() calls device_is_ready() interally
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The I2C API already provides APIs to read/modify registers, so there is
no need to provide custom wrappers.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
HAL events were also used for the shim driver's concerns
during the prototyping of API. Fix it now and use specific
shim driver events. That also allows new transfers to be
triggered from a single point.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add new USB device controller API and nRF USBD controller driver.
The new UDC API brings support for multiple instances and asynchronous
transfer model, transfers use net_buf and store methadata in the
user data area.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Set the inverted value of pixel format setting in MADCTL register to
current_pixel_format in display capabilities structure
if rgb-is-inverted enabled.
This make enables support for a module that mismatches the RGB setting
in the MADCTL register and the actual display color format.
(Such as Longan Nano built-in LCD module.)
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Implement a LED driver for Microchip XEC using the breathing,
blinking LED controller. The driver supports LED on, off, and
blink API's. The BBLED block uses the 32768 Hz clock domain
allowing the module to operate in light and deep sleep states.
Blink frequency is 32768 divided by 256 * (prescale + 1) where
prescale is a 12-bit value. Duty cycle is specified by an 8-bit
value where 0 = full off, 127 is 50%, and 255 is full on.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
The cache operations must be quick, optimized and possibly inlined. The
current API is clunky, functions are not inlined and passing parameters
around that are basically always known at compile time.
In this patch we rework the cache functions to allow us to get rid of
useless parameters and make inlining easier.
In particular this changeset is doing three things:
1. `CONFIG_HAS_ARCH_CACHE` is now `CONFIG_ARCH_CACHE` and
`CONFIG_HAS_EXTERNAL_CACHE` is now `CONFIG_EXTERNAL_CACHE`
2. The cache API has been reworked.
3. Comments are added.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Re-enable the CAAM for entropy
now that the HAL driver has been fixed
Job descriptors must be accessed coherently
between CAAM DMA and core.
The M4 Cores still do not work
because of mpu/cache/kconfig arch complications,
disable caam for M4 cores in DTS
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
When pwm_it8xxx2_set_cycles() is called, we disable the pwm clock
at the beginning and enable it at the end, so there is a more than
1ms pwm low pulse when every time changing the cycle. The low pulse
would let some fans go to idle mode, so we don't gate the pwm clock.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Enable Zephyr device runtime power management mechanisms in Intel DMIC
driver. This allows Zephyr to track usage reference for power domain
gating.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This patch contains several small changes to the intel adsp power
domain.
- include missing header,
- replacing sys_write32/sys_read32 with sys_write16/sys_read16 since
DfPWRCTL is a 16 bit register,
- renaming struct to be more representing what it is,
- passing register address, not a value to the sys_read/sys_write
functions,
- pd_intel_adsp_init is now returning actual status.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
While diagnosing a problem on the STM32U585 in this function in
flash_stm32l5_u5.c, I had difficulty sussing out the flow of the
function and conditional logic.
This refactor seeks to improve clarity through a simplified flow control
using an early return to short circuit logic on subsequent calls to the
function and slightly more thorough comments.
Tested using tests/drivers/flash on the b_u585i_iot02a and in a
proprietary application and board which uses the STM32U585 and littlefs.
Signed-off-by: Peter Maxwell Warasila <madmaxwell@soundcomesout.com>
In flash_stm32_page_layout, the FLASH_PAGE_NB macro is used to set the
page count in the flash layout returned to the caller. On STM32L5
platforms this is defined in stm32l5xx_hal_flash.h to be (FLASH_SIZE /
FLASH_PAGE_SIZE). However, on STM32U5 platforms the macro is defined in
the soc headers (such as stm32u585xx.h) define the macro as
(FLASH_BANK_SIZE / FLASH_PAGE_SIZE). This results in the flash layout
only reflecting the first bank on STM32U5 platforms with the maximum 2
MB of flash.
This commit resolves this discrepancy by directly calculating the number
of pages by dividing FLASH_SIZE by FLASH_PAGE_SIZE.
Tested on a proprietary board using the STM32U585 which mounts a
littlefs partition in the last 256 kB of its 2 MB of flash.
Signed-off-by: Peter Maxwell Warasila <madmaxwell@soundcomesout.com>
Drop the async enable function. This feature is rarely/never used,
complicates driver design, and doesn't really follow the sync/async API
design/naming used in other areas. In the future we can introduce
regulator_enable_async if needed, with support from the driver class (no
onoff). Note that drivers like PCA9420 did not implement any
asynchronous behavior. regulator-fixed implemented in the past
asynchronous behavior using work queues, an overkill for most GPIO
driven regulators. Let's keep things simple for now and extend the API
when needed, based on specific usecases.
In the current implementation, reference counting is managed by the
driver class. \isr-ok attribute is dropped, since calls are potentially
blocking. Note that drivers like PCA9420 already violated such rule.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Remove regulator-fixed-sync specialization, create a single driver that
is always synchronous. The asynchronous part is rarely/never used, so
let's keep things simple for now.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Do not set wifi optimizations by default in order
to free up IRAM room region. In case higher throutput
is necessary, one can enable this flags to optmize it.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
NXP S32 System Timer module includes a 32-bit count-up timer and four
32-bit compare channels with a separate interrupt source for each
channel. The timer is driven by the module clock divided by an 8-bit
prescale value.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Microchip XEC GPIO pins support inverting the output of
alternate pin functions. This feature may be useful for
those peripherals that do not implement output inversion
in the peripheral. GPIO control register pad input and
parallel input register values are not affected by the
function output invert feature. GPIO interrupt detection
of an output is inverted if the invert polarity is enabled.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
When configuring an LPSPI module for a new device with different baud rate,
the module needs to be disabled for the baud rate change to take effect.
This adds the necessary call to LPSPI_Enable before initializing the
module.
Fixes#51177
Signed-off-by: Jonas Otto <jonas@jonasotto.com>
This casts the char * buffers to void * before giving them to the
LOG_DBG function to fix a warning at runtime.
Signed-off-by: Gaël PORTAY <gael.portay@gmail.com>
add Intel HDA DAI driver
Long device list in dtsi needs to be refactored in the future
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Remapping by default can confuse things that dynamically manage RAM,
such as newlib heap - since unused memory will be powered off by
default. So this patch shields this behaviour behind a non-default
Kconfig.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
pca9420_i2c.h has neem remamed to pca9420.h (device only has I2C, so
it's kind of redundant to have i2c in the header name).
pmic_i2c.h was again not generic but designed specifically for PCA9420.
All its macros have been renamed, s/PMIC/PCA9420, and moved to the
pca9420.h header.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Store all common configuration settings in the parent device. This
change should save ROM, since it avoids duplication.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The driver had a conceptual issue regarding current limitation. PCA9420
is able to limit the current flowing through VIN, ie input current. This
is a global setting, not individual to each regulator. This patch
creates a new DT property: nxp,vin-ilim-microamp to specify such limit.
It is applied when the device is initialized.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Voltage ranges were hardcoded in Devicetree, however, things can be
significantly simplified by using the recently introduce linear ranges
API. All values are now computed using information stored in the driver,
so there is no need to store any lookup table in ROM. Code should now
both be faster in average and consume less ROM.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Regulator registers were set for each BUCK/LDO in DT, likely because of
the way the devices were instantiated. When using a generic iterator,
ie, DT_INST_FOREACH_CHILD, there's no way to differentiate the child
being _parsed_. Since instantiation happens now based on child node
names, we are able to know which registers each devices gets assigned at
the driver level. This greatly simplifies Devicetree, and it actually
removes information that is not strictly hardware description from it.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Right now the PCA9420 driver instantiates by iterating over all
children. This is somewhat problematic, for a few reasons:
- Since instantiation is generic code, we're forced to put internal
details on Devicetree, e.g. reg-masks. After this change, this will no
longer be necessary.
- We take all children, regardless of what is defined in DT.
While we have no means to validate Devicetree node names as in Linux
dtschema, this approach allows us to have per-child specific
initialization code. This is somewhat similar to the Linux approach.
Note: nodelabels have been removed, since they were not used.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
DT_PROP() will evaluate to 0 when a boolean property is missing, so
there is no need to use DT_PROP_OR(..., false). Using _OR also has
side-effects, such as no errors when property is not defined in the
bindings.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- voltage/current needs to be stored using int32_t
- reg_val is a 8-bit unsigned register value
- Also removed __packet, it is not required here
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Rename some internal structures/functions to clearly indicate they
belong to the PCA9420 driver.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Constify configuration and curr. limits/voltage range/modes arrays
- Use common argument names: node_id, inst to make code more readable
- Improve macro names to make things clear
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Adaptation of the ospi nor flash driver for stm32l4 plus
where the peripheral is slighty different.
Configure the OSPIM peripheral for mcu embeddingthis peripheral
in front their octospi instances.
Add LOG for read access command like for write access.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Unlocking CR at the end of initialization was added in commit
a9183cd518. It was probably copied
from previous flash driver implementation.
Unlocking and locking CR in write and erase functions was added in
commit 6e4cdb0c99. Since we always unlock
the register before writing or erasing, and lock it after the operation
is finished, there is no need to unlock it after initialization.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Control shared interrupts enabling/disabling via IDU.
With that we can easily enable and disable them for all cores
in one place.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
This fixes an issue with periodic_start feature that is only
present in newest dmic hw (starting from ACE).
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Though at the moment the driver works with high registers initialized
to zeroes it does make sense to do it right way. The double 16 shifts
are used to suppress warnings with 32 bit shift.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
In npcx ec series, two detection levels, 3.3V (default) and 1.8V are
supported during gpio configuration. But the current implementation
always selects default detection level whether NPCX_GPIO_VOLTAGE_1P8 is
set. This PR is a fix for this issue.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Previously, while writing close to the start of flash (i.e: in the first
row), the write was never committed - due to zero being used as the
"empty buffer" marker.
This patch also incorporates some performance improvements, as well as
observing any errors reported by `flash_sam0_commit()`.
Fixes#52309
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
RT1718S is an i2c-based TCPC chip that supports 3 additional GPIOs.
The pins can be used for USB-C operations e.g. handling FRS, but they
can also work as usual GPIOs.
Add a driver for the RT1718S GPIO and a handler for an alert signal from
the chip. The handler reads the alert register once asserted and calls
the GPIO interrupt handler if needed(Vendor-defined alert).
gpio_rt1718s.c file and "richtek,rt1718s" node collect common properties
and data for all RS1718S functionalities. The file can be extended for
TCPC driver. rt1718s.h file also defines inline functions with i2c
operations common for all drivers. The common header and source files
can be moved to tcpc directories once the tcpc driver is added since it
is the main functionality.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
This change fixes a regression from commit 1cbc0acd.
Socket offload uses a dummy socket context, and setting
the socket state in this dummy context is invalid.
Fixes#52317
Signed-off-by: Brian Dunlay <brian@nubix.io>
Add drdy_pulsed property in Device Tree in order to select how
data ready irq should behave (either pulsed or latched mode).
Moreover change/fix the API called to set drdy irq mode.
(fix#51944)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The stm32_clock_control_init is needed for implementation of custom
pm_state_exit_post_ops.
Signed-off-by: Artur Lipowski <Artur.Lipowski@hidglobal.com>
There is no point in allowing endpoint disable only when device is
attached and ready. Remove the pointless check as it is actually harmful
and prevents endpoints disable on USB stack disable.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
The `bluetooth/common/log.h` and `bluetooth/common/log.c` files have been
removed. Files that were using them have been updated to use
`zephyr/logging/log.h` instead.
Those replacement have been done consequently:
- `/BT_DBG/LOG_DBG/`
- `/BT_ERR/LOG_ERR/`
- `/BT_WARN/LOG_WRN/`
- `/BT_INFO/LOG_INF/`
- `/BT_HEXDUMP_DBG/LOG_HEXDUMP_DBG/`
- `/BT_DBG_OBJ_ID/LOG_DBG_OBJ_ID/`
Also, some files were relying on the `common/log.h` include to include
`zephyr/bluetooth/hci.h`, in those cases the include of `hci.h` has
been added.
For files that were including `common/log.h` but not using any logs,
the include has been removed and not replaced.
Signed-off-by: Théo Battrel <theo.battrel@nordicsemi.no>
Routines called by users to release (and perhaps stop) the HFCLK
cannot synchronize with only the `hfclk_users` atomic variable,
because a thread can be preempted right after it clears the proper
bit in that variable but before the HFCLK is actually requested to
stop, and another user can then request the HFCLK to start. This can
result in HFCLK being stopped right after it was requested to start
and in `hfclk_users` holding an incorrect value.
Fix this by locking interrupts in those routines until the HFCLK is
stopped.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Take advantage of the new PCIe scanning API for doing the initial lookup
of PCIe devices specified for a given board.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This adds a generic API to be used for scanning for available PCI
endpoints. It takes a more detailed approach than the "brute force"
based scanning that's so far been used in Zephyr, buy inspecting the
host controller node and bridge nodes, and only scanning for busses and
devices that are actually expected to exist.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
PCI(e) host controllers behave in different ways (some more buggy than
others) in what value they use to indicate that an endpoint is not
present. In most cases the VID/DID is all ones (PCIE_ID_NONE) but in
others it's all zeroes, and some may even have the VID all zeroes and
the DID all ones, or vice-versa.
Add a macro to easily test for all these possibilities. The "all ones"
and "all zeroes" cases have been verified to exist on actual HW
supported by Zephyr, however the test for the mixed cases is simply
based on what Linux considers valid values (drivers/pci/probe.c in the
Linux kernel tree).
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Reduce logging verbosity in status call from INF to DBG as the function
can be called any given time i.e. eveything is fine even if the read and
write pointers don't differ.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Added the new intel_adsp_hda_dma_get_attribute function that
returns dma controller attributes.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Add CONFIG_CRC for building CRC related routines.
CRC routines are now being built for each application, whether used or
not and are add in the build system unconditionally.
Keep CONFIG_CRC enabled by default for now and until all users have
converted to use the new option.
Partial fix for #50654
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
When DMA transfer is enabled on the stm32U5,
the UART Tx channel must be suspended before stopping.
This will let the on-going transfer ends properly
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit is optimizing the uart isr execution to avoid starting
the Rx timeout if it is null. In anycase the async_timer_start
function is checking the tiemout value. This will just save some
execution lines.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Gives the stm32u5 dma driver a suspend function to
enhance the dma API.
This is a particular feature of the stm32U5 GPDMA
to suspend a channel.
A delay is required ;1ms is compatible with both stm32u5 platforms.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
With the current LLDP implementation in Zephyr the support for it has to
be enabled in the ethernet driver. This commit adds exactly this
capability to the STM32 HAL based ethernet driver.
Signed-off-by: Jan Krautmacher <jan@krautmacher.org>
The Flash latency depends on the sysclock
In case of the stm32F7 the regulator overdrive mode is set
depending on the sys clock freq.
The overdrive must be set before the first LL_SetFlashLatency.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
When the SFDP table is provided by the DeviceTree with sfdp-bfp property
It is NOT read from the octoFlash.
If no table exists in the DTS and flash read SPDP fails,
the device init fails.
Availability of this sfdp_read API is conditional
on selecting CONFIG_FLASH_JESD216_API.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit adds the jedec216 read JEDEC ID function API.
The ospi commands are issued to the octo flash device or
by the DTS jedec-id property.
Availability of this API is conditional
on selecting CONFIG_FLASH_JESD216_API.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Fixes command configuration to have samples/drivers/spi_flash
passed on stm32l562 and stm32u585 disco kits.
In OctoSPI STR/DTR and SPI/STR modes,
to determine the address_width, checking the jesd216_bfp_addrbytes
on JESD216_SFDP_BFP_DW1_ADDRBYTES_VAL_3B4B or _VAL_4B.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
With the stm32U5, when the sysclock is > 55 MHz, the EPOD booster
must be configured before the PLL1 is enabled (see refMan).
This is the case when sysclock is on PLL1 sourced by MSIS or
HSE higher than 16MHz.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
For the stm32U5 serie, the busy flag is handled as other serie.
When the DMA is overriden by other HAL drivers, the busy flag
is not considered.
Refer to https://github.com/zephyrproject-rtos/zephyr/pull/47645
There is no Mux for this GPDMA and fixed 16 channels.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit set the stm32 octospi drivers for the stm32u5x
when DMA (GPDMA) is transferring.
Valid for octospi1 or octospi2.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Fixes a small typo in the MAX30101 Kconfig file.
The MAX30101_LED3_PA config option mistakenly referd to LED2 in it's
comment.
Signed-off-by: Philipp Schilk <schilk.philipp@gmail.com>
Since the macro references `data->async->hw_rx_counting`, it cannot
be called when `data->async` is NULL, and this could happen when the
PM_DEVICE_ACTION_RESUME action was requested for an instance that uses
the interrupt-driven API while for another instance that uses the
asynchronous API the hardware counting of bytes was configured.
Prevent this by calling the macro from a proper `if` block.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Fixes the double up test of int_gpio.port.
Addition of VCNL4040_ALS_INT_EN macros.
Use of BIT() macro where it makes sense.
MISRA improvements.
Signed-off-by: Nick Ward <nick.ward@ftpsolutions.com.au>
Saves some flash and we get priority inheritance.
Also removes lock from vcnl4040_handle_int() as it
is always called from the same thread.
Signed-off-by: Nick Ward <nick.ward@ftpsolutions.com.au>
The driver has a read register, modify value, write value flow due to
needing to modify nibbles of registers at different times. The issue
this driver previously had was new incoming configurations from the
driver would be corrupted by previous configurations written into the
vcnl4040 (when there's been no power off). This would be in the case
when a device continuously power on and a developer is tweaking the
vcnl4040's configuration or when deploying firmware updates with
a new vcnl4040 configuration.
Signed-off-by: Nick Ward <nick.ward@ftpsolutions.com.au>
The driver was using the i2c_transfer_dt() API incorrectly by not using the
I2C_MSG_STOP flag in the flags field.
The I2C write function can be written more simply with the basic I2C write
API so this commit also switches the code to the basic I2C write API to fix
this bug.
Signed-off-by: Nick Ward <nick.ward@ftpsolutions.com.au>
Add a sample sbs gauge driver with feature parity and basic tests
comparison to its sensor counter-part. Includes a simple stub test that is
extended upon.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
net_pkt_get_frag() and a few other functions did not specify the
allocated fragment length, incorrectly assuming that fixed-sized
buffers are always used.
In order to make the function work properly also with variable-sized
buffers, extend the function argument list with minimum expected
fragment length parameter. This allows to use net_buf_alloc_len()
allocator in variable buffer length configuration, as well as verify if
the fixed-sized buffer is large enough to satisfy the requirements
otherwise.
Update the existing codebase to provide the expected fragment length,
based on the context.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
According to IBECC spec ECC Error log register is only valid when
ECC_ERROR_CERRSTS or ECC_ERROR_MERRSTS bits are set.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
rpi-hal function "uart_set_format" expects data width in the range
of 5..8. So I created a new function “uart_rpi_set_format” which
contains common parts of “uart_rpi_configure”.
Signed-off-by: Jan Hilsdorf <jan.hilsdorf@gmail.com>
There was a bunch of BDF lookup code in the ivshmem driver originating
from issues with not being able to have multiple PCIE_BDF_NONE entries
in DTS. Now that devices are always looked up based on VID/DID this
should not be an issue, and hence the additional code is not needed.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
TLB driver knows the required number of bytes for HPSRAM
storage during power off state.
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
a small cleanup in the code, preaparation for memory context save
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
On ACE RSE bits should be cleared unconditionally
if ssp is no longer in use
This will allow to successfully disable SSP in
dai_ssp_pm_runtime_dis_ssp_power()
and enable it correctly in the next run
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Move the header file to corresponding directory which refers to
submodule name instead of root of drivers directory.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
The functions for ec_host_cmd_periph are only used by statically defined
kernel thread and should never be used from other subsystem, especially
from userspace. This commit removes the syscalls prefixes from these
functions and leaves them as inline call to API implementations from
peripheral.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
RTC is 24 bit width and k_timer is 64 bit. It is hard to test corner
cases but RTC hardware feature can help here. There is a task which
moves counter to 0xfffff0 which is close to overflow. However, there
is an internal driver state that also needs to be aligned to shift
the time properly. Adding optional function which triggers overflow
and updates internal state. This can be used for testing corner cases.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Added support for fxas21002 sensor over SPI and I2C.
Made the fxas driver APIs generic for I2C and SPI.
Tested with fxas21002 sensor on RDDRONE.
Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
Co-authored-by: Sumit Batra <sumit.batra@nxp.com>
Added support for fxos8700 sensor over SPI and I2C.
Made the fxos driver APIs generic for I2C and SPI.
Tested with fxos8700 sensor on RDDRONE.
Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
Co-authored-by: Sumit Batra <sumit.batra@nxp.com>
There is no DSPRA registers (0x71a60) in SOC Intel ACE.
Therefore this space should be not accessed. It is valid only
for some Intel CAVS SOC versions.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
This reverts changes introduced in commit
dd535f611d, as they broke the gsm_ppp
driver integration with PPP L2. Apparently, a more thorough
refactoring is needed to use the new interface management scheme with
PPP.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Return correctly the number of received bytes for a
spi_transceive on a STM32 SPI slave.
Fixes#52216
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Since nRF IEEE 802.15.4 radio driver is now capable of calculating CSL
phase based on provided anchor time and CSL period, the CSL placeholder
window is no longer necessary. This commit removes it and switches to
the new calculation method.
Signed-off-by: Artur Hadasz <artur.hadasz@nordicsemi.no>
Signed-off-by: Jędrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
Use the new PCIe core infrastructure for looking up the BDF at runtime
based on the VID/DID values.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Use the new PCIe core infrastructure for looking up the BDF at runtime
based on the VID/DID values.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The ptm.c driver never defined DT_DRV_COMPAT, so the various DT macros
never expanded to anything useful.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Use the new PCIe core infrastructure for looking up the BDF at runtime
based on the VID/DID values.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Use the new PCIe core infrastructure for looking up the BDF at runtime
based on the VID/DID values.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Use the new PCIe core infrastructure for looking up the BDF at runtime
based on the VID/DID values.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The BDF values can differ on the same platform, based on e.g. BIOS
configuration, and in the case of qemu the command line parameters. It's
therefore more reliable to always look up the BDF value based on the
known Vendor and Device IDs.
This patch introduces such a framework, and allows the incremental
update of PCIe drivers to start taking advantage of it.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
`struct device::config` is a `const void *`, so this struct does not need
to be mutable.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Parts of the macro used `inst`, others `n` for the instance number; only
`n` was actually defined (so `inst` expanded to the empty string, causing
name errors with more than one instance).
Unify everything to `inst`.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Add property mxicy,mx25r-power-mode to jedec,spi-nor binding for
controlling low power/high performance mode on Macronix MX25R* Ultra Low
Power flash devices.
- "low-power" configures the flash in ultra low power mode.
- "high-performance" configures the flash in high performance mode.
Signed-off-by: Gregers Gram Rygg <gregers.gram.rygg@nordicsemi.no>
Add a driver for the Arm Ethos-U NPU, including a Devicetree entry for
the mps3_an547 platform.
Signed-off-by: Kristofer Jonsson <kristofer.jonsson@arm.com>
Signed-off-by: Fredrik Knutsson <fredrik.knutsson@arm.com>
It was previously written as regular members of a struct, which
allows the C compiler to do things the way it wants. On ARM64, gcc
would typically write field by pairs (`STP`), which
would generate aborts.
By using `sys_write32`, we force it the right way.
Signed-off-by: Henri Xavier <datacomos@huawei.com>
After a firmware update, DNS needs to be reconfigured.
Fix debug log for AT command strings.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
GPDMA should work with disabled interrupts in ctrl_lo
This also helps with stability in SOF scenarios
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
The sensor uses the ALERT terminology (pin can be configured to trigger
on certain events such as conversion ready or overvoltage alerts). The
"IRQ" name is not clear.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Specify the units of the current LSB in microamperes, so that we can
measure low maximum currents. Right now it was specified in
milliamperes, but ignored and always hardcoded to 1mA in the driver.
This makes the driver pretty much useless when the maximum current to be
measured is in a range of e.g. 20-50mA.
This patch also removes some unnecessary ifdeffery: since we write the
calibration register, we can always provice measurements with the right
units. It is also wrong to provide sensor readings that do not match
with the units specified by the channel. After this change voltage is
always reported in V, current in A and power in W.
Note that power measurement had the current LSB hardcoded in the
calculation (assuming 1mA/LSB), this has been fixed as well.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Following dtschema practices, add phyisical units to the shunt resistor
value: milliohms.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
With the recent introduction of DT_HAS* Kconfig helpers, such build
asserts are highly unlikely, so just remove them.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Driver had Doxygen stubs for sensor interface calls. First, most were
incomplete, outdated or just wrong. Second, implementations just need to
make sure to adhere to the error codes documented in the public
interface (sensor API in this case).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Add many missing includes so that headers are self-contained
- Sort includes properly (locals first, stdc, zephyr, etc.)
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Right now we had a mix of int (signed) and uint32_t (fixed-width
unsigned integer). Use int32_t for all cases, both values may be either
positive/negative, and we have a defined range when using fixed-width
integers.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The "pmic" driver was in reality a driver for NXP PCA9420 PMIC. There's
no "universal PMIC". While the driver may work for other NXP PMICs, it
is clearly not generic for other vendors PMIC.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The regulator API supports all voltage/current ops, so there's no need
to guard them under "PMIC". If a particular driver doesn't support the
operations it will just return -ENOSYS and the command will fail.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The previous "consumer" API was designed without API ops, meaning only a
single implementation (singleton) was possible. This was inconsistent
with all other APIs, and, a problem in systems where more than a single
PMIC IC is present.
Note that all "consumer" ops are optional, so this won't break any
existing drivers.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In Zephyr all regulator APIs are consumer APIs. There's no point in
adding a separate header file. Our current implementation is also
inconsistent with Linux, where enable/disable are also part of the
consumer.h API.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Fail with error if any of flashdisk partition assumptions are not met:
* uniform page size through the whole partition
* flashdisk starts at page boundary
* flashdisk ends at page boundary
Read-only flashdisks are not subject to above conditions because the
cache buffer is not used for read-only flashdisks.
The checks can be disabled via Kconfig option to save code space.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Force cache-size to 0 and treat flashdisk as read-only when backing
partition has read-only flag set. This allows users to save RAM when the
application does not write to the flashdisk, e.g. when a predefined FAT
filesystem is used.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
In usb_dc_ep_disable() mark an endpoint as unoccupied in addition to
being disabled. This allows the endpoint to get enabled properly
with a subsequent call to usb_dc_ep_enable()
See: zephyrproject-rtos/zephyr#51685
Signed-off-by: Milind Paranjpe <mparanjpe@yahoo.com>
Right now it is possible that some devices define 0 pinctrl states in
devicetree, because pinctrl-N entries may still be optional for backward
compatibility. If the programmer makes a mistake and forgets them,
application could experience runtime crashes because
pinctrl_lookup_states assumes you have at least one state, so it does
not perform any bounds checking. Change the while condition so that it
is skipped if states count is zero.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The can_kvaser_pci_data_##inst type was supposed to be
can_kvaser_pci_data and not can_kvaser_pci_config. This got unnoticed
because there were no struct members to pre-initialize, and a reference
to the struct was stored using a void pointer.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The NPCX driver did use deprecated voltage macros. Define vendor
specific flags instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The pin get function was using deprecated macros. Note that the set
implementation already uses vendor specific flags.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The buf_status register is 32 bit wide but was saved in a
uint8_t. This caused some buffers never to be handled which
results in the pico getting stuck in the interrupt handler.
Signed-off-by: Lukas Gehreke <lk.gehreke@gmail.com>
Some modems supports multiple access technologies.
The access technology of the serving cell can be extracted from the
+CEREG command, which is already sent to the modem.
The parse function is extended to also parse the access technology value.
Fixes https://github.com/zephyrproject-rtos/zephyr/issues/51153.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
This moves the CMD_SET_DLF command macro to public header
so application can use it without weird include path to
include the "private" header file under drivers/serial.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Ensure that PECI block is enabled in the EC Subsystem by clearing
the PECI_DIS (peci disable) register
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Instead of calling __HAL_RCC_OSPIM_CLK_ENABLE() to enable the OSPI
manager clock, we now use a new clock binding in the dts.
In order to avoid confusion between the different clocks, the driver
is modified to select the clock based on their names instead of indexes.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Remove a set of Kconfig symbols for configuring the RTC on STM32
that are no longer useful
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
After a soft-reset of the host controller the flash device is not reset.
This can cause the flash device to still be busy writing or erasing when
the host controller boots and initializes the flash. The often results
in errors and the flash device not being initialized.
This fix polls the status register until the WIP flag is off before
initializing the flash device.
Fixes#51713
Signed-off-by: Gregers Gram Rygg <gregers.gram.rygg@nordicsemi.no>
In order to configure domain clock, clock_control_configure should be
used instead of clock_control_on which is only useful for bus clock gating.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move functions defined in the Cryptographic toolbox of the Bluetooth
specification inside their own files in the following folder:
`zephyr/subsys/bluetooth/bt_crypto`. The functions were previously
implemented in `zephyr/subsys/bluetooth/host/smp.c`.
The cryptographic toolbox functions can now be accessed from outside of the
host.
In addition to that, tests for each cryptographic toolbox functions have
been added.
Signed-off-by: Théo Battrel <theo.battrel@nordicsemi.no>
Fixed how data is read in mcp23sxx_read_port_regs
The data is now stored in an array to get the
actual data from spi
Signed-off-by: Daniel Skatt <daniel.skatt@gmail.com>
Channel SENSOR_CHAN_GAUGE_FULL_CHARGE_CAPACITY was returned in place of
SENSOR_CHAN_GAUGE_FULL_AVAIL_CAPACITY, due to their matching names.
Ensuring that the channel names are unique fixes the issue.
Signed-off-by: Marco Argiolas <marco.argiolas@ftpsolutions.com.au>
CC setting algorithm is handling a case when CC is too soon (next
tick from now). It was setting CC to one tick further in the future
if that was detected. Step was repeated if counter incremented during
setting CC and CC was behind the counter because of risk of setting
CC too late. In certain scenarios we might spend a lot of time in
that loop, especially if optimization is turned off. Test shown that
loop was executed dozens of time (up. to 700us). To prevent
prolonged execution whenever CC setting fails we set CC to one more
tick further in future.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The reference count, dp->sref, is never incremented for the SSP DAI as
we use the runtime PM API's to probe/remove the DAI during
resume/suspend. Therefore, use the DAI state to check if the DAI is
active in any direction before proceesing to set the config. This fixes
the IO errors seen during simultaenous playback and capture on the same
SSP.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
A regression was introduced in ef804d8408
when the M_CAN driver was swapped to use the generic dcache API, but
cache management was not enabled on SAM devices.
Enable cache management on SAM devices when CAN_SAM is selected.
Signed-off-by: Perry Hung <perry@genrad.com>
The SAF XEC driver for eSPI was not enabled by default so sample
code for espi was failing. This commit changes the behavior to match
current scheme of enabling the drivers based on the status of required
device tree nodes.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
The ADS1x13 does not have a PGA, and will have a fixed
internal reference voltage of 2048mV. This sets the internal
referece voltage for the ads1x1x to 2048 and adjust the gain
configuration to scale.
Signed-off-by: Ryan McClelland <ryanmcclelland@fb.com>
Call lis2dw12_data_ready_mode_set() API in order to properly
set CLTR7.drdy_pulsed bit.
(Fix#51488)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The USB device subsystem driver's set_interface() function calls
usb_dc_ep_configure() followed by usb_dc_ep_enable(). When
switching between alternate settings of a configuration's
interface, set_endpoint() can be followed by reset_endpoint() on
an endpoint. Some time later, set_endpoint() can be called again
on the same endpoint. This results in the HAL's
kUSB_DeviceControlEndpointInit function being called twice in a
row, which causes a memory allocation error. A simple solution is
to call the HAL's kUSB_DeviceControlEndpointDeinit function
before calling kUSB_DeviceControlEndpointInit. This overcomes the
memory allocation error.
Signed-off-by: Milind Paranjpe <mparanjpe@yahoo.com>
For larger transfers DMA can be used enabling other tasks
to continue running. A threshold of 32 byte transfers
is about right and is defined threshold value for using DMA.
This does not currently support multiple SPI transactions changing
chip select with DMA (though the hardware supports this) currently.
Instead opting for the simpler first change of enabling one shot
DMA SPI transfers for those where the size warrants it.
Adds the loopback binding option to enable the spi_loopback test.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
By Starting the timer when period was set to 0, the SCTimer was giving
control of the pin back to the timer and over-riding the value written
to base->OUTPUT register. Consequently, the PWM timer was never
stopped and still using the previously configured period.
The PWM now correctly stops when setting the period to 0.
Signed-off-by: Guy Morand <guy.morand@bytesatwork.ch>
Add runtime physical memory discovery. This allows platforms with
different physical memory sizes to use the same driver for memory
management.
Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
The PLTRST# virtual wire signal's reset signal is eSPI Reset#.
But it8xxx2 didn't enable the feature by default. This change
will enable the feature at default.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Add support input interrupts for GPIO pins on NXP S32Z27
SoC. The driver will convert GPIO pin to respective
interrupt line that will be processed by External
Interrupt Controller.
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Add initial support for the NXP S32Z27 SIUL2 External
Interrupt Controller. Each SIUL2 node has a child node
will act as an interrupt-controller that processes external
interrupt signals.
This driver is required to manage GPIO interrupts.
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
New ADC driver for the TI CC13xx/CC26xx family.
ADC channel configurations are translated from Zephyr constants to
simplelink driverlib ones (e.g., sample times use a lookup table).
Async mode was also implemented & tested.
Signed-off-by: Stancu Florin <niflostancu@gmail.com>
Adds Atmel SAMC20 and SAMC21 soc. C series is based on Cortex-M0+.
C21 contains CAN interface.
The init routines are same for SAMC20 and SAMC21. They use one
clock OSC48M without configuration.
The code is inspirated from atmel_sam0/samd21.
Signed-off-by: Kamil Serwus <kserwus@gmail.com>
Add the support of the stm32MP1 family for DMA peripheral.
This dma driver is similar to the stm32H7.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
struct dai_intel_dmic never had a "created" member, so this assert seems
to be accidentally left in the code. Remove it to allow building builds
with dmic driver with asserts enabled.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Trigger network dropped based on socket error notifications.
This debounces the network state and only triggers
the network interface to go down if the network
really drops or causes socket problems.
This will ensure upper networking stack layers can
cleanup broken sockets properly.
Debounce DNS resolver refresh.
Only trigger DNS resolver refresh if the DNS address changes.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
For PCI Ethernet driver it makes sense to use lookup(id) instead of
probe(bdf, id). Even when using different Qemu parameters we may get
different BDF for e1000 device.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Since moving to Qemu Q35 machine the drivers with hardcoded BDF stop
working. Correct e1000 BDF.
Fixes#51829
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
In order to allow proper softAP mode, wifi
libraries and wpa supplicant requires this kconfig
to be enable.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Functions related to string manipulation that were defined in
`common/log.h` has been moved to the `common/bt_str.h` file and their
implementation in `common/bt_str.c`.
Files that were using those functions has been updated consequently.
Signed-off-by: Théo Battrel <theo.battrel@nordicsemi.no>
Zephyr implementation is limited to 4 IRQ per GPIO bank when up to 8 is
theoritically possible.
It is now possible to use until 8 IRQ per GPIO bank. This can be
achieved with minimal effort in a device tree overlay:
&gpio0 {
interrupts = <4 2>,<5 2>,<6 2>,<7 2>,<32 2>,<33 2>;
};
&gpio1 {
interrupts = <34 2>,<35 2>;
};
Signed-off-by: Guy Morand <guy.morand@bytesatwork.ch>
The PWM definitions for Atmel SAM SoCs can differ slightly.
This commit adds support for the PWM defines used by SAM4S.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Cache written data to avoid rewriting same flash page multiple times
when writing subsequent flash pages. The cache is used for reads to
account for reading not yet committed (i.e. dirty) page data. Speeding
up reads is not intention of this patch and therefore the read path
does not modify cache state.
Fixes: #30212
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Rename the CAN loopback driver receive function to make the code easier to
understand. Add proper check against NULL for RX callback function
pointers.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Set default of DISK_DRIVER_SDMMC Kconfig based on the devicetree.
This should avoid having to set the kconfig at the board level
in order to use sdmmc.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Update power_domain drivers to use DT_HAS_<compat>_ENABLED Kconfig
symbol to expose the driver and enable it by default based on
devicetree.
We remove one reference in prj.conf that is no longer needed.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Brackets were originally used in the sensor info shell command output to
make it obvious when a field is a null string, however they incorrectly
suggest that a field is an array. Remove the brackets and conditionally
print "(null)" instead.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Add support for configuring CAN emulation support in QEMU. For now, the
only supported CAN controller is the single-channel Kvaser PCIcan PCI card.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This seems to have caused CI failures and its unclear why just yet
so revert instead.
This reverts commit cbee9e9fdd8060d0ca4e91037b3f99f631e4b1a5.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Fix the enabling of the independant IO supply.
Function LL_PWR_EnableVddIO2 is called LL_PWR_EnableVDDIO2 on U5.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Update Intel ADSP timer driver to use DT_HAS_<compat>_ENABLED Kconfig
symbol to expose the driver and enable it by default based on
devicetree.
We remove setting 'default y' for the timer driver in
Kconfig.defconfig.series as that is now handled in the driver Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Mark the timer as having a lock free read of the cycle count
so that spin lock debugging can include lock time asserts.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Update IPM drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Support multiple DTS instances in the C code, also
just initialize devices that are not disabled.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Expanded the enc28j60 driver to update its carrier status
whenever the Ethernet cable is plugged in or out. I used the
enc424j600 driver as reference, as this driver already
included this functionality. The driver will now take
the interface offline whenever the cable is not plugged in
and stop sending packets. The respective events are also
generated for use in the application. I tested it locally
on my nRF52840 based gateway board using the enc28j60 network
chip. Everything worked as expected.
Signed-off-by: Paul Jans <paul.jans.1999@hotmail.com>
Fixes#51214
Adds a new conditional shell command to the sensor shell to get data
from the sensor info iterable section, such as vendor and model name,
for all sensors.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Adds an iterable section in ROM to hold constant information, such as
vendor and model name, for all enabled sensor driver instances. This
will be used by the future sensor subsystem to enumerate all available
sensors in the system.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
The ESP32 series MCUs allow to set a timeout which triggers an error
if the SCL line is unchanged for the specified amount of time.
By default, the ESP-IDF HAL sets the timeout to an arbitrary value of
10 times the bus cycle.
This is not sufficient for chips like the TI bq76952, which pulls the
SCL line low (clock stretching) for several 100 µs.
The timeout should also not be dependent on the chosen bitrate, as it
is defined by the time a chip needs for internal calculation before it
can provide requested data or continue communication.
This commit adds a property to devicetree to allow configuration of
the scl timeout. This value is set via direct register access, as the
ESP-IDF HAL does not provide access to the enable bit and does not
give any information about the maximum size of the timeout (defined
in I2C clock cycles in the register).
Fixes#51351
Signed-off-by: Martin Jäger <martin@libre.solar>
Microchip MEC172x has a modified eSPI SAF hardware implementation.
Hardware changes include multiple clock dividers for each SPI
flash device and data transfer using QMSPI local DMA.
espi reset interrupt is made a higer priority in MEC172x devicetree
because espi reset event resets all espi hardware and we don't
to want to service any other espi interrupt blocks when espi reset
occurs.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Microchip MEC172x QMSPI expanded its clock divider register
field from 8 to 16 bits. QMSPI source clock is on the fast
peripheral domain therefore get the frequency from the clock
control driver.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Microchip MEC172x CPU and fast peripheral (QMSPI and PK) are
clock source is based upon an OTP setting. Add logic to adjust
clock source based on OTP value. If the OTP value is ever changed
this fix will allow calcluation of correct clock rate.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Remove all obsolete DISK_FLASH* Kconfig options.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Use devicetree to obtain information for all zephyr flash disks.
Co-authored-by: Johann Fischer <johann.fischer@nordicsemi.no>
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
In order to avoid using multiple sources of truth for the platfom's
endianness, convert the in-tree code to use the (BIG|LITTLE)_ENDIAN
Kconfig variables exclusively, instead of the compiler's
__BYTE_ORDER__.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
GICR_TYPER is a 64 bit register. On AArch32 when one uses sys_read64(),
this results in ldrd instruction. When Zephyr runs as a VM, 'LDRD'
instruction on an emulated MMIO region gets trapped to the hypervisor as
data abort.
Refer the following paragraph from ARM DDI 0487G.b ID072021 :-
Section - "ISS encoding for an exception from a Data Abort",
"For other faults reported in ESR_EL2, ISV is 0 except for the following
stage 2 aborts:
AArch32 instructions where the instruction:
— Is an LDR, LDA, LDRT, LDRSH, LDRSHT, LDRH, LDAH, LDRHT, LDRSB, LDRSBT,
LDRB, LDAB, LDRBT, STR, STL, STRT, STRH, STLH, STRHT, STRB, STLB, or STRBT
instruction."
As 'LDRD' is not in the list, so ISV==0. This implies that Arm could not
decode the instruction for the hypervisor (in EL2) to execute it.
Thus, we have abstracted this read into arm_gic_get_typer().
For AArch64, we use sys_read64() as before.
For AArch32, we use sys_read32() twice to read the lower and upper 32 bits
of GICR_TYPER.
Thus, we ensure that when the access is trapped for AArch32, Arm generates
a valid ISS so that hypervisor can execute it.
Signed-off-by: Ayan Kumar Halder <ayankuma@amd.com>
To avoid legacy extended adv repots blocking important
events or work, mark them as discaradble.
Signed-off-by: Martin Tverdal <martin.tverdal@nordicsemi.no>
Print the error messages about the state of the host register
when the I2C transfers fail. This is useful for debugging.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
DMIC does not need to use SOFT_RESET bit to start collecting data if
periodic_start bit is enabled.
Signed-off-by: Damian Nikodem <damian.nikodem@intel.com>
If cfg_hi and cfg_lo are not set to zero in config setting, different
dma slot value is bitwise ORred to the previous set value. Thus fix it.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
This adds an entropy driver calling the PSA Crypto psa_generate_random()
API to get random bytes.
Currently this only uses the TFM provided psa_generate_random().
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
Refactors all sensor drivers to use SENSOR_DEVICE_DT_INST_DEFINE, which
is a sensor-specific variant of DEVICE_DT_INST_DEFINE that provides a
common place to instantiate additional data structures for the future
sensor subsystem and/or sensor driver stats.
This approach was inspired by I2C_DEVICE_DT_INST_DEFINE to streamline
adding I2C stats support across all I2C drivers.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Without this define, the structure iis2dh_device_config
is defined incorrectly.
The structure is defined in iis2dh.h file as follows:
struct iis2dh_device_config {
struct spi_dt_spec spi;
struct i2c_dt_spec i2c;
uint8_t pm;
struct gpio_dt_spec int_gpio;
};
without the macro
the structure is defined as
struct iis2dh_device_config {
uint8_t pm;
struct gpio_dt_spec int_gpio;
};
which results in accessing the wrong data when
calling iis2dh_init_interrupt
function (or any other functions in this file)
Signed-off-by: Mehdi Zemzem <mehdi.zemzem2@gmail.com>
Move runtime checks to use arch_num_cpus() and build checks
to use CONFIG_MP_MAX_NUM_CPUS. This is to allow runtime
determination of the number of CPUs in the future.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
While the 'count' value "should" never be larger than two digits,
increase the size of the snprintk buffer to be large enough to hold
the longest possible value.
Signed-off-by: Keith Packard <keithp@keithp.com>
The can_frame and can_filter structs support a number of different flags
(standard/extended CAN ID type, Remote Transmission Request, CAN-FD format,
Bit Rate Switch, ...). Each of these flags is represented as a discrete bit
in the given structure.
This design pattern requires every user of these structs to initialize all
of these flags to either 0 or 1, which does not scale well for future flag
additions.
Some of these flags have associated enumerations to be used for assignment,
some do not. CAN drivers and protocols tend to rely on the logical value of
the flag instead of using the enumeration, leading to a very fragile
API. The enumerations are used inconsistently between the can_frame and
can_filter structures, which further complicates the API.
Instead, convert these flags to bitfields with separate flag definitions
for the can_frame and can_filter structures. This API allows for future
extensions without having to revisit existing users of the two
structures. Furthermore, this allows driver to easily check for unsupported
flags in the respective API calls.
As this change leads to the "id_mask" field of the can_filter to be the
only mask present in that structure, rename it to "mask" for simplicity.
Fixes: #50776
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Replace usage of CONFIG_MP_NUM_CPUS with CONFIG_MP_MAX_NUM_CPUS for
init and declaration as we phase out CONFIG_MP_NUM_CPUS usage.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Replace unnecessary `BT_HEXDUMP_DBG` with `LOG_HEXDUMP_DBG`.
`BT_HEXDUMP_DBG` did an extra cast to `const uint8_t *` on its first
argument. This was probably the reason it was introduced. But the
current definition of `LOG_HEXDUMP_DBG` does this cast for us.
Signed-off-by: Théo Battrel <theo.battrel@nordicsemi.no>
It looks like this platform is using soc.h to declare some display APIs,
imxrt_pre/post_init_display_interface(). This likely deserves a better
design, but for now let's fix compiler warnings.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Update TCPC driver to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
The "@return" command should be used for the arbitrary return
description, and "@retval <return value>" for the description
of named return value
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
Use DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) to determine
number of potential interrupt sources. This mitigates
the wasting of memory on devices with mutliple UCPD ports
but only one UCPD port is used.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
Assign the pins for the STM32G071b and STM32G081b STM32
UCPD peripherals so the UCPD driver can properly
configure the device.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
When there is a timeout for an i2c transaction, the i2c driver should do
the recovery logic to make the bus and driver state machine go back to
idle. Otherwise, it will cause the following transaction to fail because
the state machine keeps in an inappropriate state.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Executing code out of RAM on IT8xxx2 requires that the relevant
addresses be mapped onto the CPU's instruction memory bus, referred to
by ITE documentation as Instruction Local Memory (ILM). ILM mappings
configure blocks of RAM to be used for accesses to chosen addresses when
performing instruction fetch, instead of the memory that would normally
be accessed at that address.
ILM must be used for some chip features (particularly Flash
self-programming, to execute from RAM while writing to Flash), and has
historically been configured in the Flash driver. The RAM for that was
hard-coded as a single 4k block in the linker script. Configuring ILM
in the flash driver is confusing because it is used by other SoC code as
well, currently in code that cannot depend on the Flash being functional
or in hand-selected functions that seem performance-critical.
This change moves ILM configuration to a new driver and dynamically
allocates RAM to ILM in the linker script, allowing software use of the
entire 64k RAM depending on configuration. This makes ILM configuration
more discoverable and makes it much easier to correctly support the
CODE_DATA_RELOCATION feature on this SoC.
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
ADC comparator driver submits notifications into system work queue, this
change will make driver to use dedicated work queue instead by using
`CONFIG_ADC_CMP_NPCX_WORKQUEUE`.
Dedicated work queue and priority are configurable as well.
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
If we are dropping packets, then drop then early without the clone, this
improves zperf performance.
Signed-off-by: Krishna T <krishna.t@nordicsemi.no>
Change for loops of the form:
for (i = 0; i < CONFIG_MP_NUM_CPUS; i++)
...
to
unsigned int num_cpus = arch_num_cpus();
for (i = 0; i < num_cpus; i++)
...
We do the call outside of the for loop so that it only happens once,
rather than on every iteration.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Possibility to configure i2c speed through I2C_SHELL
command `i2c speed`.
Signed-off-by: Andrzej Kuros <andrzej.kuros@nordicsemi.no>
Signed-off-by: Jędrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
Some files were using definitions from sys_clock.h, e.g. MSEC_PER_SEC
without including the header.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Currently, uart_npcx_pm_policy_state_lock* functions are guarded by
CONFIG_UART_INTERRUPT_DRIVEN && CONFIG_PM. However, it is unnecessary to
guard them with CONFIG_UART_INTERRUPT_DRIVEN as the polling mode UART
driver also uses these functions.
This commit removes it and leaves those functions guarded by CONFIG_PM
only.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Fixes build of flash_shell sample after commit
a6a4400b86.
west build -p -b xmc45_relax_kit samples/drivers/flash_shell
Also include stdint.h.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
eSPI PUT_IOWR_SHORT protocol can send 1/2/4 bytes of data in a single
transaction. This allows the host to send max 32-bits Port80 code
at one time. This CL sets bits OFS0_SEL~OFS3_SEL in the DPAR1 register
to let the EC hardware put the full Port80 code to DP80BUF FIFO.
It also groups the N-byte code into a single 32-bits variable when
necessary by analyzing the offset field in the DP80BUF register.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
First pads are being configured for use by the FPGA.
Then CPU loads usbserial bitstream.
Finally it reenables clocks, sets up USB PID and waits for device to
enumerate.
Also disable software resets in used clocks.
Signed-off-by: Michal Sieron <msieron@antmicro.com>
USB interface that may be used to send messages from a USB host to
the M4 processor in the S3B, and vice-versa.
Signed-off-by: Michal Sieron <msieron@antmicro.com>
Align PPP drivers/L2 with interface state handling update. Use the
carrier on/off notification instead of bringing the interface up/down to
update the interface state.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Align Ethernet/Wi-Fi drivers/L2 with interface state handling update.
For drivers, that did not support carrier detection, no changes are
needed.
Driver that did support carrier detection, are updated to set the
carrier state to OFF by default, instead of setting the
NET_IF_NO_AUTO_START flag. This allows to postopne the actual
NET_EVENT_IF_UP notification until driver detects that carrier is ready.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
This fixes a random crash caused by race condition in the eswifi
driver used by the disco L475 iot1 board.
Signed-off-by: Michał Zając <m.zajac@avsystem.com>
Adds open drain support to atmel,sam-gpio drivers, by writing to the
PIO_MDER or PIO_MDDR registers during gpio configure.
Signed-off-by: Nick Kraus <nick@nckraus.com>
clock_stm32_ll_common.h was missing <stdint.h> and <zephyr/device.h>. It
turns out things worked because <zephyr/init.h> has a forward
declaration of struct device.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Selects the hidden Kconfig to note that the APIC timer's cycle count
accessor is a lock free path and may use the spin lock time limit check.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Select the Kconfig option noting that the cavs (intel adsp)
timer driver provides a lock free cycle count accessor and
therefore can be used with a spin lock time limit assert.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Spin locks held for any lengthy duration prevent interrupts and
in a real time system where interrupts drive tasks this can be
problematic. Add an option to assert if a spin lock is held for
a duration longer than the configurable number of microseconds.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
The TXF interrupt mask is not properly set. In this case the
interrupt line is not cleaned, leading to the re-entrance
in the interrupt handler.
the issue is linked to the management of the IPCC_CxTOCySR value.
The TXF interrupt is triggered when the IPCC_CyMR is channel bit is
set to 0 and the IPCC_CxTOCySR associated bit move from 1 to 0.
The fix is to check if the IPCC_CxTOCySR channel bit is 0 instead of 1.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
For Intel ACE1.x the GPDMA link list structure should be aligned
to 64 bytes to avoid the link list entry fetch crossing the 64 bytes
address alignment.
Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
Add support for regulator-boot-on to PMIC driver. Many PMIC devices will
be enabled at boot, so this property allows the regulator framework
to correctly track their state.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add mode specific PMIC configuration functions, to allow consumers to
configure target voltages of each regulator mode. This will allow users
to enable or disable, as well as set target voltages for regulator modes
without actually entering that mode.
This feature can be useful for power managment applications where the
consumer may want to switch the regulator to low power mode at a later
time.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Remove mode awareness from PMIC voltage setting, current setting, and
enable/disable functions. Concepts such as regulator consumers do not
work well with multiple modes, so support for changing voltages or
disabling regulators in each mode has been removed.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The inactivity time registers identified by `ADXL362_REG_TIME_INACT_L`
and `ADXL362_REG_TIME_INACT_H` accepts a 16-bit value. (8 in each).
Without this change the last 5 bits of the register value
will be cleared.
Clearing the last bits of the register value greatly reduces the maximum
inactivity time that can be set.
Signed-off-by: Simen S. Røstad <simen.rostad@nordicsemi.no>
Linux kernels before v5.14 do not define the CANFD_FDF flag. The flag is
disregarded within the Linux kernel. It is just there for being able to
reuse the canfd_frame struct for classic CAN frames in Linux user-space
applications.
Define the CANFD_FDF flag locally if not already defined to allow compiling
against older Linux kernel headers.
See the following Linux kernel commit for further details:
02546884221279da2725e87e35348290470363d7
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This change implements part two of the program laid out in the TSCH RFC,
see #50336#issuecomment-1250250154 :
> Consolidate IEEE 802.15.4 options in net_pkt
This change improves decoupling of generic net core code from
IEEE 802.15.4 internals. It also simplifies IEEE 802.15.4
attribute cloning and thereby makes it easier to maintain and less
error prone (and probably even faster as individual bits are no longer
copied over separately).
This enables us to extend and design IEEE 802.15.4 L2 attributes inside
the package in isolation from the net core code which will no longer
have to be changed when introducing changes or additions to the flags.
This flexibility will be built upon in later change sets to model the
IEEE 802.15.4 attributes closer to the spec.
The solution is inspired by Linux's sk_buff->cb attribute which addresses
the same concern as the attribute introduced in this change set:
https://elixir.bootlin.com/linux/v6.0.1/source/include/linux/skbuff.h#L871
As the inline comment says: The cb attribute can be made a union or even a
uint8[something] in the future, if further L2s need a control block, too.
Right now such full indirection would make the code overly abstract, so
I chose to compromise with maintainability in mind.
Care has been taken to ensure that this changes does not introduce
additional padding into the net package. To maintain zero-padding, future
changes to the net packet struct will have to ensure that the
IEEE 802.15.4 struct is 4-byte aligned (iff the IEEE 802.15.4 struct
continues with max uint32_t scalar members) which is no deviation from
the previous implementation.
Signed-off-by: Florian Grandel <jerico.dev@gmail.com>
Nordic's IEEE 802.15.4 radio driver adapter layer had a few raw accesses
to net packet attributes.
Packet attributes should never be accessed directly, though, but only
through the dedicated accessor methods provided by the net core.
This change replaces raw accesses to packet attributes by their
respective wrapper functions.
This also is a necessary precondition to the isolation and
encapsulation of IEEE 802.15.4 specific packet attributes which will be
introduced in a later commit of this change set.
Fixes: #51264
Signed-off-by: Florian Grandel <jerico.dev@gmail.com>
Several IEEE 802154 drivers allocated RX packets from the TX pool.
This may seem like a minor problem at first sight but it may become
problematic if the pool is used to distinguish package types as is the
case in some code paths, e.g. for packet priority or determination of
the packet buffer pool.
This bug also has the potential of starving the TX pool capacity which
even may make devices vulnerable to DoS attacks as sending may be
prohibited by addressing enough RX packets to a device to let it run out
of TX capacity.
Fixes: #51261
Signed-off-by: Florian Grandel <jerico.dev@gmail.com>
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Adding multidomain support by introducing log_link module which
acts as a receiver of log messages created by another domain.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
On stm32g0, stm32g4, stm32l4, stm32l5, stm32u5,
and stm32wbx, it is allowed to write a zeroed dword
on unerased flash.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
Add MEC172x full duplex qmspi driver version to support full
duplex transfers as expected by the Zephyr spi driver model.
On every spi clock we transmit one bit and receive one bit.
This driver will work with Zephyr SPI NOR driver.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
The include <zephyr/kernel.h> is missing from eeprom driver,
causing build error. This is fixing it like PR # 51246 or #51220.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The phys property was not considered during initialization of the
driver config, so that the transceiver was not enabled properly
in case it has an enable/standby pin.
Signed-off-by: Martin Jäger <martin@libre.solar>
Newer ESP32 series MCUs like the ESP32-C3 contain some register changes
incompatible to the original ESP32 and the SJA1000.
The additions in this commit consider these changes and fix the
incompatibilities in the TWAI front-end for the SJA1000 driver.
Signed-off-by: Martin Jäger <martin@libre.solar>
This is a preparation to use the custom implementation in ESP32 TWAI
frontend for newer ESP32 series chips like the ESP32-C3, which have
timing registers incompatible with the SJA1000.
Signed-off-by: Martin Jäger <martin@libre.solar>
Implement GPIO driver minimal API's for NXP S32 devices, based on SIUL2
peripheral. SIUL2 allows to control the pins electrical characteristics
such as internal pull resistors, pin direction and more.
GPIO driver API's for interrupts will be implemented in a future patch.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
This patch introduces support for NXP S32 LINFlexD peripheral operating
in UART mode. Polling and interrupt-based serial API's are supported.
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Introduce Pinctrl driver for SIUL2 module present on NXP S32 devices,
which provides control over all pins, such as function selection and
electrical characteristics that appear on external chip pins.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
PMIC regulator disable function was unconditionally disabling the PMIC
regulator when the disable API was called, which does not match the
expected behavior when using the onoff service. Fix this error.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
If the read function returns value of zero, there is no more data
in the file and the function should return value of -1.
Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
We have been encountering timeout issues when erasing large flash
sections (before receiving an image via mcuboot) from this semaphore
take:
5af0fbc2e3/drivers/flash/soc_flash_nrf_ticker.c (L225-L233)
I think this is because this constant is based on the time taken to erase
the chip but doesn't take account of the fact it is being done by a
ticker. If I understand correctly the ticker is a timeshare mechanism
so the actual max erase time is some factor based on how much time is
given to the task by the ticker.
This multiplies the max timeout by 1.5
Signed-off-by: Kyle Cooke <cookekyle97@gmail.com>
Add limits.h and irq.h to fix build errors for boards/tests that include
the zephyr,nativer-_posix-counter driver.
Signed-off-by: Keith Short <keithshort@google.com>
Fix the scope of some variables in various STM32 drivers including:
- SDMMC
- DMA
- OSPI/QSPI Flash
- Interrupt controller
The variables are set static instead of global and const if appropriate.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The IEEE 802.15.4 radio driver encodes attributes in:
* little endian for everything that is close to the protocol as
IEEE 802.15.4 frames are little endian encoded.
* mixed big and little endian in its configuration where extended
addresses are being represented. These inconsistencies are unfortunate
but cannot be easily fixed in a backwards compatible way so will be
left untouched in this change.
Endianness was almost nowhere documented which explains these
inconsistencies and led to several bugs where assignments of different
byte order are not converted (or sometimes converted, sometimes not).
This change documents intended endianness within the realm of the
IEEE 802.15.4 radio driver code. Conversion bugs are fixed in a separate
commit.
Signed-off-by: Florian Grandel <jerico.dev@gmail.com>
STM32F107 has an Ethernet MAC but no PTP clock, so remove hard requirement
on PTP clock definition in preparation for STM32F107 Ethernet MAC support.
Signed-off-by: Pierre-Emmanuel Novac <piernov@piernov.org>
Add support for setting the target mode for a PMIC regulator. Some
regulators support multiple modes, each with distinctive voltage and
current configuration data. This function allows the consumer to switch
the PMIC into a new mode. The PMIC can then be configured to use a new
set of voltages.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Move I2C register reads to regulator_read_register in regulator driver,
to enable better abstraction of regulator I2C reads
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Refactor binding to use root PMIC IC, so that properties can be shared
between regulator devices. Each individual regulator output is still
created as an individual device, since the regulator API aligns with
these devices better than the PMIC IC itself.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The code was missing #include <zephyr/kernel.h> which
caused a compilation error. Missing header has been added.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Propagate vendor specific events that are not handled by the SPI driver
up the host stack, so that `bt_hci_register_vnd_evt_cb` can work
correctly.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
For 32 bit processor to read the 64 bits hpet counter, the HPET spec
2.4.7 suggest to read HPET counter high and low then checking the
high bits to decide if it rollovers or not.
But this logic seems to cause problem for 64 bits processor under SMP,
there is a possible one tick earier under tickless mode. It is likely
to be the cache coherence issue, because a mfence instruction before
reading the timer works.
So we change to read the 64 bits counter by sys_read64 on 64bit
processor to prevent this issue.
Fixes#49611
Signed-off-by: Enjia Mai <enjia.mai@intel.com>
The `ARCH` init level was added to solve a specific problem, call init
code (SYS_INIT/devices) before `z_cstart` in the `intel_adsp` platform.
The documentation claims it runs before `z_cstart`, but this is only
true if the SoC/arch takes care of calling:
```c
z_sys_init_run_level(_SYS_INIT_LEVEL_ARCH);
```
Which is only true for `intel_adsp` nowadays. So in practice, we now
have a platform specific init level. This patch proposes to do things in
a slightly different way. First, level name is renamed to `EARLY`, to
emphasize it runs in the early stage of the boot process. Then, it is
handled by the Kernel (inside `z_cstart()` before calling
`arch_kernel_init()`). This means that any platform can now use this
level. For `intel_adsp`, there should be no changes, other than
`gcov_static_init()` will be called before (I assume this will allow to
obtain coverage for code called in EARLY?).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Previously, the build was failing due to implicit declaration
of `IRQ_CONNECT`. Simply include `<zephyr/irq.h>` to fix.
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
MTL is just one platform and this code is going to be used in multiple
platforms currently under development, so reduce the confusion and move
to a common namespace.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
File still not being removed due to out-of-tree usage. We will drop it
once the external code has stopped referencing it.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Convert timer driver to use a light weight syscon and DTS and convert
register information to use offsets and sys_read/sys_write instead of
structs.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Cleanup soc.h and move interrupt defines into own headers. Rename some
of the defines for ACE to have a unified namespace.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The DW register block was duplicated into the ACE header while we had
the same thing in the driver. Move everything to the driver as the first
step with further improvements planned on top of this.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
mcux HAL pollutes namespace with stuff like ARRAY_SIZE, MIN, MAX, etc.
Luckily it only defines them if not already defined, so we can play with
include order to "fix" the problem. Move the infamous soc.h (which
includes HAL) after other Zephyr includes.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Register definition header was missing, SoC common header as well (for
ite_intc_get_irq_num).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some headers made use of types defined in sys_clock.h (e.g. k_timeout_t)
without including it.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some files using time_units.h API did not include it, e.g. for
sys_clock_hw_cycles_per_sec.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some files were using arch interfaces (e.g. arch_curr_cpu) without
including necessary headers.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some SoCs define stuff in soc.h, used in drivers or SoC code. Note that
soc.h is not introduced here as a catch-all header. soc.h optimizations
or removal is out of the scope of this patch.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
With the incoming removal of kernel.h/types.h from init.h, lots of files
start to show compile errors because they relied on indirect
definitions, including errno.h.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The sys* ops like sys_clear_bit are indirectly included via arch CPU
header. Other stuff like find_msb_set end up included via this header as
well.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Previous commit removed pinmux from the platform but neglected to
remove the dependency in this Kconfig resulting in build failures
when target application configures GPIO support.
Fixes#51144
Signed-off-by: David Leach <david.leach@nxp.com>
This was all done as part of the soc and called from the soc. Define
this type of console under drivers/console and use it in the SoCs
supporting that via SYS_INIT instead of calling the console code
directly.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Fixes a compiler error in eth_xlnx_gem_stats() caused by the
automated replacement of device run-time data pointer accesses
by #41918. The device run-time data access in eth_xlnx_gem_stats()
was likely missed as this function is not usually compiled - its
existance depends on CONFIG_NET_STATISTICS_ETHERNET being set.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
If the flash is used in 4-byte addressing, reading SFDP will fail after
a system reset if the flash isn't power cycled or hardware reset, since
Zephyr will try to use 3-byte addressing while the flash (still) expects
4-byte addressing.
This commit adds the ability to send a reset command to the flash as part
of initialization, which complements the existing reset-gpio
functionality, and is useful on low-pincount flashes which do not have a
hardware reset.
Signed-off-by: Ole Morten Haaland <omh@icsys.no>
The build of this driver fails when `CONFIG_NO_OPTIMIZATIONS=y` is set:
error: expression in static assertion is not constant
98 | BUILD_ASSERT(steps > 0, "only positive number valid");
error: expression in static assertion is not constant
99 | BUILD_ASSERT(steps <= 2048, "overflow possible");
Fix this by using a simple macro to avoid the compiler from getting
confused.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Change reduces time consumed when a block needs to be erased.
The change was tested on a mimxrt1060_evk board.
Signed-off-by: Dipak Shetty <dipak.shetty@zeiss.com>
Add shell for interacting with regulator devices, to enable
users to test power management settings quickly and verify that their
regulator is functioning as expected. Also allows users to interact with
regulator PMIC devices
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The #48905 introduce a regression on gmac ethernet driver. The GMAC
driver matches two compatibles. This add missing compatible for SAM0
variant.
Fixes: #50970.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Clean up and refactor x86 SoC headers in preparation of adding
new platforms in the future.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
add common mec_gpio.h to allow access to common gpio_regs
structure for both mec15xx and mec17xx, used in pinctrl driver
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
It is better to use 64-bit variable types for calculating the number
of elapsed ticks than 32-bit variable types. This guards against the
propagation of calculation errors should the lower 32-bits of the timer
counter roll over multiple times before the timer ISR is serviced.
(Such a scenario can easily occur when pausing the system for an
extended period of time with a debugging device such as a Lauterbach.)
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
Instead of using "select" on certain EC configurations, which is
considered unsafe for various reasons, use a "depends on" and rely on
the user to set a proper configuration in the config file.
Update the respective project configurations to comply with the new
configuration scheme.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Added support for the AMS AS621x series of temperature sensors as a
variant of the TI TMP108 temperature sensor.
Signed-off-by: Jared Baumann <jared.baumann8@t-mobile.com>
Signed-off-by: James Johnson <james.johnson672@t-mobile.com>
Host interface interrupts should be enabled explicitly via eSPI API
after the eSPI configuration and callbacks are set.
If we enable them during driver initialization and the host sends a eSPI
transaction before the eSPI configuration and callbacks are set, we may
encounter unexpected behavior.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Implements dynamic configuration for the atmet,sam-usart driver and
enables the new API calls if CONFIG_UART_USE_RUNTIME_CONFIGURE is set.
Signed-off-by: Nick Kraus <nick@nckraus.com>
Implements dynamic configuration for the atmet,sam-uart driver and
enables the new API calls if CONFIG_UART_USE_RUNTIME_CONFIGURE is set.
Signed-off-by: Nick Kraus <nick@nckraus.com>
This commit adds two new commands to flash shell tools: flash load and
flash page_info.
Signed-off-by: Franciszek Zdobylak <fzdobylak@internships.antmicro.com>
Some files still manage to get into the tree without the zephyr/ include
prefix (likely because they lack CI coverage).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use fifo address from device tree to create the device structs.
Also modify shim initialization as it was changed from array to
int. Fix cosmetic tab in device init macro.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Previously, the I2C bus would have an extended idle period on write
operations, and a spurious trailing byte on read operations (after a
final NACK).
This patch relocates the issuance of the stop condition from the driving
thread's context, into the ISR.
Thanks to @benediktibk for discovery and initial patch.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
espi_manage_callback() returns -EINVAL if it could not remove
callback. However if the list is empty success is returned when trying
to remove callback.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
gpio_manage_callback() returns -EINVAL if it could not remove
callback. However if the list is empty success is returned when trying
to remove callback.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
pwm_set_chan_level uses slice channels A(=0) or B(=1) and not Zephyr
channel (0..15). So PWM doesn't work for channels > 1. There is already
a function (pwm_rpi_channel_to_pico_channel) which does the right thing,
but it isn't used for pwm_set_chan_level.
Signed-off-by: Jan Hilsdorf <jan.hilsdorf@gmail.com>
Rename Z_DEVICE_DT_DEV_NAME to Z_DEVICE_DT_DEV_ID to make it more clear,
as the macro is generating a token that identifies the created struct
device.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Replace the hardcoded kPWM_Prescale_Divide_128
driver prescaler with the ones defined in the dtsi file
that allow overriding them by the user.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
Add a new Kconfig and build this code conditionally, so we do not end up
with this file being built for each zephyr app.
Partial fix for #50654
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit adds a driver to simulate GPIO state and interrupts
using the keyboard when using SDL.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Add 2 properties to configure the "any movement" event.
* Ability to disable the interrupt latch
* Select movement mode
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
It's useful for RAMABLE_REGION to have a uniform name when
CODE_DATA_RELOCATION is supported, because otherwise the build system
needs to be aware of how the region name differs between architectures.
Since architectures tend to prefer one of 'SRAM' or 'RAM' for that
region, prefer to use 'RAM' as the more general term.
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Some systems may need to query the available memory regions in runtime.
For those, this patch adds a simple API that memory management drivers
can implement to provide such discovery.
A small test also added to exercise the default, empty implementation.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
This will use DW_CFGH_DST instead of DW_CFGH_DST_PER
to correctly setup cfg_hi. This is critical for ALH transfer.
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
This will trigger link commit immediately after start
to fix hda start flow.
Applies to link out only.
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
For HDA link suspend is exactly the same as stop
but the same api is used also to control gpdma with unique suspend
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Zephyr encodes multi-level interrupts in a certain way, and
the driver is not utilizing the encoding correctly. So fix
it.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Input pins in ESP32 (34 to 39) have no pull-up / pull-down internally.
Current behavior is that gpio driver fails when "disabling it", which
should not happen. It need to fail only when enabling this feature.
Fixes#50615
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Remove modem_cmd_handler_tx_lock lock when CONFIG_GSM_MUX
is disabled, as modem_cmd_handler_tx_unlock is under the same
conditions.
Signed-off-by: GUITTER Pierrick <pguitter@silicom.fr>
Those Kconfig options are no longer used after ESP32 WiFi driver was
converted to Zephyr WiFi mgmt and the removal of platform specific
`samples/boards/esp32/wifi`.
Fixes: d524015f82 ("samples: boards: remove esp32 wifi sample code")
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Driver is not ready to handle NET_REQUEST_WIFI_CONNECT wifi_mgmt events
before ESP32_WIFI_EVENT_STA_START event is received. Revert back to setting
NET_IF_NO_AUTO_START flag for interface and call net_eth_carrier_on() after
ESP32_WIFI_EVENT_STA_START event is received. This makes it possible for an
application to wait for network interface to be ready, e.g. with:
while (!net_if_is_up(iface)) {
k_sleep(K_MSEC(100));
}
before making a connect request with:
net_mgmt(NET_REQUEST_WIFI_CONNECT, iface ...).
Fixes: 7d9edc8bf0 ("wifi: esp32: add support to wifi api mgmt")
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Abort any pending transmissions before entering configuration mode and
notify the senders.
Poll for mode change completion instead of assuming mode changes take
immediate effect. This is needed for successfully entering configuration
mode with recently aborted transmissions.
Fixes: #50545
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Abort any pending transmissions before entering freeze mode and notify the
senders.
Fixes: #50545
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Given the recent change to the CAN controller can_send() API wrapper,
assume that a callback is always provided at the driver level.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Given the recent change to the CAN controller can_send() API wrapper,
assume that a callback is always provided at the driver level.
This saves approximately 500 bytes of SRAM on the lpcxpressso55s16 board
when running in default configuration.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Given the recent change to the CAN controller can_send() API wrapper,
assume that a callback is always provided at the driver level.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Given the recent change to the CAN controller can_send() API wrapper,
assume that a callback is always provided at the driver level.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Given the recent change to the CAN controller can_send() API wrapper,
assume that a callback is always provided at the driver level.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Given the recent change to the CAN controller can_send() API wrapper,
assume that a callback is always provided at the driver level.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Given the recent change to the CAN controller can_send() API wrapper,
assume that a callback is always provided at the driver level.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Given the recent change to the CAN controller can_send() API wrapper,
assume that a callback is always provided at the driver level.
This saves approximately 500 bytes of SRAM on the frdm_k64f board, while on
the mimxrt1024_evk board the saving is approximately 2.5 kbytes of SRAM,
both when running in default configuration.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Provide a default, internal callback to CAN controller drivers
implementation of can_send() if no callback was provided by the caller.
This allows for simplifying the CAN driver implementations of can_send() as
these no longer need special handling for callback/no callback operation.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Set the synchronous clock mode to HCLK/1 (DIV1) or HCLK/2 (DIV2)
Both are valid common clock setting values.
The HCLK/1 (DIV1) is possible only if the ahb-prescaler = <1>
in the RCC_CFGR (see DTS).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
On power on reset, after disable advanced power safe mode,
you need to wait a delay before write again in the device.
The missing wait produce random initialization failure.
See §4.4 of the datasheet "bst-bmi270-ds000.pdf"
Signed-off-by: William MARTIN <william.martin@power-lan.com>
SAM V71 Xplained Ultra failed to re-enumerate on the bus after device
detach-attach sequence. The device was recognized by the host, but it
was not responding to control transfers, i.e. it was not acknowledging
SETUP data. Make device acknowledge SETUP data by reconfiguring EP0
when necessary.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Device physically detaches when the DETACH bit is set. Fix the
assignment to actually set the bit instead of clearing it.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
If the thread that submits data over spi is interrupted by a higher
priority thread while pushing data to the tx fifo the hardware pushes
data to spi and frees up space in the fifo. In this case more than
8 Bytes are written to the tx fifo and bytes in the rx fifo get lost
before they are collected in the rx while loop.
To avoid this, the tx loop is exited after a maximum of 8 bytes and the
rx loop will run until it collected all bytes from the rx fifo.
Signed-off-by: Gerhard Jörges <joerges@metratec.com>
This Commit makes the adc configuration correct
for using the adc with 12b conversion on the stm32wl.
TriggerSource must be set to SW.
The ADC clock must be disabled by clock gating during CPU1 sleep/stop.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
1. To explicitly set the MSG_START flag on the first message.
2. Remove redundant declare.
3. Using data->msgs->flags is the correct address instead of
msgs->flags.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
The note refers to the wrong API, that has been replaced by a pinctrl
call, update the comment.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add code to handle parsing the gpio-reserved-ranges property present on
iMX GPIO controllers, so that gpio controllers with gaps in their pin
indexing can still have pinmux settings applied correctly.
Fixes#50142
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
A specific check is implemented lptim driver in order to ensure global
platform clock/tick configuration is in line with recommendations.
To respect portability principles, don't error out when a config
conflict is detected but generates a warning instead.
Also, since these are only recommendations, provide an option to override
the check. Besides automatically override when ZTEST is enabled, as some
kernel tests specifically configure tick freq to 100.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Remove pinmux calls and add pinctrl support for mec15xx
and mec1501 qmspi. Update board dts, pinmux and driver files.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Remove pinmux calls and add pinctrl support for mec15xx
and mec1501 adc. Update board dts, pinmux and driver files.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Remove pinmux calls and add pinctrl support for mec15xx
and mec1501 pwm. Update board dts, pinmux and driver files.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Remove pinmux calls and add pinctrl support for mec15xx
and mec1501 espi. Update board dts, pinmux and espi driver
files.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Introduce a function to do the matching job. Add the config for some
platforms to match the mpdir with aff0 only.
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
Some platforms only use aff0 to match mpdir and GICR.aff. Introduce
GIC_V3_RDIST_MATCHING_AFF0_ONLY to set the matching method only using
aff0. With this config enabled, the matching function will find the
target redistributor by comparing the aff0 only.
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
Sometimes it is desired for the USB device to detach and reattach itself
to the host. USB device controller driver interface supports detach with
usb_dc_detach() function. Subsequently the device can be reattached to
the bus by calling usb_dc_attach().
USB device stack sets the control transfer callbacks in usb_enable().
Nordic usb_dc_detach() implementation inadvertedly overwrote registered
callbacks with zeroes by clearing endpoint configuration structure. This
lead to a NULL pointer dereference during enumeration after device has
reattached inself to the host.
Preserve the callbacks by removing the eps_ctx_uninit() function.
Endpoints runtime data is initialized in usb_dc_attach() so this should
pose no problems.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
The cast for the offset variable will make incorrect register
access when it is over 0x80. Change the char cast to unsigned
char to fix it.
Fixes#49803.
Signed-off-by: Enjia Mai <enjia.mai@intel.com>
The ADC of the stm32U5 should also waits for the ready Flag
before enabling the peripheral, then wait for the ready Flag
set.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The receive path for the Renesas R-Car CAN controller supports two RX
FIFOs, which are currently configured for standard 11-bit CAN ID data
frames in FIFO0, and extended 29-bit CAN ID data frames in FIFO1.
As this leaves no room for matching remote transmission request (RTR)
frames, have the driver return -ENOTSUP instead of silently accepting RTR
filters.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
In STM32U5 as well it is required to enable VDD before use.
Difference is that U5 enables this under PWR_SVMCR_IO2SV flag.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The usb_dc_sam0 driver is leaking memory when the usb device is detached
using usb_disable().
When a device is detached, the driver does not reliably deallocate the
descriptor bank memory. Therefore, upon the next attach and configure,
another block of memory is allocated. After several connect /
disconnect sequences, the usb interface becomes unresponsive.
This commit adds a static function to release all memory allocated
to the ep descriptors when usb_dc_detach() is called. Since detach is
called from usb_disable(), this releases the memory when the
interface is disabled.
Avoid calling k_free() if buffer pointer is already
set to NULL.
Fixes#49177
Signed-off-by: Steven Slupsky <sslupsky@gmail.com>
... so that the pin keeps the inactive state of the CSN line when it is
not controlled by the QSPI peripheral and the driver is not suspended.
Currently, the nrf_qspi_nor shim deinitializes the nrfx_qspi driver
after each operation, what leaves the pin uncontrolled until a new
operation is requested (and the nrfx_qspi driver is initialized again)
or the driver is suspended (and the pin is put into low-power state).
This can cause the flash chip to needlessly consume current when there
is no pull-up resistor on its CSN line and the line appears active.
Prevent this by keeping the pin in a defined (inactive) state.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This is a follow-up to commits 9974bb043f
and 00ecc66677.
Add one missing `#ifdef CONFIG_PINCTRL` and remove a no longer needed
one to restore the possibility to use this driver without PINCTRL.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Use the FSL_FEATURE_MCG_FFCLK_DIV define to decide if we should
call the api to get Fixed Frequency Clock.
This fixes Issue #49924
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Missing include to compile correctly when the
CONFIG_PM && IS_UART_WAKEUP_FROMSTOP_INSTANCE are defined
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add BUILD_ASSERT to check max val of ngpios. If someone sets ngpios to
more than 32, and acts on pin 32 or higher, memory corruption will
result. This is only a problem with the emulator, real hardware
will have limits that are probably much smaller.
Signed-off-by: Jeremy Bettis <jbettis@google.com>
The return values of esp_wifi_set_mode(), and esp_wifi_set_config() were
overwritten once esp_wifi_start() is executed.
This commit fixes that by ORing the return value to the others.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
PR #49550 missed adding proper RTCIO pin mapping
in a few rtcio functions calls, which causes board
to crash. This fixes it.
Closes#50238
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
With the move to start/stop functions the transceiver is not expected
to be enabled after driver initialization.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The USART or LPUART, especially on stm32wl, must set the EXTI
lines corresponding to the wakeUp source.
This LL_EXTI_LINE_xx is given by the Device Tree property.
This makes the system exiting lowpower stop mode on EXTI irq.
The LL_EXTI_LINE_x is exactly the bit(X) set.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Fix the issue that the initialization will fail when both
CONFIG_SPI_NOR_SFDP_RUNTIME and CONFIG_SPI_NOR_IDLE_IN_DPD are enabled.
The cause of this problem is simply calling the wrong function.
Fixes#33015
Signed-off-by: Xinyang Tan <xinyang.tan@delve.com>
Previously, the lora_send() function would have returned zero regardless
of any error encountered while waiting for the transmit to complete.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
Up until now, the Zephyr CAN controller drivers set a default bitrate (or
timing) specified via devicetree and start the CAN controller in their
respective driver initialization functions.
This is fine for CAN nodes using only one fixed bitrate, but if the bitrate
is set by the user (e.g. via a DIP-switch or other HMI which is very
common), the CAN driver will still initialise with the default
bitrate/timing at boot and use this until the application has determined
the requested bitrate/timing and set it using
can_set_bitrate()/can_set_timing().
During this period, the CAN node will potentially destroy valid CAN frames
on the CAN bus (which is using the soon-to-be-set-by-the-application
bitrate) by sending error frames. This causes interruptions to the ongoing
CAN bus traffic when a Zephyr-based CAN node connected to the bus is
(re-)booted.
Instead, require all configuration (setting bitrate, timing, or mode) to
take place when the CAN controller is stopped. This maps nicely to entering
"reset mode" (called "configuration mode" or "freeze mode" for some CAN
controller implementations) when stopping and exiting this mode when
starting the CAN controller.
Fixes: #45304
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This adds a very basic driver to utilize the I3C IP block
on MCUX (e.g. RT685). Note that, for now, this only supports
being the active controller on the bus.
Origin: NXP MCUXpresso SDK
License: BSD 3-Clause
URL: https://github.com/zephyrproject-rtos/hal_nxp
Commit: 2302a1e94f5bc00ce59db4e249b688ad2e959f58
Purpose: Enabling the I3C controller on RT685.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Adds support for a global workqueue so drivers can defer
IBI callbacks instead of doing it in interrupt context.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This introduces the I3C API for I3C controllers. Currently,
this supports one controller per bus under Zephyr.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Currently, the sdhc_card_busy function is unimplemented in the
SDHC SPI-driver. This causes some functions which rely on f_sync(),
such as fs_close(), to fail as it will timeout the busy-check. This PR
implements sdhc_card_busy by checking if the MISO-line is kept high to
check if the SD-card is idle (not busy).
Solves https://github.com/zephyrproject-rtos/zephyr/issues/49982
Signed-off-by: Ivan Herrera Olivares <ivan.herreraolivares@uantwerpen.be>
1. enable timer5 on dts
2. Replace all BTMR_Type with struct btmr_regs, to make it compatiable
on both mec 15 and 17
3. As MEC15 and MEC17 have different ways to access the register, use
"#if defined" to access counter_cfg->girq_id on different board.
Signed-off-by: Hu Zhenyu <zhenyu.hu@intel.com>
Ensure that the FIFO of each endpoint is initialized during endpoint
configuration, to prevent a NULL FIFO from being encountered during the
first call to usb_dc_ep_write() for a given endpoint.
Signed-off-by: Nick Kraus <nick@nckraus.com>
Add the flash channel support by implementing the controller attached
flash sharing APIs, including flash_read, flash_write, and flash_erase.
For flash_read, the max data payload the module can support is 64 bytes
in one transaction.
For flash_write, the max data payload the module can support is 16
bytes in one transaction.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
DT node "st,stm32f105-pll2-clock" already exists but was not actually used
and PLL2 was not being configured.
PLL2 is available on STM32F105/F107 and should be turned off after turning
off PLL and turned on before turning on PLL again since PLL2 can be
used as a source for PLL. Source for PLL2 is always HSE.
Signed-off-by: Pierre-Emmanuel Novac <piernov@piernov.org>
Fixes an issue with outgoing mcumgr frames that are larger than the
transport MTU size whereby they would wrongly be split up into multiple
frames with multiple start frame headers, which affected SMP over
console transports.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Add support to at86rf212[b] sub-giga devices. This work enables use of
pages 0, 2 and 5 in accordance with IEEE-802.15.4/2003/2006/2011. The
proprietary speeds can be object of future work.
Note: It is recommended that user define a power table for better
performance, low emissions and to save power. A reference power table
can be found in the datasheet and should be used for tests only and
not on a final product.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The current version of power table is hardcoded in the driver which is a
problem when use devices in production. This change remove all hardcode
from driver and reimplement the feature to allow people create a table
which is defined in devicetree. The big advantage is that each board can
define their own table based on lab tests and allows use of FEM devices
inclusive.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
In old way, gic_rdists[cpu] is calculated via MPIDR_TO_CORE(), but in
real hardware, MPIDR_TO_CORE() isn't a value increment from 0 one by
one, and that will lead gic_rdists[cpu] to point to a wrong address.
GICv3 provides the register GICR_TYPER[1] and it has a field named
Affinity_Value. This field can help to determine where gic_rdists[cpu]
should point.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
1. Move the defines from usb_dc_mcux.h to usb_device_config.h
and fsl_os_abstraction.h. These headers are used by
the SDK USB driver. usb_dc_mcux.h header file is not longer
needed and hence deleted.
2. Delete the Zephyr implementation of the usb_device_struct
driver and use the one implemented inside the SDK USB
driver. This requires updating the references to
usb_device_struct inside the USB driver
3. Move defines and structures used by the driver
out of the header file that is included by the SDK and
into the MCUX USB driver.
4. Use end point defines provided by Zephyr instead of adding
them locally.
5. Add a Kconfig to set the thread stack size
6. Move code to enable interrupts back to usb_attach function.
Interrupts should be enabled after the init is successful,
else we see errors of the ISR getting called before the
init is complete causing Faults
6. Update west.yml to update the NXP HAL to get the updated
SDK USB driver.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
This commit introduces the 1-wire master driver for maxim ds2485.
The ds2485 master has nearly the same (1-wire) feature set and
i2c-interface as the ds2477.
Therefore the common parts are extracted, but to avoid
any nda troubles only the ds2485 specific part is included.
Compared to older 1-wire masters, the ds2485 supports higher level
commands, supporting multi byte operations, search next, automatic crc
calculation.
In this driver only basic read and write operations are supported,
further hardware features are not yet utilized by the driver.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
In some configurations, a udf instruction may be generated
when compiling code where static global variable lptim_clock_freq is
used as a divisor.
To avoid this, initialize variable on declaration so that compiler
could see that it can't be used uninitialized in this division.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update timer drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
* Enable hardware flow control on Kconfig
* Enable HSI48 clock on sdmmc_stm32 driver
Signed-off-by: Gerson Fernando Budke <gerson.budke@ossystems.com.br>
On some stm32 mcus, the LSE is enabled as system clock (LSESYS)
only when the LSEON and LSERDY are both set.
The bit LSESYSEN is set in the RCC BDCR register
and the driver is waiting for the LSESYSRDY to be set.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The baudrate register (BRR) of a stm32 USART cannot be lower than 16.
The baudrate register (BRR) of a stm32 LPUART cannot be lower than 0x300
and greater than 0xFFFFF.
Add assertion to check the range.
This could be the case when configuring a baudrate of 9600 on usart
clocked by LSE (32768Hz).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
USBC port (Port 0/1/2/3) OCP (Over Current Protection) status
should be sent to PCH over eSPI VW index 0x50h. But there is
no dedicated VW register mapped to VW index 0x50h.
In this patch, configuring spare VW register SMVW06 to OCP VW
index 50h.
Signed-off-by: Diwakar C <diwakar.c@intel.com>
This driver provides an interface to SocketCAN interfaces of the Linux
system running a Zephyr application with the native_posix board. These
interfaces may be virtual or actual CAN buses.
Signed-off-by: Martin Jäger <martin@libre.solar>
An `ifdef CONFIG_SOC_SERIES_INTEL_ACE1X` currently always evaluates to
true, as `drivers/mm/mm_drv_intel_adsp_mtl_tlb.c` is only built when
`CONFIG_MM_DRV_INTEL_ADSP_MTL_TLB=y`, which depends on
`CONFIG_SOC_SERIES_INTEL_ACE1X`. So remove the ifdef.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Migrate information to DTS and get it from there on the code. Note that
for CAVS 15, the information is not migrated as there's no DTS entry for
it. It can be brought back (in the DTS) if TLB support is enabled for
it.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Instead of using SoC versions, define the information about base and
extended ports on Kconfig, and use this information from there.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Instead of using version of the SoC, declare on Kconfig the need for it,
and use this information to decide upon enabling the code or not.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Update the GPIO-controlled CAN transceiver driver to use the
DT_HAS_CAN_TRANSCEIVER_GPIO_ENABLED Kconfig symbol to expose the driver and
enable it by default based on devicetree.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add emulator functionality to the serial_test driver, so that it can be
used to simulate a device on the other end of the uart.
If you don't set the buffer-size property in the dts node, there should
be effectively no change from the previous behavior.
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Introducing the dma transfer (also through dmamux)
to transfer data to/from the NOR octo-flash
With a DMAMUX, the DMA channel is given by the DTS.
Note that STM32U5X does not support DMA here.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This supports three types GD32 FMC flash memory. GD32 FMC v1,
GD32 FMC v2 and GD32 FMC v3.
GD32 FMC v1 for small flash memory, flash size can be up to 512KB.
GD32 FMC v2 for large flash memory, flash size can be up to 3072KB.
GD32 FMC v3 not use page but sector as minimum block, flash size can
be up to 3072KB.
Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
According to i.MX RT1060 Reference Manual:
While the OR flag is set, no additional data is stored in the data
buffer even if sufficient room exists. To clear OR, write logic 1 to
the OR flag.
Clear OR (Overrun) flag whenever it is set, so that data continues to be
received after potential data overrun.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Add R-Car Gen3 PWM driver.
Clock diviser is automatically adjusted according to requested period
and duty-cycle in order to obtain as much accuracy as possible.
Indeed, in order to improve PWM accurancy, the PWM clock has to fit
the requested period. So use the given period_cycle to define if the
clock as to be adapted. In such case, increase/decrease the clock
diviser to adapt the period_cycle and be sure that it fits into the
10 bits counter of the PWM controller.
Tested on H3ULCB on pwm0 and pwm4.
Signed-off-by: Pierre Marzin <pierre.marzin@iot.bzh>
For some stm32 devices, the SDMMC clock selection is HSI 48MHz
by default (reset value). It must be enabled before acccessing
the peripheral.
The ErrorCode is reported when Init fails.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit is the adaptation of the stm32 SPI driver with DMA
transfer for the stm32u5 soc.
Use the DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_spi)
also valid for the stm32U5 serie.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit implements shell support for 1-Wire.
Commands for bus-reset, bit-, byte-, and block- communication,
as well as search and configuration are implemented.
- write_byte, and write_block perform a reset before,
in case the option "-r" is passed.
- using read_io_options() function to parse the reset option,
as this allows to easily add further options in the future.
- configuration type can be specified either as number or as name.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Introducing RaspberryPi Pico ADC driver.
This driver was created with reference to the adc_emul implementation.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
MCO1 is also available on STM32F1 series (on top of STM32F4), allow
selection of MCO1 source with CLOCK_STM32_MCO1_SRC_* Kconfig parameters.
Available MCO1 sources are slightly different between STM32F4
(LSE, HSE, HSI, PLLCLK) and STM32F103 (HSE, HSI, PLLCLK/2, SYSCLK), and
STM32F105/F107 have a few more (EXT_HSE, PLL2CLK, PLLI2SCLK, PLLI2SCLK/2).
MCO1 on STM32F1 does not have a configurable divider (unlike STM32F4),
HAL call only configures source.
STM32F1 do not have MCO2.
Signed-off-by: Pierre-Emmanuel Novac <piernov@piernov.org>
Use the clock control API to enable peripheral clocks. Note that both
GPIO and pinctrl drivers are updated at once since they share some IP
blocks.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Use the clock control API to turn on ADC clocks. Note that clock
selection is not yet implemented, so we still rely on custom rcu
properties for that.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This patch adds a clock control driver for GD32 platforms. It is
important to note that the driver is only able to handle peripheral
clocks, but not "system clocks" (e.g. PLL settings, SYS_CK, etc.). On
some similar platforms (STM32) this task is embedded in the same clock
driver, performed at init time but with no options to do any
manipulation at runtime via the API calls. The clock control API as-is
is really orthogonal to "system clocks", and it is arguably a bad idea
to embed system clock init code in a clock control driver. It can be
done at SoC level still using Devicetree as a source of hardware
description/initial configuration.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Ticker stop callback are executing in ULL_HIGH priority,
correct the value to 1U instead of 0U which is for LLL
execution context of the Bluetooth Controller.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Fix usage fault due to spurious ticker timeout expiry post
enqueuing of ticker stop operation.
Use ticker operation callback to handle completion of ticker
stop operation and then give the semaphore to thread to
notifying the completion of flash operation.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Due to Zephyr's WiFi updates, common private
enums used in `hal_espressif` are now being used.
This updates private internal values to meet hal_espressif
changes.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
ESP32 wifi connection uses Zephyr's net stack. Once WiFi connects
in station mode, is requires the application to handle DHCPv4
negotiation. This PR adds support to automatic negotiation by
handling the dhcpv4 calls in driver layer.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Moved all MBEDTLS dependencies from prj.conf
to Kconfig as WiFi depends on it.
Update esp32 wifi driver to enable `samples/net/wifi`
to work. Commands as such as `wifi connect` and `wifi scan` are now
available.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Remove the CAN_STM32FD_CLOCK_DIVISOR configuration option,
and add configuration via dts property clk-divider instead.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The configurable CAN clock divider CAN_STM32FD_CLOCK_DIVISOR
was not applied during initialization, because write protection
was not disabled.
While the clock divider was not applied, it was still used in clock rate
calculation, therefore resulting in incorrect bus speed setup.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Use domain clocks if they are defined in dts.
Until now domain clock sources could be selected via kconfig.
STM32 platform now can configure domain clock sources via
clock control driver, therefore this commit makes use of it.
The configuration is shared between canfd instances, so a domain clock
has to be defined for only one instance. Otherwise, only the
configuration from the latest initialized instance will remain.
The dependency on clock source PCLK1 for CAN_STM32FD_CLOCK_DIVISOR
was removed, because the divider also divides other clocks.
Note that setting that divider does not work at all at the moment,
because the write protection is not disabled.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
* reduced cyclomatic complexity
* group validation by family to make the validation easier to understand
and extend
* change preprocessor markup where possible to allow for complete code
elimination when features (esp. IP) are disabled
* renamed net_context_get/set_ip_proto() to net_context_get_proto()
While the latter is formally part of the public API and might therefore
have to be deprecated rather than renamed, it is considered internal API
by the net developers, see
https://github.com/zephyrproject-rtos/zephyr/pull/48751#discussion_r942402612
Signed-off-by: Florian Grandel <jerico.dev@gmail.com>
As of today <zephyr/zephyr.h> is 100% equivalent to <zephyr/kernel.h>.
This patch proposes to then include <zephyr/kernel.h> instead of
<zephyr/zephyr.h> since it is more clear that you are including the
Kernel APIs and (probably) nothing else. <zephyr/zephyr.h> sounds like a
catch-all header that may be confusing. Most applications need to
include a bunch of other things to compile, e.g. driver headers or
subsystem headers like BT, logging, etc.
The idea of a catch-all header in Zephyr is probably not feasible
anyway. Reason is that Zephyr is not a library, like it could be for
example `libpython`. Zephyr provides many utilities nowadays: a kernel,
drivers, subsystems, etc and things will likely grow. A catch-all header
would be massive, difficult to keep up-to-date. It is also likely that
an application will only build a small subset. Note that subsystem-level
headers may use a catch-all approach to make things easier, though.
NOTE: This patch is **NOT** removing the header, just removing its usage
in-tree. I'd advocate for its deprecation (add a #warning on it), but I
understand many people will have concerns.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In case SFDP table is provided via device tree, take care not reading
more than expected by the function caller as the result is written
in a structure which size is predefined by one specific byte in the
table, and could be smaller than the table size.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
soc.h has been removed for ARM64 SoC platforms and it is also needed by
ARM32, so remove it from related drivers.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
soc.h has been removed for ARM64 SoC platforms and it is also needed by
ARM32, so remove it from related drivers.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
soc.h has been removed for ARM64 SoC platforms and it is also needed by
ARM32, so remove it from related drivers.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Changes to code:
1. Renamed CAVS_IPC API from common/include/cavs_ipc.h to
common/include/intel_adsp_ipc.h. Renamed all API functions and structs -
added "intel_adsp_" prefix.
2. Moved definitions from intel-ipc-regs.h and ace-ipc-regs.g to SOC
specific headers include/<soc_name>/adsp_ipc_regs.h.
3. Added new common intel_adsp_ipc_devtree.h header with new
macros to retrieve IPC and IDC nodes and register addresses.
Put those new macros in code replacing hardcoded values outside of
devicetree.
4. Changed documentation of IDC and renamed IDC register struct
to have common name between all intel adsp socs.
5. Removed excessive docs description on cAVS IPC protocol.
Changes to Devicetree:
1. Renamed in all CAVS boards .dtsi files content in IPC nodes:
- "cavs_host_ipc" node labels to "adsp_ipc" labels.
- compatible "intel,cavs-host-ipc" renamed to
"intel,adsp-host-ipc".
2. Added (previously missing) yaml file for "intel,adsp-host-ipc"
compatible.
3. Renamed in all CAVS boards .dtsi files content in IDC nodes:
- "idc" node labels to "adsp_idc" labels.
- compatible "intel,cavs-idc" renamed to "intel-adsp-idc"
4. Renamed intel,cavs_idc.yaml file to intel,adsp_idc.yaml
so it is suitable for both CAVS and ACE SoC family.
Moved it from ipm bindings to ipc bindings where it belongs.
Changes to Kconfig:
1. Renamed existing Kconfig option CONFIG_CAVS_IPC to
INTEL_ADSP_IPC.
2. For renamed INTEL_ADSP_IPC addded default value based on
status of the "adsp-ipc" and "adsp-ipc" node.
Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
Convert the device to be Devicetree based. Adjusted tests and other
areas that were using old Kconfig properties.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
config/data accessors have been removed from all (or most) in-tree
drivers, do the same here.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The "framebuf" driver was an incomplete driver expecting _clients_ to
implement missing functionality (i.e. init and device definition)
outside of the driver. This pattern of scattering driver code throughout
the tree is not common (if used at all). If certain drivers share
functionality, one can create a common module within the subsystem (see
e.g. ILI9XXX drivers).
The _generic_ framebuffer code was only used to implement the Intel
Multiboot framebuffer driver. This patch centralizes all the scattered
code in the subsystem and adjusts the driver name to "intel_multibootfb"
to make things clear. If there's ever another framebuffer driver that
shares code, it can be split into multiple modules.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
So far thread was created as part of usb_dc_attach() by k_thread_create().
This means that if following function were executed:
* usb_enable()
* usb_disable()
* usb_enable()
then k_thread_create() was called second time. This results in undefined
behavior.
Fix above issue by moving k_thread_create() invocation to function called
during system initialization.
While at it, move IRQ_CONNECT() and irq_enable() invocations to init as
well.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
So far thread was created as part of usb_dc_attach() by k_thread_create().
This means that if following function were executed:
* usb_enable()
* usb_disable()
* usb_enable()
then k_thread_create() was called second time. This results in undefined
behavior.
Fix above issue by moving k_thread_create() invocation to function called
during system initialization.
While at it, move IRQ_CONNECT() and irq_enable() invocations to init as
well.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
So far thread was created as part of usb_dc_attach() by k_thread_create().
This means that if following function were executed:
* usb_enable()
* usb_disable()
* usb_enable()
then k_thread_create() was called second time. This results in undefined
behavior.
Fix above issue by moving k_thread_create() invocation to function called
during system initialization.
While at it, move IRQ_CONNECT() and irq_enable() invocations to init as
well.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
On L0 series, LSI runs at 37KHz while LPTIM driver only supports speeds
up to 32768Hz (to avoid counter overflow). Consequence is a time running
faster than reality (x1.13)
Solution to this is the implementation of the LPTIM prescaler support.
While moving driver configuration from Kconfig to DT, this case was
not taken into account and the effect was LPTIM counter overflow which
consequence is worse than the slightly faster timer.
Reproduce the initial behavior with this piece of code that will be
removed once prescaler support is available.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
When using LPTIM as tick source, tick freq (SYS_CLOCK_TICKS_PER_SEC)
needs to be adapted to get a precise tick to LPTIM freq ratio.
This adaptation was done easily using Kconfig up to now (under
soc/st_stm32/common/Kconfig.defconfig.series).
Since driver is configured using device tree, this method should
be adapted. For the LSI case (default Kconfig case), rely on the
existing mecanism, which is also still used by OOT users.
For the LSE case, force the value manually in boards forlder.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following transition of lptim timer configuration from Kconfig to DT,
a warning message was set to inform users about this deprecation.
Due to errors in CI this message had to be removed while fixing the related
issues.
Now these issues are fixed, set the deprecation message again.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Similarly to other drivers, use auto generated DT_HAS_<COMPAT> Kconfig
symbol to control use of STM32 lptim driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Last HAL udpdates came with a fix on two ethernet flags:
- ETH_PTPTS*S*R_TSSARFE > ETH_PTPTS*C*R_TSSARFE
- ETH_PTPTS*S*R_TSSSR > ETH_PTPTS*C*R_TSSSR
Update driver to be aligned with these changes.
Fixes#49763
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Added code to enable platform specific Virtual Wire GPIOs. With this
change, able to send the USB-C overcurrent Virtual Wire event to
Meterolake SOC.
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
The UC8176 doesn't automatically copy writes to the buffer containing
the old SRAM contents. In this case, we need to manually copy data to
the back buffer.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Some custom refresh profiles need to set the PLL and VDCS
registers. Add them as optional DT properties.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Add support for overriding display LUTs in the UC81xx driver. This
makes it possible to use different LUTs for the full and partial
refresh profiles.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Add a separate profile for partial refreshes. This makes it possible
to specify a separate refresh configuration for partial and full
refreshes.
The driver now transitions to full refresh mode when blanking is
turned on. It transitions back to partial refresh mode when there is a
write while blanking is off.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Introduce the concept of refresh profiles which are specified as a
child node in the device tree. This makes it possible to use different
overrides for different types of refreshes (full/partial).
The only profile that is currently supported is the "full" profile.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Some commands need to signal that the chip is busy using the busy
pin. We generally need to wait for the chip to exit the busy state
before issuing a new command. Call uc81xx_busy_wait() from
uc81xx_write_cmd() just before issuing a new command instead to avoid
sprinkling wait calls everywhere.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The UC81xx driver prints a debug message on every iteration of its
busy wait loop. This makes debug output almost useless. Modify this
code to print a debug message on entry and exit instead.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
west.yml: update hal_espressif to use latest v4.4.1 updates.
This change needs to be insync with esp32c3 timer changes, otherwise it
breaks it.
drivers: timer: update esp32c3 systimer to meet API changes.
Systimer API was refactored in hal v4.4.1, which
requires updates in esp32C3 systimer. Timer behavior is maintained
as is.
mcpwm: add v4.4.1 include reference, which was refactored as well.
driver: spi: esp32: update internal structs to meet API changes.
cmake: updated esp32 board to use HAL_ prefix as from west blobs
requirement.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Supplicant start call is part of esp_wifi_init, which
would become duplicated if kept in here.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Updates ESP32 to use hal interrupt funcions provided by 4.4.1
release. Removed redefinition of interrupt FLAGS.
This also includes interrupt definitions for ESP32C3
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add device specific clock initialization, which uses
reset reason cause information to proper define
peripherals clock state.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
NSEC_PER_MSEC should be defined along with the rest of the
per-sec macros in sys_clock.h. Currently, it's defined
multiply in a few separate locations.
Signed-off-by: Christopher Friedt <cfriedt@fb.com>
To reduce energy consumption for accel and gyro frequencies 52 Hz and
lower, disable high performance mode by default.
It doesn't affect for higher frequencies.
Signed-off-by: Adrian Wojak <adrian.wojak@grinn-global.com>
1. Use #ifdef around CONFIG_HTS221_TRIGGER instead of #if
2. According to binding (which is in line with datasheet), name of the pin
used for trigger mode should be drdy, not irq.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Internal channel should be torn after ADC read, this is
especially the case for VBAT, where the connection of internal
channel will introduce current drainage.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Add I2C driver for Andes atciic100. Driver supports I2C target mode and
tested on adp_xc7k_ae350 in runtime.
Signed-off-by: Wei-Tai Lee <wtlee@andestech.com>
Update dai drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update lora drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update intc drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update Wifi drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
Signed-off-by: Kumar Gala <galak@kernel.org>
This change applies the newly introduced consistent MTU definition to
all IEEE 802.15.4 radio drivers.
Signed-off-by: Florian Grandel <jerico.dev@gmail.com>
Adjust the names of the operating modes to match them
with the datasheet and INA230 pattern. While at it add
the missing INA237_OPER_MODE_TEMP_TRIG mode.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
This adds flash driver for Renesas SmartBond(tm) family.
This technically uses QSPI controller but since default and most
commonly used configuration is to boot from external QSPI flash (DA1469x
do not have built-in flash) and that flash is mapped into memory space,
it can be represented as internal flash.
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
This adds serial driver for Renesas SmartBond(tm) family. Both polling
and interrupt APIs are supported.
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
This adds GPIO driver for Renesas SmartBond(tm) family.
Driver supports pin configuration (input/output) and interrupts on edge.
Interrupts on level are not supported by hardware.
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
The commit 4c20403629 updated the
`spi_psoc6_transceive` function signature but forgot to update its
usages.
This commit updates the `spi_psoc6_transceive` function invocations
to properly provide the callback and user data parameters.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit updates the SiFive SPI driver to reflect the
`spi_context_complete` and `spi_context_lock` function signature
changes introduced in the commit
4c20403629.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit updates the Microchip MSS QSPI SPI driver to reflect the
`spi_context_complete` and `spi_context_lock` function signature
changes introduced in the commit
4c20403629.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit updates the LiteSPI SPI driver to reflect the
`spi_context_complete` function signature change introduced in the
commit 4c20403629.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit updates the Gecko SPI driver to reflect the
`spi_context_complete` function signature change introduced in the
commit 4c20403629.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit updates the GD32 SPI driver to reflect the
`spi_context_complete` and `spi_context_lock` function signature
changes introduced in the commit
4c20403629.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
prev_temperature was only used if USE_TEMP_SENSOR is true. Make its
definition conditional.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The temperature sensor was only needed when
CONFIG_CLOCK_CONTROL_NRF_CALIBRATION_MAX_SKIP > 0. Implementation did
not reflect this dependency correctly, and sensor sampling code was
always compiled. Also removed CONFIG_MULTITHREADING checks, since this
driver is only compiled if CONFIG_MULTITHREADING=y.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This commit replaces API that became deprecated with the release
of nrfx2.9 - see CHANGELOG in zephyrproject-rtos:hal_nordic repository
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
Simplify driver by using DT_INST_FOREACH_CHILD_STATUS_OKAY_SEP (avoids
DT_DRV_INST and auxiliary macro).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Simplify driver by using DT_INST_FOREACH_CHILD_STATUS_OKAY_SEP (avoids
both DT_DRV_INST and auxiliary macro).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add I2C bus recovery support by emitting 9 SCL clock pulses.
It implements the equivalent logic of the i2c_unwedge function in the
ChromiumOS legacy-EC.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
hts221_trigger.c is pulled in by the CMakeLists.txt file when
CONFIG_HTS221_TRIGGER is defined. Therefore make the source in hts221.c use
the some define.
This removes also the (wrong) warning
<inf> HTS221: Cannot enable trigger without drdy-gpios
even when "drdy-gpios" is defined in the device-tree.
Signed-off-by: Holger Schurig <holgerschurig@gmail.com>
wifi drivers that depends on native ethernet stack cannot perform
wifi API calls missing availability. This changes adds the ethernet_api
interface in wifi_mgmt so that it becomes possible.
Naming "offload" in "struct net_wifi_mgmt_offload" is kept because
Zephyr still has no supplicant to handle a full non-offloaded driver.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add a new reset driver for GD32 platforms. This driver controls the
reset registers from the RCU peripheral. It can be used to restore
peripherals to their initial state when initializing a device.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Current implementation misses disabling input/output mux
once GPIO has already been configured. It means that after 1st
configuration, if GPIO is reconfigured, it won't disable previous
definitions, causing unexpected behavior.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Update DMA drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Adds a new spi_transcieve_cb API which enables asynchronous
SPI transactions with callback notification.
The exist spi_transcieve_async API remains and uses the new
spi_transcieve_cb API to provide a k_poll_signal notifier.
The driver API changes to provide a callback and userdata
parameter to async transcieve. All drivers in the tree
have been updated to the change.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
It was not possible to disconnect a pin using the nRF pinctrl driver.
That is, it was not possible to set PSEL to 0xFFFFFFFF (indicating pin
is not connected). This can be useful in certain scenarios, e.g. a
bootloader configures all signals of a certain peripheral but
application then needs to disconnect certain signals.
A new DT macro has been introduced to accomplish this:
NRF_PSEL_DISCONNECT. It can be used like this to explicitely disconnect
a peripheral signal:
```
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 1)>,
<NRF_PSEL_DISCONNECTED(UART_RX)>;
};
};
};
```
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use SHELL_CMD_ARG() for argument check and add help, looking like:
...
$ pcie -h
pcie - PCI(e) device information
Subcommands:
ls :List PCIE devices
Usage: ls [bus:device:function] [dump]
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
The command uses 1 optional parameter and this parameter can be at
maximum MAX_I2C_BYTES.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
When configuring the octo-flash in SPI/STR mode, the address size
must be on 24bits (and not on 32bits).
Despite the dev_data->address_width which is always seen as 4, the
erase command must reduce the AddressSize for this transfer mode.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Update I2S drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
This commit enables the SoC's flash memory controller.
- added lpc55s36 specific code in the NXP MCUX driver
to take advantage of the SoC's check-before-read
capability
- enabled the FMC node in the SoC's dtsi (iap)
- added the flash controller chosen node to the board's dts
Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
Add support for LPC54xxx IAP flash driver to soc_flash_lpc.c
Driver is tested on M4 core only, and is therefore disabled on the M0 core.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Use correct printf format specifier for LOG_DBG calls using offsets, as
these offsets are long int and thus require the %lx format specifier rather
than %x.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Update usb device drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Following 4806e1087e ,
the following warning appears for some boards (e.g. `qemu_cortex_a53`)
```
CMake Warning at /zephyr/CMakeLists.txt:798 (message):
No SOURCES given to Zephyr library: drivers__cache
Excluding target from build.
```
Allow this driver to have no sources.
Signed-off-by: Henri Xavier <datacomos@huawei.com>
Commit d556a0c8a6
("drivers: entropy: Add entropy driver for MCUX CAAM")
added a shim entropy driver whose initialization function
always returns 0, even when the underlying HAL API fails.
This is wrong; if the device initialization function fails, it must
return nonzero by contract. Papering this over with an assert is not
enough. Fix it by returning -ENODEV on error.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The sleep pin is optional and the driver checks for availability during
runtime. Currently the logic is inverted and therefore the driver exits
early if the pin is actually available. This pr fixes this behavior.
Also: Add `fallthrough` flags to switch/case
Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
This commit is converting the DMA kconfig for the stm32 dma driver
with new macro DT_HAS_<COMPAT>_ENABLED.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
It includes the definition for the DMA peripheral of this type,
present on stm32U5 devices.
A particular DMA_STM32U5 config is selected for that purpose.
The driver is derived from the existing dma_stm32.c
The GPDMA is counting channels (0-15) ; stream offset is 0.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Pull more function into ram code section to effectively improve
access speed and performance.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Adding I2C FIFO mode can reduce the time between each byte to
improve the I2C bus clock stretching during I2C transaction.
The I2C master supports two 32-bytes FIFOs, channel A and C
are supported now.
I2C FIFO mode of it8xxx2 can support I2C APIs including:
i2c_write(), i2c_read(), i2c_burst_read.
Test:
1. tests\drivers\i2c\i2c_api --> pass
2. Reading 16 bytes of data through i2c_burst_read() can reduce
0.52ms(2.4ms->1.88ms) compared to the original pio mode when the
frequency is 100KHz.
3. It is normal to read sensor data through I2C on Nereid's platform.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
When a cache API function is called from userspace, this results on
ARM64 in an OOPS (bad syscall error). This is due to at least two
different factors:
- the location of the cache handlers is preventing the linker to
actually find the handlers
- specifically for ARM64 and ARC some cache handling functions are not
implemented (when userspace is not used the compiler simply optimizes
out these calls)
Fix the problem by:
- moving the userspace cache handlers to a their logical and proper
location (in the drivers directory)
- adding the missing handlers for ARM64 and ARC
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change Summary:
- Updating GPIO_CFG_IRQ define to enable multiple interrupts to
accomodate for IP configuration where each pin when interrupted
can trigger CPU interrupt.
- Removing gpio_dw_unmask_int define as it is NO OP
Signed-off-by: Ravik Hasija <ravikh@fb.com>
Add missing support for the triggered mode using GPIO
interrupt alert pin. It uses mode detection at runtime
which allows working multiple sensors with different
modes simultaneously.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
I2C CQ mode cannot enter power policy during transfer.
test: tests\driver\i2c\i2c_api--> pass
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Many device pointers are initialized at compile and never changed. This
means that the device pointer can be constified (immutable).
Automated using:
```
perl -i -pe 's/const struct device \*(?!const)(.*)= DEVICE/const struct
device *const $1= DEVICE/g' **/*.c
```
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Change the error code for can_send() when the CAN controller is in bus off
state from -ENETDOWN to -ENETUNREACH.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This is a follow-up to commit fd07675574.
The above commit was supposed to introduce overriding of the S0S1
drive setting with S0D1 for TWI/TWIM peripherals, but since it did
not properly update the `nrf_pin_configure()` function (the `drive`
parameter was only added in the function signature, but then it was
not used...), the drive setting was in fact not overridden.
This commit corrects this embarrassing oversight.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The stm32U5 LL function name differs from stm32H7 serie but must
still be enabled in the PCSEL.
This is done with the LL_ADC_SetChannelPreselection function
until the LL changes its name.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The driver is writing the DTS nist-config to the RNG periph.
following the validation sequence described by the RefMan.
It depends on the he RNG IP version and is present on some
mcu devices : all with CONDRST bit.
Depends on the RNG CR Autoreset.
Takes the Health test control Register if property is given.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
For the stm32 mcu with a CONDRST bit in its RNG_CR
for conditioning Soft Reset, the driver must wait for
the bit to be 0 after disabling. This could take
about 2 AHB clock cycles + 2RNG clock cycles.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Recent change to constify struct devices pointers introduced a
compile warning in gpio_xlnx_ps driver. Update driver to fix a
case that got missed in the constification that fixes the warning.
Signed-off-by: Kumar Gala <galak@kernel.org>
Switch the Xilinx PS UART device driver over to the use of the
DEVICE_MMIO_... macros instead of just using the physical base
address from the device tree.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
Toward deprecated DT_LABEL() macro, replace the handful of cases
that use DT_LABEL(node) with DT_PROP(node, label).
Signed-off-by: Kumar Gala <galak@kernel.org>
Dai index should be added to config as it can be queried by the
application like sof. Also check for dynamically allocated params
when returning the config.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Increase the default user-allocable number of RTC channels to meet
the nrf_802154 driver requirements.
Signed-off-by: Adam Zelik <adam.zelik@nordicsemi.no>
It is frequent to find variable definitions like this:
```c
static const struct device *dev = DEVICE_DT_GET(...)
```
That is, module level variables that are statically initialized with a
device reference. Such value is, in most cases, never changed meaning
the variable can also be declared as const (immutable). This patch
constifies all such cases.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Initialize UART pipe device at compile time, allowing to constify the
device pointer. Also fix device ready check (was checking for NULL, an
always true condition when using DEVICE_DT_GET).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Remove redundant definitions by defining at the top before variable is
used. Also constify device array.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Initialize the vtd device at compile time. Also removed unnecessary
macro hackery. As a result, vtd pointer can be constified.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Remove redundant declarations by definining and initializing before
variables are used.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Initialize timer devices at compile time. This allows to constify the
array of timer devices.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
A few drivers could initialize chosen UART at compile time, allowing to
constify device pointer.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The UART device can be initialized at compile time, allowing to constify
the device pointer. Also fix return value to -ENODEV if device is not
ready.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Rename the can_state enumerations to contain the word STATE to make their
meaning more clear:
- CAN_ERROR_ACTIVE => CAN_STATE_ERROR_ACTIVE
- CAN_ERROR_WARNING => CAN_STATE_ERROR_WARNING
- CAN_ERROR_PASSIVE => CAN_STATE_ERROR_PASSIVE
- CAN_BUS_OFF => CAN_STATE_BUS_OFF
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Expand the error return values reported by the CAN timing calculation
functions to be able to distinguish between an an out of range
bitrate/sample point, an unsupported bitrate, and a resulting sample point
outside the guard limit.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Move the check for the maximum allowed CAN bitrate to the corresponding
can_calc_timing()/can_calc_timing_data() function.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This is a follow-up to commit e1c0a494b3.
The `tca954x_transfer()` function cannot call `i2c_transfer_dt()`,
because the I2C device address used in the transaction must be the one
passed as the `addr` parameter, not the address of the TCA954xA switch
itself. Hence, this commit restores the call to `i2c_transfer()`.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Previous versions were using, incorrectly, the host in/out regblock size
of 40 bytes for all peripherals when in fact the link in/out regblock size
is 20 bytes in size.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Fix a call that writes Register 29 - Accelerometer Configuration 2.
Due to an obvious copy-paste mistake in the code, this register was
written with a DLPF setting from devicetree intended for gyroscope,
not for accelerometer (and the latter was effectively ignored).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Move gpio_cmsdk_ahb.h out of drivers/gpio and into include/drivers/gpio.
This is used by few board files so it should be in include.
This allows to remove few odd
"zephyr_library_include_directories(${ZEPHYR_BASE}/drivers)".
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
There's no actual pinmux subsystem driver for v2m_beetle, and
CONFIG_PINMUX is only used as a proxy to build pinmux.c.
Drop the config and change the file to be built unconditionally (same as
mps2_an521 and mps2_an385.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
According to the BME680 datasheet, only the spi_mem_page bit can be
changed in its 8-bit register. Therefore we shouldn't just write 0s
to the remaining bits, but update the register content in read-modify-write
fashion instead.
Rework the bme680_set_mem_page(), bme680_init() and register-access
macros.
Signed-off-by: Jan Kuliga <jtkuliga@gmail.com>
Add support for reading the VFOCV register, which contains the model
estimated open circuit voltage for the cell.
Link: https://pdfserv.maximintegrated.com/en/an/AN6358.pdf
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
ASSERT was failing when `r8a7795_cpg_mssr_start_stop` was
called for a "core" clock.
This ASSERT statement and "mstpcr" table of registers are
only meant to be used when starting or stopping a "module" clock.
Moved ASSERT statement to `rcar_cpg_mstp_clock_endisable`
as well as "reg" & "bit" calculation.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Add argument dump for dumping first 16 PCI configuration space
registers same way lspci -x is doing. Also parse bdf string as
argument. pcie can be called following way:
uart:~$ pcie 0:1f.4
...
uart:~$ pcie 0:1f.4 dump
...
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Rename the SocketCAN header from socket_can.h to socketcan.h to better
match the naming of the functionality.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename the NXP FlexCAN driver internal functions and macros to not use
"zcan", "zframe", and "zfilter" to avoid confusion after "struct can_frame"
and "struct can_filter" renaming.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename the mcp2515 driver internal functions to not use "zcan" to avoid
confusion after "struct can_frame" renaming.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Remove the "z" prefix from the public CAN controller API types as this
makes them appear as internal APIs.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add fundamental feature support for PL022 SPI peripheral.
This commit implements synchronous transfer with 8bit-MSB format.
Optional functions are not currently implemented yet.
- interrupt based transfer is not implemented yet.
- DMA transfer is not implemented yet.
- Slave mode is not implemented yet.
- Currently support only 8-bit data transfer.
Hardware limitation:
- LSB-first format is not supported by hardware.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Remove flash driver dependency on CONFIG_HAS_MCUX_IAP for determining
if the SOC uses an NXP IAP flash controller, and instead use the
devicetree compatible to determine this.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This change reverts a portion of a prior change that results
in an uninitialized eswifi_spi_data struct to be passed to
the `is_spi_ready` function.
See commit 48c87f2bf8
Signed-off-by: Brian Dunlay <brian.dunlay@gmail.com>
gpio_utils.h header relied on other files including its dependencies.
This patch adds all necessary includes to make it self-contained.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The binding 'nxp,lpc-iap' is no longer used, which is confirmed
by running:
$ find ${ZEPHYR_BASE}/dts/arm/nxp -type f | egrep -e '\.dts(i)*$' | \
xargs grep -nH nxp,lpc-iap
Changes in this commit:
- remove DT_HAS_NXP_LPC... in drivers/flash/Kconfig.mcux
- remove schema file for nxp,lpc-iap
Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
The lpc and mcux drivers' DRV_COMPAT is updated for the new bindings
introduced in the previous commit. The drivers' Kconfig files also
reflect this change (DT_HAS_ENABLED_NXP_...).
The SoC device trees are updated with the new bindings
Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
Add support for setting sync-word and iq-inverted in lora_modem_config. By
being able to set the sync-word it's possible to send "raw" public-network
packets using lora_send and using iq-inverted both uplink and downlink
messages can be sent.
Signed-off-by: Tim Cooijmans <timcooijmans@gmail.com>
Fixes a bus fault observed in samples/boards/reel_board/mesh_badge
caused by dereferencing an uninitialized device pointer in the apds9960
sensor driver. The device pointer needs to be initialized regardless of
how CONFIG_APDS9960_TRIGGER is configured.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
The SSD16xx driver currently hard-codes a couple of register overrides
that aren't relevant or even correct for many devices. Make them
optional device tree properties instead.
Note that this changes the behavior for panels that expect
SSD16XX_CMD_DUMMY_LINE and SSD16XX_CMD_GATE_LINE_WIDTH to be set by
the driver. This fixes a bug where the incorrect value
was written to all SSD16xx panels except for GDEH0213B1 and GDEH029A1.
The overlay files for devices that need dummy line and gate line width
to be specified have been updated as a part of this commit.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The OTP in most SSD16xx-based displays normally contain default
VCOM/GDV/SDV values. Make all of these optional in the device tree.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Many register writes only use 8 bits of data. A common pattern in the
driver is to assign a constant to a temporary variable and write that
to the device. Simplify this pattern by adding a helper function that
writes an uint8 to a device.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Device activation always follows the same sequence, we first write the
SSD16XX_CMD_UPDATE_CTRL_2 register followed by
SSD16XX_CMD_MASTER_ACTIVATION. Create a helper function that performs
both of these actions.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
This changes the return value of uart_mux_send() to return
how many bytes sent instead of simply zero for any bytes sent.
This would make it consistent with other UART send commands where
they return number of bytes sent.
Fixes#48470
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add the option to specify the minimum duration that the `reset-gpios`
pin is held low on boot. This lets devices with additional capacitance
on the reset line still reboot the Bluetooth controller.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
* Utilize DT_HAS_<COMPAT>_ENABLED for devicetree based drivers
* Move to using 'select SPI' instead of 'depends on'
(see commit df81fef944 for
more details)
Signed-off-by: Kumar Gala <galak@kernel.org>
This fixes underrun issues when hardware flow control can't be used.
Only tested on STM32F4.
Signed-off-by: John Kjellberg <kjellberg.john@gmail.com>
...
DMA controller ownership can be done in the driver
initialization, it does not need to be part of the SoC. It simplify
the code and remove duplicated definitions.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Use 'select SERIAL', as a serial driver is supported by practically
all boards, and avoids using extra overlays in samples and tests.
The pattern of using select was introduced for SENSORS in df81fef944,
and the only 1-wire I2C sensor was converted in 465b7615a9.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
* Utilize DT_HAS_<COMPAT>_ENABLED for devicetree based drivers
* Move to using 'select I2C'/'select I2S' instead of 'depends on'
(see commit df81fef944 for
more details)
Signed-off-by: Kumar Gala <galak@kernel.org>
The hwinfo_mcux_syscon driver isn't relavant for LPC51U68 SoC
series. Add a Kconfig exclusion so the driver isn't available
on LPC51U68 SoC.
Signed-off-by: Navin Sankar Velliangiri <navin@linumiz.com>
It appears that some in tree boards still enable lptim w/o configured
domain clocks.
Remove this deprecation message the time a clean up is done fully.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
LL_USART_EnableInStopMode may not be available on some series.
Since PM is not enabled on those series and might never be, use a
shortcut for this case.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The adxl372 device does not select the correct bus that it is on, which
causes undefined operation (usually a fault). This driver should not be
using Kconfig to determine which bus to use, that should be done by
dts, however this works as a quick fix in the interim until the driver
can be fixed properly.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
mdm_hl7800_log_filter_set uses LOG_MODULE_NAME which
is undefined.
log_source_id_get() will fail to get the correct source id.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
All the of the ITE it8xxx2 devicetree compatiables are of the form
ite,it8xxx2-<DEV>. However the PECI device was ite,peci-it8xxx2,
rename the compatiable to match the pattern used everywhere else.
Signed-off-by: Kumar Gala <galak@kernel.org>
Remove the Kconfig option for configuring the maximum value of the CAN-FD
Data Length Code in order to ensure standard compliance.
Allowing users to configure the max DLC allows the user to save a number of
bytes per CAN frame in RAM, but it also renders the Zephyr CAN-FD
implementation non-compliant with the CAN-FD standard.
There are no guarantees that a Zephyr CAN-FD node will not receive a CAN
frame with a DLC higher than the Kconfig limit, which opens up for all
sorts of bugs when trying to handle received CAN-FD frames.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The stm32F1x serie does not provide the pin_get_config function,
Even if the CONFIG_GPIO_GET_CONFIG is set, the -ENOSYS error code
is returned by the z_impl_gpio_pin_get_config().
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Define a pin structure to carry the pin configuration elements
such as push/pull, opendrain, input/output, high/low.
This structure will give the gpio_flags_t to the gpio_stm32_get_config.
Only the stm32F1x serie does not provide the pin config get function.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
In the stm32 gpio driver, the gpio_stm32_get_config function
also returns the pin state HIGH or LOW) to match gpio_pin_get_config
This is valid with CONFIG_GPIO_GET_CONFIG.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Do simple conversion of driver to have driver enabled by devicetree
in Kconfig and struct device created based on basic devicetree
data.
Signed-off-by: Kumar Gala <galak@kernel.org>
* Utilize DT_HAS_<COMPAT>_ENABLED for devicetree based drivers
* Move to using 'select SPI' instead of 'depends on'
(see commit df81fef944 for
more details)
Signed-off-by: Kumar Gala <galak@kernel.org>
There are several test cases that create fake ethernet devices and
expect the fake device to be the only ethernet device enabled. Some
tests handle this be explicitly disabling actual ethernet drivers,
but this doesn't scale well.
Change drivers/ethernet/Kconfig to utilze a menuconfig option that
wraps all the drivers. This allows us for those test cases that
don't want any actual ethernet drivers to disable them with a
simple CONFIG_ETH_DRIVER=n.
Note, the fake ethernet devices utilize CONFIG_ETH_INIT_PRIORITY so
we have it outside of the 'if ETH_DRIVER' block.
Signed-off-by: Kumar Gala <galak@kernel.org>
When dealing with pm action 'suspend', driver applies device pinctrl sleep
state.
Using PM_DEVICE modes should allow to save more current consumption, and
applying pinctrl sleep state is one of the gains, but sleep state not being
available on a device is not a sufficient reason to block PM transition
to lower power mode.
If this pin state is not provided for the device, warn but don't block
pm transition. This will save some time to users setting up this feature
for the first time. Warning will give the opportunity to users to fine
tune their setup in a later step.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Instead of relying on Kconfig, use dt inputs to configure LPTIM domain
clck (LSI/lSE).
Clock control dedicated APIs are used for configuration and get the
frequency of domain clock in use.
Constants macros used previously to store frequency and time base are
converted to static global variables.
Some code was set up specifically to keep compatibility with targets
that still use Kconfig to configure domain clock. This will be removed
after a deprecation period.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Continue conversion of LPTIM driver to device tree based configuration.
Get clock configuration from device tree and use clock_control API for
bus clock configuration
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Start converting LPTIM driver to device tree based configuration and
support of other instances.
First: get base address and IRQ using dt instance
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
i2c_transfer_async is the asynchronous version of i2c_transfer where
the completion of the transfer is notified to the caller using a callback.
This can be used in conjuction with the common callbacks and datatypes
in async.h for directly doing an async transfer with an IPC object
to notify a thread.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
* Utilize DT_HAS_<COMPAT>_ENABLED for devicetree based drivers
* Move to using select I2C' instead of 'depends on'
(see commit df81fef944 for
more details)
Signed-off-by: Kumar Gala <galak@kernel.org>
STM32h7 pllout frequency calculation overflows. In the
worst case pllsrc_freq can be 50Mhz and plln_mul 512 which will cause
an overflow of the intermediate result which leads to wrong frequency
returned. As no intermediate result can be bigger than 960MHz only the
order of operations is changed.
Signed-off-by: Benjamin Bigler <benjamin.bigler@securiton.ch>
The current atmel sam flash driver was develop based on the cortex-m7
version of smart arm microcontroller. The driver support write
protection and cache functions which is not supported by other cortex-m
variants. This fixes current driver implementation and devicetree
entries for all sam variants.
Notes:
* The cortex-m3 doesn't have support erase pages flash command and
because of that the driver still not not compatible. Keep it disabled
until a patch be send. The hwinfo driver is not affected by this
restriction.
* The sam4l variation requires a specific driver because uses another
flash controller (flashcalw). Added another compatible to
differentiate and keeped node disabled until a driver be available.
Fixes#48516
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
cleaned up some code in 3 mcux entropy drivers,
removing unnecessary void casts and function declarations
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This is a bug fix. A pointer to the spi configuration is not saved when
the spi driver is configured for slave operation and it can lead to
runtime errors.
Signed-off-by: Bryce Wilkins <bryce.wilkins@gmail.com>
Sensor value unit is [m/s^2].
Currently calcs as [g/1000] unit.
Correcting calculation to convert [m/s^2].
Store the integer part to val1, and the fractional part to val2.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Header file generation from device tree was failing in pulling mode.
Restrict the interrupt node usage to interrupt mode only.
Signed-off-by: Romain Mahoux <romain@mahoux.fr>
The regulator voltage should be set before the clocks are enabled.
This is especially the case when the MSIS at 48MHz is selected as
SYSCLK.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
IRQ7 is placed on the second element of interrupt definition.
Select it by DT_INST_IRQ_BY_IDX() explicitly.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Enable Zephyr device runtime power management mechanisms in Intel SSP
driver. This allows Zephyr to track usage reference for power
domain gating.
Signed-off-by: Krzysztof Frydryk <krzysztofx.frydryk@intel.com>
* Utilize DT_HAS_<COMPAT>_ENABLED for devicetree based drivers
* Move to using select I2C' instead of 'depends on'
(see commit df81fef944 for
more details)
Signed-off-by: Kumar Gala <galak@kernel.org>
Now that entropy drivers are enabled based on devicetree
we need to remove any cases of them getting enabled by
Kconfig.defconfig* files as this can lead to errors.
Signed-off-by: Kumar Gala <galak@kernel.org>
Fixes command configuration to have samples/drivers/spi_flash
passed on stm32l562 and stm32u585 disco kits.
In OctoSPI STR/DTR and SPI/STR modes
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The waiting of the flag ARROK could be quite long (100µs-200µs in my
test). During this time, the interrupts are locked that is not
recommended. To avoid this, we manage the update of the autoreload value
in interruption
Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
In order to work on a clock speed higher than 20 MHz, IO MUX is required.
Co-authored-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
Signed-off-by: XiNGRZ Chan <hi@xingrz.me>
HCI message sending in this hci driver as these actions require hci_host
to be available and could be performed by the remote host if required.
Explicit this dependency using CONFIG_BT_HCI_HOST.
This is is required to be able to compile BT_HCI_RAW mode.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The def command Indicates that a comment block contains documentation
for a #define macro. This is useful if the comment block documents a
macro not adjacent to it, e.g.
```c
/**
* @def MAX(x,y)
* @brief Computes the maximum of @a x and @a y.
*/
#ifdef XXX
#define MAX(x,y) ...
#endif
```
However, it is not necessary if the comment is adjacent to the
definition, e.g.
```c
/**
* @brief Computes the maximum of @a x and @a y.
*/
#define MAX(x,y) ...
```
This patch removes all unnecessary def entries in-tree.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Remove code that clears spurious interrupt flags, as this step is
not required.
Performance change (as tested with iperf on RT1050)
TCP RX: 50.8Mbps->50.6Mbps
TCP TX: 46.2Mbps->49.5Mbps
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
remove the TX thread, as this thread can become starved and unable to
reclaim TX buffers from the hardware. Instead reclaim buffers in ISR.
Change eth_tx function to first take from the tx_buf_sem, so that multiple
TX buffer descriptors can be used effectively.
Performance change (as tested with iperf on RT1050)
TCP RX: 44.6Mbps->48.6Mbps
TCP TX: 38.1Mbps->40.7Mbps
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Move dma buffers and buffer descriptors to DTCM, to improve hardware
and software access speed during network TX/RX
Performance change (as tested with iperf on RT1050)
TCP RX: 40.6Mbps->44.6Mbps
TCP TX: 36.8Mbps->38.1Mbps
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Do not force network buffers into noncacheable memory, as these buffers
are internal to the driver and not used by the hardware.
Performance change (as tested with iperf on RT1050):
TCP RX: 23.7Mbps->40.6Mbps
TCP TX: 22.3Mbps->36.8Mbps
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The I2C bus lock did not previously enclose the referencing of the
transfers to conduct. If two attempts are made to use the bus at a
similar time, then one set of messages may have been transferred twice.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
Have the display enabled in devicetree will now get the driver
enabled by default when CONFIG_DISPLAY=y is set. So we can remove
setting driver enabling Kconfig values in various .conf and
defconfig files.
Signed-off-by: Kumar Gala <galak@kernel.org>
* Utilize DT_HAS_<COMPAT>_ENABLED for devicetree based drivers
* Move to using 'select SPI' instead of 'depends on'
(see commit df81fef944 for
more details)
Signed-off-by: Kumar Gala <galak@kernel.org>
Add a missing `PINCTRL_STM32` dependency
for `PINCTRL_STM32_REMAP_INIT_PRIORITY` option to use
that option only when STM32 pinctrl driver is being used.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In the continuation of the previous commit, replace _OPT_ by _DOMAIN_
in macros relating to this feature.
hen, adapt drivers and tests to this new wording.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The I2C shell would filter the list of devices it knows about to
ones that have a device name that starts with "I2C_". It was the
case that the majority of I2C bus controller devices happened
to be named with the "I2C_" prefix, however there is no guarantee
that is the case. With the remove of label properties from the
devicetree this is even more true.
For now remove the prefix filter and just return the full list
of devices.
Signed-off-by: Kumar Gala <galak@kernel.org>
This change in pattern is meant to address a misconfiguration issue
that can occur for sensors that support being on multiple busses
like I2C & SPI.
For example, you can have a configuration in which such a sensor is
on the I2C bus in the devicetree and the sensor is enabled. However
the application configuration enables CONFIG_SPI=y and CONFIG_I2C=n
and this will cause the sensor driver to be built by default, however
since we don't have the I2C bus enabled the driver will not compile
correctly.
Previously we had been adding to board Kconfig.defconfig something
like:
config I2C
default y if SENSOR
This pattern doesn't scale well and may differ from what an application
specific need/use is.
So instead move to a pattern in which we leave the default enablement
up to the devicetree "status" property for the sensor. We then have
the Kconfig move from 'depends on <BUS>' to 'select <BUS>' and in
the case of drivers that support multiple busses we have the Kconfig
be: 'select <BUS> if $(dt_compat_on_bus,$(<DT_COMPAT>),<BUS>) for
each bus type the sensor supports.
This removes the need to add Kconfig logic to each board and enables
the bus subsystem and bus controller driver if the sensor requires
it by default in the build system.
Fixes: #48518
Signed-off-by: Kumar Gala <galak@kernel.org>
When the uart is configured in non interrupt mode, then the mmio address
should be provided via DEVICE_MMIO_ROM_INIT.
Signed-off-by: Ayan Kumar Halder <ayankuma@amd.com>
Building for native_posix_64 exposes faulty format strings.
Changes in this commit also ensure that the shell code gets built in CI,
thus this kind of problem can not be introduced again later on.
Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
Adds optional device tree property to specify a default character
to clock out when the TX buffer pointer is NULL. If the property is
not set the existing behavior (default char of 0x00) is used.
I verified the expected behavior using an i.MX RT685 board and
logic analyzer that the def-char character is transmitted when
TX buffer pointer is NULL.
Signed-off-by: Bryce Wilkins <bryce.wilkins@gmail.com>
This commit fixes the incomplete assert conditions for the `chan`
argument passed to the nRF RTC timer functions.
Note that the `chan` argument for this driver is of a **signed**
integer type, so it is necessary to check that its value is
non-negative.
This fixes the warnings generated by the GCC 12 such as:
error: array subscript -1 is below array bounds of '...'
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Activating both, the IEEE 802.15.4 raw mode /and/ the L2 mode is not
possible and in fact leads to a build error.
It should therefore not be possible to activate both options at the same
time. This is achieved by only offering the (rather exotic) raw mode
once the L2-support for the IEEE 802.15.4 has been switched off.
Fixes: #48715
Signed-off-by: Florian Grandel <jerico.dev@gmail.com>
Previous to this change, each individual driver option depended on
NETWORKING. Instead, move dependency one level up.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Make all drivers default to 'y' and dependent on being enabled in DT.
This will allow simplifying many samples/tests.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some counter devices depend on buses (e.g. I2C for Maxim DS3231). Bus
devices are tipically initialized with KERNEL_INIT_PRIORITY_DEVICE as
well, so there's no guarantee counter will be initialized be initialized
before without manually tweaking priorities.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Let's switch to the LOG_DBG for +CREG, +CESQ and +CSQ
AT commands responses because they flood the console so much.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
Updates build references of the Counter API
implementation based on Espressif's General
Purpose Timers to differentiate from the one
based on RTC.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
This PR fixes the instances indexing in the driver's
initialization macros.
The use of DT_INST macros along with other node identifiers
was preventing the driver from initialize correctly in some
cases.
The driver requires the signal mux number value. Hence the need
to use the SoC's peripheral number information and DT_NODELABEL
macro for node id.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Patches the driver such that if the iface errors after init, the
driver will enter FSM error state.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Compare these variables properly so that the condition in an if
statement will be boolean.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Update gsm_ppp.c
For Arm Cortex-family processors that only support single
sercurity state, (GICD_CTRL.ARE is set to '1'), so need to
set SPI's affinity for the PE which it is enabled.
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Use Devicetree to describe the UART UPIPE IEEE 802.15.4 driver. This
allows to remove usage of IEEE802154_UPIPE_DRV_NAME in preparation for
the removal of NET_CONFIG_IEEE802154_DEV_NAME.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use Devicetree to describe the radio and IEEE 802.15.4. This allows to
remove usage of IEEE802154_NRF5_DRV_NAME in preparation for the
removal of NET_CONFIG_IEEE802154_DEV_NAME.
All SoC files have been updated with the addition of an ieee802154 node
(disabled and only on those SoCs that define ieee802154-supported. The
peripheral has been enabled in the nRF52840DK board (used for testing
ieee802154).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use Devicetree to describe the radio and IEEE 802.15.4. This allows to
remove usage of IEEE802154_KW41Z_DRV_NAME in preparation for the removal
of NET_CONFIG_IEEE802154_DEV_NAME.
KW41Z files have been updated with the addition of radio and an
ieee802154 nodes The peripheral has been enabled in the frdm_k41z board
(used for testing ieee802154).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The crypto driver is used internally, so there's no real need to expose
its name as a Kconfig option. Just drop it in favor of a plain string
with the same previous value.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use Devicetree to describe the radio and IEEE 802.15.4. This allows to
remove usage of IEEE802154_CC13XX_CC26XX_SUBG_DRV_NAME in preparation
for the removal of NET_CONFIG_IEEE802154_DEV_NAME.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use Devicetree to describe the radio and IEEE 802.15.4. This allows to
remove usage of IEEE802154_CC13XX_CC26XX_DRV_NAME in preparation for the
removal of NET_CONFIG_IEEE802154_DEV_NAME. All boards used in testing
have been updated to enable the peripheral in DT as well.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use Devicetree to describe the radio and IEEE 802.15.4. This allows to
remove usage of IEEE802154_CC1200_DRV_NAME in preparation for the removal
of NET_CONFIG_IEEE802154_DEV_NAME.
In this case, the driver already had bindings, however, it was still
using NET_DEVICE_INIT.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
According to the reference manual, the ADC should not be
converting when setting the common path, we disable the adc
directly in this driver for the sake of simplicity.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Remove unnecessary VREFINT path connection during the init.
Internal paths should be setup before reading the channel.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Move the `adc_stm32_setup_channels` function to `start_read`
so that we can guarantee that the internel path is connecte
before reading.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Use Devicetree to describe secure timer0 instead of hardcoding values in
<soc.h>.
DT files have been structured to match the following requirements: In
case of sectimer0 - it's should be only enabled for:
- emsdp_em7d_esp.dts
- em_starterkit_em7d.dts
- nsim_sem_mpu_stack_guard.dts
- nsim_sem.dts
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This PR fixes up a race condition which could cause GPIO writes to be
dropped when one thread was toggling a gpio on a port, and a different
thread was also modifying a (different) gpio on the same port.
Signed-off-by: Nickolas Lapp <nickolaslapp@gmail.com>
I2C has its own set of device define macro wrappers to provide
automatic stats tracking when enabled for the device class. This
particular driver happened ot be missed in the transition.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
The previous driver implementation aimed to maximize the amount of
filters, which resulted in a fairly complex implementation.
Background: The bxCAN assigns a number to the filters in the order they
appear in the filter banks. This number is used to match messages in
the FIFO with their filter. If the scale or mode of a filter bank is
changed, all following filter numbers get an offset and the assigned
callbacks have to be shifted accordingly.
The required additional space for the shifting operations resulted in
non-deterministic behaviour and the maximum number of filters could not
be determined at compile-time, which made several tests like
tests/drivers/can/api fail.
This implementation uses a more simple but reliable approach for
filtering and and reserves fixed space for extended and standard ID
filters in the available banks (configurable via Kconfig).
The list mode is not used, which may reduce the total number of usable
filters depending on the application.
The maximum amount of filters is 14 if all filters use ext. IDs,
28 if all use std IDs and something in between if mixed IDs are used.
Also see issue #47986 for more detailed background information.
Signed-off-by: Martin Jäger <martin@libre.solar>
Namespace local functions, enums, structs and defines with stm32/STM32
to distinguish them from global CAN API.
Also rename some internal conversion functions to make their meaning
more clear and delete unused defines.
Signed-off-by: Martin Jäger <martin@libre.solar>
This fixes an issue where the unique device identifier is incorrectly
copied from an address on the AHB bus to memory using memcpy.
I verified corrected behavior by comparing `hwinfo devid` command
output to memory view of the SoC using the debugger.
Signed-off-by: Bryce Wilkins <bryce.wilkins@gmail.com>
Add the "zephyr/" prefix to various #include statements that are
preventing the CI form running with LEGACY_INCLUDE_PATH=n.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
With addition of DAI_TRIGGER_COPY, the trigger callback may
be called at a very high rate.
Reduce the logging level from INF to DBG for the logs in
dai_ssp_trigger().
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Zephyr kernel is dependent on trace.
Trace is dependent on segger rtt.
Segger rtt MUST NOT be dependent on zephyr kernel.
Move lock functions from header into c file to avoid circular
dependency. This fix needs an update of the segger repository.
Fixes#43887.
Signed-off-by: Christoph Coenen <ccoenen@baumer.com>
Introduce a simple binding for atmel,24mac402 EEPROM that the SAM
GMAC ethernet driver can utilize to get MAC address out of. We
introduce a 'mac-eeprom' phandle into GMAC ethernet devicetree
node that will provide a pointer to the MAC eeprom to utilize.
Signed-off-by: Kumar Gala <galak@kernel.org>
Add explicit selection of the BT_HAS_HCI_VS for
the BT_RPMSG HCI driver. When the HCI over RPMSG
is used this dependency will not be solved automatically.
It is required to handle correctly Bluetooth identity
initialization.
Signed-off-by: Kamil Gawor <Kamil.Gawor@nordicsemi.no>
This platform does not use RISC-V machine timer, however, the interrupt
controller had references to its IRQ. Remove them.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Obtain machine timer addresses and IRQ from Devicetree. Note that driver
supports multiple compatibles because mtime/mtimecmp registers are
implemented in different ways depending on the vendor. That means
Devicetree representations can be slightly different and so code to
collect the information needs to treat each compatible differently.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The unit for SENSOR_CHAN_GAUGE_TIME_TO_EMPTY and
SENSOR_CHAN_GAUGE_TIME_TO_FULL are defined in
zephyr/drivers/sensor.h as being in minutes.
Change the max17055 implementation to match the API spec, fix the
annotation for time register units.
Link: https://datasheets.maximintegrated.com/en/ds/MAX17055.pdf
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add workaround for development kits on which interface chip (segger chip)
is dropping bytes when they are sent in bursts. Issue has been seen on
DK which have multiple virtual com ports on the USB.
A workaround is adding periodic busy waits to introduce gaps in the
transmission.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Soft resetting a STM32 device currently does not reset the USB
connection, which causes a few problems: The endpoints do not respond
anymore, and within zephyr any kind of status information like
CDC_SET_CONTROL_LINE_STATE is also missing as they are not
re-negotiated.
This is fixed by stopping the USB device from zephyr side, right after
initialising the USB device.
Signed-off-by: David Jablonski <dayjaby@gmail.com>
This commit fixes an issue introduced in 5ee9392 where FlexSPI
pinctrl states where applied based on the SoC type.
However multiple FlexSPI instances can be active, some of which
are not pre-configured from ROM.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
The HAS_I2C_DW was to limit Kconfig visibility to only platforms
that utilize the I2C DW IP. The Kconfig for I2C_DW depends on
DT_HAS_SNPS_DESIGNWARE_I2C_ENABLED which will cause the same
visbility limitation to only platforms that have I2C DW devicetree
nodes. Thus we can remove HAS_I2C_DW and its references.
Signed-off-by: Kumar Gala <galak@kernel.org>
This adds a driver for Maxims DS2484 Single-Channel 1-Wire master
driver. The DS2484 features an extra pin to enable sleep modes which
is available if the pin is configured in the device tree.
Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
Add ESP32 TWAI CAN controller driver. The TWAI is register-compatible with
the NXP SJA1000 CAN controller.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Update flash drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
MSIS frequency at boot time can be different from the one we intent to
set from device tree configuration.
In order to avoid issues, read MSIS configuration from registers to get
the actual freq rather than the devicetree one which may be not yet
configured (which is the case at startup).
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
When configuring PLL, we should first make sure we're not running on PLL,
and if running on PLL, first switch to a fixed clock before proceeding
with PLL configuration.
Current code is doing the switch systematically which is not useful as
default startup case is to use MSI as sysclk source.
So add a test before doing this switch.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Unlike stated in 57df225b396e43358aac4cc998ed2e99fdb57780, RM0456.pdf
reference manual mentions about PLL1R that "Only division by 1 and even
division factors are allowed."
Though, in reference manual, there is one issue on PLL1R values
description, which should actually be:
0000000: pll1_r_ck = vco1_ck
0000001: pll1_r_ck = vco1_ck / 2 (default after reset)
0000010: Not allowed
0000011: pll1_r_ck = vco1_ck / 4
...
This description will be fixed.
Reflect this in binding and driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update w1 drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update dac drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Martin Jäger <martin@libre.solar>
This PR adds a KConfig option that allows moving
all .noinit content related to wifi a net stack into external
ram. This free dram space to application.
Linker script files are also modified so that the content
are mapped into external ram.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Update i2c drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
This power down bit of eSPI module is loacted in the bit 7 of PWDWN_CTL6
register rather than the bit 4. This commit fixs the incorrect setting.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
This is a follow-up to commit 63d6cfd654.
Use a bit mask to store information about channels that need to be
driven by the PWM peripheral instead of inspecting the `seq_values`
array each time.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
As we phase out label properties from devicetree the devicetree
node may not have a label so utilize DEVICE_DT_NAME instead
which will use a label if it exists and the node name if not.
Signed-off-by: Kumar Gala <galak@kernel.org>
AST10x0 series SOCs provide the clock controller through the syscon
hardware block. The current driver supports the clock gating capability
for the hardware IPs embedded in the SOC. Each clock source has a
clock ID that can simply map to a bit in syscon registers CLK_STOP_CTRL0
(group 0) or CLK_STOP_CTRL1 (group 1). There are some clock sources
that don't have associated clock gating control, which are always on,
are grouped to into group 2.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
This is a follow-up to commit 63d6cfd654.
Revert unwanted PWM_NRFX_CH_POLARITY_MASK to PWM_NRFX_CH_COMPARE_MASK
replacement that was accidentally done in the above commit.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
With the introduction of the OSPI NOR flash controller
the stm32H7 serie requires the HAL MDMA in anycase.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add the ssd16xx_read_ram() function that can be used to read the raw
contents of the two display RAM in the controller. This function is
similar to display_read(), but lets the caller specify the RAM to
operate on. The intention is that this can be used to read out the
contents of the old frame buffer after a partial refresh that
automatically swaps the black/red buffers.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Read operations only work on SPI controllers that support half
duplex. To enable read operations, set the device mode to half duplex
by adding the following to the device's DTB node:
duplex = <SPI_HALF_DUPLEX>;
If read requests will fail with -ENOTSUP if the device isn't in half
duplex mode.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The UC8179 supports automatic power management where the DC-DC is
enabled automatically. This is not supported on the UC8176. Explicitly
call PON/DRF/POF from uc81xx_update_display instead. This ensures that
the DC-DC is only enabled while actually updating the display for all
supported chips.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The CDI register in UC8176 and UC8179 have different layouts. Add a
helper function to the quirks structure to handle CDI updates.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The UC8176 and UC8179 chips that exist in tree have subtly different
register layouts. Use separate compatible strings for these chips and
a quirks structure that describe device-specific behavior.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The GD7965 driver is really just a vendor name for the UltraChip
UC8179. Rename the driver to UC81xx since there are other chips in the
family (e.g., the UC8176) with an almost identical register interface.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Some Series were calculating the pll output frequency from an
clock source index instead of the clock source frequency.
This commit resolves this issue for l0, l1.
get_pllout_frequency() is only used for PLLCLK, therefore remove it.
F2, F4, and F7 have several pll dividers and might decide to implement
these as clock sources won't need PLLCLK.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Update clock_control drivers to use DT_HAS_<compat>_ENABLED Kconfig
symbol to expose the driver and enable it by default based on
devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
The KW40Z/KW41Z don't have a Fixed Freq MCG clock so the code
associated with that in get_rate fails to build. ifdef around
the code with enum kCLOCK_McgFixedFreqClk so things work
correctly.
Signed-off-by: Kumar Gala <galak@kernel.org>
The ESP32 clock control for ESP32C3 was unified into a single
driver a while back. However the files associated with the
ESP32C3 didn't get removed than. Remove them now.
Signed-off-by: Kumar Gala <galak@kernel.org>
MISRA C:2012 Rule 14.4 (The controlling expression of an if statement
and the controlling expression of an iteration-statement shall have
essentially Boolean type.)
Use `do { ... } while (false)' instead of `do { ... } while (0)'.
Use comparisons with zero instead of implicitly testing integers.
The commit is a subset of the original auditable-branch commit:
5d02614e34a86b549c7707d3d9f0984bc3a5f22a
Signed-off-by: Simon Hein <SHein@baumer.com>
For the !SOC_I2C_SUPPORT_HW_CLR_BUS in which we implement bus
reset via GPIOs, change the devicetree properties to be actual
gpio properties and update the code to reflect this.
Signed-off-by: Kumar Gala <galak@kernel.org>
This commits refactors implementation of the pwm_set_cycles function
to fix the following issues:
- when a channel was already set with a non-zero pulse width, setting
cycles for another one required specifying a matching period value,
even if that value was to be ignored anyway when the channel was to
be set to constant inactive or active level; due to this limitation,
it was not possible to e.g. use the LED driver API and turn off a LED
while another one (within the same PWM instance) was blinking
- the above limitation also applied when a channel was set with a pulse
width equal to period (duty 100%); even though such channel was not
in fact using the PWM peripheral, other channels within the same PWM
instance were forced to use the same period
- after a PWM generation was started for a channel, it was not possible
to change its pulse width before two PWM periods passed (while it
should be possible to change it after every period); this was caused
by a looping mechanism that was unnecessarily activated in the PWM
peripheral
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
In update the Kconfig to depend on devicetree, the SAM4L
driver was missing a 'default y'.
Also remove unnecessary 'depends on GPIO'.
Signed-off-by: Kumar Gala <galak@kernel.org>
This commit adds required code to setup pll2 and pll3 as defined
in dts. Also these plls can now be used as alternate clock sources.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit changes the range for stm32u5 pll divider values
to allow divider value of 1.
- DIVQ is allowed to beconfigured 1 for all PLL instances
- DIVR can be 1 for PLL2 and PLL3, but is not valid for PLl1.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit controls the stream busy flag of the dma channnel
Set as true : stream is busy each time the channel is
started or reloaded.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
When the channel is overriden by the HAL,
the dma irq must always be handled (even if not busy).
Only when the dma channel is not overriden by the HAL
the irq is exiting when the channel is no more busy.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Intel ADSP CAVS is now a proper series with all CAVS SoCs running under
it. This will give us to Intel ADSP series:
- CAVS
- ACE v1.x
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The uart_pipe_isr() double-checks whether rx interrupt occured by
calling uart_irq_is_pending() first. Get rid of that function call since
it is redundant (i.e. nothing more is done or checked inside that
conditional).
Signed-off-by: Jan Kuliga <jtkuliga@gmail.com>
The VREFINT and TEMPSENSOR internal channels have a stabilization time
after they are enabled. Right now this just causes the first measure to
be a bit off, however with PR #47691 which stops the internal channels
after each readout, this is something important to respect. Fortunately
the stabilization time is available as constants in the HAL, so just
wait the time specified by the constants.
Note that the VBAT internal channel does not have any stabilization
time.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Replace Kconfig (IVSHMEM_DEV_NAME) based named device_get_binding
with DEVICE_DT_GET_ONE. Since there is only one driver for ivshmem
use the qemu,ivshmem for that.
Signed-off-by: Kumar Gala <galak@kernel.org>
The LPUART driver activates the "noise" error interrupt but
neglects to clear the error bit when the interrupt occurs. This
causes the device to freeze. Clear the "noise" status to avoid
the lockup and track instances of this as a UART_ERROR_PARITY.
fixes#47568
Signed-off-by: David Leach <david.leach@nxp.com>
This split the repeated START condition to STOP + START conditions.
The old implement may cause undefined behavior for gd32 i2c, like
enter STOP condition accidentally.
Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
Update memc drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update pinctrl drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Inside gpio_nrfx_pin_interrupt_configure, the "ch" variable is allocated
inside the "if", but then it gets dereferenced and the pointer saved in
trigger_config, which is used in the outer context.
This works fine right now, but that memory location could possibly be
reused by another automatic variable if the code gets changed.
Moving it in the function context to avoid any potential problem.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Update entropy drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update counter drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update spi drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update gpio drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
The regulator-pmic node is a child of the I2C device. When this
was converted to i2c_dt_spec that was missed.
Also fixed a few minor formatting issues.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update watchdog drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update serial drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update adc drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update pwm drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
This CL configures low-voltage (1.8V) detection via GPIO driver with
GPIO_VOLTAGE_1P8 flag. It also adds support for this flag in
pin_get_config() function.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Cleanup npcx low-voltage (1.8V) detection configuration. It removes
unused soc utilities, macros, and DT node. We will configure this
feature by GPIO driver with GPIO_VOLTAGE_1P8 flag later.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Update sensor drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
Signed-off-by: Kumar Gala <galak@kernel.org>
Declare clock control in the shim header per SoC and remove ifdeffry
from the driver simplifiying it and making it ready for the next
platform.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
using once single header to support multiple socs and product
generations is error prone and not easily maintained.
Over time we have been adding conditional code in headers and extending
structs to support new HW features which becomes a problem.
Goal is to keep platform headers in sync with hardware specification and
allow of introduction of new platforms and hardware features by just
introducing a new SoC with its own set of headers.
This is now just a copy of existing cavs-shim.h with slight changes,
goal is to clean this up long term and sync with hardware datasheets and
align on naming as well.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The driver has be DT_INST based for a while so the Kconfig
symbols CONFIG_UART_PL011_PORT0<n> aren't used. So lets
remove them.
Signed-off-by: Kumar Gala <galak@kernel.org>
The driver has be DT_INST based for a while so the Kconfig
symbols CONFIG_UART_RV32M1_LPUART_<n> aren't used. So lets
remove them.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update EEPROM drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Update CAN drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol to expose
the driver and enable it by default based on devicetree.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This patch fix issue with unmapping of virtual addresses mapped
to non-existing physical memory. MTL TLB table is initialised with
1:1 mapping, however virtual space is much wider than available
physical space. We should not try to free and manage of power for
non-existing physical pages.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Update serial drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
If TCP server closed notification is received it
could interrupt the TCP socket RX or TX data sequence.
Remove the SOCK_SERVER_CLOSED state and instead
use a unique error code to know if the socket
has been closed by the server.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Correct issue where transmission complete interrupt was not disabled when
using interrupt driven serial API with power management enabled,
resulting in continuous spurious interrupts that effectively locked
the system.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
If the transaction of write or read is divided into two transfers
(not two messages), the command queue mode does not support.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Rework the <BUS>_emul_register calls to not pass the name param. The
name param is only used for logging and we can get it from the
struct <BUS>_emul instead.
Signed-off-by: Kumar Gala <galak@kernel.org>
Having a per-instance init function makes code cluttered and hard to
read. Just create a per-instance IRQ connect function (required to
resolve IRQ_CONNECT parameters at compile time).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using NRFX_SPI(S|M)_INSTANCE helper so that peripheral address from
Devicetree is used. We should not rely on HAL for hardware description
but Devicetree.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Move the RX (MISO) delaying capability information to Devicetree. It is
done using 2 properties:
- rx-delay-supported: enabled on SPI nodes that support delaying RX.
This property can be used by the driver to determine if this
capability is supported or not on a given instance.
- rx-delay: the actual RX delay value
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The maximum transfer buffer length is SoC specific, not instance
specific. This patch defines MAX_BUF_LEN at driver level in a SoC
specific manner instead of using HAL values that are instance specific
but that always take the same value depending on the SoC.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The maximum transfer chunk length is SoC specific, not instance
specific. This patch defines MAX_CHUNK_LEN at driver level in a SoC
specific manner instead of using HAL values that are instance specific
but that always take the same value depending on the SoC.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Specify the overrun character in Devicetree. Since 0xFF is the most
common value, DT property contains such default.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Devicetree is the natural place to describe hardware, so move the
maximum frequency the SPI can work with to Devicetree instead of relying
on values from HAL.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
There are a few registers that map nicely onto structs. Switch from
using index constants and byte arrays in those cases.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Some panels using this driver don't provide tcon/cdi/pwr/softstart
values in their reference code. It is normally expected that the right
values will be loaded from OTP in such cases. Make these values
optional to support such panels.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The GD7965 driver uses malloc to allocate a single line buffer when
clearing the display. This buffer is used to clear the display line by
line. This as two problems. First, it means that the driver introduces
an unnecessary requirement to support heap allocations. Second, it
causes a lot of weird and unnecessary SPI transactions that look like
partial updates without the actual refresh. This is very inefficient
since the same action can be performed in a single SPI transaction.
Add a gd7965_write_cmd_pattern() helper function that writes a pattern
of a specified length to a register in the device.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The protocol used by the GD7965 driver requires that SPI transactions
are split into two phases, a command phase and a data phase, to change
the state of a GPIO signaling commands/data.
We currently don't lock the bus which means that other drivers could
potentially take over the bus and introduce unpredictable delays
between the command and data phase.
Add the necessary locking.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
DT nodes aren't guaranteed to define a label property. But emulated bus
controllers currently make use of this property to dispatch to the
associated emulator.
Have emulated bus controllers use DEVICE_DT_GET(node_id) to dispatch to
right target peripheral emulator. This also change makes emul_get_binding
and device_get_binding synonymous in behavior with respect to their
parameters.
This also strictly enforces a 1:1 correspondence between invocations of
DEVICE_DT_DEFINE and EMUL_DEFINE.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
In several locations of the emulator code there are unused function
arguments that were never caught.
Declare these as unused or remove the unused function parameters entirely.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Allow emulator creators to write an init function that can be used
across multiple busses so as to reduce the boilerplate and cognitive
load in creating an emulator.
Part of this change includes allowing access to the emul struct from a
field in a {bus}_struct api (e.g. i2c_struct), which removes the need for
sporadic usages of CONTAINER_OF to access the emul struct.
Overall, this change simplifies and reduces the amount of boilerplate
code to get a device emulator up and running, thus reducing excise work
to writing tests.
TEST=twister on accel,espi, and eeprom drivers tests
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Run clang-format on all files touched by improved emulator API pull-request
that allowed access to the target device emulator from its bus api without
CONTAINER_OF usage.
drivers/i2c/i2c_emul.c
drivers/spi/spi_emul.c
include/zephyr/drivers/emul.h
include/zephyr/drivers/espi_emul.h
include/zephyr/drivers/i2c_emul.h
include/zephyr/drivers/spi_emul.h
subsys/emul/emul.c
subsys/emul/emul_bmi160.c
subsys/emul/espi/emul_espi_host.c
subsys/emul/i2c/emul_atmel_at24.c
TEST=twister on accel,espi, and eeprom drivers tests
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Update video drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
Signed-off-by: Kumar Gala <galak@kernel.org>
Fix building this sample on bl5340_dvk_cpuapp_ns and
pinnacle_100_dvk. On these boards the NORDIC_QSPI_NOR
driver needs to be enabled for the sample to build.
Signed-off-by: Kumar Gala <galak@kernel.org>
The twim_config structure is no longer modified at runtime, so it can be
placed in driver's config (const).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
TWIM peripheral needs to be disabled for bus recovery, otherwise SCL/SDA
lines will not be released. This patch makes sure to disable peripheral
if active, and, restore its state afterwards (including pin
configuration).
It is worth to note that a better solution would be to:
1. Define scl/sda pins as `-gpios` in DT
2. Use GPIO API in the driver to perform recovery (as some other drivers
do)
3. Potentially use a "gpio" pinctrl state for this case
Unfortunately HAL is doing everything under the hood, so we have little
options to improve this unless we don't use it for such case. GPIO based
recovery should likely be generalized as many drivers seem to replicate
such _algorithm_.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Enable device runtime PM on the I2C driver. Note that this mechanism
replaces the old nrfx_twim_enable/disable calls with
pm_device_runtime_get/put, which means that driver will not save power
unless CONFIG_PM_DEVICE_RUNTIME=y.
Some quick measurements on thingy_52 running the samples/sensor/hts221
show a decrease of ~2-3uA in average when enabling device runtime PM.
Note that the driver already had implicit PM before, so the change for
users will be ~none, except that they now must enable the PM subsystem
features. While this case is not the best example, the PM subsystem will
turn to be beneficial as a whole when all devices in the board implement
it.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The device definition macro defined per-device init function, resulting
in a cluttered and hard to extend init function. Create a per-instance
IRQ connect function instead, which is called at init time by a common
function.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The driver already implemented some sort of runtime PM by
unconditionally calling nrfx_twim_disable/enable. Perform the same
operations in the PM callback instead of doing a full init/deinit every
time.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The driver re-initialized itself on the twim_transfer call if it wasn't.
This condition was likely added because of some manual/custom PM
schemes. Drop it in preparation for runtime PM.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
nrfx HAL does not support updating frequency at runtime, which means we
need to do a full init/deinit to update it when it is a matter of a
simple register write. Fix this by using the lower level HAL.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Move driver to use {NET_}DEVICE_DT_INST_DEFINE. This lets us
remove the IEEE802154_CC2520_DRV_NAME Kconfig symobl.
We also update the ieee802154 build_all test to actually enable
the CC2520 driver.
Signed-off-by: Kumar Gala <galak@kernel.org>
Move driver to use {NET_}DEVICE_DT_INST_DEFINE. This lets us
remove the IEEE802154_B91_DRV_NAME Kconfig symobl.
Signed-off-by: Kumar Gala <galak@kernel.org>
Any project with Kconfig option CONFIG_LEGACY_INCLUDE_PATH set to n
couldn't be built because some files were missing zephyr/ prefix in
includes
Re-run the migrate_includes.py script to fix all legacy include paths
Signed-off-by: Tomislav Milkovic <milkovic@byte-lab.com>
A LOG_DBG already exists for the underflow check,
and given that reading 0 edges is a valid case, remove
the noisy underflow log.
Signed-off-by: Andrew McRae <amcrae@google.com>
Check the frame ID type and RTR bit when comparing loopback CAN frames
against installed RX filters.
Fixes: #47904
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
When installing a RX filter, the driver uses "filter->rtr &
filter->rtr_mask" for setting the filter mask. It should just be using
filter->rtr_mask, otherwise filters for non-RTR frames will match RTR
frames as well.
When transmitting a RTR frame, the hardware automatically switches the
mailbox used for TX to RX in order to receive the reply. This, however,
does not match the Zephyr CAN driver model, where mailboxes are dedicated
to either RX or TX. Attempting to reuse the TX mailbox (which was
automatically switched to an RX mailbox by the hardware) fails on the first
call, after which the mailbox is reset and can be reused for TX. To
overcome this, the driver must abort the RX mailbox operation when the
hardware performs the TX to RX switch.
Fixes: #47902
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The Bosch M_CAN IP does not support RX filtering of the RTR bit, so the
driver handles this bit in software.
If a recevied frame matches a filter with RTR enabled, the RTR bit of the
frame must match that of the filter in order to be passed to the RX
callback function. If the RTR bits do not match the frame must be dropped.
Improve the readability of the the logic for determining if a frame should
be dropped and add a missing FIFO acknowledge write for dropped frames.
Fixes: #47204
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
For SAML21-based parts, the REFCTRL register is locked while the ADC is
enabled. Permit some parts to declare that they need the ADC to be
disabled before modifying REFCTRL.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
The built-in USB serial peripheral is a virtual serial and does not
allow to be configured like a normal UART.
Removing the unused UART config parameters.
Also reducing initialization to single-instance only.
Signed-off-by: Martin Jäger <martin@libre.solar>
This include is only required if typeof() macro is used, which
is not the case for the serial / uart driver.
Signed-off-by: Martin Jäger <martin@libre.solar>
Since this DAC is connected via I2C bus the init priority
value must be higher than the default 50 so it can be initialized
later than the bus itself so add a dedicated init config
symbol for that.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
Since this DAC is connected via I2C bus the init priority
value must be higher than the default 50 so it can be initialized
later than the bus itself so add a dedicated init config
symbol for that.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
Since this DAC is connected via I2C bus the init priority
value must be higher than the default 50 so it can be initialized
later than the bus itself so add a dedicated init config
symbol for that.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
Since this DAC is connected via SPI bus the init priority
value must be higher than the default 50 so it can be initialized
later than the bus itself so add a dedicated init config
symbol for that.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
irq_lock() returns an unsigned integer key.
Generated by spatch using semantic patch
scripts/coccinelle/irq_lock.cocci
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
HDA is a common IP used across the entire ADSP line and deserves
a name respecting that alongside similiar IP drivers such as the
ADSP GPDMA driver.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
There is is an error in the way that the sock id is
determined. A unique fd is reserved and assigned appropriatly, but
the id, which should correspond to a socket number within the modem,
is set to an invalid, and identical for all sockets, value, and then
not used appropriatly in the drivers, instead, the sock_fd is used,
which can be any value really, it is not related to the socket number
in any way.
This results in the drivers only working if the reserved fd happens
to be between base_socket_num and (socket_len - 1)
This patch assignes the id to the index of the socket + the
base_socket_num, the socket at index 0 will get the id 1 if the
base_socket_num is 1, and the modem_socket_from_id should then
be used to get a pointer to the socket, since the id is not
neccesarily equal to the index.
The FIXME has been solved by adding a note both at the start
of the modem_socket_get function and inside the Kconfig file
for the MODEM_SOCKET option description. It is not an error,
but the user must be aware that it uses the POSIX file
descriptors, for which only 4 are allocated by default.
This patch fixes the bug, without breaking the brittle modem
drivers which currently are built around this bug.
The modem drivers should be updated to use the id as the
socket num instead of the sock_fd after this fix has been merged.
The "socket # needs assigning" has been removed, as that is what
this patch is doing
I also added comments to the id and sock_fd in the modem_socket
structure to help developers use the id and fd appropriately.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
Convert driver to use DEVICE_DT_INST_DEFINE. Its already devicetree
based so trivial change over to use DEVICE_DT_INST_DEFINE.
Signed-off-by: Kumar Gala <galak@kernel.org>
Add simple clock control node in devicetree for beetle to handle
relationship between drivers (uart, timers, gpio) and clock controller
device.
Signed-off-by: Kumar Gala <galak@kernel.org>
Use DT_INST_FOREACH_STATUS_OKAY to reduce duplicated code for each
instance.
We make interrupts optional since they aren't always available.
Signed-off-by: Kumar Gala <galak@kernel.org>
Remove Kconfig symbols that determine which instances and just use
the number of enabled instance in the devicetree to determine which
instances to build.
Signed-off-by: Kumar Gala <galak@kernel.org>
Remove dead clock gate code and associated PM code as the platforms
that used the clock gate code are no longer supported in Zephyr.
Signed-off-by: Kumar Gala <galak@kernel.org>
The shared IRQ code has been broken for several releases and no one
seems to have noticed. The platforms that this was used on are not
supported in Zephyr anymore so remove the code.
Signed-off-by: Kumar Gala <galak@kernel.org>
Replace sensor_label property in devicetree with just a sensor phandle
property. This is more generic and allows driver to use DEVICE_DT_GET
instead of device_get_binding.
Signed-off-by: Kumar Gala <galak@kernel.org>
Fixes configured DMA direction for HDA link in/out drivers.
Adjusts the number of channels for link in/link out to safe value
that seems to work on all tested parts.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
This patch corrects the initial unmapping of unused l2 memory
to unmap until the end of virtual address space instead
of unmapping until the end of l2 physical memory.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
This patch introduces sys_mm_drv_move_region implementation
which stops usage of the sys_mm_drv_simple_move_region.
The sys_mm_drv_simple_move_region is unsuitable becuase
it iterates through physical pages in linear fashion.
The new implementation queries the tlb for each virtual
page of the requested region to find the physical page
to be remapped.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
The SSD16xx driver needs to wait for the chip to complete commands
before issuing new commands. The datasheet doesn't specify which
commands cause the chip to raise the busy pin. The current driver has
ssd16xx_busy_wait() calls after commands that are known to take a long
time. This is very fragile and scatters a lot of boiler plate around
the driver.
Include an ssd16xx_busy_wait() call in ssd16xx_write_cmd() instead of
after commands that are suspected to take a long time. This makes the
driver more robust and is more in line with the expectations set out
in the data sheet.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
There are cases when attributes of mapped virtual memory need
to be updated. E.g. in case there is loadable library/module
code loaded to the l2 memory then memory needs to be read-write.
After the code is loaded and is ready to be executed then
attributes of mapped memory should be updated to
read-only/executable without loosing memory contents.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Refactors counter driver code, bringing:
- more readability through the removal of abused macros
- better use of the devicetree, by moving peripheral node's
info defined on macros and Kconfigs to dts bindings
- less dependence from dynamic allocations, making counter
instances fully statically-allocated
- better use of DT_INST_* macros
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
Move the CAN bus network driver from drivers/can to drivers/net as it
implements a network driver, not a CAN controller driver.
Use a separate Kconfig for enabling the CAN bus network driver instead of
piggybacking on the SocketCAN Kconfig. This allows for other
(e.g. out-of-tree) SocketCAN transports.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Implement support for display blanking by inhibiting display refresh
while blanking is on. Writes to the display are still sent to the
internal RAM in the display controller. Once blanking is turned off,
the contents of the RAM are written to the display. This behavior is
makes it possible to compose a frame buffer in the display controller
without flickering.
Other e-paper drivers such as the GD7965 already implement this
behavior.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Adding command queue mode can reduce the time between each byte to
improve the I2C bus clock stretching during I2C transaction.
I2C command queue mode of it8xxx2 can support I2C APIs including:
i2c_write(), i2c_read(), i2c_burst_read.
Test:
1. tests\drivers\i2c\i2c_api --> pass
2. Reading 16 bytes of data through i2c_burst_read() can reduce
0.72ms(2.54ms->1.82ms) compared to the original pio mode when the
frequency is 100KHz.
3. krabby platform can boot normally.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Simplify the implementation by using gpio_dt_spec.
As part of this use logical values of 0/1 for gpio_pin_set_dt
and handle any inversions as GPIO flags that might be required
at a board level (in dts config).
Signed-off-by: Kumar Gala <galak@kernel.org>
Implement support for half duplex communication in the bit bang SPI
driver. The SPI driver will use the MOSI pin is for both TX and RX
operations when using half duplex mode.
In half-duplex mode, the driver configures the MOSI pin as an input
pin for input only transactions. Transactions that are bidirectional
are forbidden. After an SPI transaction, the MOSI pin is left as an
input if it was an RX transaction or an output after a TX
transaction. Like before, the MOSI pin is initialized as an
(inactive) output pin when the bus is initialized.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Add API function for getting the supported capabilities of a CAN
controller. This allows for writing portable CAN applications.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Switch from using a driver-specific, compile-time devicetree one-shot
property to supporting the newly added CAN_MODE_ONE_SHOT flag for
enabling/disabling one-shot mode at run-time.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Remove the support for enabling passthrough mode support for MPU9150
on the AK8975. We don't have a proper MPU9150 driver and the MPU9150
has been EOL. So its highly unlikely this code is being used.
Additonally we remove the device tree binding for the MPU9150 since
we don't have a proper driver for it.
Signed-off-by: Kumar Gala <galak@kernel.org>
Add gpio_pin_get_config function to gpio_driver_api.
This function is used to read current configuration of pin.
The gpio_pin_get_config checks if driver implements this function and
returns -ENOSYS if it isn't implemented.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Custom accessors like HAL_INSTANCE() have been gradually removed
in-tree. Instead, store a pointer with the right type (struct pwm_reg
*).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Register was wrongly casted to (void *) in one case, and unnecessarily
casted in another case.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The base variable type stored in config already has the right type. Such
kind of accessors have been removed in many other places.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In some case the structure enclosing the adc context
can be quite big, making static initialization quite
resource consuming
Signed-off-by: Guillaume Lager <g.lager@innoseis.com>
Enabling the FlexSPI HyperRAM results in a build error, due to a logging
module re-definition. Fixed by changing the log module name.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
increase available RX buffers to MCUX ethernet driver.
improves measured performance on RT1050 EVK zperf download
from 500Kbps to 22Mbps.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This patch extends the adxl362 driver by adding an option
to change the inactivity detection timeout at runtime.
Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
Building lwm2m_client with CONFIG_NET_L2_OPENTHREAD=y leads to
following warning during build:
west build -s samples/net/lwm2m_client -b nrf52840dk_nrf52840 -- \
-DCONFIG_NET_L2_OPENTHREAD=y
zephyr/drivers/sensor/nrf5/temp_nrf5.c:115:10:
warning: zero-length gnu_printf format string [-Wformat-zero-length]
115 | LOG_DBG("");
Signed-off-by: Kiril Petrov <retfie@gmail.com>
CONFIG_SIFIVE_SPI_0_ROM (default y) was an option to disable spi0 if
used to access SPI Flash ROM. However, its design had a problem: it
relied on instance numbers. You had to set status okay for spi0 to make
it work (incongruent with the purpose of the option itself). This patch
makes things simpler: if such SPI0 is not available, simply keep it
disabled in DT. Bindings have been updated to mention this case.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use logical values of 0/1 for gpio_pin_set_dt and handle any
inversions as GPIO flags that might be required at a board level.
Signed-off-by: Kumar Gala <galak@kernel.org>
Introduce a new RISCV_HAS_CLIC symbol for platforms using CLIC,
reorganize the Kconfigs and make the Nuclei ECLIC depending on the new
symbol.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
When using the settings subsystem, the data argument argument passed to
flash_stm32_write_range() might not be 8-bytes aligned, causing an
unaligned memory access fault.
Fix that the same way as it was done for the STM32L4 in commit
652efa530f.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Now that we have 8 bits reserved for vendor specific GPIO flags,
introduce a new set of flags for nRF platforms to configure pins drive
mode. These new flags are equivalent to the previous existing ones, but
use a naming scheme the fits better with vendor hardware capabilities.
The table below shows the equivalence between old and new flag
| Old flags | New flags |
|---------------------------|-----------------------|
| `NRF_GPIO_DS_DFLT_LOW` | `NRF_GPIO_DRIVE_S0` |
| `NRF_GPIO_DS_DFLT_HIGH` | `NRF_GPIO_DRIVE_S1` |
| `NRF_GPIO_DS_ALT_LOW` | `NRF_GPIO_DRIVE_H0` |
| `NRF_GPIO_DS_ALT_HIGH` | `NRF_GPIO_DRIVE_H1` |
| `NRF_GPIO_DS_DFLT` | `NRF_GPIO_DRIVE_S0S1` |
| `NRF_GPIO_DS_ALT` | `NRF_GPIO_DRIVE_H0H1` |
| `NRF_GPIO_DS_DFLT_LOW \|` | `NRF_GPIO_DRIVE_S0H1` |
| `NRF_GPIO_DS_ALT_HIGH` | |
| `NRF_GPIO_DS_ALT_LOW \|` | `NRF_GPIO_DRIVE_H0S1` |
| `NRF_GPIO_DS_DFLT_HIGH` | |
Documentation has been written to explain in more detail the meaning of
the flags and how they can be used.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The naming of the custom DS flags is not clear for nRF platforms. This
patch removes all the NRF_GPIO_DS* flags. New flags will be
re-introduced in a follow-up commit.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit avoid re-enabling the ADC,
because this starts conversion.
According to the RefMan (RM0008) of the stm32F10x mcu,
enabling the ADC will start the conversion
if the ADC is already enabled. "Conversion starts when
this bit holds a value of 1 and a 1 is written to it."
That's not what we want.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
cAVS and ACE gpdma driver have several similarities. This commit merge
this two drivers into a single one for Intel ADSP devices.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
When using the APIC imer in TSC deadline mode, also enable reading the
full 64-bit cycle counter value (via the k_cycle_get_64() call).
Signed-off-by: Bruno Achauer <bruno.achauer@intel.com>
When PINCTRL is enabled, the SCL and SDA pin numbers are not available
in configuration structures used for nrfx drivers initialization.
In this case, these pin numbers need to be obtained from peripheral
registers.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Uses the dt_compat_enabled Kconfig preprocessor to set defaults
for each HDA driver.
Each direction is uniquely selectable which can be useful when building
with SOF where only some directions may wish to be enabled at any given
time.
By default, given the device tree (intel_cavs.dtsi) only the host
directions are enabled but an overlay may adjust that as needed.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Not all platforms support setting the LSE driving capability, causing
the build to fail for platform such as the STM32L072 if compiled with
CONFIG_STM32_LPTIM_CLOCK_LSE=y.
Adding an #ifdef guard around the call to skip it if not defined in the
HAL.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
In npcx series, not all GPIO pads support Multi-Input Wake-Up Unit
(MIWU) functionality. Hence, this CL adds checking whether GPIO's pad
configuration is valid first before using it.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Simplify the implementation by using gpio_dt_spec. Mostly
gpio_dt_spec is used as a common struct and lets us move
away from DT_INST_GPIO_LABEL.
Signed-off-by: Kumar Gala <galak@kernel.org>
Some stm32 devices, like stm32F4, do not have
a PLL Enable bit on the PLLP nor PLLQ divider
in their PLL config register (PLLCFGR).
The result is a empty function.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The function get_pllsrc_frequency is added
with possible source HSI or HSE.
With STM32_PLL_P_ENABLED or STM32_PLL_Q_ENABLED,
this function is used by the clock control driver.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The TI SimpleLink SDK got updated to version '4.40.04.04' in 'hal_ti'.
This introduced renames of some functions in HAL and has to be reflected
in Zephyr drivers which make use of them.
This renames 'PRCMPowerDomainStatus' to 'PRCMPowerDomainsAllOn' in all
affected 'cc13xx_cc26xx' drivers.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
The hwinfo shell commands was missing human readable names for
* RESET_HARDWARE
* RESET_USER
* RESET_TEMPERATURE
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
This CL introduces how to configure PSL (Power Switch Logic) pads
properties such as input detection mode/polarity, pin-muxing and so
on via pinctrl mechanism. It includes:
1. Add two pinctrl properties and their enums for PSL input
detection configuration.
psl-in-mode:
- "level"
- "mode"
psl-in-pole:
- "low-falling"
- "high-rising"
2. Add macro functions to get PSL input detection and pin-muxing
configurations from 'pinmux', 'psl-offset' abd 'psl-polarity'
properties.
Here is an example to configure PSL_IN2 as the PSL detection input and
its mode and polarity.
/* A falling edge detection type for PSL_IN2 */
&psl_in2_gp00 {
psl-in-mode = "edge";
psl-in-pol = "low-falling";
};
A device will be introduced later which uses this pinctrl node to
configure PSL input detection settings and how to turn off VCC1 power
rail by PSL_OUT.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This peripheral combines a hardware-based USB CDC ACM serial interface
and a JTAG interface.
It is present in the ESP32-C3.
Signed-off-by: Martin Jäger <martin@libre.solar>
The uart_pipe driver is not dependent on any console driver,
however a serial driver is required.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
These two timers were sharing pretty much the same code. Actually
mtl timer was a "superset" of cavs timer. Just merge them into a
single one called intel audio dsp timer (intel_adsp_timer).
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Meteorlake support as part of the Intel ADSP family.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Co-authored-by: Michal Wasko <michal.wasko@intel.com>
Co-authored-by: Konrad Leszczynski <konrad.leszczynski@intel.com>
Co-authored-by: Rafal Redzimski <rafal.f.redzimski@intel.com>
Co-authored-by: Enjia Mai <enjia.mai@intel.com>
Co-authored-by: Flavio Ceolin <flavio.ceolin@intel.com>
Co-authored-by: Tomasz Leman <tomasz.m.leman@intel.com>
Co-authored-by: Bonislawski Adrian <adrian.bonislawski@intel.com>
Co-authored-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
Co-authored-by: Andrey Borisovich <andrey.borisovich@intel.com>
Add timer driver based on CAVS driver and adapted for Meteor Lake.
Co-authored-by: Michal Wasko <michal.wasko@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add TLB driver specific for Meteorlake.
Add missing kconfig resource and fix include path
add hpsram power up and ref counter
Use memblock to track physical page usage in mtl tlb driver. The
applications that will be using the tlb memory driver should not
track the physical page mapping to virtual address space:
- adds an option to use the phys argument value of 0 to tell the
driver to autonomously assign physical pages upon map request
- makes the tlb driver use memblock to track mapped physical pages
Co-authored-by: Rafal Redzimski <rafal.f.redzimski@intel.com>
Co-authored-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Co-authored-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
Co-authored-by: Michal Wasko <michal.wasko@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Following zephyr's style guideline, all if statements, including single
line statements shall have braces.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Replace eswifi_gpio with gpio_dt_spec. We can replace devicetree
label based access with this change as we try and phase out the
usage of the 'label' property.
Signed-off-by: Kumar Gala <galak@kernel.org>
when the dma channel is stopped, the irq is no more
relevant ; clear any irq but do not process it.
Fix Typo on comments and add LOG_DBG on channel increment.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The SSD16xx uses a separate pin to indicate if an SPI transfer is a
command or data. This means that driver needs to split most SPI
transactions into two distinct transactions, one for commands and one
for data. The driver currently doesn't request SPI_HOLD_ON_CS which
means that the chip select will be released momentarily between the
command and data phase.
Update the driver to request SPI_HOLD_ON_CS and SPI_LOCK_ON to lock
the bus and complete both phases of a command in one atomic operation.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
spi_context_cs_configure_all() is currently called from
spi_bitbang_transceive(). This causes a glitch when combined with
SPI_HOLD_ON_CS is used.
Move the initialization to spi_bitbang_init which is what the other
SPI drivers seem to do.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The SPI bitbang driver doesn't correctly initialize the list of CS
GPIOs. As a consequence, SPI buses using the bitbang driver won't
drive CS low. Add the missing initialization.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Get the vref-mv through the ADC API instead of the device tree. This
saves 8 bytes of SRAM and will be future proof in case, one day, support
for a variable vref is added.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The value is unused in this structure is unused and can be accessed
through the adc_ref_internal() function.
This saves 4 bytes of SRAM.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Allow the battery voltage to be read through the ADC even if the
CONFIG_STM32_VBAT driver is not enabled.
I guessed this part of code is conditionally compiled depending on
CONFIG_STM32_VBAT because this feature, and hence the
LL_ADC_CHANNEL_VBAT constant is not available on all families. As the
feature is already checked at runtime (as the same driver supports
multiple instances), we can conditionally compile it depending on
LL_ADC_CHANNEL_VBAT instead.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This adds basic support for the watchdog timer on the RP2040 MCU and
Raspberry Pi Pico development board
Signed-off-by: Jamie McCrae <spam@helper3000.net>
When we moved to gpio_dt_spec forgot to remove the older
fields used for gpio related access. Remove them as they
are used by the driver anymore.
Signed-off-by: Kumar Gala <galak@kernel.org>
When an I2C transaction completes, the driver should clear all the FIFO
status. Otherwise, it has the chance to break the operation of the next
transaction. This commit sets the CLR_FIFO bit in the SMBFIF_CTS
register to clear all the FIFO status at the beginning of an I2C
transaction.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Invert the physical address given to pcie_ctrl_region_translate() to
match the PCI BAR layout. Previously, physical addresses for memory
space BAR were exposed to bit 3 (prefetchable bit) and 2 (1 type bit) of
the header.
Signed-off-by: Rodrigo Cataldo <rodrigo.cataldo@huawei.com>
Move driver to use spi_dt_spec and i2c_dt_spec for SPI and I2C bus
access, respectively.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
As we work to phase out devicetree 'label' properties, convert
driver to just use ETH_0/ETH_1 instead of DT_INST_LABEL for
logging purposes.
Signed-off-by: Kumar Gala <galak@kernel.org>
This commit adds support for the ds18b20 1-wire temperature sensor.
The sampling resolution of the sensor can be set in DT.
In case only a single device is on the bus, the driver issues
skip_rom commands. However, in case DT defines several devices,
the driver will use match_rom commands and therefore it is necessary
to set the rom_id of the device via the sensor attribute interface before
being able to sample sensor values.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The zephyr-serial w1 driver introduced in this commit implements
all routines for the w1 api on top of the zephyr serial driver.
W1 bit read, write, and reset operations are executed by issuing
polling zephyr serial byte read and write operations.
The driver should be usable on most platforms in zephyr that have
implemented support for the polling procedures of the serial driver.
As not all serial drivers are implemented exactly the same minor
additional quirks may be needed on some platforms.
The most notable difference of polling serial driver implementations
seems to be that some return immediately from poll_out after the
transmission was started(e.g. STM32) and others wait until
the transmission was completed before returning from poll_out
(e.g. NRF). While this has influence on the timeout, both types
are supported by this driver because the driver waits for a
configurable time period until it terminates the read.
The driver needs an appropriate open drain interface to be able
to communicate with slaves.
In the simpliest case this might be achived by configuring the mcu pins
in open-drain configuration with a (sufficiently small) pull-up to 3V3/5V.
Otherwise an external circuit needs to provide this interface.
Overdrive and Standard Speed modes are supported by this driver.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit introduces a new api for the net layer of Dallas
1-wire protocol.
For single drop configurations w1_read_rom, and w1_skip_rom commands are
provided.
For multidrop configurations w1_match_rom, w1_resume_command,
w1_search_rom, and w1_search_alarm routines are provided as well.
Additionally, the reset_select routine, conditionally depending on the
bus configuration, either executes a match_rom, or a skip rom command.
A w1_write_read command simplifies the typical scenario of addressing
a device, writing a few bytes to the device and reading back the answer.
Additionally w1_crc8, and w1_crc16 are added as wrappers around the
zephyr in-tree crc8 and crc16_reflect implementations.
The former may be used to verify the validity of the rom id, while the
latter is used for integrity checking of many eeprom, and authenticator
commands.
The general search command does not support filtering on
the family code.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit introduces a new api for the Dallas 1-wire protocol.
The api includes link functions for read and write operations on
bit, byte, and block level, as well as functions to reset and
lock the bus.
The bus configuration is derived from the device tree and can be
queried using w1_slave_count routine.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Add a minimal EFI console driver to support printf, this console driver
only supports console output. Otherwise the printf will not work.
Signed-off-by: Enjia Mai <enjia.mai@intel.com>
This patch is to enhance the uart ns16550 driver to get clock frequency
from clock manager or devicetree if clock_frequency is defined.
Signed-off-by: Teik Heng Chong <teik.heng.chong@intel.com>
The default S0S1 drive setting is not suitable for TWI/TWIM pins.
Override it with S0D1 as for some SoCs (e.g. nRF52833) without
this the peripheral will not work properly.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Fix indentations of `adc_stm32_oversampling` function comments
to have everything aligned properly.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
According to the ES0418 about the ADC of the stm32G071
or other stm32g0x devices:
for sampling time set to 1.5 or 3.5 cycles,
the sampling in a single ADC conversion or in the first
conversion of a sequence takes one extra cycle.
Minimizing to 7.5 is fine.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
- If the HAL headers expose the USBPRE flag, then we're probably
dealing with a F103 - using the same fundamental logic as the
code for the OTG models, set-up the USB Prescaler correctly.
- Fixes#47146
Signed-off-by: Chris Collins <chris@realsimgear.com>
TCA954X driver was not enabled since introduction of
new compatibility fields.
We now set I2C_TCA954X depending on related "okay"
compat fields in DT.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
After replacing STM32_SRC_PLLCLK by the STM32_SRC_PLL_x sources
this function is no longer needed and are therefore removed.
Also, those functions returned a wrong frequency.
They should have used get_pllsrc_frequency() instead of get_pll_source()
to get the input frequency.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The SOC specific implementations of the clock_stm32_ll_common driver
included the PLL specific functions only when PLL was selected as sysclock.
This commit changes the condition from "STM32_SYSCLK_SRC_PLL"
to "defined(STM32_PLL_ENABLED)".
As a result the pll could also be used as peripheral clock source
in case it is not the sysclock.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit adds support to select pll outputs as peripheral clock
sources to the stm32 common driver.
With this commit they are only available on
STM32G0, STM32G4, STM32L4, STM32L5, STM32WB, and STM32WL.
Support for STM32F2, and STM32F4, which also have p,q,r dividers,
is not enabled in this commit.
Also, stm32_clock_control_get_subsys_rate is extended to return
the configured frequency in case they are enabled, otherwise 0.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit configures the PLL_P divider for SOCs compatible to the
stm32_ll_common driver in case a value was defined via a dts property.
Additionally, in case the divider value is defined in the device
tree, the respective pll output is enabled during initialization
in set_up_plls().
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
In the stm32_ll_common driver the PLL_Q divider should not
be directly written to RCC->PLLCFGR->PLLQ, but should be
translated to the matching register value.
i.e. shifting the value to the correct position of the register
is not enough.
This commit makes sure the divider value taken from device tree, is
correctly translated ot the matching register register value by
converting it to a STM32CUBE LL definition LL_RCC_PLLQ_DIV_xx.
Typcial divider to register value mapping:
G0, WB, WL:
Dividers 2-8 mapped to register values 1-7(0 reserved).
G4, L4, L5:
Dividers 2,4,6,8 mapped to reg values 0,1,2,3.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
All these series share the same defines, and while they are not used
by all socs of the common-driver, this is not exptectd to lead to
any conflict.
By moving the defines they can also be used in clock_stm32_ll_common.c
Additionally, the stm32g0 pll_div define was renamed to pllm
in order to match the other series.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The STM32_SRC_CLOCK_MIN and STM32_SRC_CLOCK_MAX defines
are not really needed because non valid clock sources are already
filtered out by the precompiler.
Only STM32_SRC_CLOCK_MIN was used once in code and can be replaced.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit fixes a bug where an already received Rx frame could not be
processed by the IEEE 802.15.4 driver.
In the current implementation, buffer is marked as free and released to
the buffer pool after `nrf_802154_buffer_free_raw` finishes executing.
However, delays caused by thread scheduling might result in a new frame
being already received and provided to the driver before
`nrf_802154_buffer_free_raw` returns. Such a situation ends in an
assertion now.
This commit changes that behavior by marking the buffer as free before
calling `nrf_802154_buffer_free_raw`.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
This commit increases verbosity of serialization error handler for
nRF5340 application core. The handler prints the error code now.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
As we work to phase out devicetree 'label properties, convert
driver to just use dev->name instead of DT_INST_LABEL.
Signed-off-by: Kumar Gala <galak@kernel.org>
Instead of using or'ed list of Kconfig options listing the compatible
series with what can be called "stm32h7 variant", use the matching
compatible information.
This will prevent to update the driver next time that a compatible series
is ported into zephyr.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
If the preprocessor constant ESP_MAX_DNS is defined as 0,
Coverity reports a condition that can never be true, and some
dead code as well. This also violates MISRA rules on dead code.
This is caused by this segment in drivers/wifi/esp_at/esp.h:
#if defined(CONFIG_WIFI_ESP_AT_DNS_USE)
#define ESP_MAX_DNS MIN(3, CONFIG_DNS_RESOLVER_MAX_SERVERS)
#else
#define ESP_MAX_DNS 0
#endif
Fix this by never setting ESP_MAX_DNS to 0, as is the currently
case. Define ESP_MAX_DNS only if it is configured through
CONFIG_WIFI_ESP_AT_DNS_USE and CONFIG_DNS_RESOLVER_MAX_SERVERS:
#if defined(CONFIG_WIFI_ESP_AT_DNS_USE)
#define ESP_MAX_DNS MIN(3, CONFIG_DNS_RESOLVER_MAX_SERVERS)
#endif
Since CONFIG_DNS_RESOLVER_MAX_SERVERS is 1 or greater, ESP_MAX_DNS
will always be greater than 0.
If, on the other hand, ESP_MAX_DNS is not defined, relevant
functions will be reduced to empty stubs, since in that case
they do not make sense.
There could be a cleaner solution to this, but this one is the
least intrusive (involves less code changes).
Coverity-CID: 219490
Coverity-CID: 219513
Coverity-CID: 219520
Coverity-CID: 219524
Signed-off-by: Aleksandar Markovic <aleksandar.markovic.sa@gmail.com>
Some EFR32 SoCs use a secure element subsystem to manage
security features (i.e., TRNG, secure bootloader or cryptographic
functions).
This driver relies on the SE Manager high-level API provided by Silicon
Labs. The API interacts with the SE subsystem, provides helper functions
to achieve cryptographic operations and ensures that only one operation
is running at a time by using mutexes and semaphores.
Instead of relying on the SE Manager from Silicon Labs, one could
recreate the behaviour of the Manager and put the code in the crypto
driver folder and create a dependency for other drivers using the crypto
manager (e.g., keys, entropy).
I went for the SE Manager API as it is already there and supported by
Silicon Labs.
Tested using the random subsystem.
Signed-off-by: Steven Lemaire <steven.lemaire@zii.aero>
The clock of the octospi peripheral is directly defined
by the DTS and configured by the clock_control_on function.
No specific stm32cube function is required then.
The clock control is taking this clock source to calculate
the clock rate.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Move from using Kconfig NET_PPP_UART_NAME to a devicetree chosen
property ("zephyr,ppp-uart"). This is similar to a number of other
functions like "zephyr,shell-uart" or "zephyr,bt-uart".
As part of this we rework the init code a little to use
DEVICE_DT_GET for the modem gsm-ppp case.
Signed-off-by: Kumar Gala <galak@kernel.org>
Rather than using a devicetree node label, utilize the driver
compat and thus DT_INST which is standard means for most drivers.
Signed-off-by: Kumar Gala <galak@kernel.org>
There is a build warning of unused `adc_stm32_oversampling_ratioshift`
function: [-Werror=unused-function]. This makes twister fail, as all
warnings are treated as errors.
Fix that by ifndef'ing adc_stm32_oversampling_ratioshift().
Fixes: c57a41c5d2 ("drivers/adc: stm32: do not disable the ADC if
resolution is unchanged")
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
As we work to phase out devicetree 'label' properties, convert
driver to just use sx126x instead of DT_INST_LABEL for logging
purposes.
Signed-off-by: Kumar Gala <galak@kernel.org>
Move the `REQUIRES_FULL_LIBC` dependency from `config LORA` to
`config LORAWAN`. The commit that added the `select` (f590d4fa) mentions
that this is required by `loramac-node`, which is only used by LoRaWAN,
not the base LoRa code.
This results in small FLASH savings when compiling the samples, but can
result in larger savings in more complex applications:
```
// With REQUIRES_FULL_LIBC
west build -b 96b_wistrio zephyr/samples/drivers/lora/send/
[162/162] Linking C executable zephyr/zephyr.elf
Memory region Used Size Region Size %age Used
FLASH: 37708 B 128 KB 28.77%
SRAM: 8832 B 32 KB 26.95%
IDT_LIST: 0 GB 2 KB 0.00%
// Without REQUIRES_FULL_LIBC
[181/181] Linking C executable zephyr/zephyr.elf
Memory region Used Size Region Size %age Used
FLASH: 37444 B 128 KB 28.57%
SRAM: 8832 B 32 KB 26.95%
IDT_LIST: 0 GB 2 KB 0.00%
```
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Change logic in `modem_cmd_handler_setup_cmds` and
`modem_cmd_handler_setup_cmds_nolock` to always sleep
after each sent AT command.
The issue was found using a logic analyzer while debugging 'NO CARRIER'
from a BG95 modem while being in data mode.
The reason 'NO CARRIER' occured was due to crosstalk to DTR which
terminated data mode.
The logic analyzer also revealed that without the delay the next AT
command is sent before the whole 'OK\r\n' is received. This is not
addressed in this commit.
Fixes https://github.com/zephyrproject-rtos/zephyr/issues/47082
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
In prepration for configuring I2C/SPI defaults at the board level,
change the DesignWare GPIO driver's clock gate option to depend on clock
control instead of selecting clock control. This breaks a Kconfig
dependency loop when adding the following to a board's
Kconfig.defconfig:
config SPI
default y if SENSOR
There aren't any in-tree users that enable the clock gate option, so
there aren't any places in-tree that now need to enable the clock
control driver. Out-of-tree users that set CONFIG_GPIO_DW_CLOCK_GATE=y
will now also need to set CONFIG_CLOCK_CONTROL=y.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
In preparation for extending samples/sensor/magn_polling to support
additional magnetometer drivers, enable these drivers by default when
the sensor driver class is enabled (CONFIG_SENSOR=y) and a compatible
devicetree node is enabled.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
The fxos8700 device supports 3 modes: accelerometer-only,
magnetometer-only, or hybrid (accelerometer and magnetometer) modes. The
accelerometer-only mode is register compatible with mma8451q, mma8652fc,
and mma8653fc, which allows the fxos8700 driver to be used with these
devices as well.
Most in-tree boards can use hybrid mode because they have the fxos8700
device, therefore we change the driver default to match the common case.
For the handful of boards that have an mma86xx or mma84xx device, we
override the driver default to accelerometer-only mode. As a result, we
can enable the magn_polling sample application for the fxos8700 driver
without having to add a bunch of board-specific configuration overlays
for hybrid mode.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
The I2C API recently updated terminology to replace "master" with
"controller", but this instance in the mcux lpi2c driver was missed.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
If hw-flow-control is set in the uart section of the device tree source,
it is read by gsm_ppp.c and AT+IFC=2,2 is sent to the modem.
Fixes https://github.com/zephyrproject-rtos/zephyr/issues/46928.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Fix issue #45168.
When setting high bit timing, the controller is timing
out when trying to switch from an internal mode to another.
To fix this issue, we add some delay when switching modes.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Fix issue #45169.
With this CAN controller, changing bit timing has to be done in controller
reset mode, resetting some registers to their default values.
TCR register, that is enabling loopback mode is one of these.
Because of this reset, the controller switch back from loopback
to normal mode without the test suite being notified, preventing
receiving sent frames afterwards.
To fix this issue, we are now storing useful registers values before
switching to reset mode and restoring these values in halt mode
before going back in operation mode.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Default mode must be debug or it can't ever be enabled.
Allow debug log messages to be printed when using
mdm_hl7800_send_at_cmd API.
Add logging to active bands and network coverage commands.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
According to the formulas found in the reference manuals of the SoC
families using the "st,stm32-temp-cal" version of the temperature sensor
(i.e. G0, G4, H7, L0, L1, L4, L5, U5, WB, WL), the temperature is
computed with the following formula:
T = ((TS_CAL2_TEMP - TS_CAL1_TEMP) / (TS_CAL2 - TS_CAL1))
* (TS_DATA - TS_CAL1) + TS_CAL1_TEMP
What is called ts-cal-offset in the stm32_temp driver is therefore the
same value as TS_CAL1_TEMP1. Use it directly instead of defining another
property.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The stm32_temp driver defines the ts-voltage-mv property to determine
the reference voltage of the ADC in the temperature computation. However
this information is already available in the device tree at the ADC
level (even with the same default value). Use it through the ADC API
instead of duplicating the information.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The AIVECT (All Interrupt Vector Register) register provides us a quick
way to determine SOC interrupt number. But sometimes we get interrupt
number 0 from the register and caused assertion of unhandled interrupt.
To avoid the assertion, we look for all ISRs (Interrupt Status Register)
and IERs (Interrupt Enable Register) to find the highest priority pending
interrupt and return it to caller.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Using a global error flag could lead to an error on one
socket appearing as an error with a separate socket instance.
Socket errors moved into the socket context.
Continue to use global error flag for commands not
related to sockets.
For TCP sockets closed by the server, don't try and close
the socket again when offload_put is called.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
The Zephyr API supports multiple I2C targets addresses, and the STM32
I2C v2 implementation allows to define up to 2 targets addresses.
This patch adds support for a second I2C target address. It adds a new
config entry in the i2c_stm32_data structure, and uses the fact that
both addresses can be enabled and disabled independently. In the
interrupt, the target being addressed is determined using the address
match code from the interrupt status register.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
It allows the path for VBATEN on stm32 series
to monitor the Vbat voltage, in case of CONFIG_STM32_VBAT
Add the common Vref value as a property of the ADC.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Similar to the internal temperature sensor of the stm32
this driver controls the Vbat monitoring in Volts,
using an ADC internal input and the stm32-vbat node of the DTS.
The ref voltage is given by the ADC.
Note that stm32F1x does not propose the feature.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
if ISR is called for an event on pin X but
another event occurs on pin Y in between the call
to GetStatus() and ClrStatus(), pin Y event wil get
cleared without being processed
Signed-off-by: Maxim Adelman <imax@fb.com>
The driver returns -EIO when a pin to be disconnected was not earlier
configured as input or output, what is not in line with the GPIO API.
This commit changes the driver to return 0 in such case.
Also -EIO is incorrectly returned when an interrupt trigger cannot be
configured in the nrfx_gpiote driver. This commit corrects this value
to -EINVAL.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The gpio_dev field of struct spi_cs_control is deprecated. The
driver was already using SPI_CONFIG_DT_INST, so we should be
using the associated gpio member of spi_cs_control.
Signed-off-by: Kumar Gala <galak@kernel.org>
Updates the API and types to match updated I2C terminology. Replaces master
with controller and slave with target.
Updates all drivers to match the changed macros, types, and API signatures.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Move to using SPI_CONFIG_DT_INST macro to initialization the
struct spi_config cfg_a. This fixes an issue with how the old
code was initializing the deprecated fields of spi_cs_control.
Signed-off-by: Kumar Gala <galak@kernel.org>
Use hal function for low level access.
Use device tree for hardware configuration.
Support for esp32s2.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
This commit moves the hardware configuration for ledc
peripheral to the device-tree instead of Kconfig.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
In case the resolution is already correct (probably the common use
case), do nothing instead of disabling the ADC.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The ADC is currently disabled and re-enabled multiple time during each
read. Enabling the ADC is not a free operation on some series and some
internal channels like VREFINT take even longer. This patch improve the
situation by removing the calls to adc_stm32_enable(), replacing it by a
single call just before triggering the conversion.
This also open the possibility to not reconfigure the ADC if it is
already configured, implemented in the following patches.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This fixes a bug in the sm351lt driver whereby global triggering will
cause an MPU fault due to an unset pointer.
Signed-off-by: Jamie McCrae <jamie.mccrae@lairdconnect.com>
Since the driver uses spi_dt_spec there is no need for an explicit
spi_cs_control variable. The variable is unused.
Signed-off-by: Kumar Gala <galak@kernel.org>
As with previous commit, make the timer irq a simple integer variable
exported by the timer driver for the benefit of this one test
(tests/kernel/context).
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This test has gotten out of control. It has a giant #if cascade
enumerating every timer driver in the Zephyr tree and extracting its
interrupt number. Which means that every driver needs to somehow
expose that interrupt in its platform headers or some other API.
Make it a simple integer variable exported by the timer driver for the
benefit of this one test.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit introduces driver for granting access for own grant
table and for mapping/unmapping foreign gref. Grant tables are used
for data exchange between Xen domains via shared memory page(s) (e.g.
for sharing ring buffer with driver data) This functionality is
widely used and needed for implementing PV backend/frontend drivers.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
Change the Kconfig prompt for the Xilinx Zynq-7000/ZynqMP PS UART driver to
indicate whichs SoCs it supports.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Do not lock/unlock the System Level Control Registers (SLCRs) in the Xilinx
GEM ethernet driver. The SLRCs are unlocked once at boot time.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
We get type mismatch errors because of use of K_MSEC. As the timeout
is defined in terms of milliseconds and k_uptime_get() returns
milliseconds we can just remove K_MSEC usage.
Signed-off-by: Kumar Gala <galak@kernel.org>
This commit rewrite renesas R-Car clock driver in order
to be able to support any new SoC easier.
This work is so creating a clock driver per soc alongside a
common driver for all reneasas r-car boars.
- drivers: create a driver per soc
- create a common driver
- create a common header used by soc & common driver
- create a soc specific driver calling for common driver
- dts: use new compatible
- use old yaml as common yaml
- create a new "child" yaml to define the new compatible field
- change compatible in device tree
As in Linux, the driver can support both r8a77951 and r8a77950
SoC's so we decided to name the new driver as in Linux with Zephyr
prefix : "clock_control_r8a7795_cpg_mssr.c".
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
This commit is reworking clock definition in
order to match linux filetree and definition
as much as possible.
- dt-bindings: rework renesas clocks dt-bindings
- regroup renesas related dt-bindings in a folder
- rename renesas rcar common dt-binding to match linux name
- add soc specific dt-binding matching linux name
- soc dt-bindings are defining clocks matching linux names
- dts: use new clocks names
- move clocks definitions in SoC layer for each core clock entry
- driver: use new clocks names
As seen in this commit, we are declaring clocks for "R8A7795" SoC
to match linux names.
Linux is not declaring "R8A77951" SoC specific files because
its also supporting the first H3 SoC version numbered "R8A77950".
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Driver was in a weird state: it made use of
DT_INST_FOREACH_STATUS_OKAY, however, it had an assertion to support a
single instance and used instance 0 properties.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Move driver to use gpio_dt_spec for GPIO interrupt handling.
Added check to vcnl4040_trigger_set to handle case of trigger
mode enabled but the devicetree doesn't have an int_gpios property.
Also, moved up the checking/handling of gpio port device in
vcnl4040_trigger_init so that if we error out its before we
setup any threads and such.
Signed-off-by: Kumar Gala <galak@kernel.org>
Fix wrong control register address used in uart_altera_jtag_init
function which caused memory corruption.
Signed-off-by: Khor Swee Aun <swee.aun.khor@intel.com>
STM32_DT_CLOCKS was designed to take a device tree node label name as
argument: STM32_DT_CLOCKS(uart1)
Change its implementation to take a node identifier instead:
STM32_DT_CLOCKS(DT_NODELABEL(uart1)).
This make its usage more flexible since the argument can now be extracted
from other DT macros such as DT_PARENT. Then, the following can be done:
STM32_DT_CLOCKS(DT_PARENT(child_node_label)).
Since it is now possible implement STM32_DT_INST_CLOCKS using
STM32_DT_CLOCKS.
Finally, update existing STM32_DT_CLOCKS users and convert
STM32_INST_CLOCK_INFO users to STM32_CLOCK_INFO.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
On FVP platform, when parameter 'bp.refcounter.use_real_time' is set
to 1, cntvct_el0 isn't count from 0 and may cause overflow issue in
first timer compare interrupt.
'bp.refcounter.use_real_time' is 0 by default.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
Fast hardware with slow timer hardware can trigger and enter an
interrupt and reach 'sys_clock_set_timeout' before the counter has
advanced.
That defeats the "round up" logic such that we end up scheduling
timeouts a tick too soon (e.g. if the kernel requests an interrupt
at the "X" tick, we would end up computing a comparator value
representing the "X-1" tick!).
Choose the bigger one between 1 and "curr_cycle - last_cycle" to
correct.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
The magnetometer data read from AK9863 is assumed to be big endian
(like the accelerometer & gyroscope data).
However it is in little endian, which means the appropriate byteorder
function is sys_le16_to_cpu().
See the MPU925 register map:
https://3cfeqx1hf82y3xcoull08ihx-wpengine.netdna-ssl.com/wp-content/uploads/2017/11/RM-MPU-9250A-00-v1.6.pdf
At 5.6 HXL to HZH: Measurement Data
Signed-off-by: Loris Schmit <loris.schmit@inovex.de>
Some text in help section was documenting the compatibility of driver
variants with stm32 series.
This is duplicate of information versus device tree which should be
used as single source of information for hardware description.
Remove these lines, so we don't have to touch this driver each time
a series is added.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move variable declaration inside if-def to remove compiler
warning when building the driver without trigger.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
Remove wrapper functions for getting i2c bus and i2c bus
address. This is done here to make it easier to move this
driver to i2c_dt_spec while still having clear separation
between commits.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
Move driver to use gpio_dt_spec for GPIO interrupt handling. Since
the driver can support multiple instances its possible that some
have irq's in dts and some don't. So we add a check in
itds_trigger_set to make sure we have a GPIO device if we are
trying to set a trigger.
Signed-off-by: Kumar Gala <galak@kernel.org>
Simple driver that allows one to choose the clock speed of xtensa cores.
It's basically a shim layer on top of SOC level driver.
Also, a really simple test case was added, mainly to ensure things are
build and are sane.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
On SoCs with two USB controller, Zephyr selects the FS one, and in that
case the ULPI clock needs to be disabled in sleep mode for the
controller to work.
On SoCs with a single USB HS controller, this operation is not needed.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The ULPI clock uses slightly different names on STM32H7X as those
SoC can have more than one USB controller.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
On STM32H7X SoCs, both USB controllers are HS capable, however it is not
possible to connect an ULPI PHY to the USB2 one, which limit it to FS.
Therefore the ULPI clock in sleep mode has to be disabled for USB2 in
all cases. The ULPI clock for USB1 is already disabled when needed in
the usb_dc_stm32_clock_enable() function like for other SoCs.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Do not manually enable the USB clock on STM32H7, as it is already done
in usb_dc_stm32_clock_enable() using the values in the device tree.
This partially fixes the build for STM32H7 devices with a single USB
controller.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The ULPI clock is disabled by default in run mode, there is no need to
disable it again. It is however enabled by default in sleep/low power
mode, so it needs to be disabled.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
mcuboot may use a uart as logger. After application boot from mcuboot,
uart remains in some unknown state. It could leads to some unpredictable
uart behaviour. This commit fixes the issue by resetting of uart state
at the beginning of uart init.
Signed-off-by: Alex Kolosov <rikorsev@gmail.com>
Some services require the ability to query whether a GPIO pin
is configured as an input, output, both, or neither prior to
performing any operations at the service level. This is done
in order to reduce state tracking within the service.
To that end, this change adds
* `gpio_port_get_direction()`
* `gpio_pin_is_input()`, and
* `gpio_pin_is_output()`
Signed-off-by: Christopher Friedt <cfriedt@fb.com>
This commit fixes issue with undefined value during position calculations.
Shift for positions may be >32, so we need to explicitly use unsigned long
casting to prevent unexpected behavior during event handling.
Thanks @jgrall for suggestion.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
This commit fixes barrier usage in Xen event channel driver. Previously
compiler_barrier() was used and it did not prevent processor from
re-ordering of the write operations, that is needed for correct event
handling. It is now changed to data memory barrier (dmb()), which will
work as expected in this situation.
Thanks @jgrall for suggestion.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
This patch modifies the ADXL362 driver to use the new
SENSOR_TRIG_MOTION trigger for activity detection
and SENSOR_TRIG_STATIONARY for inactivity detection.
Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
Logging v1 has been removed and log_strdup wrapper function is no
longer needed. Removing the function and its use in the tree.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
This adds a table to set the dma channel priority from the DTS
The config bits are converted through the table_priority
to match the DMA_Priority_level of the stm32cube HAL.
Fixes#46725
Signed-off-by: Francois Ramu <francois.ramu@st.com>
MISRA C:2012 Rule 8.2 (Function types shall be in prototype form with
named parameters.)
Added missing parameter names.
Signed-off-by: Abramo Bagnara <abramo.bagnara@bugseng.com>
This commit adds new functions, which can be used for Xen event channel
management (allocation, interdomain binding etc.). Such functionality
is needed for Xen PV driver development in Zephyr.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
CAN1 and CAN2 share the memory for the filter banks.
This commit adds an offset for filters installed for CAN2, allowing to
use both CAN instances simultaneously.
The hardware allows to freely split the avalable 28 filters between
CAN1 and CAN2. In order to simplify the driver implementation, it only
supports an equal split of 14 filters per instance. This is the same
amount of filters as available in MCUs with only a single CAN.
Signed-off-by: Martin Jäger <martin@libre.solar>
Remove two functions which were only called from one place and did
not improve readibility of the code.
Signed-off-by: Martin Jäger <martin@libre.solar>
This commit unifies the driver initialization for can1 and can2
instances so that a single macro can be used.
Enabling the master clock for can2 as introduced in 8ab81b02 had to
be moved to devicetree in order to have the same CAN_STM32_CONFIG_INST
macro for all instances.
Signed-off-by: Martin Jäger <martin@libre.solar>
Add I2C bus recovery support to the NXP MCUX LPI2C driver. Since the LPI2C
peripheral block does not natively support I2C bus recovery, recovery is
performed using GPIO bitbanging.
Fixes: #42574
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Stop relying on <soc.h> to access HAL APIs. Use generic, per-API headers
instead. Note that <soc.h> has been left as is for now, since ARM MPU
relies on a fragile chain of includes/type definitions.
This change should improve compilation efficiency, as we no longer pull
APIs that are not needed. A similar approach is followed by STM32
drivers.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Update edac shell comments reflecting devmem move from edac to a
special shell module.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
This patch removes a superfluous write to the INTMAP1 register
that happens because the byte count was previously wrong.
Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
This commit adds a check for the validity of the "sub_system" param in
clock_control_on.
While for clock_control_off there was a check if the clock_subsytem
parameter is in range of STM32_PERIPH_BUS_MIN and STM32_PERIPH_BUS_MAX
this check was missing for clock_control_on.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Entering deep sleep mode stops the source clock of the ADC module and
could corrupt the ongoing ADC conversion. This commit lets ADC driver
acquire the PM lock during the ADC operation (either single conversion
or repetitive scan) and release it when the ADC conversion stops.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
the return is missing at the end of function which causes compilation
warning and block the build on github.
"warning: control reaches end of non-void function [-Wreturn-type]
92 | }| ^"
Signed-off-by: TLIG Dhaou <dhaou.tlig-ext@st.com>
wait_write_queue() get passed a device and an offset to compute the
sector number and verify it is valid. However both operations are
already done by the caller, so let's pass directly the
flash_stm32_sector_t value instead.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The STM32H7 flash driver read-back a register after writing it to ensure
it is flushed. This is very fragile and might break if a new compiler
version slightly reorder the instructions. Instead use a __DSB()
barrier like done on other STM32 SoC, which ensures that the registers
and the data writes are flushed at the compiler level, but also at the
Cortex-M7 level.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
As the erase time for a sector differs by a few order of magnitude for the
various SoCs of the STM32H7 family, use the just added max-erase-time
property from the device tree instead of the hard-coded 4 seconds value.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit drops the `IRAM_ATTR` macro from the function declarations
because:
1. `IRAM_ATTR` macro makes use of the `__COUNTER__` preprocessor macro,
which increments for every macro invocation and causes the section
specified in the forward declaration to not match that of the
function definition.
2. Section attributes need not be specified for forward declarations.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Fix the flow of I2C enable interrupt. We should enable the interrupt
after I2C configuration is completed to avoid pending interrupts and
cause errors irq.
Test port:
i2c_ite_it8xxx2: i2c0
i2c_ite_enhance: i2c4
Test:
tests\drivers\i2c\i2c_api --> pass
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
-Kept getting an error on STM32g0xx chips that didn't have q-divisor.
-Changed to set prescaler only if it's being used.
Signed-off-by: Dan Higginbotham <daniel@dedesignworks.com>
The FDCAN clock was being enabled using HAL APIs instead of the generic
clock control API.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Support writing to NOR-Flash over OSPI using
the following modes:
* 1-1-1
* 1-1-4
* 1-4-4
Supports 4-Byte opcodes conversion for write opcodes.
Allows users to set what write/program opcode is used
in the DTS (not for OPI mode).
Will use some default PP opcodes based on the mode.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Adds support to read and erase NOR-Flash over OSPI using
the following modes:
* 1-1-2
* 1-2-2
* 1-1-4
* 1-4-4
Supports 4-Byte opcodes conversion and gets address width
from the SFDP:BFP.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Adds:
* PP and Read 4-Byte command defines
* PP 1-1-2 define
* Missing 1-2-2 (0xBB) and Read Fast (0x0B) command defines
Re-arranges the commands so that they stay in order.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Move to using NET_DEVICE_DT_DEFINE_INSTANCE instead of
NET_DEVICE_INIT_INSTANCE as the driver is devicetree based and it
lets us remove DT_LABEL usage in the driver itself.
Signed-off-by: Kumar Gala <galak@kernel.org>
The measurement time in normal mode was too short.
With this commit the maximum value of the datasheet is applied.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The driver supported getting register shift from Devicetree, from a
custom definition in SoC headers (fragile) or, it took a default value.
This change simplifies things by making reg-shift property required in
all instances.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
For devices with more than one CAN peripherals, CAN1 is the master and
its clock has to be enabled also if only CAN2 is used.
Signed-off-by: Martin Jäger <martin@libre.solar>
Files including <zephyr/kernel.h> do not have to include
<zephyr/zephyr.h>, a shim to <zephyr/kernel.h>.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
MISRA C:2012 Rule 7.2 (A `u' or `U' suffix shall be applied to all
integer constants that are represented in an unsigned type)
Added missing `U' suffixes in constants that are involved in the
analyzed build, plus a few more not to introduce inconsistencies
with respect to nearby constants that are either unused in the
build (but implicitly unsigned) or are used and are immediately
converted to unsigned.
Signed-off-by: Abramo Bagnara <abramo.bagnara@bugseng.com>
The current implementation for events channel is using an empty
callback for every unbind channel and the interrupt is clearing
every event and calling the callback.
However in a scenario where a domain fires a notification when
another has not yet bind the channel, the event will be missed.
To address this limitation, this commit is keeping track of
missed event channel notification when the empty callback is
used, a function to retrieve and clear the missed event is
introduced.
Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
This commit extends Nordic's ieee802154 driver with the possibility to
set Tx power for every transmission separately.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
This commit extends the `struct net_pkt` structure with
`ieee802154_txpwr` field that contains signed value of the desired
transmission power of a IEEE 802.15.4 frame in dBm.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
Remove intel_s1000_crb pinmux driver. The board is no longer available
or supported in the zephyr tree.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
When defined as 'char', the compiler notices that the memcpy targeting that
address will write more than one byte which generates a warning. Use an
array instead so that the compiler doesn't assume a specific size.
Signed-off-by: Keith Packard <keithp@keithp.com>
Sensor value computation was creating a 64-bit integer value, passing
that to 'abs' and assigning that to an int32_t result and then sanity
checking the result. If the computation goes badly wrong, then the range
reduction of 64-bit to 32-bit values could generate a falsely in-range
value.
Instead, perform the computation in 64-bits, range check that value and
then assign to a 32-bit variable.
Signed-off-by: Keith Packard <keithp@keithp.com>
This driver carefully saved the errno value from the failing call and
then didn't use it in the ERROR report, using the potentially invalid
current errno value (which may have been set by the close call).
Signed-off-by: Keith Packard <keithp@keithp.com>
Remove unused WS2812_GPIO_CLK macro that references DT_LABEL. The
WS2812_GPIO_CLK macro isn't used anywhere so remove it since we
want to minimal DT_LABEL references in drivers.
Signed-off-by: Kumar Gala <galak@kernel.org>
Added bus locking mechanism, this patch resolves deadlocks
for more than one device on i2c bus, it is based on i2c_sam0 code.
Signed-off-by: Wojciech Slenska <wsl@trackunit.com>
This patch adds driver for the Microchip Polarfire SOC MSS QSPI
controller.
The interrupts of the MSS QSPI are routed through PLIC(Platform level
interrupt controller).
Tested with generic spi-nor flash driver(spi_flash) with both Fixed
flash configuration and Read flash parameters at runtime(using SFDP).
Signed-off-by: Naga Sureshkumar Relli <nagasuresh.relli@microchip.com>
- The MX25UM51345G flash is connected to FLEXSPI PortA for
mimxrt595_evk.
- Updated flexspi_mx25um51345g driver to support DTR OPI mode.
- Tested with tests/drivers/flash.
Signed-off-by: Chay Guo <changyi.guo@nxp.com>
Add watchdog support to the mimxrt595 platform.
The mimxrt595 platform is excluded from the watchdog
test case because the test case uses variables in the
noinit section that need to be retained through a reset
but the rt595 does not retain this memory through a
reset.
Signed-off-by: Chay Guo <changyi.guo@nxp.com>
This PR introduces a fix for DRX window being triggered to early during
CSL. Fixes were also introduced in the nrf 802154 radio
driver, so removed the unneeded DRX_ADJUST constant.
Signed-off-by: Artur Hadasz <artur.hadasz@nordicsemi.no>
All the gpio drivers are based on devicetree and thus we always set
HAS_DTS_GPIO, thus we don't need this Kconfig option anymore. Remove
uses as its safe to assume DTS is supported for GPIO.
Signed-off-by: Kumar Gala <galak@kernel.org>
This driver uses stack buffers to hold AT command strings which are
generated at runtime using sprintk. The buffers are only sized for the
expected range of values, not the full possible range given the datatypes
involved. Values outside this expected range could cause a buffer overflow.
To mitigate this, increase the size of each buffer to hold the full range
of each parameter type.
Signed-off-by: Keith Packard <keithp@keithp.com>
These drivers use stack buffers to hold AT command strings which are
generated at runtime using sprintk. The buffers are only sized for the
expected range of values, not the full possible range given the datatypes
involved. Values outside this expected range could cause a buffer overflow.
To mitigate this, increase the size of each buffef to hold the full range
of each parameter type.
Signed-off-by: Keith Packard <keithp@keithp.com>
The Kconfig encodes a dependency on SOC_FAMILY_ARM
even though there is no actual dependency.
This is generic ARM IP and can be used in any SoC.
Signed-off-by: Moritz Fischer <moritzf@google.com>
All the watchdog drivers are based on devicetree and we dont utilize
HAS_DTS_WDT anywhere so we can remove it.
Signed-off-by: Kumar Gala <galak@kernel.org>
Log message references gsm->context.data_rssi which is NULL
when CONFIG_MODEM_SHELL=n. Use gsm->minfo.mdm_rssi which is
internally used when accessing RSSI value.
Signed-off-by: Marek Metelski <marek@metelski.dev>
Check if ppp iface was actually up before taking it down and waiting
for NET_EVENT_IF_DOWN. This allows to call gsm_ppp_stop() even if
the PPP was never started, which previously caused the call to lock
forever. This case is useful, for example, if the modem didn't attach
to network in desirable time and user wants to abort PPP setup.
Signed-off-by: Marek Metelski <marek@metelski.dev>
add changes for command read-back and change from k_sleep to k_busy_wait
which will allow other threads to wakeup
Signed-off-by: Hari Haran Babu <hariharan@linumiz.com>
Signed-off-by: Marcel Graber <marcel@clever.design>
Do not truncate outgoing datagrams if they do not fit in maximum handled
packet size. Set EMSGSIZE errno and return -1 instead.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
This includes a basic driver for built-in flash on the Texas Intruments
SimpleLink CC13xx/CC26xx SoC series.
The driver makes use of driverlib HAL from TI's SDK and was tested on
two LaunchXL development boards with CC1352R and CC2652R SoCs:
- CC1352R1 LaunchXL
- CC26x2R1 LaunchXL
Tests were done using:
- flash shell sample (samples/drivers/flash_shell)
- littlefs filesystem sample (samples/subsys/fs/littlefs)*
- MCUboot (bootloader/mcuboot/boot/zephyr)*
* additional changes in DTS for the boards were required (partitions
table) and are not part of this changeset (will be introduced later)
Some additional information about the implementation:
1. TI's Technical Reference Manual for CC13x2 and CC26x2 points out that
"An individual 64-bit word can be programmed to change bits 1 to 0"
but it seems this 'alignment' requirement is handled internally by
the ROM function and thus 'write-block-size' is set to 1.
2. Interrupts, VIMS and line buffers are disabled during flash content
update (write or erase) and restored afterwards as recommended by TI.
3. Only RAM to flash write is supported (source of data to be written to
flash can't point to flash).
4. The driver doesn't take care of flash sector protection disable as
that functionality is handled by CCFG. Write or erase requests which
refer to a protected area will fail.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Coverity reported unused value for a variable "ret" in the function
send_socket_data(). Indeed there were two subsequent assignments
to "ret", meaning that the first one was unused.
The root cause of the problem is not checking the value of "ret"
after correctly invoking a function within send_socket_data(). Fix
this by adding appropriate checks.
Coverity-CID: 215249
Signed-off-by: Aleksandar Markovic <aleksandar.markovic.sa@gmail.com>
Check if there are multiple non-empty data fragments passed to sendmsg()
function. If positive, then set EMSGSIZE errno and return -1, as that case
is not handled properly with current implementation.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
If one data fragment was not sent successfully in sendmsg(), then
attempting to send the rest does not make any sense, as it would introduce
hole in data stream.
Currently if one fragment was not sent successfully, then there is a
'break' in inner loop, but that moves the execution to sending the
following data fragments.
Return early in case of fragment sending failure, so that there are no more
send attempts.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
added user_data field to modem_cmd_handler_data
this allows for multiple instances of modem drivers which use
the modem cmd handler. currently, the only identifiable
parameter passed to the modem command handlers is the
modem_cmd_handler_data struct.
The added user_data variable allows for the a modem driver to
pass its dev or data pointer to the modem_cmd_handler_data
struct to be retrieved from within the modem command callbacks.
Signed-off-by: Bjarki AA <baa@trackunit.com>
All drivers using 'modem_pin' abstraction were converted already, so remove
its implementation now.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Move away from 'modem_pin' abstraction as it has not obvious value compared
to generic 'gpio_dt_spec'.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Move away from 'modem_pin' abstraction as it has not obvious value compared
to generic 'gpio_dt_spec'.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Move away from 'modem_pin' abstraction as it has not obvious value compared
to generic 'gpio_dt_spec'.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Move away from 'modem_pin' abstraction as it has not obvious value compared
to generic 'gpio_dt_spec'.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
UART device pointer is already used directly when configuring modem
interface. Convert the case when UART is reconfigured when 'target-speed'
DT property is specified.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
<soc.h> has been traditionally been used as a proxy to HAL headers,
register definitions, etc. Nowadays, <soc.h> is anarchy. It serves a
different purpose depending on the SoC. In some cases it includes HALs,
in some others it works as a header sink/proxy (for no good reason), as
a register definition when there's no HAL... To make things worse, it is
being included in code that is, in theory, non-SoC specific.
This patch is part of a series intended to improve the situation by
removing <soc.h> usage when not needed, and by eventually removing it.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
<soc.h> was included because some CMSIS helpers (__DMB/__ISB) were
needed. In ARM SoCs, inclusion of CMSIS headers depends mainly on how
HALs decide to do it, being usually an inefficient and fragile include
chain. Note that on ARM64 we're in a better position, as those are
defined in-tree.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
<soc.h> has been traditionally been used as a proxy to HAL headers,
register definitions, etc. Nowadays, <soc.h> is anarchy. It serves a
different purpose depending on the SoC. In some cases it includes HALs,
in some others it works as a header sink/proxy (for no good reason), as
a register definition when there's no HAL... To make things worse, it is
being included in code that is, in theory, non-SoC specific.
This patch is part of a series intended to improve the situation by
removing <soc.h> usage when not needed, and by eventually removing it.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add a new selectable Kconfig option to decide wether the device driver
is a MMIO device or not. Previous to this patch, the decision was maded
based on the existence of a definition in <soc.h>. The design was
fragile, as code compiled anyway if the definition was not present.
All platforms/boards that had the definition in <soc.h> select the
Kconfig option in their respective defconfig files.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Deep Sleep mode stops SMB module clocks which could interrupt ongoing
I2C transactions, so have the I2C driver acquire a PM lock at the
beginning of a transaction and release it at the end in order to ensure
the module remains active.
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Remove unconditional write to PCA95xx output registers in setup_pin_dir,
and only write to output registers if selected pin is configured as
an output.
Fixes#45774
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This patch adds DTS properties for using wake-up mode
and the autosleep function to the ADXL362 driver.
Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
As per XMCLib documentation we need to check that data has been received
before reading the buffers.
Fixes test_uart_poll_in test in tests/drivers/uart/uart_basic_api.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Casting to uint16_t* can cause an unaligned usage fault when c is not
aligned to 2 bytes and can unintentionally overwrite data when c has a 1
byte memory size. Also there's no need to cast to uint16_t* because
returned words are 8-bit characaters as setup in the configuration.
Fixes the following usage fault error in tests/drivers/uart/uart_basic_api:
START - test_uart_poll_in
Please send characters to serial console
E: ***** USAGE FAULT *****
E: Unaligned memory access
E: r0/a1: 0x00000000 r1/a2: 0x2000078f r2/a3: 0x0c00453c
E: r3/a4: 0x00000000 r12/ip: 0x00000000 r14/lr: 0x0c003de5
E: xpsr: 0x41000000
E: Faulting instruction address (r15/pc): 0x0c003de4
E: >>> ZEPHYR FATAL ERROR 0: CPU exception on CPU 0
E: Current thread: 0x20000118 (unknown)
E: Halting system
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
The CPU in Aspeed AST10x0 SOC is a ARM Cortex-M4 which doesn't internal
cache memory. Aspeed implements an integrated system level cache to
accelerate instruction and data memory accesses.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Add a pseudo device diver with device tree bindings for coredump.
The device tree bindings exposes memory address/size values to be
included in any dump. And the driver exposes an API to add/remove
dump memory regions at runtime.
Signed-off-by: Mark Holden <mholden@fb.com>
This commit aligns SPIM shim to utilize memory-region property from
nordic,nrf-uarte compatible. The memory-region is not required
property that enables user to specify placement of dma buffers
in memory region. It is done by assigning to memory-region property,
phandle to node with zephyr,memory-region and mimo-sram compatible.
When memory-region property is not specified for given
instance, buffer is placed in default RAM region with other data.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
This commit aligns UARTE shim to utilize memory-region property from
nordic,nrf-uarte compatible. The memory-region is not required
property that enables user to specify placement of dma buffers
in memory region. It is done by assigning to memory-region property,
phandle to node with zephyr,memory-region and mimo-sram compatible.
When memory-region property is not specified for given
instance, buffer is placed in default RAM region with other data.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
The ALH is an intermediary device, which acts as a hub and provides an
abstracted support for numerous sound interfaces (e.g. SoundWire).
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
The SPI peripheral on SiFive parts uses FIFOs for Rx and Tx (FIFO size
undocumented, but empirically found to be 8 bytes on FE310, likely
identical on FU540 / FU740). Make use of these FIFOs in order to
continuiously feed Tx data as available.
Verified to transmit 1 MHz SPI @ 200 MHz coreclk / tlclk on FE310
continuously without downtime between frames.
Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>
spi_context uses uint8_t buffers, and HW rxdata / txdata registers only
contain 8 bits of data (along with b31 full / empty flag), so uint8_t is
appropriate.
Suggested-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>
mux_enabled check in the gsm_configure is unnecessary since it
is init and scheduled by gsm_ppp_start which means that the
mux must be disabled. The IS_ENABLED(CONFIG_GSM_MUX) check
should be good enough to determine whether or not the
mux_enable function should be ran.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
After the introduction of start/stop & rssi query work, these
additional functions can be invoked from different threads.
Things can quickly become hard to analyze when an interrupt
fires during one of these functions and upon return the
scheduler schedules another thread and run another function.
This PR introduces a simple mutex lock that guarantees thread
safety. Similar implementation can be found in hl7800 driver,
which has lots of public APIs that can be invoked from different
threads.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Update gsm_ppp.c
Move the rssi query part out from the rssi_handler work item as
an individual function, so that it can be used directly without
referencing the work.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Fix#46112 introduced a regression regarding rx fifo length.
This fixes it so that the last byte is not placed in
wrong buffer index.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
To support both 8-bit and 32-bit Control/Status register variants, register
offsets need to be calculated from device tree.
Updated register data in device tree to the 32-bit CSR variant.
Renamed defines to be similar to other LiteX drivers.
Changed frequencies in clock-outputs nodes, so i2s/litex sample works.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Correct width when accessing LITEETH_RX_LENGTH register.
Also update register data in device tree to the 32-bit CSR variant.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
LiteX HAL should be used when accessing Control/Status registers to provide
compatibility between different data widths of CSRs.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Make driver take register info from device tree so it can work with both
8-bit and 32-bit CSRs.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
anomaly_122_init() and anomaly_122_uninit() procedures implement
proper activate and deactivate procedures which are required for
achieve low power consumption.
The real workaround for the anomaly is buried inside hal function
nrf_qspi_disable() is called indirectly by the anomaly_122_uninit().
Therefore anomaly_122_init/uninit should be called for any
nrf QSPI device.
This patch renames functions and make call to them mandatory.
This fixes increased power consumtion issue on nRF53 device when
qspi was used.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Adds few missing zephyr/ prefixes to leftover #include statements that
either got added recently or were using double quote format.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This add UART_NS16550_VARIANT_16550 configuration inside the choice
of UART_NS16550_VARIANT_NS16750 and UART_NS16550_VARIANT_NS16950.
The configuration is enabled by default to make NS16550 device to get
correct FIFO size configuration (16 bytes).
fixes#45783
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
The current sam0 adc driver not implement correctly the adc_reference
enum values. This try homonize adc input referece by tracking VDDANA
at ADC_REF_VDD_1. The ADC_REF_VDD_1_2 were fixed with correct INTVCCx
channel selection.
Fixes#45443
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This sensor is virtually identical to the lsm6dso. The only difference
is the accelerometer ranges are double those of the lsm6dso.
Use the same driver. The difference is detected by using "st,lsm6dso32"
as the first compatible entry, followed by "st,lsm6dso".
An bit flag in the existing accel_range config field is used to check if
the chip is the doubled range or not.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
Move common settings out of the SPI and I2C instantiation macros and
into a common macro, which the aforementioned two macros can then use.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
In ST HAL v2.00, the functions to get the raw sensors values, e.g.
lsm6dso_acceleration_raw_get(), convert from little-endian to CPU.
Previous versions of ST HAL didn't do this.
The conversion here in the driver is converting a second time. It's not
an issue on a LE system, the conversion is a no-op, but on a BE system
it would be broken.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
Check if W5500 int pin is still active after processing the interrupt.
If not doing correctly, the W5500 driver can deadlock because it is not
receiving any more interrupts.
Signed-off-by: Janco Kock <jancokock@gmail.com>
Unifying the method signature introduced a redeclaration of variables,
fixes redeclaration of variables by renaming the inner ones
Signed-off-by: Michael Schmitz <michaelschmitz@live.de>
This commit introduces changes in three places in order to fix the
problem with timer-related tests on FE310-based boards:
* tests/kernel/sleep/kernel.common.timing
* tests/kernel/tickless/tickless_concept/kernel.tickless.concept
* tests/kernel/workq/work_queue/kernel.workqueue
The first change is the modification of the SYS_CLOCK_HW_CYCLES_PER_SEC
value back to 32768 Hz to match FE310's datasheet description.
The second change is CLINT frequency reduction in Renode simulation
model to 16 MHz to correspond with the oscillator frequency given by the
FE310's datasheet and the HiFive1 board schematic. This fixes the first
two tests.
The last change is reducing the MIN_DELAY define to 100. This causes the
RISC-V machine timer driver to update the mtimecmp register more often,
which in turn addresses the `work_queue/kernel.workqueue` problem with
work items finishing prematurely, causing the above-mentioned test to
fail.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
Checking that provided pclken->bus fits bus range in
clock_control_get_rate() is wrong as it could actually be a source
clock and hence not belong to this range.
Also, this kind of check is just not needed since this function should
not be used before call to clock_control_on() or clock_control_configure()
which do the required verification.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Assertions in can_mcan failed because the driver expects values
strictly greater than 0
Signed-off-by: Tomislav Milkovic <tomislav.milkovic95@gmail.com>
Current poll_in function implementation blocks when there is
no data available. The Zephyr documentation for poll_in
expects the function to return -1 when no data is available.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
1. Make sure the relative alarm value is set correctly
2. Add a Kconfig to give user the option of reserving
a CTimer channel for implementing the set_top_value
function
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Fix the instance config structure name so that it's coherent with the
data one (missing underscore after the instance idx).
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Config pwm open-drain mode without enabling STORE_REG. This CL
collects all active PWM's base address and related index in an
array. Then, pinctrl driver configs its open-drain mode by
finding the corresponding 'channel' index.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
For some reason, rather than testing for the presence of
disconnect-gpios in the devicetree, the STM32 USB Device driver was
relying on a hidden Kconfig flag to be set.
This patch removes the Kconfig option completely and simply tests for
the DT property - if it's set, you obviously know what you're doing and
obviously need the pull-up GPIO behaviour.
Signed-off-by: Chris Collins <chris@realsimgear.com>
This PR Fixes the Audio PLL Rate Calculation (there was an additional
divide / 8 which is not necessary and does not appear in similar
calculations in example code from the SDK).
Additionally, it adjusts the SAI .dtsi to more correctly configure the
mclk rate, and adds comments specifying what the regististers mean.
Signed-off-by: Nickolas Lapp <nickolaslapp@gmail.com>
Pinmux is depricated (see #39740) and shouldn't be used anymore
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
some iMX RT SOCs have non contiguous sets of gpio pins available, which
caused issues when selecting appropriate pinmux for these parts. Add
workaround code to adjust offset of pinmux settings when configuring
these pins.
Fixes#44391
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The flash_stm32_write_range() function of the STM32H7x flash
driver partially uses a wrong flash program word size for certain
SOC types when calculating the flash write offset. If the used
SOC is not having a flash program word size of 256 bits / 32 bytes
the written data might get corrupted, as the flash write offset
value does not match the number of bytes that were actually
written.
Fixes#45568
Signed-off-by: Christoph Heller <chris@metanetics.de>
PHY TX power configuration must be added into soc level.
It was previously hardcoded in hal_espressif, which was removed.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
When the loopback drops driver packets, the number of dropped
packets is counted and can be requested externally.
Signed-off-by: Sjors Hettinga <s.a.hettinga@gmail.com>
Incorrect GPIOTE channel was being freed because the pin number
being used is not the absolute pin but the pin within the port.
Signed-off-by: Wael Barakat <waelsbarakat@gmail.com>
Add inclusions of header files with devicetree related ADC definitions
to the nRF SoC dtsi files so that those definitions can be used also
for nRF SoC based boards.
Provide definitions of nRF ADC and SAADC analog inputs suitable
for use in devicetree.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add 'inversion-on' property to st7735r.
Issue INVON(21h) command on initializing if inversion-on was enabled.
As a result of this command, the display color is inverted.
Otherwise, INVOFF(20h) will be issued.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
There is no need in the `flag_quad_io_en` field.
When QE enabling failed, then the driver `init` fails as well.
There is no way to use qspi in quad mode if qe is not enabled.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Adds support for 1-4-4 and 1-1-4 read modes.
SFDP is used to query for available read instructions, then the
fastest one is used.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
* Renames 4PP define to PP_1_4_4
* Adds PP_1_1_4 define
That matches linux kernel defines a bit more.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
On STM32WB and dual-core STM32H7 MCUs, the RNG peripheral is shared
between the cores and its access is protected by a hardware semaphore.
Locking was not performed in the current entropy driver, leading to a
race condition when multiple cores concurrently used the RNG. This
commit implements the necessary logic for locking the HSEM during entropy
generation on multi-core STM32 MCUs. It also reconfigures the RNG in case
the configuration was changed by the other core, as this can happen e.g
on STM32WB MCUs.
Signed-off-by: Thomas Altenbach <taltenbach@witekio.com>
Some sockets (UDP sockets at least) do not generate "<N>,CLOSED"
messages when the WiFi network drops. As a result the networking stack
thinks these sockets are still open after the network has dropped, and
after any subsequent reconnections.
This affects the DNS resolver library in particular, which leaves UDP
sockets open permanently by default.
Manually close these sockets when the network drops to ensure a clean
state the next time the network connects.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
`esp_close_work` can be queued from the `on_cmd_closed`, which clears
`ESP_SOCK_CONNECTED` and sets `ESP_SOCK_CLOSE_PENDING`, but does no
further work. The receive callback should still be run with no data when
the socket is closed through this mechanism.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Use the dedicated `DT_INST_STRING_TOKEN` macro instead of manually
retrieving `DT_DRV_INST`.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Xilinx AXI UART Lite v2.0[1] has the following clause for both RX and TX
FIFO respectively:
When a read request is issued to an empty FIFO, a bus error (SLVERR) is
generated and the result is undefined.
When a write request is issued while the FIFO is full, a bus
error (SLVERR) is generated and the data is not written into the FIFO.
To protect this, we have:
xlnx_uartlite_read_status(dev) & STAT_REG_RX_FIFO_VALID_DATA, and
xlnx_uartlite_read_status(dev) & STAT_REG_TX_FIFO_FULL
but these are not enough for multi-threaded apps. Consider two threads
calling poll_out(), it is always possible for a thread to be swapped out
right after reading the status register, the other thread fill the TX FIFO,
and the original thread is swapped back to write more data to the FIFO
because previously read status doesn't indicate the FIFO is full.
To close this race condition, this commit uses a spinlock for each FIFO.
This ensures that only one thread accesses the FIFO even for SMP cases.
This closes#45302.
[1] https://docs.xilinx.com/v/u/en-US/pg142-axi-uartlite
Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
Add pin control support to gpio_imx driver, so that GPIO pin muxes will
be selected when the use configures a pin as GPIO.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add additional pin controller settings for iMX application core SOCs, as
well as a "fallback" pin control setting.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Refactor iMX RT pin control support to use more generic names, as the
IOMUXC peripheral is present on non RT iMX application cores.
Additionally, make selection of the pin control driver occur at the SOC
level.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Simplifies the driver and Gives a generic function to prepare the Regular
commands for each instruction.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This is the stm32 octospi driver based on the exisitng quadspi
for stm32 devices and source code from the STM32Cube.
This drivers initialized the peripheral and the NOR memory
in SPI or OctoSPI mode with STR or DTR data Transfer rates.
The NOR-flash can provide the SDFP table directly (if supported)
or through the DeviceTree.
Limitation: no DMA transfer.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
With the introduction of the OSPI NOR flash controller
more octal commands and parameters are defined.
It completes the existing SPI commands
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Whenever EC bootloader already configured a pin as output and
high, any further reconfiguration via pinctrl driver causes a
glitch in said pin with current sequence.
Defer pin direction configuration to be last operation over
gpio control register to avoid the glitch.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Log a message when the modem asynchronously closes a link. This is
useful information to the user as it can explain the root cause of later
failures.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in npcx eSPI and host_subs driver.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in npcx adc driver. Please notice users need to
configure the corresponding pinctrl nodes in 'pinctrl-0' property in the
adc0 DT node. For example, if ADC0 and ADC2 channels are selected for
the application, please add the follwoings in your board DT layout file.
&adc0 {
status = "okay";
/* Use adc0 channel 0 and 2 for 'adc_api' driver tests */
pinctrl-0 = <&adc0_chan0_gp45
&adc0_chan2_gp43>;
pinctrl-names = "default";
};
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in npcx tachometer driver.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in ps2 driver.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in pwm driver.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in i2c driver.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in uart driver.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL is the initial version for npcx pinctrl driver and introduces
pinctrl nodes for both IO-pads and peripheral devices for each npcx
series. Users can set pin configuration via these nodes in the board
layout DT file. It also wraps all configurations related to pin-muxing
in pinctrl_soc.h. Regarding the other pin properties, we will implement
them later.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Update the MCUX ELCDIF driver to use CONFIG_MCUX_ELCDIF_POOL_BLOCK_NUM
for the number for frame buffers to allocate.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
This is a follow-up to commits e15bdaa1bd
and 07bf22cc94.
The above two commits added some enumerated gain values and those
are not currently handled by the inverting function. Add the missing
entries to the conversion array in the function.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Enabling an eSPI channel (r.g. Peripheral Channel, Virtual Wire Channel,
etc.) during an eSPI transaction might (with low probability) cause the
eSPI_SIF module to transition to a wrong state and therefore response
with FATAL_ERROR on an incoming transaction.
This CL workarounds this issue by clearing the bit 4 of NPCX eSPI
specific register#2.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
A missing semicolon caused compiler errors when more than one emulated
gpio device was defined in the device tree.
Signed-off-by: Jan Peters <peters@kt-elektronik.de>
Add support for an alternate clock. If available,
alternate clock is enabled and used to get the
device clock rate.
Based on: #45053.
Signed-off-by: Artur Lipowski <Artur.Lipowski@hidglobal.com>
Previously, the uart_stm32 driver was extended in #44487 to support
swapping the tx and rx pins of supported STM32 UART peripherals.
However, the original change applied this configuration during the
call to the uart_stm32_configure() function. This has now been added to
the uart_stm32_init() function to ensure this behavior on startup for
ports like the virtual com port.
Signed-off-by: Peter Maxwell Warasila <madmaxwell@soundcomesout.com>
Refactors invalid switch into if statement.
Fixes orientation set return value for normal
display orientation.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Make sure cxcprs isn't zero, or we will have
divide-by-zero on calculating actual_freq.
Test:
1.tests/drivers/pwm/pwm_api pattern
2.GPA0(pwm0) output 79201Hz, 324Hz, 100Hz, 1Hz waveform
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Add support for enabling/disabling CAN-FD frame transmission/reception at
run-time.
Fixes: #45303
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Convert the can_mode enum to a bit field to prepare for future extensions
(CAN-FD mode, transmitter delay compensation, one-shot mode, 3-samples
mode, ...).
Rename the existing modes:
- CAN_NORMAL_MODE -> CAN_MODE_NORMAL
- CAN_SILENT_MODE -> CAN_MODE_LISTENONLY
- CAN_LOOPBACK_MODE -> CAN_MODE_LOOPBACK
These mode names align with the Linux naming for CAN control modes.
The old CAN_SILENT_LOOPBACK_MODE can be set with the bitmask
(CAN_MODE_LISTENONLY | CAN_MODE_LOOPBACK).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename the CAN data phase API functions to timing_data_* for consistency:
- can_get_timing_min_data() -> can_get_timing_data_min()
- can_get_timing_max_data() -> can_get_timing_data_max()
- .timing_min_data -> timing_data_min
- .timing_max_data -> timing_data_max
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Enable pin control for lpc11u6x i2c driver, and remove pinmux usage from
board level DTS files.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
convert lpc11u6x syscon clock driver to pin control, and remove all
pinmux usage from driver and syscon dts node.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Update pin control driver for lpc11u6x. This SOC does not have a HAL,
so fsl_clock is not available. It also lacks a slew-rate field in the
IOCON register, so this property must be optional.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
switch gpio driver to use pio nodes to configure pin control settings,
and stop using pinmux driver within gpio driver.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Improve the power domain logging by making the log level configurable
and boosting the log level of the messages printed when the domain turns
on and off.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Adding support for the GIC_V1 to the dc_dw USB driver
to be used by Cyclone V SoC FPGA Development Kit
Signed-off-by: Esteban Valverde <esteban.valverde.vega@intel.com>
Cyclone V SoC FPGA supports 128Byte FIFO for UART communication,
this modification adds a feature to use 128byte FIFO serial UART
Signed-off-by: Esteban Valverde <esteban.valverde.vega@intel.com>
Similarly to what was done on U5 and H7 clock_control drivers, enable
device clock source selection.
This is done by:
-providing implementation for clock_control_configure().
-updating clock_control_get_rate() to support various possible clock
sources (SYSCLK, PLLCLK, LSE, LSI, HSI, HSE).
-providing enable_clock() to verify requested clock source exists and
is enabled.
-adding LSI and LSE device tree based initialization to
set_up_fixed_clock_sources().
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Rename and factorize clock source bindings accessors by moving them
in common header file stm32_clock_control and remove them from
include/dt-bindings/clock/stm32XY_clock.h files
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add support for an alternate clock. If available,
alternate clock is enabled and used to get the
device clock rate.
Fixes#41650
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
e8e88dea incorrectly changed registers
used in `sys_clock_cycle_get(32|64)` functions.
This commit fixes that.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
ADC threshold control register offset is provided by devicetree, this
change will add this property into `adc_npcx_config` structure and
update macro to access register accordingly. Driver behavior is not
meant to be impacted.
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Number of supported ADC thresholds is provided by devicetree, this
change will add this property into `adc_npcx_config` structure and
replace macro usage. Driver behavior is not meant to be impacted.
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Adds a communications backend based on the asynchronous UART API,
instead of the interrupt-driven UART API. The primary advantage of this
backend is an improved robustness to dropping bytes under high interrupt
or critical section loads.
Under all loads system efficiency is improved by:
* Reducing the time spent writing out individual bytes.
* Reducing the number of UART interrupts fired.
* Waking up the RX thread much less often.
When utilising this backend over `nordic,nrf-uarte` on a nRF52840, the
baudrate of an esp-at modem could be pushed to at least 921600 without
dropping bytes, compared to a maximum of 230400 with the interrupt API.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add a choice symbol that is used to select which UART backend to use.
This allows backends that don't use the interrupt API to be implemented.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Use the proper `%p` printf specifier when printing memory addresses,
instead of casting to an integer, which may not be the same size as a
pointer.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Pretend that the serial test driver supports the interrupt and async
API's, as these can be required for various drivers. Also select
`SERIAL_HAS_DRIVER` so that the serial library will be included.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Depending on `!SERIAL_SUPPORT_INTERRUPT` to enable the driver does not
make any sense, as this is a symbol selected by drivers to signify that
they support interrupts. Simply not selecting this symbol is enough to
convey the desired intention.
This fixes Kconfig problems when the driver is compiled together with
a dummy serial driver which does select `SERIAL_SUPPORT_INTERRUPT`.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Assembler files were not migrated with the new <zephyr/...> prefix.
Note that the conversion has been scripted, refer to #45388 for more
details.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some SOCs, such as the RT1064 and RT1024, use internal flash and don't
define pinmux settings for the flexspi. Don't check the return code of
pinctrl_apply_state, because the flexspi driver will fail to initialize
when the pin mux settings are simply not required.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add SD response type masks, to allow drivers to mask out the
SPI or SD native mode response type based on the SD host controller
mode they use.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Use the UPLLCK clock for the CAN controller as recommended by the Atmel SAM
E70 data sheet.
Move the configuration of the clock prescaler from Kconfig to devicetree
and limit it to the values recommended by the SAM E70 datasheet.
Fixes: #45012
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This is a follow-up to commit fd7633126e.
For some reason the above commit added several switch cases without
required break statements. In effect, the same pin could get assigned
to multiple signal lines in QDEC or QSPI peripherals if not all pins
were defined for them in devicetree, and consequently these peripherals
could not work properly.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Allow CTS line to determine UART shutdown for any sleep mode.
This allows lower average current consumption for LITE
HIBERNATE mode.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
In order to bring consistency in-tree, migrate all drivers to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Added chosen syntax in Device Tree to abstract the IPC device that is
used with the IPC service module in the Bluetooth HCI RPMsg driver.
Ported affected boards to declare this alias.
Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
Update the Zephyr include paths to be compatible with removing
`CONFIG_LEGACY_INCLUDE_PATH` in the future.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Respect the configured values for how long the domain takes to turn on,
and how long the domain needs to be off for before it can be repowered.
As these actions can block, guard the transition function with
pm_device_action_can_block. To avoid system PM being able to turn the
domain off but not back on again, guard the entire implementation.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Enables the Intel SSP driver by default when the DAI driver class is
enabled (CONFIG_DAI=y) and a compatible devicetree node
("intel,ssp-dai") is enabled.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Use `DT_REG_ADDR_BY_NAME` and `DT_REG_SIZE_BY_NAME` to access register
properties from dts.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Adds addresses and names for individual CSR registers to device tree.
This way liteuart driver no longer depends on CSR data width being 8
bits.
Also when register names or their number changes, then overlay generated
by LiteX will be incompatible with one defined here.
This should make finding breaking changes easier.
I also appended `_ADDR` suffix to defines, to distinguish them from
normal values like `LITEETH_EV_RX`.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Adds addresses and names for individual CSR registers to device tree.
This way liteuart driver no longer depends on CSR data width being 8
bits.
Also when register names or their number changes, then overlay generated
by LiteX will be incompatible with one defined here.
This should make finding breaking changes easier.
I also appended `_ADDR` suffix to defines, to distinguish them from
normal values like `UART_EX_TX`.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Adds addresses and names for individual CSR registers to device tree.
This way timer driver no longer depends on CSR data width being 8 bits.
Also when register names their number changes, then overlay generated by
LiteX will be incompatible with one defined here.
This should make finding breaking changes easier.
I also updated register names to those used in current LiteX and
appended `_ADDR` suffix to defines which lacked them.
Because register `total` was renamed to `value` and `update_total` to
`update_value` I updated variables accordingly as well.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Host might send command or data immediately after EC read the
KBC input buffer (IBF gets cleared).
This change make sure EC won't get wrong event type in IBF ISR.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Move period and pulse computation to right before
the channel enable code.
That fixes the inability to disable the channel by
providing the period of 0.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
The STM32u% series of processors has a unique set of clock sources for
the FDCAN peripheral. This brings the selection in line with the
existing can_stm32fd clock selection Kconfigs.
This change was tested on a proprietary board using the STM32U5 series
which exposes the CAN pins of the SOC using a transciever on a live CAN
bus as well as on the nucleo_g474re board from ST in loopback mode.
HSE and PLL1Q tests run and all passed.
PLL2P is not currently supported by the clock drivers for STM32U5, and
as such is currently untested. When this support is added, the driver
should be able to use this clock without issue.
When changes from #42097 are merged this fix should be deprecated in
favor of using the methods outlined there.
Signed-off-by: Peter Maxwell Warasila <madmaxwell@soundcomesout.com>
Set the PCR[MUX] field to kPORT_MuxAsGpio as part of configuring a GPIO
pin. This removes the need to explicitly call pinmux_pin_set() in board
code.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Adds a log backend that maintains a ringbuffer in coordination
with cAVS HDA.
The DMA channel is expected to be given some time after the logger
starts so a seperate step to initialize the dma channel is required.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Do not default FLASH_MCUX_FLEXSPI_XIP to enabled when code is not
located in flash, this will cause issues if code is executing from ITCM,
as the zephyr_code_relocate macro will relocate the flash driver code
into itcm, and overwrite the zephyr image.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Do not query SIM card parameters if the SIM
card is not present.
This shortens the driver initialization time
significantly if a SIM card is not present.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Store sensor trigger structure reference provided on `trigger_set`, and
pass reference back to client when trigger callback is invoked.
This will enable client to use `CONTAINER_OF()` inside its trigger
callback code.
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Add support for missing EHL SKUs. The information about SKUs is
already public and available in Linux kernel:
https://github.com/torvalds/linux/blob/
38f80f42147ff658aff218edb0a88c37e58bf44f/drivers/edac/
igen6_edac.c#L197-L208
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Add optional PINCTRL support to the Microchip XEC PS2 driver
shared between MEC15xx and MEC172x families.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Update the Microchip XEC PS2 driver to support MEC172x.
NOTE: MEC15xx has two PS2 controllers and
MEC172x has one.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
since the flexspi driver interacts with the flash device, storing
device data in flash can cause RWW hazards when running in XIP mode.
Move all device data to RAM to limit these RWW hazards.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
since the flexspi driver interacts with the flash device, storing
device data in flash can cause RWW hazards when running in XIP mode.
Move all device data to RAM to limit these RWW hazards.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Move all device data to RAM. Since the flexspi driver accesses the
flash device that is being used for XIP, various RWW hazards can occur
if the flexspi driver is interacting with the flash device, while
running in XIP mode.
Fixes#45182
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Comparator will monitor signal though ADC channel, based on
user configuration, callback will be triggered.
This will enable comparator functionality for nuvoton MCU utilizing its
ADC threshold detection feature. Implementation is exported through
sensor trigger API. Use of CONFIG_ADC_CMP_NPCX is required.
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Refactor code so that an unused variable 'adc' warning
is not generated when building for CONFIG_SOC_SERIES_STM32G4X
and not using adc1 or adc5.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
Refactor the Bosch M_CAN shared driver functions to get rid of the
front-end driver wrapper functions.
This requires flipping the relationship between shared config/data
structs and front-end config/data structs. Front-end drivers can now
store a pointer to their custom config/data structs in the .custom
fields of the can_mcan_config and can_mcan_data data structures.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename the private header file for the Bosch M_CAN shared driver code
from can_mcan_int.h to can_mcan_priv.h to follow the common naming
scheme.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
update help text for mcux rt pinctrl peripheral driver, to clarify it
does not support RT600/RT500 parts and only RT1xxx series parts.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
add support for setting pinmux when using IOPCTL peripheral, as well as
setting pin configuration properties.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
add pincontrol headers for IOCON peripheral present on NXP iMX RT600
and RT500 SOCs, and update LPC pin control driver for iMX RT family
differences.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This modification is required to enable flash encryption.
Using hal implementation of spi_flash calls maintains
compability amongs different socs while offering
latest esp-idf enhancements.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Includes the definition of the STM32_DMA_STREAM_OFFSET
depending on the peripheral to adjust the first DMA channel
in the list of streams.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
In the EC application, the system may jump between two built Zephyr
images when necessary. If we gate the eSPI clock at initialzation, it
will make the eSPI configuration which established by previous image
break and lost the communication between EC and host.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
remove existing SDMMC SPI driver, since it is replaced by the SPI mode
SD host controller driver.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
with the legacy USDHC driver fully removed from the tree, the
nxp,imx-usdhc binding can now be used for the new SD host controller
driver.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
all in tree SOCs with the USDHC peripheral have now been converted to
use the new SD host controller USDHC driver, so remove legacy NXP disk
USDHC driver.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add SDHC driver implementing spi mode support for SD cards. This driver
implements the standard SD host controller APIs, and sets the host
property "is_spi" to indicate to the SD subsystem the card will be
running in SPI mode.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Implement SDHC driver for NXP USDHC peripheral, supporting all api calls
available in the sdhc driver. This implementation leverages NXP's HAL,
and simply implements a shim layer over the HAL itself.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
LiteX CSRs can only be accessed on addresses aligned to 4 bytes.
That's why in 32-bit CSRs case there is bit shifting needed.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Removed register sizes from config struct, as they are known.
This allowed to remove driver specific function reading from CSR and use
`litex_write*` functions from LiteX HAL.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Use LiteX HAL functions instead of `sys_read*` or `sys_write*`
functions.
They use them inside, but choose which one to use according to
configured CSR data width.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
With universal LiteX HAL working, there is no need to perform multibyte
reads and writes using bitwise operations.
Just use appropriate `litex_read*` or `litex_write*` function.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Use LiteX HAL functions instead of `sys_read*` or `sys_write*`
functions.
They use them inside, but choose which one to use according to
configured CSR data width.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Use LiteX HAL functions instead of `sys_read*` or `sys_write*`
functions.
They use them inside, but choose which one to use according to
configured CSR data width.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Changes signature so it takes uint32_t instead of pointer to a
register.
Later `sys_read*` and `sys_write*` functions are used, which cast
given address to volatile pointer anyway.
This required changing types of some fields in LiteX GPIO driver and
removal of two casts in clock control driver.
There was a weird assert from LiteX GPIO driver, which checked whether
size of first register in dts was a multiple of 4.
It didn't make much sense, so I removed it.
Previous dts was describing size of a register in terms of subregisters
used. New one uses size of register, so right now it is almost always
4 bytes.
Most drivers don't read register size from dts anyway, so only changes
had to be made in GPIO and clock control drivers.
Both use `litex_read` and `litex_write` to operate on `n`bytes.
Now GPIO driver calculates this `n` value in compile time from given
number of pins and stores it in `reg_size` field of config struct like
before.
Registe sizes in clock control driver are hardcoded, because they are
tied to LiteX wrapper anyway.
This makes it possible to have code, independent of CSR data width.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Make the LSE driving capability configurable for the STM32 series.
Fixes#44737.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Currently the driver only setup the ADC to read from the
internal temperature channel on init. However, it is possible
that some other application that uses the ADC can setup the
ADC to read from some other channel and therefore subsequent
stm32_temp_sample_fetch will fail to read the targeted channel.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
The ADC should be calibrated on init, there is no requirement
to calibrate ADC again on stm32_temp_init, remove it.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Change the default initialization priority for CAN transceiver from 70 to
45 to initialize them before the CAN controllers (with default a
initialization priority of 50).
Fixes: #45219
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This change is controlling of function parameters before
configuring the STM32_DMA_HAL_OVERRIDE mode.
Then, in case the DMA channel is not valid (wrong ID) or busy,
an error occurs before overriding the DMA channel.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Fixing a bug where get_regs() was being executed before MMIO mapping
moving the declaration of reg_base after DEVICE_MMIO_MAP
Signed-off-by: Esteban Valverde <esteban.valverde.vega@intel.com>
Consolidate the initialization routines and change the include guard to
conform with the coding guidelines as a preparation for the following
commits which add support for the SPI interface.
Signed-off-by: Leonard Pollak <leonardp@tr-host.de>
This fixes the constant for the mem page and replaces a
magic number with the already defined `BME680_LEN_COEFF2` constant.
Signed-off-by: Leonard Pollak <leonardp@tr-host.de>
PWM has a single set function now, macros like PWM_USEC() can be used to
specify other units than nanoseconds. This conversion was missed during
API updates.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The pwm field in struct args_index was missed when pwm was renamed to
channel in all drivers. As a result, the PWM shell could no longer be
built.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The it8xxx2 watchdog Kconfig options are always shown, for every type
of device, they should only be shown when an it8xxx2 device is being
targeted.
Signed-off-by: Jamie McCrae <spam@helper3000.net>
Includes several driver fixes and improvement to leverage
scatter/gather mode of DMA. Loads multiple DMA blocks into TCDs.
Signed-off-by: Derek Snell <derek.snell@nxp.com>
RX FIFO watermark setting causing issue where last 16 words received
were stuck in FIFO, and not requesting DMA to move to buffer. Fixed by
setting watermark to 0.
Signed-off-by: Derek Snell <derek.snell@nxp.com>
driver config settings were getting overwritten by APIs that set
default settings, like SAI_GetClassicI2SConfig(). Moved config code
after those APIs.
Signed-off-by: Derek Snell <derek.snell@nxp.com>
stream_disable()'s should not always purge buffers.
And i2s_rx_stream_disable() needs separate control for
purging in_queue and out_queue since app owns buffers
after placed in out_queue for i2s_read()
Signed-off-by: Derek Snell <derek.snell@nxp.com>
MCP4728 is a 12-bit, Quad Digital-to-Analog Converter with EEPROM Memory.
Controlled via I2C interface.
Signed-off-by: Marek Janus <marek.janus@grinn-global.com>
In order to be consistent with what is possible in Devicetree, always
take a period in nanoseconds. Other scales or units may be specified by
using, e.g., the PWM_MSEC() macros (all of them converting down to
nanoseconds). This change then deletes the "_nsec" and "_usec" versions
of the pwm_set call.
Note that this change limits the period to UINT32_MAX nanoseconds,
~4.3s. PWM is, in generali, used with periods below the second so it
should not be a problem.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Simplify the driver by using pwm_dt_spec.
TODO: decide if pwm_dt_spec should also store period.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In a first place, the PWM API operates on "channels", not "pins". While
the API calls could have been changed by _channel, this patch takes the
approach of just dropping _pin. The main reason is that all API calls
operate by definition on a channel basis, so it is a bit redundant to
make this part of the name. Because the `_dt` variants of the calls are
going to be introduced soon, the change to `_channels` + `_dt` would
make API function names quite long.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The variable indicating the PWM channel is now names "channel" instead
of "pwm", adjust all drivers.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The timer registers are accessible via the device config field, driver
code was wrong in one case (pwm is the variable indicating PWM channel).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Multiple if/else blocks had missing braces, add them as this violates
Zephyr coding guidelines.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Implement the set_top_value. This reserves one of the Match channels
to set the top value and to reset the counter.
Therefore the number of channels available to the user is reduced by 1.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
After change in RD into 64-bit time, target time must be express in
absolute 64-bit time. Upper layer e.g. OpenThread still utilizes only
LSB of the RD time therefore the conversion is required.
Make sure that target time is absolute 64-bit target time.
Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
Add DT option to configure the data ready interrupt mode.
Latched is the default; pulsed can be enabled through
the drdy-pulsed DT, if desired.
Signed-off-by: Maxime Vincent <maxime@veemax.be>
Add optional threshold interrupt support.
Implemented using SENSOR_TRIG_THRESHOLD sensor trigger type.
The features can be optionally enabled through Kconfig,
or disabled for smaller code size.
Signed-off-by: Maxime Vincent <maxime@veemax.be>
Add FDS (Filtered Data Type Selection) + High-Pass reference mode support
(FDS in CTRL6, HP_REF_MODE in CTRL7)
Values are configurable through DT per instance.
Signed-off-by: Maxime Vincent <maxime@veemax.be>
Old code only create one pl011 device instance though there are two or
more pl011 device defined in devicetree. This patch can fix this issue.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
sensor_channel_get() API should return -ENOTSUP when requested channel
is not supported. This behavior allows to use `sensor get DEVNAME` shell
command easily, as all unsupported channels are filtered out.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
An application with the following config fails to link on nrf53 app
core:
```
CONFIG_BT=y
CONFIG_BT_HCI_RAW=y
CONFIG_ENTROPY_GENERATOR=y
```
This happens because `entropy_bt_hci.c` uses functions from
`hci_core.c`, which is only compiled if `BT_HCI_HOST` is selected.
Signed-off-by: Herman Berget <herman.berget@nordicsemi.no>
Enables the Intel TLB driver by default when the MM driver class is
enabled (CONFIG_MM_DRV=y) and a compatible devicetree node
("intel,adsp-tlb") is enabled.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Introduce has-interrupt-mask-reg DTS property for nxp,pca95xx driver.
This additionnal property allow to specify that the gpio expander has an
interrupt mask register that must be configured by the driver.
This allow to use this driver with PCAL95xx.
This fixes issue #44834.
Signed-off-by: Xavier Chapron <xavier.chapron@stimio.fr>
NXP LPUART IP supports loopback mode, where TX is internally connected
to RX input. Allow setting loopback mode up via the "nxp,loopback" dts
property.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
SOCs using the EDMA IP that supported caching must locate EDMA transfer
control descriptors (TCDs) in non cacheable memory. For M7 cores, this
can simply use the "nocache" section. For M4 cores, where the nocache
section does not exist, the chosen SRAM section must be a tightly
coupled memory block which cannot be cached. Add a note to all boards
with M4 SOCs that support caching explaining this issue, and enable EDMA
driver to locate TCDs in SRAM.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
LPUART driver should use shared ISR for all possible use cases,
including ASYNC API, so that multiple features requiring ISR can be
enabled simultaneously.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add support for inverting of PWM channel outputs in the pwm_nrf5_sw
driver by properly handling the `PWM_POLARITY_INVERTED` flag.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Align with other PWM drivers and treat the `pwm` parameter (described
ambiguously as "PWM pin") of the `pwm_pin_set_cycles` function as a PWM
channel, not an SoC pin. This will also make the driver consistent with
the `pwm-cells` property definition in the "nordic,nrf-sw-pwm" binding
and with related `DT_PWMS_*` macros.
The change described above requires also providing a way to specify
SoC pins that are to be assigned to the PWM channels. Hence, the commit
introduces in the "nordic,nrf-sw-pwm" binding the `channel-gpios`
property that replaces the `channel-count` one.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for inverting of PWM channel outputs in the pwm_nrfx driver
by properly handling the `PWM_POLARITY_INVERTED` flag.
The dts properties that were used so far for inverting of the outputs
("nordic,invert" and "chX-inverted") are kept as they are needed for
setting of the initial polarity, i.e. for setting the inactive state
of the outputs before any PWM signal generation is requested for them.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Align with other PWM drivers and treat the `pwm` parameter (described
ambiguously as "PWM pin") of the `pwm_pin_set_cycles` function as a PWM
channel, not an SoC pin. This will also make the driver consistent with
the `pwm-cells` property definition in the "nordic,nrf-pwm" binding
and with related `DT_PWMS_*` macros.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Handle PECI command PING properly, also get Write FCS Byte as a check.
Now it is possible to perform a PECI Ping without crashing the bus or
blocking it for subsequent PECI transactions.
It is also possible to check whether the Ping was sucessful
or not with the Write FCS Byte.
Signed-off-by: Johannes Meister <johannes.meister@kontron.com>
STM32H7 series offer alias addresses to access some registers that could
be accessed by the M4 core on dual core variants.
For instance RCC_AHB3ENR could be accessed at following offsets:
- 0x0D4: Accessible from both cores
- 0x134: Accessible from C1 (M7) core
- 0x194: Accessible from C2 (M4) core (if any)
For most single core H7 variants, the two first addresses were accessible,
but for some others (stm32h7ax/stm32h7bx), only the 'C1 accessible'
was available.
This fact used to be hidden by the use of LL API to access these registers,
providing the required abstraction (an mainly using the first alias
when possible to simplify implementation).
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Instead of computing hclk freq use for flash latency setting after
setting the PLLs, do it right at the beginning of the function.
Indeed, first step of PLL configuration is to switch back sysclock
to HSI source (in case it was initially PLL).
In that case, flash latency is theoretically set in consistency with PLL
driver hclk. So we should "measure" hclk freq at that step rather than
once sysclock is back on HSI.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC is the actual hclk freq (ie core clock);
Remove use of intermediate new_hclk_freq to fix and simplify code.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Some specific F1 variants don't handle flash latency.
Put flash latency dealing code under dedicated switch.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Review code style in set_up_fixed_clock_sources() for better
readability.
Use of 'if (IS_ENABLED(STM32_MSI_ENABLED))' inside '#if STM32_MSI_ENABLED'
is redundant but intentional as it is in line with remaining part of the
function (HSE/HSI cases).
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
On some parts, it could be required to use steps before applying
highest frequencies.
This was previously done as part of LL_PLL_ConfigSystemClock_FOO
utility functions which are no more used.
Use device tree to mention when this is required and implement it
in stm32_clock_control_init().
Additionally, fix the calls tp LL_RCC_SetAHBPrescaler, which require
use of ahb_prescaler helper.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Introduce a set_up_pll configuration function and make PLL configuration
an elementary step of the whole system clock configuration.
To implement this new, function make use of the existing series specific
files which allows series specific configuration when required.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Group fixed clocks inits in a unique set_up function.
Each clock is initialized depending on its dts status.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Simplify and clean up driver code using STM32 clocks DT based macros.
Added STM32_FLASH_PRESCALER macro for this purpose.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Factorize setting of frequency for busses.
Additionally, factorize SysCoreClock update.
The operations are now done twice in case of PLL since they are part
of LL utils PLL configuration function, but they are removed in next
commits.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Take advantage of previous work to configure PLL and remove
usage of LL_PLL1_ConfigSystemClock_FOO utils functions.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Now that fixed clocks are enabled in a single function, a
bunch of functions could now be removed.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move fixed clocks initialization to a single function.
Benefit is they could now be enabled independently of the
main clock configuration based on dts status and then be
used by peripherals even is not part of the main clock tree.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Flash latency setting could be factorized in a single location,
rather than split in each clock setting function.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move prescaler settings to the clock_control_init function.
At this step they will be set up twice in PLL case, this will
be fixed in a next step.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Set bus binding values using registers offset values.
As a consequence update driver to take this into account
in clock_on and clock_off functions.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add a check to avoid invalidating the cache when the latter is disabled.
Indeed, doing so can lead to a bus fault.
Signed-off-by: Thomas Altenbach <taltenbach@witekio.com>
Update the semihost_console implementation to use the semihost API
instead of manually constructing the supervisor calls.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Control the usage of semihosting with a dedicated symbol, instead of
implying semihosting from the usage of `SEMIHOST_CONSOLE`. This allows
semihosting to be used without the semihost console.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Do not soft-reset device when changing timing parameters as the
soft-reset will discard the configured CAN controller mode.
Fixes: #44837
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename CONFIG_CAN_STM32_CLOCK_DIVISOR to
CONFIG_CAN_STM32FD_CLOCK_DIVISOR to match driver Kconfig name.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add support for selecting the CAN clock source. Change previously
hardcoded value of PCLK1 to HSE.
Fixes: #44985
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Clean up of pin signals definitions previously used
by the pinmux driver, now deprecated by the use of
the pinctrl API.
Refactor device tree macros usage to make usage of
SPI instances more general.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
Differently from ESP32, the ESP32-S2 SoC has native
hal support to reset its own I2C FSM in case of failure.
This commit removes warnings related to unused reset
logic, which does not really apply to ESP32-S2.
It also removes code and data structures related to pin
information from the build when the target SoC supports
hardware mechanisms to reset the I2C FSM.
Finally, it checks at compile time if the preconditions
for correct bus recovery are being met.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
Clean up of pin signals definitions previously used
by the pinmux driver, now deprecated by the use of
the pinctrl API.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
though using pinctrl's subsystem, the I2C driver
keeps pin information in case of communication
failure. This information is needed in case of
FSM failure.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
Add a separate macro for registering offloaded sockets implementation,
along with information in the structure whether the implementation is
offloaded or not. This allows to differentiate between native and
offloaded socket implementations, which is critical for binding socket
API with an interface.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Instead of keeping a boolean informing whether a network interface is
offloaded at socket layer or not, keep a pointer to a function which
allows to create an offloaded socket. Native interfaces keep this as
NULL, while for offloaded interfaces it allows to connect an offloaded
socket implementation with an interface.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
update pin control implementation to use offsets for pin registers
instead of pin/port combination, to permit additional flexibility for
lpc devices with non contiguous register layouts. Update LPC55s69 pin
control names to align with newly generated pin control header.
This change also requires an update to the NXP HAL to use the new pin
control headers with offsets.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Do not silently ignore attempts to set an unsupported mode. Return
-ENOTSUP instead.
Fixes: #44706
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Only add the filter ID offset for extended CAN-ID filters if the filter
was added successfully. Raise log level from info to warning if filter
addition failed but only log it once.
Fix bounds check for removing an extended CAN-ID filter.
Fixes: #44721
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Commit a50b69dfb7 introduced a work-around
for FlexCAN errata 5461 and 5829, but neglegted to take the RX mailbox
offset into account when calculating maximum number of mailboxes
allocated for RX/TX.
Fixes: #44724
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Remove support for the optional API function can_get_max_filters() from
the STM32 bxCAN driver for now.
The function returns the Kconfig value for the maximum number of filters
but the true number of supported filters may be different due to the
filter nature of the STM32 bxCAN driver implementation.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Adds hda link in and out drivers. The link in and link
out channels of HDA have small differences
with the host channels. Updates the existing
cavs_hda drivers and code to account for these
differences.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
all the consumers of the obsolete pinmux driver is
updated to use pinctrl API, this commit removes
the pinmux driver and assosciated sections.
Signed-off-by: Vaishnav Achath <vaishnav@beagleboard.org>
This commit has the necessary changes to update the consumers
of pinmux driver(SPI, I2C, UART) and update the board specific
files to use the pinctrl interface.
Signed-off-by: Vaishnav Achath <vaishnav@beagleboard.org>
Add pinctrl driver for CC13XX/CC26XX family of SoCs
to facilitate transition from pinmux to pinctrl.
`IOCPortConfigureSet()` from TI hal driverlib used to
implement the generic pinctrl driver.
Signed-off-by: Vaishnav Achath <vaishnav@beagleboard.org>
1.Declare the member type to match the kscan_it8xxx2_regs, so
we needn't to transform the local structure in the function.
2.Stop using DRV_CONFIG, DRV_DATA, DRV_REG macros.
3.Delete unused register defines.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
This PR enables the Ansynchronous UART API for using the MCUX drivers.
It is tested on the RT1062EVKB.
Signed-off-by: Nickolas Lapp <nickolaslapp@gmail.com>
This PR fixes up the Scatter-Gather EDMA mode for the MCUX EDMA Driver,
as well as enabling the dma reload feature for the same EDMA Driver.
Signed-off-by: Nickolas Lapp <nickolaslapp@gmail.com>
Multiple instances of the device would have inadvertently shared the
LLI pool potentially causing nasty bugs.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Only initialize the FlexCAN IP core once since initialzing it has the
side effect of resetting the IP core and thus clearing previous settings
such as RX filters.
Fixes: #44680
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
redefine all the stm32 flash register bit Name from
FLASH_NSCR_xxx to FLASH_STM32_FLASH_NSCR_xxx
in all the zephyr drivers.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Adds the stm32u5 flash controller driver for this serie
to the existing stm32l5 flash driver part
Only 1 or 2 MB devices exist today (4MB is possible in the future).
This flash controller driver is adapted from the flash_stm32l5.c
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This adds the stm32U5 soc family to the flash driver
The flash controller has particular register names in the Non-Secure
area to be adapted for the driver.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The SAM0 fast-path implementation was broken, and partially fixed in
commits 8181eed and 8a99bd0...
This patch resolves an issue where the MSB is always zero on SAML21
parts, and appears to follow suit with the previous patches.
This patch also refreshes the commentary, and removes mention of the
"interleaved" operation that is no longer used - which appears to have
been problematic in the past.
In addition to this, it also resolves an off-by-one error in both the
fast_rx and fast_rxrx paths, which would have been tripped when
transmitting a zero-byte buffer.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
CAN in Automation (CiA) 301 v4.2.0 recommends a sample point location of
87.5% percent for all bitrates. However, some CAN controllers have
difficulties meeting this for higher bitrates.
Change can_set_bitrate() to use a sample point of 75.0% for bitrates
over 800 kbit/s, 80.0% for bitrates over 500 kbit/s, and 87.5% for all
other bitrates. This is in line with the sample point locations used by
the Linux kernel.
Regard a sample point error of more than +/- 5.0% as an error in setting
the bitrate. Previously, any sample rate error was accepted without
providing any feedback to the caller. This is in line with the CAN
sample point calculation criteria used by the Linux kernel.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Value changed from 100us to 150us. Value was not enough upon softreset.
This value was arbitrarily chosen and should be changed if more
information on the subject is provided.
Fixes#43794
Signed-off-by: Diogo Correia <dcorreia@protonmail.com>
Read KBC Status register before reading KBC Data register
in kbc0_ibf_isr; since read data will clear status.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Modify the Microchip MEC172x I2C driver to use the device tree I2C
clock-frequency property and driver initialization time. Also, fixed
missing idle scaling register programming.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
The cmd_write contains write verification that compares what has
been written with what it can read; the flash read operation
status was not checked which means that the bus or communication
problem was reported the same way as malformed write.
There have also been some optimization done by removal
of multiplications.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
The commit changes default buffer size for flash write operations
to be CONFIG_SHELL_ARGC_MAX dependent; there is no point to define
buffer longer than number of write bytes that will be extracted
from command line arguments.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
We put disabling SOC interrupt enable register (IER) sequence in
between disable and enable core's global interrupt to prevent race
condition.
After core interrupt enable instruction has been executed, the new
configuration of IER has not yet been fully processed due to
asynchronization between core and SOC's source clock.
If SOC interrupt is fired under the above condition, we will get
IRQ number 0 in ISR due to IER disabling taken effect.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
This way, when RTC is used as the generator, one PPI channel per each
configured PWM channel can be saved.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Use compare channel 0 in the generator for handling the PWM period.
This way all other channels offered by the generator can be easily
used for handling pulses on particular PWM channels.
So far the driver allowed to configure more than 3 channels for certain
TIMER instances, but since channel 3 was always used for the period,
the generation could not work in such setups.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The driver improperly uses the PWM channel index to reference
the GPIOTE channel to be used for the PWM signal generation.
Consequently, the PWM signal on a given channel can be correctly
generated only if both those indexes are by chance the same.
Fix this by switching to use the stored index of the actually
allocated GPIOTE channel.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Change CONFIG_BT_RECV_IS_RX_THREAD into a
choice:CONFIG_BT_RECV_CONTEXT with the following options
(names can be discussed further of course):
CONFIG_BT_RECV_BLOCKING
CONFIG_BT_RECV_WORKQ_BT
CONFIG_BT_RECV_WORKQ_SYS
This way users would be able to choose what to run most of
the BLE stack on, they wouldn't be forced to a single model.
We would default to CONFIG_BT_RECV_BLOCKING so that we wouldn't
need to change the system workqueue stack size by default, instead
asking users to do so if they select the CONFIG_BT_RECV_WORKQ_SYS option
Signed-off-by: Lingao Meng <menglingao@xiaomi.com>
Check if requested socket family, type and protocol are all supported by
the driver, instead of blindly acknowledging every possible variant.
Reuse switch statements checking valid parameter values that were
already part of simplelink_socket() function, by creating 3 helper
functions for conversion of each parameter (family, type and protocol)
from Zephyr to Simplelink values.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Check if requested socket family, type and protocol are all supported by
the driver, instead of blindly acknowledging every possible variant.
There is explicit support for UDP, TCP and TLS on top of IPv4.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Check if requested socket family, type and protocol are all supported by
the driver, instead of blindly acknowledging every possible variant.
There is explicit support for TCP on top of IPv4 and IPv6.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Check if requested socket family, type and protocol are all supported by
the driver, instead of blindly acknowledging every possible variant.
There is explicit support for UDP and TCP on top of IPv4 and IPv6.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Check if requested socket family, type and protocol are all supported by
the driver, instead of blindly acknowledging every possible variant.
There is explicit support for UDP, TCP and TLS on top of IPv4 and IPv6.
TLS seems to be supported only in 1.2 version, so allow just that
version.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Use NET_SOCKETS_OFFLOAD_PRIORITY instead of
NET_SOCKETS_OFFLOAD_PRIORITY, so that by default offloaded sockets will
be used instead of native sockets.
Addiitonally this allows to select relative priority of offloaded TLS
versus native TLS when used together with NET_SOCKETS_TLS_PRIORITY.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Use NET_SOCKETS_OFFLOAD_PRIORITY instead of
NET_SOCKETS_OFFLOAD_PRIORITY, so that by default offloaded sockets will
be used instead of native sockets.
Addiitonally this allows to select relative priority of offloaded TLS
versus native TLS when used together with NET_SOCKETS_TLS_PRIORITY.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Use NET_SOCKETS_OFFLOAD_PRIORITY instead of
NET_SOCKETS_OFFLOAD_PRIORITY, so that by default offloaded sockets will
be used instead of native sockets.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Use configurable NET_SOCKETS_OFFLOAD_PRIORITY instead of hardcoded value
in the driver itself. This allows to select relative priority of
offloaded TLS versus native TLS when used together with
NET_SOCKETS_TLS_PRIORITY.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Use configurable NET_SOCKETS_OFFLOAD_PRIORITY instead of hardcoded value
in the driver itself. This allows to select relative priority of
offloaded TLS versus native TLS when used together with
NET_SOCKETS_TLS_PRIORITY.
Drop the build assert, as always prioritizing offloaded TLS over native
TLS should be application developer choice.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
LTDC clock on F4/F7 series, is generated from PLLSAI which yet is not
implemented into Zephyr.
Signed-off-by: Konstantinos Papadopoulos <kostas.papadopulos@gmail.com>
the icm42670 from Invensense/TDK is a 6-axis accelerometer with
gyroscope and temperature sensing capabilities.
this initial driver does not support the devices 2K FIFO or many of the
other advanced features. Instead, only basic features are implemented.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@escolifesciences.com>
In the function iwdg_stm32_install_timeout, the test on watchdog ready
was inverted. So, if 2 successive calls were made to this function, the
value of the prescaler or counter reload was not taken into account.
Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
Move the code for socket instanciation from each driver
to a generic driver, that makes an instance of a socketCAN
net device for the chosen node.
Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
For delayed reception only NRF_802154_RX_ERROR_DELAYED_TIMEOUT is
expected to happen, others rx errors should be handled in regular
manner.
Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
Some failures are possible and expected from fime to time e.g.
NRF_802154_RX_ERROR_TIMESLOT_ENDED. Add informational log for the frame
reception failure to differentiate the specific case.
It can be helpful for analizing failure in network trafic.
Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
Implement the blanking_on and blanking_off API functions for
NXP's MCUX ELCDIF display driver
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The I2C address of the VL53L0X distance sensor can only be programmed
over the I2C bus. To do this:
1. The sensor is powered off or in standby mode
2. Power up the sensor, it boots with a default I2C address (0x29)
3. The I2C master sends a configuration command to set the new address
4. The sensor now communicates at the new address
In case there are more than one such sensor on the bus, they all have
the same address when starting up. We therefore need to first apply
step 1. on all of them. Then, sensor by sensor apply steps 2. to 4.
Because simple designs may not need to reprogram the address, we
introduce a new configuration option CONFIG_VL53L0X_RECONFIGURE_ADDRESS
If this setting is disabled, then the driver behaves as before.
If CONFIG_VL53L0X_RECONFIGURE_ADDRESS is enabled, then the driver does
the following:
- In vl53l0x_init(), apply step 1. This is done when the driver is
brought up when starting the system
- in vl53l0x_start(), apply steps 2. to 4. This is done when fetching
a sample, if the sensor has not been started yet.
Also, as cosmetic changes:
- add parenthesis around sub conditions in call to __ASSERT_NO_MSG
- gracefully handle unknown sensor channels in vl53l0x_channel_get
Signed-off-by: Titouan Christophe <moiandme@gmail.com>
Up until now, the vl53l0x driver only supported a single device, ie.
the first entry st,vl53l0x in the device tree. To be able to use
multiple sensors at the same time, create one driver data instance per
vl53l0x node in the device tree. Also split the constant driver config
from the runtime data.
Because the vl53l0x address is only configurable with an I2C command,
and is not persisted if the sensor is rebooted, multiple sensors can
be handled only if either:
- They are on different I2C buses
- Their addresses are coonfigured (by some external code) before
vl53l0x_init is called
Also use the i2c_dt_spec and gpio_dt_spec APIs, as it makes
the code more concise and readable.
Finally, to distinguish the logs mesages from different sensors,
prefix the text with the sensor name.
Signed-off-by: Titouan Christophe <moiandme@gmail.com>
As per the VL53L0X datasheet, in 2.9.1 "Power up and boot sequence",
time to boot is 1.2ms max, so we only have to wait at most 2ms.
Signed-off-by: Titouan Christophe <moiandme@gmail.com>
The limitation on HWINFO_NRF depending on not nonsecure was removed in
52be3030aa.
This caused problems when TF-M was not enabled.
This happens on the thingy53_nrf5340_cpuapp_ns board since this board
is not supported by TF-M.
Introduce proper dependency handling for the soc secure functions
to make HWINFO_NRF unavailable when no secure services exist in
nonsecure.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Extend Altera Jtag Uart driver support without Altera HAL driver
by default. uart_altera_jtag_hal.c renamed to uart_altera_jtag.c and
new config, CONFIG_UART_ALTERA_JTAG_HAL is introduced to allow driver
to use Altera HAL driver when needed.
Signed-off-by: Khor Swee Aun <swee.aun.khor@intel.com>
Only compile in async related code when at least one UARTE instance has
enabled async mode. This fixes an "unused function" warning when
`CONFIG_UART_ASYNC_API` is enabled but no UARTE instances has async
enabled. This is possible when the async API is being used for an RTT
UART driver.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Pass a copy of outbound argument structs to the implementation functions
as recommended for Zephyr system calls.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
All these sort of helpers were removed from tree a while ago, this one
was missed as it uses a custom name.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
If dev was null, caller would have faulted before since dev->api needs
to be accessed before reaching this point. Also, a well-defined device
will never have a NULL dev->config.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The API spec states that calling pin_set() with period set to 0 is
equivalent to set the PWM channel to an inactive level. Some drivers
treat this input as invalid (-EINVAL), however, it's an unsupported
feature. Maybe it's due to copy&paste effect? This changes error message
to be clear and changes return value to -ENOTSUP for this case.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The API call checks for this condition before calling the pin_set driver
OP call, so drivers don't have to do this check now.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add lpc iocon pinctrl driver. Driver handles IOCON clock initialization as
well as IOCON pin configuration
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Current code uses per-core register to check interrupt status and
dispatch handlers. However to disable/enable the interrupt, core
zero register is always used.
While the handlers in _sw_isr_table are common for all cores,
the status bits should still be handled separate for each core.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Verify read access to the timing and timing_data parameters in
z_vrfy_can_set_timing() and pass a copy of these structs to the
implementation as recommended for Zephyr system calls.
Remove unnecessary typecasts.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The MCP2515 requires phase segment 2 to be at least 2 time quanta.
The prescaler has a 6 bit register, allowing for real-world prescaler
values between 1 and 64.
Fixes: #44484
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Fix the bounds check for the data phase prescaler timing parameter. The
maximum allowed value is 0x20, not 20 decimal.
Fixes: #44483
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Take CAN_SJW_NO_CHANGE into account when bounds checking the sjw timing
parameter values.
Fixes: #44482
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rather than specify input clock for each peripheral individually, instead
specify the relevant clocks in DTS.
This will enable easier support for non-default coreclk on fe310 in a
follow-up CL.
Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>
Updates to MEC15xx i2c error handling:
1. timeout_seen handling is simplified. For all errors we
continuously poll
2. error flag is not set for timeout_seen handling and hence
recover_from_error() call is not required.
3. In i2c_xec_poll_write(), ETIMEDOUT for (START + ADDRESS) byte
is treated as default error and error_seen flag is set (instead
of timeout_seen flag)
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Even if not used DMA HAL is required in F4 SD HAL driver. Just
as for L4/F7 series that have been added before.
Add it for this specific serie.
Signed-off-by: John Kjellberg <kjellberg.john@gmail.com>
Setting event timer count at least 1 hw count, it's redundant,
so I clean up this else {} case. And add the comment about
the K_TICKS_FOREVER and INT_MAX case.
NOTE:
CONFIG_TIMEOUT_64BIT = y, then k_ticks_t type is int64_t.
K_FOREVER is (k_timeout_t) { .ticks = (K_TICKS_FOREVER) },
and K_TICKS_FOREVER is ((k_ticks_t) -1),
so K_FOREVER is a k_timeout_t type structure, and
the member ticks: type int64_t,
value (= K_TICKS_FOREVER) 0xFFFF FFFF FFFF FFFF.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Add a new boolean devicetree property `tx-rx-swap` to the
st,stm32-usart binding, used to control TX/RX swap during
device initialization.
Signed-off-by: Alexander Mihajlovic <a@abxy.se>
Remove the limitiation in HWINFO_NRF not working in non-secure
configuration. Use the exposed soc_secure_read_deviceid function
that accesses the device ID through the secure services.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Allows the setting of ieee802154 EUI64 address in non-secure processing
environment by reading the FICR device ID through the secure service.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
The can_get_max_bitrate() is an optional API function. Limit validation
to the CAN device driver pointer.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Instead of selecting appropriate HAS_HW_NRF_* options for particular
nRF SoCs (and simulated nRF52 target), set their values basing on
information from devicetree.
Correct also semantics of those options so that they are set only when
a corresponding DT node is enabled. This allows using them directly in
Kconfig dependencies of Zephyr drivers for nRF peripherals. Update
appropriately these dependencies.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The function in its current form is confusing because unlike other
similarly named functions (dt_nodelabel_has_prop(), dt_node_has_prop())
or devicetree macros (DT_NODE_HAS_COMPAT(), DT_NODE_HAS_PROP()), this
function takes into account the status of the checked node and returns
"y" only when the node is enabled.
This commit redefines dt_nodelabel_has_compat() so that it no longer
checks the node status, and for cases where the previous functionality
is needed, a new function named dt_nodelabel_enabled_with_compat()
is introduced as a replacement.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
ESP32C3 requires master init call to enable its clock
gate. Without this, SPI interface may not initialize
properly.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Don't leave idle state if soc isn't waked-up by an interrupt.
(We change to check interrupt controller register)
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Verify the get_state API call in z_vrfy_can_get_state(). Adjust sizeof()
arguments to match the rest of the file.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Verify the add_rx_filter API call in z_vrfy_can_add_rx_filter_msgq() as
this is used by the underlying implementation. Remove unnecessary
typecasts.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Do not attempt to verify that the current thread has access to the void
*user_data argument to z_vrfy_can_send(). The size of the data is not
known and no driver code will try to dereference it (it may not even be
a valid pointer).
Remove unnecessary typecasts from z_vrfy_can_send().
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
To allow for high level robustness tests on protocols, add an interface
to control the packet drop rate. A rate of 0 means no packet dropped, a
rate of 1 means all packets being dropped.
Signed-off-by: Sjors Hettinga <s.a.hettinga@gmail.com>
ITE RTOS timer HW frequency is fixed at 32768Hz, because this
clock source is always active in any EC mode (running/doze/deep doze).
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
We don't need to convert the free run clock count,
that will be converted by the kernel
(base on CONFIG_SYS_CLOCK_TICKS_PER_SEC),
so we should return the HW register count value directly.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
When NO_OPTIMIZATIONS is set and asynchronous API is used but
HW counting is not enabled then linking fails because of lack of
nrfx_timer code. When optimization is enabled, linker is smart
enough to figure out that nrfx_timer is not used.
Converting decision function from static inline function to macro
which is handled correctly with optimization off.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Rather than defining them in the header, require a set of defines
be provided to cavs_hda.h as part of the expected input to the API.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Adds an initial driver for HDA streams on cAVS. A common code base is
provided for all HDA streams while the drivers are identified
differently as they have small behavior differences.
Uses dma_status to describe the positions for read/write. Uses dma_reload
to inform when to move the read/write positions. This closely follows
how HDA is being used in SoF
Simple test case is provided for both drivers.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
In order to get rid of the duplication of the code that we had until now
in the tree, consolidate the handling of multiple calls to
bt_hci_cmd_send_sync(BT_HCI_OP_LE_RAND, ...) in a single location,
namely in hci_core.
This allows all of the users of this HCI command to use a single
implementation of the iterated sending of the HCI command to fill a
buffer with random bytes.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
bt_hci_cmd_send_sync() requires the caller to unref the buffer that is
sent back as a response. Add the missing call to net_buf_unref()
accordingly.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The function npcx_clock_get_sleep_ticks is currently guarded by
CONFIG_PM && CONFIG_NPCX_PM_TRACE. The other codes guarded by
CONFIG_NPCX_PM_TRACE is used to trace and will print a lot of messages.
The user who wants to use npcx_clock_get_sleep_ticks has to enable this
flag and get a lot of console spam. This commit removes the guard
CONFIG_NPCX_PM_TRACE and makes this function is available when
CONFIG_PM is defined.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
This driver exectue connecting the shared irq one time for
every status "okay" vcmp nodes, then it will show enable
the same irq multiple times when build.
So I check whether the irq is enabled or not, if yes,
we needn't to enable again. And we will figure out the
triggered channel in vcmp_it8xxx2_isr().
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Currently IEEE802154_NRF5_DELAY_TRX_ACC can exceed the max possible
value. Add upper bound to limit this.
Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
Store an optional reference to the zephyr,flash-controller choice. If
available and no user input is provided, it will be used as the default
flash device. If not available, error message will be more explicit.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Fix the signature of the CAN bus recovery functions in the Bosch M_CAN
driver frontends.
Fixes: #44345
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Do not force CONFIG_CAN_AUTO_BUS_OFF_RECOVERY=y. Instead fix the return
type of the mcp2515_recover() function and return -ENOTSUP.
Fixes: #44344
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Align clock accuracy used in CSL calculations to the value in platform.
This is recomended setting for devices working in wide range
temperature. Nevertheless it can be profiled in end product to decrease
CSL window duration and finally the power consumption.
Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
Add build time optional PINCTRL support to the Microchip XEC TACH
driver shared by MEC15xx and MEC172x families.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Update Microchip XEC TACH driver to support MEC172x.
Standardize device tree properties between chips.
Standardize device structure usage.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
If the dts defines the PWM complementary output, then the OCN
must be init in place of the OC state and polarity.
This is an exclusive setting for this pin.
The channel in LL_TIM_OC_SetPolarity can be the complementary one.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit changes the timing_min_data prop_seg
initialization of st,stm32-fdcan drier to zero.
Additionally the nominal sync jump width limits
are also adopted to new values 1 and 128.
This was not tested until recently and therefore
caused the can timing test to fail on stm32g4
after PR #44197 got merged.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
There wasn't the build error in PR#44060,
but now tool chain isn't happy about putting the arch_busy_wait()
to __ram_code section, then it shows a build error:
https://github.com/zephyrproject-rtos/zephyr/runs/5755633537?check_suite_focus=true#step:10:933
So I remove __ram_code of arch_busy_wait(), and this will need
extra fetch code time when arch_busy_wait() code isn't in
the dynamic cache.
Verified by follow test pattern:
west build -p auto -b it8xxx2_evb tests/drivers/flash
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Customize busy wait timer for micro-seconds accuracy.
Verified by follow test pattern:
west build -p auto -b it8xxx2_evb tests/kernel/timer/timer_api
west build -p auto -b it8xxx2_evb tests/kernel/timer/timer_error_case
west build -p auto -b it8xxx2_evb tests/kernel/timer/timer_monotonic
west build -p auto -b it8xxx2_evb tests/kernel/timer/starve
west build -p auto -b it8xxx2_evb tests/kernel/context
west build -p auto -b it8xxx2_evb tests/drivers/adc/adc_api
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
net_pkt_alloc_buffer() will use the maximum packet length of
NET_IPV4_MTU in case the interface MTU is smaller than this. Because of
this, the using the loopback interface with smaller MTU leads to
additional fragmentation at the TCP layer, which impacts performace and
requires more network buffers for tests to execute.
Fix this by matching the loopback interface MTU with NET_IPV4_MTU.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Add Kconfig for STM32 LTDC driver
Add STM32 LTDC driver C source
Update display drivers CMakeLists with the new driver
Update display drivers Kconfig with the new driver
Signed-off-by: Tomislav Milkovic <tomislav.milkovic95@gmail.com>
Convert can_calc_timing() + can_calc_timing_data() to syscalls and use
the newly added syscalls calls for determing the minimum/maximum
supported timing parameter values.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add CAN system calls for getting the minimum/maximum timing values
supported by a given CAN controller device driver instance:
- can_get_timing_min()
- can_get_timing_max()
- can_get_timing_min_data()
- can_get_timing_max_data();
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Reset the ESP modem inside the device initialisation function so that
errors can be detected through the use of `device_is_ready`.
Fixes#43891 for this driver.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Move the network device instantiation macro to above the esp_init
function so that static variables declared by the macro are visible to
the init function.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
The purpose of this change is to allow to enable more than one
backend at once by removing choice from ipc-service backend Kconfig
and depending backend Kconfig option on existing of correct compatible.
Overwriting IPC_SERVICE_BACKEND option in some places is removes
as no longer needed.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
Ports the SOF DesignWare DMA code to Zephyr.
Effectively replaces much of what was the designware driver as this
driver enables scatter gather which the older driver did not.
* Enables cyclic transfer description lists when the cyclic config
param is given.
* Enables linear link position usage with cAVS GPDMA.
* Passes suspend/resume, scatter/gather tests.
* Provides status updates of the transfer through dma_get_status()
* Enables reloading a cyclic transfer with dma_reload()
* Enables dma handshakes using the dma_slot config param.
* cAVS specifics remain in the dma_cavs_gpdma driver.
Co-authored-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Co-authored-by: Tom Burdick <thomas.burdick@intel.com>
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Don't use the old gpio_dev spi_cs_control's member
since it's been deprecated in favor of gpio_dt_spec.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Based on introduction of plain GPIO configurations in STM32 pinctrl
bindings, update STM32 pinctrl/gpio drivers to make this functionality
available.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Before updating stm32 pinctrl/gpio drivers to support plain GPIO
feature, rework pin configuration functions headers to provide
more clarity on the arguments and the information they convey:
- pin configuration
- pin function
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add backlight gpios property to mcux display driver, so that the driver
can correctly initialize the backlight gpio control.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
In order for pinctrl support to be complete, RT series GPIO driver must
support pinmuxing within the driver level. RT series pinmux settings do
not correspond directly to gpio port/pin numbers, so use DTS mappings to
pinctrl nodes to select and apply pinmux settings in the gpio driver.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Enable pinctrl driver for usdhc. USDHC driver uses custom pinctrl states
for fast, slow, and medium signal frequencies, as well as pin pull for
SD detection.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Enable pinctrl for flexspi driver. Note that when flexspi is being using
in XIP mode, pinctrl settings are not required and will not be applied.
Pinctrl settings are only required when the flexspi device being used is
not the one used for XIP.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
RT11xx series has similar pin configuration peripheral to RT10xx, with
some differences in register layout. Create new pinctrl definition
header file, and reuse existing driver code for RT10xx.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
iMX.RT parts use a GPR register for some pinmux settings. Update pinctrl
driver to support this GPR register definition.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
mhz19b_sample_fetch() from mhz19b sensor driver didn't support
SENSOR_CHAN_ALL chan parameter value, so sensor_sample_fetch() didn't
work, always returning -ENOTSUP (sensor_sample_fetch_chan() worked, if
called with SENSOR_CHAN_CO2).
This change enables mhz19b sensor to work both with
sensor_sample_fetch() and with sensor_sample_fetch_chan() with
SENSOR_CHAN_CO2.
Signed-off-by: Konstantin Mochalov <incredible.angst@gmail.com>
This implements the msi_device_setup() callback for ECAM controllers
used with an ARM GIC ITS MSI message translater.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Define the MSI/MSI-X APIs to be used with the Generic PCIe Controller API.
It notably adds the msi_device_setup() callback to the PCI Express
Controller API used to allocate and setup the MSI/MSI-C vectors on the
MSI message translater HW.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Add get_msi_addr() callback to ITS API to retrieve the GITS_TRANSLATER
physical address to be set in the MSI message address field.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Move the `pm_device_runtime_init_*` functions from <pm/device_runtime.h>
to <pm/device.h>. The initial device state should be settable
independently of whether `CONFIG_PM_DEVICE_RUNTIME` is enabled.
This also resolves a compilation error when attempting to use these
functions without also including <pm/device.h>.
Function documentation is also updated to be more general than only
referencing runtime PM, as this also applies to system PM and manually
run actions.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
This update Atmel sam and sam0 ethernet gmac and mdio drivers to use
pinctrl driver and API. It updates all boards with new pinctrl groups
format.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This add support to pinctrl at Atmel sam0 rtc driver. It allows to
define pins to be used for tamper detection.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This add support to pinctrl at Atmel sam0 dac driver. It updates all
boards with new pinctrl groups format and drop pinmux entries.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This add support to pinctrl at Atmel sam0 usb dc driver. It updates
all boards with new pinctrl groups format and drop pinmux entries.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This add support to pinctrl at Atmel sam0 tcc pwm driver. It updates
all boards with new pinctrl groups format and drop pinmux entries.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This add support to pinctrl at Atmel sam0 i2c driver. It updates all
boards with new pinctrl groups format and drop pinmux entries.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This add support to pinctrl at Atmel sam0 spi driver. It updates all
boards with new pinctrl groups format and drop pinmux entries.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update Atmel sam0 serial drivers to use pinctrl driver and API. It
updates all boards with new pinctrl groups format.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update current Atmel sam0 pinctrl initiative to current Zephyr
pinctrl API. It update current devicetree bindings and add the sam0
pinctrl driver.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update Atmel sam qdec sensor driver to use pinctrl driver and API.
It update board and sample with new pinctrl groups format.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update Atmel sam pwm driver to use pinctrl driver and API. It
updates all boards with new pinctrl groups format. In addition this
remove all remaining manual pinmux at board level.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update Atmel sam canfd driver to use pinctrl driver and API. It
updates all boards with new pinctrl groups format. In addition this
add missing entries to run automated tests for can/canfd drivers.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update Atmel sam ssc driver to use pinctrl driver and API. It
updates all boards with new pinctrl groups format. In addition this
remove DEV_NAME macro at sam xdma driver.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update Atmel sam afec driver to use pinctrl driver and API. It
updates all boards with new pinctrl groups format. In addition, it
add overlay files to allow run samples/drivers/adc example.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update Atmel sam usb drivers to use pinctrl driver and API. It
updates all boards with new pinctrl groups format.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update Atmel sam counter driver to use pinctrl driver and API. It
updates all boards with new pinctrl groups format.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update Atmel sam i2c drivers to use pinctrl driver and API. It
updates all boards with new pinctrl groups format. This add missing
i2c-0 alias into sam4l_ek board.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update Atmel sam spi driver to use pinctrl driver and API. It
updates all boards with new pinctrl groups format.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update Atmel sam serial drivers to use pinctrl driver and API. It
updates all boards with new pinctrl groups format.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This update current Atmel sam pinctrl initiative to current Zephyr
pinctrl API. It update current devicetree bindings and add the sam
pinctrl driver.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This is a follow up to commit a1ab8da862.
Several calls to the dt_node_bool_prop function in Kconfig.nrfx for
the counter drivers are done with wrong parameters. The function
expects a full node path, but it is provided with only the node name
component.
Fix those by using dt_nodelabel_bool_prop instead, as such function is
available now and it is more suitable for such cases.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for S2B1 quad-enable-requirements.
Add wrsr call for various QER modes
S2B1v6 mode tested with Winbond W25Q128JV series and pp4o and read4io
commands.
Signed-off-by: Zack Cornelius <zcornelius@securityesys.com>
Fixes a case for the asynchronous UART API where
only single buffer was attached to the UART, after
filling this buffer release event was trigger first
time and after disabling UART the release event was
triggered again for the same buffer.
Signed-off-by: Kamil Gawor <Kamil.Gawor@nordicsemi.no>
Enable the alt function with setting both bit5@0xf016f1 and
bit6@0xf02046 bits will cause internal leakage.
Only bit6@0xf02046 bit is required to enable the alt function,
so fix it.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Add a dummy driver for the `vnd,pwm` compatible to allow compilation of
drivers utilising PWM when running "build_all" tests.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
This commit makes the transition from the pinmux driver to the pinctrl
driver. It also modifies UART, SPI and I2C drivers used in FE310-based
boards to use the new pinctrl API.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
In case of BlueNRG-MS, it is necessary to prevent SPI driver to release CS,
and instead, let current driver manage CS release.
So, add SPI_HOLD_ON_CS to operation field
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Use logic (and not pin value) for kick_cs() and release_cs()
because potential pin value invertion (Active LOW)
is handled in gpio_pin_set()
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
In npcx adc driver, we select 'Scan' (Multiple Channels Operation Mode)
mode by default. It means that selected channels in ADCCS will be
converted automatically. Then, read the measured data from CHNDAT
registers if EOCCEV (Event is set after all selected channels are
converted.) flag in ADCSTS is set.
But we enable the wrong interrupt type, INTECEN, during adc
initialization. Ec will send the interrupt after each channel in ADCCS
is converted. It has no harm to the current driver since the driver
reads all selected channels and turns off ADC converter only after
EOCCEV is set in ISR. But it does generate spurious interrupts.
This CL enables the correct interrupt type, INTECCEN, during adc
initialization. Ec only sends the interrupt after all of channels in
ADCCS are converted.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Workaround for errata 192 is unnecessary as it is applied within
nrfx_clock_calibration_start().
Fixes#43930
Signed-off-by: Xudong Zheng <7pkvm5aw@slicealias.com>
Added basic support for enter 4-byte addressing command.
Patch supports command 0xB7 (Enter 4-Byte Address Mode),
with or without preceding WREN.
Similar as for SPI-NOR the `enter-4byte-addr` property of
memory node is used or describing how to Enter 4-Byte Addressing
mode.
Worth to notice that along with that property the `address-size-32`
property is expected as it switch the driver to use 4-byte addressing
in operations.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Adds an entropy driver that uses Bluetooth HCI commands as its source
of randomness. As this method is blocking, the ISR API is not supported.
As this method will range from relatively slow (same core Bluetooth HCI
controller) to extremely slow (UART HCI Bluetooth controller), use the
xoshiro PRNG by default for RNG generation.
Implements #37186
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
The Kconfig function "dt_node_has_prop" was using label as its
parameter, where other functions use either chosen or path.
The documentation says that the parameter is path, so this patch
makes the function as documentation says and as other functions
in the file.
The additional nodelabel functions were added as counterparts that
are using nodes labels instead of paths.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
This fixes an issue where we would drop the hci event if allocation from
the hci event buffer pool didn't immediately succeed.
The behavior is now to block on allocation, and warn the user every 10
seconds.
Signed-off-by: Jonathan Rico <jonathan.rico@nordicsemi.no>
the tlc5971 driver uses spi for controlling the global brightness
and individiual pixel brightness of a daisy chain of tlc5971
devices.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@escolifesciences.com>
If a user has a 1GB external flash it is currently not possible
to configure this through DTS. To allow for such a configuration
we add an option which specifies the size in bytes not bits.
Signed-off-by: Håkon Øye Amundsen <haakon.amundsen@nordicsemi.no>
flexspi driver should not interact with flash whenever possible, and
should never use flash while in a critical write or erase section.
Move device data to RAM to prevent this read-while-write hazard.
Fixes#44043
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
flexspi driver should not interact with flash whenever possible, and
should never use flash while in a critical write or erase section.
Move device data to RAM to prevent this read-while-write hazard.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
flexspi driver should not interact with flash whenever possible, and
should never use flash while in a critical write or erase section.
Move device data to RAM to prevent this read-while-write hazard.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
flexspi driver should not interact with flash whenever possible, and
should never use flash while in a critical write or erase section.
Move device data to RAM to prevent this read-while-write hazard.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
flexspi driver should not interact with flash whenever possible, and
should never use flash while in a critical write or erase section. Move
device data to RAM to prevent this read-while-write hazard.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
In the newer ESP32 AT command versions, the CWMODE command takes an
optional parameter (<auto_connect>) which controls whether the module
will automatically attempt to connect to an AP when switching modes.
This parameter defaults to enabling auto-connect if not specified.
Without this change, modules can successfully connect to an AP before
the `CWAUTOCONN=0` command is processed, resulting in a
`NET_EVENT_WIFI_CONNECT_RESULT` before `NET_EVENT_IF_UP`.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Enable pinctrl for ethernet mcux driver, and update kinetis DTS node to
include labelling for PTP node, to enable driver to access pinctrl
properties.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
`reset_cause` with no arguments will print the device id.
Change it to print the reset cause.
Tested on nucleo_f767zi.
Signed-off-by: Cezar Burlacu <cezar@embeddedp.ro>
Do not use __disable_irq when Zero Latency IRQs are enabled
and the Zephyr open source Bluetooth Controller is used with
Zero Latency IRQs support.
Application shall ensure their Zero Latency IRQ ISRs do not
invoke any kernel APIs.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Add an explicit Kconfig option to enable use of
__disable_irq() in nRF RTC timer driver to prevent higher
priority contexts (including ZLIs) that might preempt the
handler and call nrf_rtc_timer API from destroying the
internal state in nrf_rtc_timer.
Relates to commit fcda8699cb ("drivers: timer: extend
nrf_rtc_timer").
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Add build time optional PINCTRL support to common PWM driver
for Microchip XEC MEC15xx and MEC172x families.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Add support for MEC172x series to Microchip XEC PWM driver.
Standardize device tree properties for both SoC families.
Standardize device structure usage.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
G4 series have specific LL ADC API that discriminate ADC1 and ADC5
channels. Take this into account in adc_stm32_setup_channels().
Additionally, fix this function to use LL defines as argument of macro
__LL_ADC_CHANNEL_TO_DECIMAL_NB, as good practice.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The NRF_TWI_Type struct doesn't have an homogeneous layout between
nRF51/52 series. This patch tries to select the right layout based on
selected SoC.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Avoids segfault in situations when we can't acquire an RX buffer, and VLAN
or PTP code is enabled which tries to inspect packets by adding a pkt
check.
Signed-off-by: Alex Sergeev <asergeev@carbonrobotics.com>
Include a pointer to the CAN controller device for the CAN
transmit, receive, and state change callback functions.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add generic support for can_get_max_filters() to the Bosch M_CAN
base driver and use it in all driver frontends.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Extend the macro with checks for DT properties related to pin
assignments that are defined but would be ignored, depending on
whether PINCTRL is enabled or not, what presumably indicates
a resulting configuration different from what the user expects.
Add also a possibility to indicate that the pinctrl-1 property
should not be checked because the caller does not support the
sleep state.
Rename the macro so that its name better reflects its function.
Update accordingly all drivers that use it.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
When configuring the pwm capture, the callback function might
be reset, this i not an error. However the isr should not call it
and enabling the capture should always provide a callback function.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Timing registers of I2C 0/1/2 can be adjusted to pass SI test.
We can control the tSU;STA and tHD;DAT simultaneously by changing
the value of the register IT83XX_SMB_4P7USL, and we can control
the tSU;DAT by changing the value of the register IT83XX_SMB_250NS
as well.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
As mentioned in #42882, the I2C of IT8XXX2 is designed for two different
IP blocks, so this PR divides this I2C driver into two compatibles.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
A nordic hal update was made around the same time that anomaly 122 on
nrf52840 was fixed. This update introduced qspi_pins_deconfigure() in
the nrfx_qspi_uninit(). With that, the CS pin from QSPI becomes a
floating pin after anomaly 122 uninit is executed.
Set the CS pin high after the uninit to fix this.
I'm assuming that floating CS pins that are likely to experience EMI
can impact power consumption. That was the case with my custom board.
My custom board with nrf52840 and MX25R3235F running the hello_world
sample was consuming 2.3 mA before this patch, and 30 uA after
applying it.
Signed-off-by: Rodrigo Brochado <git.rodrigobrochado@gmail.com>
Values of boolean DT properties need to be checked with DT_PROP(),
not DT_NODE_HAS_PROP(). Fix two such incorrect calls in the nRF UART
driver.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This macro incorrectly uses DT_NODE_HAS_PROP() to check the truth value
of the "disable-rx" boolean property. In consequence, it always assumes
that RX is disabled and the low power mode needs to be used. Fix this
by replacing the check with DT_PROP().
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Using IRQ as source for interrupt values can
fail when installing irq_connect_dynamic, as
IRQ can previously be enabled. This updates
the logic to use source map and allows
default irq_enable() and irq_disable() to call
esp32c3 interrupt allocator implementation.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
After the ADC interrupt is enabled, the interrupt will be triggered
and the ADC channel valid data will be read, so there is no time
limit here.
Refer to the timeout is also set to K_FOREVER in the function of
adc_context_wait_for_completion().
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
In 90c6dc5e7f, a change was introduced to
allow modem commands determine if they have enough data or not.
In a situation where some data is missing, the command should return
-EAGAIN and this should lead to another call of the command with more
data.
In this commit, the argument parser was also allowed to return -EAGAIN
to request more data due to missing arguments.
However, this can't work because in cmd_handler_process_rx_buf() before
calling process_cmd():
- we make sure that a CR/LF has been found.
- we compute match_len which can't be greater than the distance to the
next CR/LF.
Therefore, even if the command argument parser ask for more data by
returning -EAGAIN, next call will have the same value for match_len,
meaning that the parsing of argument will result in the same missing
argument situation.
This leads to an infinite loop of parsing the same data over and over in
an infinite loop.
This commit change this behavior to always drop the data in such a
situation. The command will not be answered and will therefore timeout,
but at least, next commands will correctly parse their returned data.
Signed-off-by: Xavier Chapron <xavier.chapron@stimio.fr>
This API has be removed in Zephyr 2.8, and does not need to be used
as a static function. Because flash_it8xxx2_write_protection(false)
is not supported. If the IT83XX_GCTRL_EPLR register in the
flash_it8xxx2_write_protection(false) is written as 1, the flash
write region will not be protected later, only be cleared by
power-on reset.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
The pm_constraint_* APIs were effectively used by the policy manager
only. This patch renames the API to the policy namespace and makes its
naming more explicit:
- pm_constraint_set -> pm_policy_state_lock_get()
- pm_constraint_release -> pm_policy_state_lock_put()
- pm_constraint_get -> pm_policy_state_lock_is_active()
The reason for these changes is that constraints can be of many types:
allow/disallow states, impose latency requirements, etc. The new naming
also makes explicit that the API calls will influence the PM policy
behavior.
All drivers and documentation have been updated accordingly.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
the device data struct pointer is passed to the thread function when
creating the thread, but the thread function did a int-to-pointer cast
which did not work as intended, causing exception during runtime.
now, we just pass the pointer directly without casting, which is the
pattern seen in other sensor drivers.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@escolifesciences.com>
Re-running the script that checks for the const qualifier missing on
struct device ISR's parameter.
The script also changes the parameter 'arg' to 'dev' when relevant.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
- Move SWJ_CFG initialization into pinmux.
- Don't disable the AFIO clock after SWJ_CFG
initialization.
- Apply '111' to the SWJ_CFG bits upon remap
application, that fixes the remap usage.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
- Move SWJ_CFG initialization into pinctrl.
- Don't disable the AFIO clock after SWJ_CFG
initialization.
- Apply '111' to the SWJ_CFG bits upon remap
application, that fixes the remap usage.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
The Serial Wire JTAG configuration is moved to
F1 pinctrl DTS.
The configuration in GPIO didn't apply to the
majority of the STM MCUs except F1.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Use the Kconfig macros of MODEM_GSM_RX_STACK_SIZE and
MODEM_GSM_WORKQ_STACK_SIZE directly without another macros.
They are well within the column limit and this make them
more obvious that they are actually configurable by Kconfig.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
The driver should check for cellular registration before
attempting to attach to packet service, otherwise it will just
fails.
This patch waits for registration for 300 seconds, configurable
by CONFIG_MODEM_GSM_REGISTER_TIMEOUT, if it isn't registered by
then, it would toggle the airplane mode using AT+CFUN & wait
again, until it is registered, or `gsm_ppp_stop` is invoked.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Back with commit a1b77fd589 huge chunk of code was automatically
refactored using a script, which in turn left some macros meaningless
Signed-off-by: Hristo Mitrev <hr.mitrev@gmail.com>
Just use dev->name. This change follow same principles applied when
DEV_CFG and DEV_DATA macros were removed.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Move the can_set_bitrate() function to can_common.c as it is getting
quite long for a static inline function.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add support for getting the maximum supported bitrate in bits/s for CAN
controller/transceiver combination and check that a requested bitrate is
within the supported range.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add support for the new pinctrl API to the nRF PWM driver.
Update code of the driver and the related devicetree binding.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for the new pinctrl API to the nRF QDEC driver.
Update code of the driver and the related devicetree binding.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for the new pinctrl API to the nRF QSPI NOR flash driver.
Update code of the driver and the related devicetree binding.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for configuring pins to be used by the nRF PWM, QDEC, and
QSPI peripherals.
A new custom property "nordic,invert" is added to the pin configuration
group binding to allow configuring PWM channel outputs as inverted.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for the new pinctrl API to the DMIC driver that handles
the nRF PDM peripheral. Update code of the driver and the related
devicetree binding.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for the new pinctrl API to the nRF I2S driver. Update code
of the driver and the related devicetree binding.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
I introduced some errors during the gpio_dt_spec/i2c_dt_spec conversion
process. This patch fixes the issues so that driver builds.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Driver implementation for the Xilinx Processor System MIO / EMIO GPIO
controller as contained in the Zynq-7000 and ZynqMP (UltraScale) SoCs.
The driver is split up into source and header for a parent controller
device and source and header for 1..n child GPIO pin bank devices.
The parent device driver takes care of IRQ handling, the GPIO pin bank
driver provides pin / bank access according to the API defined by the
GPIO subsystem.
More than one device for this type of GPIO controller is required as
it provides access to a number of GPIO pins well in excess of the 32
pins addressable by the current GPIO API (whereever parameters or
return values come in the form of a bit mask):
- Zynq-7000: 54 MIO GPIO pins, 64 EMIO GPIO pins in 4 banks.
- ZynqMP: 78 MIO GPIO pins, 96 EMIO GPIO pins in 6 banks.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
Use the devicetree properties to determine if the dedicated temperature or
voltage reference channels should be configured for the ADC.
Fixes#43750.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
The stm32's I2C peripheral has a maximum transmission size. Larger trans-
action, that I2C itself allows, can be achieved be using the peripheral's
reload-mode.
In order to do that, st's low-lever drivers need to be informed according-
ly. The previous iteration of the code mishandled the next_msg_flags para-
meter, causing the issue to manifest itself.
This refactors the inner loop of i2c_stm32_transfer() into its own func-
tion. This passes the message parameter by value in order to be able to
mutate its state while keeping the original datum from the user intact
during the entire procedure.
Fixes#43235
Signed-off-by: Frank Terbeck <ft@bewatermyfriend.org>
Claim the net_context mutext associated with a socket before claiming
the socket mutex. The receive callback claims the net_context mutex
internally, which will now always succeed immediately.
The TX path claims the net_context mutex before the socket mutex, and if
we don't use the same order, we can end up in a deadlock.
Fixes#43470.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
It may happen that after the flash chip was previously put into
the Deep Power Down mode, the system was reset but the flash chip
was not. Consequently, the flash chip can be in the DPD mode when
the QSPI driver is initialized. Some flash chips will just exit
the DPD mode on the first CS pulse, but some need to receive the
dedicated command to do it and they will not respond to any other
commands including those that the driver need to perform to complete
its initialization ("Read status register" and "Read JEDEC ID").
This commit adds sending of the "Release from Deep Power Down"
command right after initialization of the QSPI interface to avoid
the problem described above.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Previous commit 579ca90e25 to
build wifi drivers as a library changed the include path for
the WINC1500 driver, which results in the include path being
local to the library. However, the Atmel HAL requires
wifi_winc1500_nm_bsp_internal.h to in the search path. So
change the include path to be global.
Fixes#43456
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Refactors the remaining I2S drivers to use the shared driver class
initialization priority configuration, CONFIG_I2S_INIT_PRIORITY, to
allow configuring I2S drivers separately from other devices. This is
similar to other driver classes.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to be
consistent with other driver classes.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fix register bit field when clock source is MSI
on the stm32L0x or stm32L1x mcus
Use RCC_CR_MSIRGSEL bit field instead of not soc stm32wbx serie
That bit of the RCC CR is common to several stm32 mcus
Signed-off-by: Francois Ramu <francois.ramu@st.com>
After experiencing a few deadlocks, it was discovered that this bus does
not implement any form of mutual exclusion... this patch addresses this
and resolves potential deadlocks.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
Refactors interrupt controller drivers to use the shared driver class
initialization priority configuration, CONFIG_INTC_INIT_PRIORITY, to
allow configuring interrupt controller drivers separately from other
devices. This is similar to other driver classes.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEFAULT to preserve
the existing default initialization priority for most drivers.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Refactors the remaining I2C drivers to use the shared driver class
initialization priority configuration, CONFIG_I2C_INIT_PRIORITY, to
allow configuring I2C drivers separately from other devices. This is
similar to other driver classes.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Enable second usb EHCI if usb2 node has status="okay" Note that this
driver is still an single instance driver, this change simply enables
the driver to work with the usb2 peripheral if that one is enabled, and
usb1 is disabled.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This change includes special handling of the internal voltage
reference and internal die temperature channels for all currently
defined STM32 models
The code now looks for specific ADC + channel ID pairs instead
of just a channel ID to determine if the caller is trying to
configure an internal channel.
Signed-off-by: Pete Dietl <petedietl@gmail.com>
Only call the state change callback if the state has changed. Reuse the
existing function for retrieving the CAN controller state instead of
having the same code twice.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The temperature sensor used in the clock_control driver requires
multithreading, but this is not compatible with mcuboot builds with
multithreading disabled.
Fixes#41597.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
bmi160.c module defines DT_DRV_COMPAT, but bmi160_trigger.c doesn't.
This causes a catastrophic chain of events.
The bmi160.c module includes bmi160.h,
in which the macro DT_ANY_INST_ON_BUS_STATUS_OKAY
affects the size of bmi160_bus union.
So bmi160.c defines a bmi160_cfg struct which contains that union.
Now, in bmi160_trigger_init we get a pointer to that config struct.
The fact that this module now includes bmi160.h without
DT_DRV_COMPAT, causes it to think the union is empty.
That doesn't cause compilation error, just undefined behaviour,
In which you address an empty struct fields.
In general, I suggest that someone makes sure it doesn't happen
in other drivers as well. The problem presented here is general,
meaning that if an h file assumes someone defined DT_DRV_COMPAT
before and it doesn't,
it may lead to some weird behaviour, like the one described.
Signed-off-by: Avi Green <avigreen1978@yandex.com>
gpio_pin_interrupt_configure asserts that one of GPIO_INT_ENABLE or
_DISABLE is specified by the caller, and also that GPIO_INT_EDGE is
requested if both states (GPIO_INT_TRIG_BOTH) should interrupt. This
change corrects the misuses in it8xxx2 drivers that cause assertion
failures.
When assertions are disabled the existing code works correctly because
the it8xxx2 GPIO driver assumes that a pin interrupt should be enabled
if _DISABLE is not requested, and the driver only supports edge
triggers but assumes the absence of GPIO_INT_MODE_LEVEL indicates
an edge trigger was requested.
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Change-Id: I1aaee190ec4cf063f36e25c0c293a91d280e71bb
On 32bit compiler the BIT_MASK(32) generate a warning,
after discussion on #42226 and #42163, advise was to use
BIT64_MASK instead.
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
These definitions are required to be able to use GICv3
interrupts controller on an ARMv8 AArch32 processor.
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
When using DMA to transfer over the spi, the spi_stm32_cs_control
is done after enabling the SPI. The same sequence applies
in the transceive_dma function as in transceive function
Signed-off-by: Francois Ramu <francois.ramu@st.com>
I2C clock and I2C gpio could be on same gpio group.
Remove assertion that required them to be on different
group.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Reserve the upper 8 bits of gpio_dt_flags_t for SoC specific flags and
move the non-standard, hardware-specific GPIO devicetree flags (IO
voltage level, drive strength, debounce filter) from the generic
dt-bindings/gpio/gpio.h header to SoC specific dt-bindings headers.
Some of the SoC specific dt-bindings flags take up more bits than
necessary in order to retain backwards compatibility with the deprecated
GPIO flags. The width of these fields can be reduced/optimized once the
deprecated flags are removed.
Remove hardcoded use of GPIO_INT_DEBOUNCE in GPIO client drivers. This
flag can now be set in the devicetree for boards/SoCs with debounce
filter support. The SoC specific debounce flags have had the _INT part
of their name removed since these flag must be passed to
gpio_pin_configure(), not gpio_pin_interrupt_configure().
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The function eth_stm32_hal_set_config() located in
drivers/ethernet/eth_stm32_hal.c always returns -ENOTSUP,
even if everything is fine. This commit fixes the return statement
so that the real result (ret) will be returned.
Signed-off-by: Bernd Weiberg <bernd.weiberg@siemens.com>
Set up a c2_reset procedure in order to allow sequential
open/close/open calls and keep c2_reset done at init (required
for flash access).
Move reinit out of the reset procedure, so flash could be
accessed after bt_disable().
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Handle eSPI periperal channel error to avoid continous interrupt
beyond the bus error.
Whenever an eSPI access causes an internal bus error,
PC_BUS_ERROR bit is set, it remains set until cleared by written
with an 1.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Moves the nios2 msgdma driver device config struct to the device data
struct for mutable data. The config struct is expected to be const.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Moves the nios2 msgdma driver device config struct to the device data
struct for mutable data. The config struct is expected to be const.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
According to Kconfig guidelines, boolean prompts must not start with
"Enable...". The following command has been used to automate the changes
in this patch:
sed -i "s/bool \"[Ee]nables\? \(\w\)/bool \"\U\1/g" **/Kconfig*
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Ignore the flag instead of rejecting it with -ENOTSUP, as this is what
the GPIO API expects from drivers that do not support debouncing.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for the new pinctrl API to the I2C drivers that handle
the nRF TWI and TWIM peripherals. Update code of the drivers and
related devicetree bindings.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for the new pinctrl API to the SPI drivers that handle
the nRF SPI, SPIM, and SPIS peripherals. Update code of the drivers
and related devicetree bindings.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
- clean up registration of the drivers with the logging subsystem
- use consistent naming of local variables accessing configuration
and runtime data of driver instances, for easier code maintenance
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for configuring pins of the following nRF peripherals:
SPI, SPIM, SPIS, TWI, and TWIM.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add build assertions that will ensure that every peripheral for
which a driver instance is created has some pins assigned to it.
Neither pinctrl-0 nor *-pin properties can be currently marked as
required in devicetree, so these assertions will help users avoid
invalid configurations where it could be hard to figure out why
the UART is not working.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
fix incorrect gpio driver struct used in driver data.
This should not have caused any issue as currently
sizeof(gpio_driver_data) == sizeof(gpio_driver_config).
Signed-off-by: Simon Frank <simon.frank@lohmega.com>
This commit adds a USB Type-C Port Controller Driver for
the STM32 USB Type-C / USB Power Delivery (UCPD) peripheral
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
by default, a global trigger thread was enabled in kconfig but
the thread priority and stack size depended on a local thread
being enabled.
the local thread option was never used anywhere so it is removed.
Signed-off-by: Mikkel Jakobsen <mikkel.aunsbjerg@escolifesciences.com>
Indirect ISR automatically calls power management functions, which GPT
timer direct ISR was not calling. Calling these functions means that the
kernel will recognize that it is exiting low power mode when the GPT
timer interrupt fires that wakes the SOC up, and will call
pm_power_state_exit_post_ops, which can in turn raise the clock
frequencies and voltage of the SOC as early as possible.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
System entering sleep state before uart tx is complete can result in
characters being dropped from the transmission. Add pm constraint
setting to the lpuart driver to prevent character drops
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
1. Check I2C Clock and Data is high through GPIO driver instead
of the I2C bitbang registers
2. i2c_xec_poll_write() and i2c_xec_poll_read() will poll to
check I2C clock and data lines are high before initiating the
transaction. The polling will be every 25us for a cumulative
max of 2.5ms
3. wait_completion() will not call recover_from_error() to reset
the controller. Instead will poll for 10ms for the PIN bit to
clear before returning error.
4. wait_completion() will send STOP if the 9th bit is NACK
5. If any errors with current transaction:
(a) Set error_seen flag.
(b) In the next transaction do the recovery process (reset the
i2c controller) if the clk and data lines are high.
Note: error_seen flag is set for Address NACK with Repeated
Start as well.
6. If timeout error occurs in wait_completion():
(a) Set timeout_seen flag;
(b) Wait till the slave will release the clock.
(c) Once slave releases clock send STOP on the bus. If the
timeout occurred while master read, read the I2C DATA register
for the hardware to proceed.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
spi_dt_spec structure initialization should not be done
in the runtime during spi bus initialization because it
causes kernel panic.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
The RTC user channel count is increased contitionally to 2 when
nrf_802154 radio driver is enabled.
Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
The response of a KTCPSND has two phases. According to documentation by
wireless the timeout is 60 seconds. The fix respects the timeout on the
second phase, too (waiting for OK or errors from modem). Previously only
the first phase used 60 seconds and the second phase used 5 seconds.
Without this fix the hl7800 will lock the tcp stack for the current
socket indefinitely if another socket operation is performed before the
response from the modem is received.
Additionally all timeouts are adjusted to be at least one second longer
as the documented timeout from wireless. This avoids races between the
hl7800 and the driver.
Signed-off-by: Rene Bredlau <git@unrelated.de>
Shims for nrfx drivers should only connect the related IRQ handlers,
they should not enable the IRQs, as this could lead to a situation
where the interrupt handler is called before the driver had a chance
to properly initialize the peripheral and install the provided event
handler. nrfx drivers will enable the interrupts appropriately on
their own by calling the NRFX_IRQ_ENABLE macro which is implemented
in nrfx_glue.h as a call to irq_enable().
This commit fixes the above issue spotted in the following shims:
- dmic_nrfx_pdm
- clock_control_nrf
- i2s_nrfx
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Instead of reading registers query the info on sysclock configuration
from existing configuration symbols.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Rework clock start up functions in order to allow configuration
and enabling of individual clocks.
This way, each clock defined with a "okay" status will be enabled
even if not part of the sysclock clock tree.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add STM32_FOO_ENABLED and STM32_FOO_FREQ to STM32 fixed clocks:
HSI, HSE, MSI(S), CSI, LSI, LSE..
Replace STM32_LSE_CLOCK by STM32_LSE_FREQ and when possible
replace by new STM32_LSE_ENABLED when making sense.
Fix STM32_PLL3_FOO_ENABLE to STM32_PLL3_FOO_ENABLED
Additionally, add STM32_PLL_FOO_ENABLED definitions.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
PLL3 setting should also be protected CFG_HW_RCC_SEMID.
Move semaphore unlock after we're done with PLL3.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Current implementation checks for pulldown and
pullup. As pinmux configuration is related to PU only,
this PR checks for PU feature instead of PD.
This also fix missing PU check when PD is present.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Currently if an attempt to disable CSMA-CA in by setting an
appropriate flag in another (for example application)
CmakeLists.txt it caused lots of warnings. This fix allows
higher level CMakeLists.txt to disable CSMA-CA without
warnings.
Signed-off-by: Artur Hadasz <artur.hadasz@nordicsemi.no>
When a Seed error occurs during the random nb generation,
the driver tries to recover and exit without providing a random data
This avoids looping endlessly on the DRDY bit of the RNG status reg
because it remains 0 in case of error.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Allow movement detection to be used on hardware
that only has one interrupt line connected.
Change hardware configuration to a bitmask.
Signed-off-by: Andrew Hedin <andrew.hedin@lairdconnect.com>
Rename CONFIG_SOC_POWER_MANAGEMENT_TRACE to CONFIG_NPCX_PM_TRACE so that
it is clear that it's a NPCX specific option.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The ADC driver of IT81302 chip can support channels 0-7 & 13-16.
This PR adds to implement ADC channels 13-16.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Fix a couple of issues reported by checkpatch:
ERROR:POINTER_LOCATION: "(foo*)" should be "(foo *)"
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add kinetis pinctrl driver. Driver initializes clocks for each port, and
exposes the pinctrl_configure_pins function required for pinctrl
support.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The Bluetooth HCI driver based on the RPMsg transport now uses the IPC
service module. The compatible Bluetooth sample - HCI RPMsg - has also
been migrated to the new IPC solution.
Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
Add a new API to support multipart hash calculation. The API allows
split the data input to be split in small chunks.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
The API to set a callback has the namespace cipher but the driver
function pointer was using the namespace crypto. As this API belongs
to the cipher subgroup, just rename the function pointer in the driver
to be consistent.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Just give a better name to this file since now we have changed the
file where crypto driver API is defined.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
This file defines the crypto driver API, cipher is supposed to be just
one type of capability (other can be hash) of these drivers, just
change the file name to be consistent with it.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Add 'cipher' namespace in some in the driver API since these
operations are for cipher.
Set a namespace to make it clear that these are cipher operations,
this allow further functionalities, like hash, to be added in this
driver API.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
The `gpio_dt_spec` structures where never initialised, therefore the driver
would always fault with "E: Reset GPIO device not ready" printed to the
console.
Fixes: 069bf6be44
("drivers: display: st7789v: use gpio_dt_spec")
Signed-off-by: Casper Meijn <casper@meijn.net>
Intel Audio DSPs have "IPC" interrupt delivery and shared memory
window hardware. The Sound Open Firmware project has historically
used the combination of these to implement a bidirectional
message-passing interface. As it happens, this protocol is an
excellent fit for Zephyr's somewhat geriatric but still useful IPM
interface.
This implements a SOF-protocol-compatible transport that will
hopefully prove a bit more futureproof for non-Intel SOF
architectures. It is a software-only device, built on top of the
underlying SOC APIs for the SRAM windows (in cavs-shim) and IPC
(cavs_ipc).
Note that SOF actually has two protocol variants (ipc3 and ipc4): in
both, the command header (passed as the "id" parameter in IPM) is sent
via the hardware doorbell register. But in ipc4, the second hardware
scratch register is used to transmit the first four bytes of the
command before involving the SRAM window (in ipc3, it's ignored).
Both modes are supported by this driver, set IPM_CAVS_HOST_REGWORD to
choose the "ipc4" variant.
Finally: note that the memory layout for the windows in question is
inherited from SOF, and for compatibility (with both SOF and with the
offsets used by the host!) these can't be changed without major
surgery. They're defined in kconfig, but should be treated as
read-only until we get a chance to rework the way Zephyr does its SRAM
window management (and probably in concert with the host drivers).
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Some IPM devices support asynchronous command processing, where
acknowledgment of an IPM message can be delayed while handling
happens in a context other than the ISR that invoked the callback.
Expose this via a kconfig that can be selected by the driver, and add
a new "complete" call (a zero-overhead stub on non-supporting devices)
to signal the end of message handling.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Improve shell commands to support up to 32-bit addresses.
The check if function should use 8/16/24/32-bit address is basing
on the length of address used in function parameter. To address
registers below 256 using 16-bit, one should write them left-padded
with zeroes. Address is sent in big endian.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
The tx_lock timeout is closely related to GSM_CMD_AT_TIMEOUT
& GSM_CMD_SETUP_TIMEOUT, and should be longer than both of
them, otherwise the gsm_ppp_stop might fail to lock the tx.
Define the timeout at the top of the driver and added a comment
to make it clear for the user.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
The rssi_work_handle always exists in the gsm struct, so use
```
if (IS_ENABLED(CONFIG_GSM_MUX))
```
instead of
```
#if defined(CONFIG_GSM_MUX)
```
for better code readability.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
There's no need to cancel rssi work when CONFIG_GSM_MUX isn't
enabled, since it is not scheduled.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
The rssi_work_handle should be submitted to the gsm workqueue
using the gsm_work_reschedule, fix that.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
The 'attached' flag should be reset on gsm_ppp_stop, or else
some part of the gsm_finalize_connection won't be executed
during the next gsm_ppp_start.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Convert gsm_finalize_connection into a work so that the caller
work won't have to run again when gsm_finalize_connection
reschedule gsm_configure_work on error.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Currently the mux_setup set the state to the next one after
uart_mux_alloc is successful even if the mux_setup fails which
can be a problem.
Set the state after both mux_setup & uart_mux_alloc are
successful.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Remove redundant mux_enabled checks, the code execution will
not reach here if mux_enabled is false in the first place.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Customize the error logs in each connection finalization steps
so that it is easier to trace the error.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
The gsm_configure will return if it fails to perform mux_enable,
therefore the disable part of the log will not be printed.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
The `setup_done` and `mux_setup_done` aren't being used
anywhere in the driver, therefore should be removed.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Initializing rssi_work_handle on gsm_start would (re)init it
unnecessarily everytime the gsm_start is invoked, we only need
to initialize it once in the gsm_init.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
With the unification of OCM declaration & assignment between Zynq-7000
and Ultrascale/ZynqMP, remove the distinction between those two SoC
families so that the DMA area is always set up in the OCM regardless
of the current SoC type.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
Add a new hwinfo driver to get the reset cause on
SAM4S/SAME70/SAMV71 SoC series.
The user-nrst dts property has been added to enable external user
resets.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Instantiate the values of `sx126x` GPIO's when they are present in
devicetree. This was missed in #42230.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
spi_dt_spec structure initialization should not be done
in the runtime during spi bus initialization because it
caues kernel panic.
Fixes: https://github.com/zephyrproject-rtos/zephyr/issues/43046
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
It turns out XCC didn't like this change as it doesn't have a
__COUNTER__ builtin. Bummer.
This reverts commit e8389f2f53.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
1. Rename device data to dev_data to fix variable
name clash
2. Use Device Tree properties to setup the display
3. Delete unused Kconfigs
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Use CTS input to monitor HL7800 sleep state
when in SLEEP mode.
When CTS is high, shutdown the UART to
save power.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Conceptually, ring_buf_item_put() and ring_buf_item_get() are specialized
versions of ring_buf_put() and ring_buf_get(). Make it so to rationalize
the code to open the way for more optimizations.
This means we need specialized wrappers on top of ring_buf_init()
accordingly, given that the core machinery is now common and byte based.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
The +CGATT: is followed by 'OK' or 'ERROR', so its handler
should not set error code and give sem_response.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Increase the default user-allocable number of RTC channels to 3,
which is the numer of physical RTC CC channels not used by Zephyr
on nRF52 series SoCs.
Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
The updated nrf_802154 API accepts 64-bit time in microseconds.
The shim layer is updated to use 64-bit time.
Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
sensor_value_from_double had a early overflow when converting the
fractional part (val2). This occured when input was more then
2147.493647 (inp >= INT32_MAX/1000000.0 + 0.01).
return value -ERANGE as this is what errno is set to by `strtod` and
similar posix functions.
fixes issue #39176
Signed-off-by: Simon Frank <simon.frank@lohmega.com>
Fix build break introduced in 03ab730347:
/zephyr/drivers/can/can_mcp2515.c:871:55: error: 'const struct
mcp2515_config' has no member named 'int_pin'; did you mean 'int_gpio'?
871 | LOG_ERR("Unable to configure GPIO pin %u", dev_cfg->int_pin);
/zephyr/drivers/can/can_mcp2515.c:942:14: error: 'GPIO_DT_SPEC_INST_GET'
undeclared here (not in a function)
942 | .int_gpio = GPIO_DT_SPEC_INST_GET(0),
| ^~~~~~~~~~~~~~~~~~~~~
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
gd7965 broke after 42bbb30ecf:
/zephyr/drivers/display/gd7965.c: In function 'gd7965_init':
/zephyr/drivers/display/gd7965.c:379:23: error: passing argument 1 of
'device_is_ready' from incompatible pointer type
[-Werror=incompatible-pointer-types]
379 | if (!device_is_ready(&config->reset_gpio.port)) {
| ^~~~~~~~~~~~~~~~~~~~~~~~
| |
| const struct device * const*
Fix all the occurrences.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
This commit implements the temperature sensor interface for
the Maxim MAX31875Low-Power I2C Temperature Sensor.
Signed-off-by: Pete Dietl <petedietl@gmail.com>
Add a name for the choice of gsm modem so that it can be
default to a certain type in board's Kconfig.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Properly set both pull up and down flags explicitly when
making changes.
Properly implement disabling interrupts on a given pin.
Signed-off-by: Peter Johanson <peter@peterjohanson.com>
Correct MEC172x OOB register access that causes compilation error,
Use device-tree-based register access instead of HAL access
This occurs whenever CONFIG_ESPI_OOB_CHANNEL_RX_ASYNC is
enabled.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
I2C scan and recover functions didn't have mandatory parameters
specified, which resulted in not displaying the I2C controllers in
help message. Instead, the command was executed, and argv was
dereferenced outside of the bounds, providing invalid data to
device_get_binding function.
Other functions had defined mandatory parameters without taking their
names into account, they are provided as argv[0].
Signed-off-by: Michał Barnaś <mb@semihalf.com>
We're now using the Kconfig copied from the upstream lvgl repository. It
uses the LV_ prefix for all options while we're using LVGL_ for
Zephyr-specific ones. Make the latter consistent with upstream but also
make sure they're distinct from lvgl's by using LV_Z_ as the prefix.
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@huawei.com>
With a number of the i.MX SoCs (e.g., the i.MX8M Plus), NXP has moved to
supporting the integrated Cortex-M cores with the MCUXpresso SDK (MCUX).
As a result, certain Zephyr drivers (such as the IPM driver) need to be
updated to utlize this new MCUX-based SDK.
This change adds support for the MCUX Messaging Unit driver pulled in by
this PR:
https://github.com/zephyrproject-rtos/hal_nxp/pull/130
Additionally, this change enables the new IPM_IMX_REV2 config for the
mimx8ml8_m7 SoC target which utilizes this new revision of the driver.
Signed-off-by: Chris Trowbridge <chris.trowbridge@lairdconnect.com>
The driver was re-using the display log level, however, it is no longer
part of the display driver category.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Cleanup list of includes
- Remove unused structs/definitions
- Make init function static (is called by system init)
- Make config/data naming and access consistent
- Remove redundant zero initialization of data
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The driver is sleeping in milliseconds using a custom wrapper around
k_busy_wait, move to k_sleep.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Modernize the driver a little bit by using i2c_dt_spec. Note that the
RGB on its own is another I2C device connected to the same bus. Ideally,
both should be defined in Devicetree, but this has not been done for
now.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The driver was never migrated to Devicetree, this patch converts the
driver to a proper Devicetree based device.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The driver does not implement a display API, it has a custom API. Having
it under display is confusing, since display API consumers may expect
they can use it. These sort of custom drivers fit better under
drivers/misc.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add CAN controller device statistics support.
Initially the following per-device statistics are supported:
- Dominant bit transmission errors
- Recessive bit transmission errors
- Bit stuffing errors
- CRC errors
- Format errors
- Acknowledge errors
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The current MCUX IGPIO driver assumes that the target SoC supports
the DR_SET, DR_CLEAR, and DR_TOGGLE functionality, but some do not
(namely, the M7 core of the i.MX8M Plus SoC). Current releases of
the MCUXpresso SDK IGPIO driver contain utility functions to set,
clear, and toggle pins which include provisions to support SoCs
with and without DR_SET, DR_CLEAR, and DR_TOGGLE, and this change
switches to using these utility functions.
Additionally, this change enables GPIO support on the mimx8ml8_m7
target.
Signed-off-by: Chris Trowbridge <chris.trowbridge@lairdconnect.com>
In the I2C ISR, it prints the error message when SMBST is set to an
unexpected value. However, we found a spurious interrupt which caused
the SoC to enter the ISR with SMBST=0. Because the spurious interrupt
will not break the I2C operation, this commit limits the error log to
print if SMBST is not equivalent to 0 to prevent a false alert.
Signed-off-by: Andrew McRae <amcrae@google.com>
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
STM32H7B3 supports max SYSCLK and AHB clock frequencies of 280 MHz,
and max APB frequency of 140 MHz
Signed-off-by: Tomislav Milkovic <tomislav.milkovic95@gmail.com>
This adds support for the ads101x (ads1013, ads1014, ads1015) and
ads111x (ads1113, ads1114, ads1115) family of i2c adc devices.
Signed-off-by: Ryan McClelland <ryanmcclelland@fb.com>
The crypto driver API is 6 years old, has 5 different implementations,
and is widely used.
Remove the EXPERIMENTAL marking from the API. Each implementation may
still choose to mark itself as EXPERIMENTAL.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
Initialize the i2c config of the emulator based on the clock_frequency
property.
The emulator can be used without calling the i2c_configure function, but
the i2c_get_config would return an error. With this change, it is
possible to get the config prior to the i2c_configure call.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
This register is a pre-define hardware slave A and can be accessed
through I2C0. It is not currently used, so it can be disabled to
avoid illegal access.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Helpers like dev_cfg have been removed from all in-tree drivers, this
one was missed.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use the IF_ENABLED macro helper to conditionally initialize the int_gpio
field. This avoids duplication of initialization code.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The device instance can be obtained at compile time. Here
DEVICE_DT_GET_OR_NULL is used as the following code seems to accept a
NULL condition, meaning instance is optional.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Simplify driver implementation by using spi_dt_spec. Most internal
functions now take a device reference to simplify the operation, since
config did not exist before.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The device already has a DT compatible (and uses DT properties).
Instantiate the device using the DT-based macros and remove hardcoded
name.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Simplify driver implementation by using spi_dt_spec. Note that driver
has 2 SPI configurations, identical except the speed. For this reason,
the slow config is still kept in RAM and copied from the one obtained
via the SPI dt_spec macros. A better solution would be to have macros
that allow to override the SPI frequency, but this can be improved
later. Most internal helpers have been adjusted to accept a device
reference to make SPI (and future GPIO) transition easier.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Controller device can be obtained at compile time, so make
implementation more efficient thanks to that.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Controller device can be obtained at compile time, so make
implementation more efficient thanks to that.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The controller device instance can be obtained at compile time using
DEVICE_DT_GET, so do that.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use DEVICE_DT_GET instead of device_get_binding, since the device
reference can be obtained at compile time.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The PCIe device can be obtained at compile time, so make code more
efficient thanks to that.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Simplify driver implementation by using gpio_dt_spec. To simplify
migration, all internal functions now take a device reference instead of
device data. As a result, the redundant config pointer in data has been
removed.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Simplify driver implementation by using gpio_dt_spec. As a result, the
driver data structure has become unused and so removed.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Simplify driver implementation by using gpio_dt_spec. Note that as a
result, the driver data structure has become obsolete/unused and so has
been entirely removed.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Simplify the driver implementation by using gpio_dt_spec. Note that most
internal functions have been changed to accept a device instance instead
of data/config references to make transition easier and to align with
most other drivers.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
An optional reference to the temperature sensor can be obtained at
compile time, update implementation.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The device configuration field access was dropping const qualifier for
no reason, don't do that.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use struct i2c_dt_spec to simplify code. This change also allows to drop
device_get_binding usage.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The bus device can be obtained at compile time, so use DEVICE_DT_GET
instead. Device configuration is now used to store the bus device
reference.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The select uart instance used in uart driver initialization won't
work as expected because the index used was not correct. This
fixes the macro call to use proper index value.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
As a complement of 7689abee34,
which fixed an issue where gpio number could errouneously be
set to a number greater than 32 in DTS, there is also another
situation where driver instance can be configured with a pin number
greater than 32.
This PR adds another check in GPIO driver to confirm
whether the PIN number is within valid bounds.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Use index zero, not one. The Xtensa tools emit the timers in priority
order, and as mentioned in the kconfig warnings using high priority
timers doesn't work. This also makes room for using software
interrupts that can preempt a timer interrupt for test purposes.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Do not used generated macro from devicetree subsys directly
in driver.
Remove definition of it's own "FOREACH_STATUS_OKAY".
Redefine "DT_DRV_COMPAT" for each supported compatible string.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Create a driver specific configuration structure, containing the
required fields only.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Create a driver specific configuration structure, containing the
required fields only.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Create a driver specific configuration structure, containing the
required fields only. Since the config struct can now store a pointer to
the UART structure, casts from address to (struct _uart*) are no longer
needed. UART_STRUCT has also been dropped in favor of using the config
pointer directly now that it is possible.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Create a driver specific configuration structure, containing the
required fields only. Since the config struct can now store a pointer to
the UART structure, casts from address to (struct pl011_regs *) are no
longer needed. PL011_REGS has also been dropped in favor of using the
config pointer directly now that it is possible.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Create a driver specific configuration structure, containing the
required fields only. Since the config struct can now store a pointer to
the UART structure, casts from address to (UART_T *) are no longer
needed. UART_STRUCT has also been dropped in favor of using the config
pointer directly now that it is possible.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Create a driver specific configuration structure, containing the
required fields only. Since the config struct can now store a pointer to
the UART structure, casts from address to (struct uart_reg *) are no
longer needed. HAL_INSTANCE has also been dropped in favor of using the
uart field from the config struct now that it is possible.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Create a driver specific configuration structure, containing the
required fields only.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Create a driver specific configuration structure, containing the
required fields only. Since the config struct can now store a pointer to
the UART structure, casts from (uint8_t *) to (struct uart_cmsdk_apb*)
are no longer needed. UART_STRUCT has also been dropped in favor of
using the config pointer directly now that it is possible.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Create a driver specific configuration structure, containing the
required fields only.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Create a driver specific configuration structure, containing the
required fields only.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
When CONFIG_PM=y, the IRQ function also needs to be stored, something
the "generic" uart_device_config cannot support. This uses the config
irq_config_func field to store the function in all situations, thus
removing unnecessary logic and finally dropping uart_device_config.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Instead of using "generic" uart_device_config fields, store the right
pointer to avoid unnecessary casts. This change makes code simpler and
more idiomatic.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This enables the below configuration so the AP and EC are able to
communicate over eSPI:
CONFIG_ESPI_PERIPHERAL_EC_HOST_CMD
CONFIG_ESPI_PERIPHERAL_ACPI_SHM_REGION
CONFIG_ESPI_PERIPHERAL_CUSTOM_OPCODE
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
When sleep modes are used, configure sockets
to restore on boot. Letting the HL7800 manage
this means the driver does not have to do it.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
This commit sets the power down bit of the module SDP, UART3, UART4,
and I3C by default. The module's driver should take the responsibility
to clear it to turn on the power. It helps reduce the power consumption
when an application doesn't use these modules.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
If CONFIG_ETH_NATIVE_POSIX_RANDOM_MAC=n and
CONFIG_ETH_NATIVE_POSIX_MAC_ADDR="", the MAC address can be set with a
net_mgmt call before the driver is initialized.
Signed-off-by: Björn Stenberg <bjorn@haxx.se>
The ADC sampling of it8xxx2 needs to read each channel in sequence,
so it needs to wait for an interrupt to read data in the loop
through k_sem_take().
In test_adc.c, k_timer_start() is used in the interval test, so we
need to use polling wait instead of k_sem_take() to wait, otherwise
it will cause kernel panic.
k_is_in_isr() can determine whether to use polling or k_sem_take()
at present.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Makes the IRQ_CONNECT macro statically declarable for Xtensa (nothing
prevented it except its structuring). Allows for IRQ_CONNECT usage
on a xtensa only platform to be declared statically avoiding the
fluff of setting up and enabling irqs for cavs gpdma.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Intel's adsp needs to set, at a minimum, a clocking bit before the driver
can initialize the designware dma controller. In many ways it is the
designware dmac IP but with additional registers and functionality added
on top of it. So the code structure here follows how the hardware
appears to be designed, layered on top of the designware driver.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Move most of the designware driver into a common compile unit with a
a header that exposes the common functionality.
This allows for derivative hardware, such as that in intel's adsp (cavs)
to use the common functionality while extending.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
STM32L5 has option to disable dual bank support.
When this is disabled, the flash page size is changed
from 2k pages to 4k pages. This PR adds support for this
diversity.
Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
Add power management constraints to the entropy driver.
This prevents the hardware block to lose it's clock when
going into any stop mode of the cpu, which would cause the
clock error flag to be set while filling the pool.
Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
Add Kconfig switch to disable automatic eSPI slave boot
acknowledgement.
This allows to perform lenghty operations before continue any eSPI
handshake with eSPI master.
Required for eSPI SAF boot configuration.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Currently pwm_npcx_pin_set() disables and reconfigures the PWM
controller every time its called, causing the PWM line to pulse even if
only the duty cycle is changed.
Modify the function so that controller is only disabled if any of the
configuration has to be changed, only set the new DCR otherwise.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Due to serialization restrictions radio api calls cannot be nested, any
violation of this rule leads to a deadlock. This commit fixes the bug
by transferring the nested radio api call to ot_radio_workq.
Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Follows #41918.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Follows #41918.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Follows #41918.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Follows #41918.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
This patch adds GPIO and 96board LS (Low Speed)iexpansion connector
support for SiFive HiFive Unleashed and also enables GPIO basic test.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Add pwm-0 to support tests/drivers/pwm/pwm_api.
Solve tests code runtime error on it8xxx2_evb:
1.If the pwm channel target frequency is < 1, then we will
return an error code.
2.If the target_freq is <= 324Hz, we will configure that this pwm
channel need to output in EC power saving mode.
In test_pwm_cycle() case, the period is 64000, then the
target_freq is 8000000 / 64000 = 125Hz and <= 324Hz, so we will
switch the prescaler clock source from 8MHz to 32.768kHz.
Then the target_freq is 32768 / 64000 = 0.512Hz and < 1Hz,
this will return an error code. In order to get the same
target_freq, we always return PWM_FREQ in
pwm_it8xxx2_get_cycles_per_sec().
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
The driver enabled extended error code (AT+CMEE=1) during
setup but is missing a handler for the +CME ERROR, fix that.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Waits until the network interface goes down before switching the
GSM_MUX. It uses the NET_MGMT_EVENT to signal a semaphore to
contiue when closed. This allows for the LCP state machine to
properly terminate. When skipping this wait, the second time
connecting, the connection might fail.
Tested on a real modem.
Fixes GSM PPP behavior in combination with: #41802
Signed-off-by: Sjors Hettinga <s.a.hettinga@gmail.com>
There is a part of the AT2X driver that handles controlling WP pin
connected to the EEPROM chips, but in some systems, the WP line can be
controlled by another component.
Check if any AT2X node defines wp-gpios, if not - do not compile the
code related to WP to save space.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Reduce the number of TX buffers in use on the MCP2515 from 3 to 1 in
order to avoid CAN frame priority inversion.
The MCP2515 is unable to do internal TX frame arbitration based on the
CAN-ID of the frame. Priority must be set per TX buffer and the priority
cannot be rewritten unless the frame transmission is aborted.
Fixes: #26541
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Switch the Bosch M_CAN driver from TX FIFO mode to TX Queue mode in
order to avoid priority inversion of CAN frames.
Fixes: #26541
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Similar to commit be32e33774, this
replaces the use of DEV_NAME macros with dev->name directly. This also
fixes#42996 for i2c_sam_twi.c in particular.
Signed-off-by: Ryan Armstrong <git@zerker.ca>
Change the way this shim driver configures the I2C frequency, so that
it is possible to use also 1 MHz on nRF5340 (the nrfx driver performs
extra initialization steps for this frequency, hence it needs to be
reinitialized when the shim is reconfigured).
Correct the shim to handle selection of 1 MHz (or FAST_PLUS) bitrate
both through dts and I2C API.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
There are some pins that do not support internal pullup/pulldown.
This PR make sure to check that and return error if needed.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
ESP32 has 2 GPIOs: gpio0 and gpio1.
Zephyr DTS model requires pin definition in dts file
from 0 to 31, meaning that when some pin within gpio1 range
is required, gpio driver needs to increament this value
by 32, required by LL API.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Limit gptp range_adjust range for improved performance.
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Signed-off-by: Xabier Marquiegui <xmarquiegui@ainguraiiot.com>
mcux enet driver updates:
a) add mutex to access the ptp timer variables
b) use thread for rx(cooperative) andfor tx cleanup(cooperative)
c) use a thread for ptp inner clock updater(pre-empty)
This patch fixes the following issue:
```
ENET_SendFrame error: 4004
```
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Co-authored-by: Seb Laveze <sebastien.laveze@nxp.com>
Signed-off-by: Xabier Marquiegui <xmarquiegui@ainguraiiot.com>
GPT timer driver was announcing progress to the kernel too soon when an
announcement was requested via sys_clock_set_timeout() on a tick
boundary. Fix rounding to add a tick worth of cycles.
Fixes#42665
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
MCUX watchdog timer supports min window of 500ms. Increase maximum task
watchdog timeout window to 500ms by default, so that this sample can run
on iMX RT SOCs. Also update iMX RT watchdog driver to reject timeout
maximums under 500ms with a useful error message
Fixes#40153
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The st7789v_transmit function accepts a device, not device data. As a
result, driver could not be compiled when reset GPIOs were not defined
in Devicetree.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The configuration initializer had a syntax error (missing =). The driver
could not be compiled as a result.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Restore the testcase to run on the qspi nor-flash controller
of the disco_l475_iot1 board
of the disco stm32f746 board
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Like the stm32 flash driver, in case of QSPI nor flash controller
the read or write or erase returns '0' if data is of null size.
This avoids useless QPSI low level access to the controller.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Currently the generic driver is always unconditionally compiled. Fix
this by compiling it only when needed.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
This is a follow-up to commit 11bbdb030d.
When RX is automatically disabled because all provided RX buffers have
been filled up, the rx_enabled flag needs to be cleared, otherwise it
will be impossible to enable RX again.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
added UART interrupts driver for Raspberry Pi Pico board
moved baudrate from config to data structure
Signed-off-by: Andrei-Edward Popa <andrei_edward.popa@upb.ro>
if peripheral clock is not configured, uart init API function returns 0,
so we need to check the return value of this function
Signed-off-by: Andrei-Edward Popa <andrei_edward.popa@upb.ro>
The properties from dts to driver were not translated
correctly from - to _. This PR fixes this
Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
Only TCP sockets should send a NULL packet
if the server closes the connection or there
is a socket error.
UDP sockets do not need to do this because
they are connectionless.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
The ADC driver now supports three different implementations. To maintain
readability, this patch implements an adc_fixup.h that permits more
generic access to relevant registers.
This patch also introduces support for a new third shape ADC - as found
in the SAML21 for example.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
Previously this was expected to be equal to 1 at all times. This doesn't
play well with the sample or other users (e.g: adc_shell). Instead, we
should count the number of active channels in the bitfield, and ensure
that only one is identified.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
A common pattern here was to take the work item as the subfield of a
containing object. But the contained field is not a k_work, it's a
k_work_delayable.
Things were working only because the work field was first, so the
pointers had the same value. Do things right and fix things to
produce correct code if/when that field ever moves within delayable.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
UARTE does not support RO TX buffers. Added cache buffer to the
driver which is used when provided buffer is not from RAM.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Gives more explanation on uart_stm32_err_check function.
On stm32 F4X, F1X, and F2X, when clearing the usart Error Flag
(PE, ORE, FE, NE), the LL Clear function applies a software sequence
which reads the usart SR then the usart DR.
Consequently the RXNE flag is affected (cleared) by the
uart_stm32_err_check function call.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This patch adds fixes to the api so that it behaves as expected.
1 - The irq_tx_ready now only returns true if the tx interrupt is
enabled.
2 - The irq_tx_complete now functions as expected and returns true
only once all characters have been transmitted
Signed-off-by: Marius Scholtz <mariuss@ricelectronics.com>
Replace '%s' with '%ld', so that 'long' value is properly printed with
shell_error(). This suppresses following warning:
zephyr/drivers/lora/shell.c:181:23: warning: format '%s' expects \
argument of type 'char *', but argument 4 has type 'long int' \
[-Wformat=]
181 | shell_error(shell, "Invalid bandwidth: %s", lval);
| ^~~~~~~~~~~~~~~~~~~~~~~ ~~~~
| |
| long int
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Updated uart_rx_enable() and uart_tx() to use timeout given
in microseconds. Previously argument was given in milliseconds.
API change was done in:
https://github.com/zephyrproject-rtos/zephyr/pull/39041
Signed-off-by: Jani Hirsimäki <jani.hirsimaki@nordicsemi.no>
The handler was reworked to internal function and it
is called from the erase and the write
procedures automatically now.
This change was made due to deprecation of the flash write-protection
API.
Explanation for so late removal:
Reworked callback was introduced despite that the API had been
already deprecated at the addition time.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
On nRF53 Series SoCs, the highest SCK frequencies can only be achieved
when the HFCLK192M clock divider is changed from the default /4 setting.
Such change results in increased power consumption, so the divider needs
to be changed only for periods when it is actually necessary.
This commit modifies the driver behavior so that it changes the divider
only when a QSPI bus operation is performed.
However, when XIP accesses to the flash chip are also used, it may be
needed to keep the divider changed even when the driver is idle so that
the XIP access speed is not reduced, hence a custom API function that
allows forcing this is introduced for the driver.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Only run the `uninit` function if the SPI instance has previously been
configured. This stops an assertion in the HAL drivers from triggering
due to running `uninit` without a previous `init`.
Fixes#42299.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
HAL call function used to retrieve the configured baudrate
returns the real calculated value, which might not be exactly as
the configured. For baudrate of 115200, HAL api
returns 115201, which then causes uart_basic_api test
to fail. Instead of returning the calculated baudrate value,
returns the configured one.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Set enable configuration change bit in can_mcan_set_timing() because
the NBTP register can only be changed if we're in init mode AND
configuration change bit is set, per MCU docs.
Signed-off-by: Jeremy Wood <jeremy@bcdevices.com>
Invalidate the cache before the RX data block is passed to the DMA
engine and not after it is received. If the RX data block contains
dirty cache lines they can be flushed anytime, overwriting legitimate
data that have been prefilled by the DMA module.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
`qdec_sam` driver supports currently only position measurement and does
not support reading of the index signal. Unfortunately, the index
signal was internally enabled in the driver. If the pin to which the
index signal was connected was used by another driver it could lead to
a false detection of the signal change. Detection of the index signal
change resets the position measurement.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Fix handling of the return value by `eth_sam_gmac_set_config` function.
The function is used as a backend by
`net_mgmt(NET_REQUEST_ETHERNET_SET_MAC_ADDRESS, ...)` to change the
interface MAC address at run time.
Tested on sam_e70_xplained board.
Fixes#42151
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Remove unneeded NULL check in pmic init function. Not required as
device_is_ready() will handle NULL device structs.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Config struct in pmic regulator driver was being used as a non-constant
value when an array defined at compile time was cast to a struct used at
runtime. Move this pointer to the data struct in pmic driver.
Fixes#41951
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This corrects the following:
1. The priority of type cast is lower than member access. So don't need
the redundant parentheses.
2. The macro should be added to the parentheses.
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
MCUX usb ISR was making usb callbacks directly, which caused assertion
failures when a callback attempted to lock a mutex. Move USB callback
handler to separate thread, and make ISR notify thread via message
queue.
Fixes#40638
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The CAN_BUS_UNKNOWN CAN controller state is only used to indicate that
the current CAN controller state could not be read.
Remove it and change the signature of the can_get_state() API function
to return an integer indicating success or failure.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The current driver doesn't handle the LBD flag, this leads
uart_stm32_err_check to return always true if a Line Break
is detected.
This PR adds Line Break Detection and the related flag clearing,
F0 series it's excluded from the changes.
Fixes zephyrproject-rtos#41339
Signed-off-by: Andrea Campanella <andrea.campanella@helvar.com>
The commit 44679c7bd8 introduced this
duplicated declaration of the local variable data.
This commit fixes this issue.
Fixes#42117
Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
The initialization code was updating the freq field in the const
declared config block at runtime because the frequency is not
known at compile time. Add a get_freq() api call to handle any
runtime requests for frequency.
fixes#41953
Signed-off-by: David Leach <david.leach@nxp.com>
Device 'data' variable name was incorrect due to recent treewide naming
cleanups. Fix variable name to fix build error.
Fixes#42118
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Let's have dev_data for dev->data so it will not conflict with struct
call_back data variable.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Coverity identified valid error where the routine does a NULL
check for two different pointers after they have been dereferenced.
fixes#39868fixes#39874
Signed-off-by: David Leach <david.leach@nxp.com>
Current version of STM32 PTP clock reads current PTP time by querying
second and nanosecond registers sequentially. It is possible for second
to roll over between reading second and nanosecond registers, causing
returned time to be off by a second. This bugfix resolves that issue.
Signed-off-by: Alex Sergeev <asergeev@carbonrobotics.com>
Exposes the RC register so that the initial value can be set in
the device tree. This is useful in the case where the timer
generates an event but an interrupt is not required.
e.g generate event to sample adc on RC register match.
Tested on Atmel SMART SAM E70 Xplained Ultra board
Signed-off-by: Marius Scholtz <mariuss@ricelectronics.com>
Current gpio and uart initialization level is set to
PRE_KERNEL_2, which won't let uart_console subsystem
to init its hook properly as it has same level.
Prioritize uart and gpio so that the console hooks
are properly initialized.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Current uart driver implementation is incompleted regarding the
usage of DT_INST_FOREACH_STATUS_OKAY. If uart0 and uart2 are selected,
build breaks due to peripheral number ordering, which would be
0 and 1 in this case. This fix PR fix this by re-working the macros
and setting proper uart peripheral instances in DTSI, required for signal
routing configuration.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Update the Kconfig configuration items used to determine if the current
target is based on the Zynq-7000 SoC family as part of the re-organi-
zation of the Zynq-7000 SoC configuration data.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@Weidmueller.com>
Update the Kconfig configuration items used to determine if the current
target is based on the Zynq-7000 SoC family as part of the re-organi-
zation of the Zynq-7000 SoC configuration data.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@Weidmueller.com>
PR #41918 introduced a few warnings and build failure due to
missing data cofniguration and DEV_CFG() removal.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
After #41918, DEV_CFG removal triggered discard qualifer warning
during build. As uart_hal functions don't required const qualifier
and uart_context_hal_t has modified data, this PR moves hal instace
to data struct instead of config struct.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
After #41918, build started to warn discard qualifer
in config struct. This adds const into those structs.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Updated H4 driver to initialize setup function. Finally bt_h4_vnd_setup
function must be implemented in vendor-specific HCI extension module if
CONFIG_BT_HCI_SETUP is enabled.
BT_HCI_SETUP feature is useful when the BT Controller requires execution
of the vendor-specific commands sequence to initialize the BT Controller
before the BT Host executes a Reset sequence.
To enable this feature the CONFIG_BT_HCI_SETUP should be enable.
Fixes#41140
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
- Added config BT_HCI_SETUP to enable HCI vendor-specific Setup feature,
- Added pointer to 'setup' function in bt_hci_driver structure.
BT_HCI_SETUP feature is useful when the BT Controller requires execution
of the vendor-specific commands sequence to initialize the BT Controller
before the BT Host executes a Reset sequence. To enable this feature the
CONFIG_BT_HCI_SETUP should be enable.
Fixes#41140
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
Address the issue mentioned in zephyrproject-rtos#7412
Using printf() with "%x" to print an off_t value produces the
following warning:
format '%x' expects 'unsigned int', argument has type 'long int'
228 | LOG_DBG("Erasing sector at 0x%08x", offset);
| ^~~~~~~~~~~~~~~~~~~~~~~~~~ ~~~~~~
| |
| off_t {aka long int}
In newlib off_t is long. Even though both int and long are 4 bytes wide
in the architecture in use, GCC wants to see "%lx" to printf() a long.
Using "%"PRIx32 still produces the same warning because PRIx32
(from inttypes.h) still expands to simply an "x" and not "lx".
PR zephyrproject-rtos#40004 has solved this by casting offset to
ssize_t. The same solution is emulated here.
Signed-off-by: Milind Paranjpe <milind@whisper.ai>
Fixed#41945
NO_PINT_INT can have the same value as a specific pin.
E.G. For 1 byte pint_pin_int_t it equaled interrupt1.
Now is instead always 1 higher than the highest pin.
Expects fsl to keep setting values from 0 to
(number of connected outputs - 1)
Signed-off-by: Martin Koehler <koehler@metratec.com>
Build shows warning due to incompatible
CPU vendor name. This fixes it and applies
necessary changes in files.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
* New m_can driver variant for STM32H7, as it uses the complete m_can
register set.
* Fix definitions for CAN_MCAN_RXF0S_F0FL, CAN_MCAN_TXEFC_EFSA_POS.
Signed-off-by: Jeremy Wood <jeremy@bcdevices.com>
1. Update to add support for Flexcomm8-13.
2. Fix the clock control driver, the enclosing #define
was incorrect.
3. Identify HS_SPI port using the appropriate Register
define
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
For multicore devices like nRF53, shim layer part of setting mac keys
and frame counters is called on application core where
CONFIG_NRF_802154_ENCRYPTION is disabled (the define concerns radio
driver for net core). This commit replaces
CONFIG_NRF_802154_ENCRYPTION with CONFIG_IEEE802154_2015.
Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
This commit adds support for tickless operation on the MIPS CP0 timer.
The code closely follows the Xtensa and RISCV timer drivers.
All tests pass.
Signed-off-by: Remy Luisant <remy@luisant.ca>
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
In order to preserve stack, this replaces the single-bus enumeration
loop by a stack based non-recursive pcie hierarchy iteration.
Each stack entry contains a bridge bus enumeration state.
When a bridge endpoint is detected on the current bus, it is
configured and this new bus is pushed on top of the stack in
order to be enumerated at next loop.
When enumeration ends on the bus, the current bus state is
removed from the stack to continue enumeration on the previous
bus.
This enumeration affects a sequential bus number to each new
bus detected in the same order as Linux & U-Boot does.
In this hierarchy:
[0 1 2 ... 31]
| | |
EP | |
| |
[0 1 ... 31] [0 ... 31]
| | |
| EP |
| [0 ... 31]
[0 ... 31] |
| EP
EP
We will get the following BDFs enumeration order:
00:00.0 Endpoint
00:01.0 Bridge => Bus primary 0 secondary 1
01:00.0 Bridge => Bus primary 1 secondary 2
02:00.0 Endpoint
... Bus secondary 2 => subordinate 2
01:01.0 Endpoint
... Bus secondary 1 => subordinate 2
00:02.0 Bridge => Bus primary 0 secondary 3
03:00.0 Bridge => Bus primary 3 secondary 4
04:00.0 Endpoint
... Bus secondary 4 => subordinate 4
... Bus secondary 3 => subordinate 4
The gives the following primary/secondary/subordinate map:
Bus 0 [0 1 2 ... 31]
| | |
| [0:1->2] [0:3->4]
EP 00:00.0 | |
| |
Bus 1 [0 1 ... 31] Bus 3 [0 ... 31]
| | |
| EP 01:01.0 |
[1:2->2] [3:4->4]
| |
| Bus 4 [0 ... 31]
Bus 2 [0 ... 31] |
| EP 04:00.0
EP 02:00.0
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This adds setup of Type 1 bridge endpoints in two steps, first when
endpoint is detected and secondly when enumerating the next endpoint.
First, the code configures the bus primary & secondary number and 0xff
as subordinate to redirect all PCIe messages to this bus.
Then memory & I/O base are programmed by getting the current allocation
bases.
Finally, now right away, we program the subordinate to the max bus
number under the bridge, here the same, and the memory & I/O limit,
here lower than the base.
This doesn't make the bridge totally usable, enumeration would work
bus not for nested bridges and BARs wouldn't be accessible.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
In order to prepare support for bridges enumeration, split out the
actual endpoint enumeration code out of the enumeration loop.
Pass a skip_next_func boolean to indicate if the current endpoint
is multifunction of not, to continue to next dev or next function.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The Type 1 endpoints has 2 BARs are the same position as the Type 0
BARS 0 & 1, so reuse the generic_pcie_ctrl_type0_enumerate_bars()
for both types by passing the number of possible BARs on the endpoint.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Initial implementation of a simple GPIO controlled power domain.
It exposes no API of its own, all functionality is contained inside
the runtime power management callbacks.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Some drivers explicitely casted data/config from void * to the
corresponding type. However, this is unnecessary and, in many drivers it
has been misused to drop const qualifier (refer to previous commits).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Replace all get_dev_data()/get_dev_config() accessor utilities with
dev->data and dev->config.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Replace all get_dev_data()/get_dev_config() accessor utilities with
dev->data and dev->config.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Replace all get_dev_data()/get_dev_config() accessor utilities with
dev->data and dev->config.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Replace all get_dev_data()/get_dev_config() accessor utilities with
dev->data and dev->config.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Replace all get_dev_data()/get_dev_config() accessor utilities with
dev->data and dev->config.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Replace all get_dev_data()/get_dev_config() accessor utilities with
dev->data and dev->config.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Replace all get_dev_data()/get_dev_config() accessor utilities with
dev->data and dev->config.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Replace all get_dev_data()/get_dev_config() accessor utilities with
dev->data and dev->config.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Replace all get_dev_data()/get_dev_config() accessor utilities with
dev->data and dev->config.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data
and dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data
and dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data and
dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using redundant DEV_DATA/DEV_CFG macros and use dev->data
and dev->config instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
As suggested by Tomasz Bursztyka, it's clearer to move generic after the
domain prefix, here pcie.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
As suggested by Tomasz Bursztyka, translate is clearer than xlate in
the PCIe controller functions and callbacks names.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
When the csl is active the nrf_802154_sleep() is called unnecessary.
This commit fixes it.
Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
This adds skeleton Kconfig/CMakeLists.txt and common implementation
of some sys_mm_drv_*() functions.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
GPT timer must continue running in low power modes, as it is the system
wakeup source. Set configuration to ensure peripheral will not stop
running in low power modes.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
drivers/spi.h header is included when CONFIG_DSA_SPI
is enabled so there is no necessity to do that once again.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Remove the unused NUM_TX_EVENT_FIFO_ELEMENTS helper macro. There is no
dts property for setting the TX event FIFO size.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add watchdog0 to support tests/drivers/watchdog/wdt_basic_api.
Solve tests code runtime error on it8xxx2_evb:
1.When run the wdt tests api, we shouldn't reduce the warning
timer time, so I add config WDT_ITE_REDUCE_WARNING_LEADING_TIME,
this config will be enabled only on platform EC.
2.Upper limit window timeouts can't be 0 when we install timeout.
3.Since we support wdt_it8xxx2_disable(), then we should support
flag WDT_OPT_PAUSE_HALTED_BY_DBG, too. Watchdog can be stopped
by IT8XXX2_WDT_EWDSCEN bit of ETWCTRL reg.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
In order to align with macros used to obtain a device reference (e.g.
DEVICE_DT_GET), align the PM macros to use "GET" instead of "REF". This
change should have low impact since no official release has gone out yet
with the "REF" macros.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
gPTP module clock is enabled for rt11xx. gPTP is not working correctly
on the RT10xx or RT11xx series, but this module clock needs to be
enabled
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
RT11xx soc has multi ring enet IP, which has different HAL functions.
Update eth_mcux driver to account for this
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The SAM spi driver depends on GPIO driver to work. It seems that this
dependency chain it is not handled. This select GPIO driver when SPI
driver is enabled. It rework GPIO and SPI Kconfig to select driver by
devicetree and drop entries at Kconfig.defconfig.series file.
Fixes#41525
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This commit fixes compilation warning (unused variable)
generated in nrf5_config_mac_keys function, when the ASSERT
macros were disabled.
Signed-off-by: Przemyslaw Bida <przemyslaw.bida@nordicsemi.no>
If a transaction fails, the bus was not being returned to idle. This
increases power consumption, and can cause the following transaction to
be misinterpreted.
By issuing a STOP command on error, we can ensure that the bus returns
to idle correctly.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
When calling i2c_transfer(), the bus failes to enter the idle state when
performing a read, or an unacknowledged write. This increases power
consumption, and can cause the following transaction to be
misinterpreted.
This behaviour was observed on a SAML21 part. There appears to be a race
condition between the peripheral setting CLKHOLD, and the command being
correctly set up - so now we wait for the CLKHOLD field to be set before
issuing the STOP command, and this resolves this issue.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
This fixes both TX ready and completed uart
calls to meet valid condition.
Closes#41526Closes#41624
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Rework the transmit error handling in the NXP MCUX FlexCAN driver:
- Frame transmission must be automatically retried in case of lost
arbitration or missing acknowledge.
- Abort any pending TX frames when bus-off state is entered.
- Fail early in can_send() if in bus-off state.
Fixes: #19502
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add support for disabling automatic retransmission of CAN frames
(similar to CAN "one-shot" mode in the Linux kernel).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Introduce Pin Function Controller for Renesas R-Car family.
This first implementation support to set a given pin as gpio
or peripheral (GPSR), to set a peripheral function to a
pin (IPSR), to set pull-up, pull-down (PUEN, PUD).
In addition this driver allows to set driving capabilies(DRVCTRL).
Pins are identified thanks to the per SoC binding for
pin definition which also contains pin alternate function
parameters.
Some pins can also have driving capabilities, some have bias
capabilities.
In order to find the correct bias and drive registers pfc_r8a77951.c
describes the different registers.
Each SoCs or package will need to define getters
for these registers: pfc_rcar_get_bias_regs() and
pfc_rcar_get_drive_regs().
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
1. Rename DT_COMPAT_ST_BBRAM_IT8XXX2 to COMAPT_ITE_IT8XXX2_BBRAM
2. The default configuration "$( )" should be a parentheses instead
of curly brackets. The BBRAM for it8xxx2 can be driven after
correcting.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
BBRAM content should be cleared when boot from cutoff. Compare magic
number to decide whether to clear entire BBRAM.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Refactors all of the on-chip flash drivers to use a shared driver class
initialization priority configuration, CONFIG_FLASH_INIT_PRIORITY, to
allow configuring flash drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers.
Driver-specific options for SPI-based flash drivers are left intact
because they need to be initialized at a different priority than on-chip
flash drivers.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
This commit updates the ieee802154 driver to match the current feature
set of the nRF 802.15.4 radio driver for nRF53 SoCs.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
Clear ADRDY before enabling ADC to ensure the subsequent
wait for ADRDY does not stop prematurely in case ADRDY
was already set.
The "ADC on-off control" sections of the following reference manuals
were consulted. That gives at least one instance per series affected
by this change, even if not every affected MCU is covered.
- RM0438 (STM32L552xx and STM32L562xx)
- RM0351 (STM32L47xxx, STM32L48xxx, STM32L49xxx and STM32L4Axxx)
- RM0434 (STM32WB55xx and STM32WB35xx)
- RM0454 (STM32G0x0)
- RM0440 (STM32G4 Series)
- RM0399 (STM32H745/755 and STM32H747/757)
- RM0433 (STM32H742, STM32H743/753 and STM32H750)
- RM0453 (STM32WL5x)
Signed-off-by: Alexander Mihajlovic <a@abxy.se>
Use a wrapper for LL_ADC_Enable that also waits for ADRDY if required
by the SoC to make sure it's properly enabled everywhere this is done.
Signed-off-by: Alexander Mihajlovic <a@abxy.se>
the stm32 spi drivers now takes the DTS frame_format property
from the include/ drivers/spi.h
It will be possible to select the Motorola (default)
or TI from the DTS entry of the device,
when soc supports it, else a run time error is raised.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add kscan0 to support tests/driver/kscan/kscan_api.
When running the tests code on it8xxx2_evb, it shows fatal
error: IRQ is enabled. We find that once polling_task() is
created and executed, the KSI interrupt will be enabled and
before we call irq_connect_dynamic(), so we switch both
function sequence.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Add a dummy driver for the `vnd,adc` compatible to allow compilation of
drivers utilising an ADC when running "build_all" tests.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
On some platforms, HPET is not wired to trigger IRQ 2.
This would make HPET non-functional if the legacy
interrupt routing bit is set in the global config
register. This adds a DTS flag so the driver won't
set the bit to enable legacy interrupt.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add an interrupt driven i2c driver for gd32 i2c peripheral.
The transmit and reception method refer from GD32 SoCs user manual.
Particularly, reception method choose the solution B.
There have some wait for state ready logic in the driver. It cause by
i2c device internal state change slower than i2c driver.
Signed-off-by: HaiLong Yang <cameledyang@pm.me>
We will soon need to do more boundary checking to test whether we are
reading secure or non-secure memory.
Refactor the boundary checking in preparation for this.
Signed-off-by: Sebastian Bøe <sebastian.boe@nordicsemi.no>
GPIOTE channel was not freed when pin was reconfigured. This lead to
channel pool draining when pin was frequently reconfigured.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
This PR adds the different handling of temperature sensor for the
STM32L5 soc. In this soc, there are some calibration settings which
need to be applied for temperature conversion.
Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
moving the conversion from adc value to the get function
which will be used for different handling of stm32 temp sensors
Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
Just minor styling changes to capitalize the first character
and removing the trailing comma on the brief doc description
on two copy functions.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
For functions returning nothing, there is no need to document
with @return, as Doxgen complains about "documented empty
return type of ...".
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
For functions returning nothing, there is no need to document
with @return, as Doxgen complains about "documented empty
return type of ...".
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
For functions returning nothing, there is no need to document
with @return, as Doxgen complains about "documented empty
return type of ...".
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
For functions returning nothing, there is no need to document
with @return, as Doxgen complains about "documented empty
return type of ...".
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
For functions returning nothing, there is no need to document
with @return, as Doxgen complains about "documented empty
return type of ...".
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add optional user data argument to can_set_state_change_callback() to
comply with Zephyr API design guidelines.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Subghzspi instances cannot have any pinctrl configs,
they are blacklisted by the dts binding. This caused an
initialization failure of the spi_ll_stm32 driver for
subghzspi instance because no "default" pinctrl was found.
This commit solves the problem by skipping the pinctrl setup
for subghzpi devices. The use_subghzpi_nss property is used
to identify a subghzspi device, as this is a required boolean
property only available in the subghzspi binding this is a
perfect indicator for such instances.
Signed-off-by: Alexander Mihajlovic <a@abxy.se>
This commit adds the API of get_config that will make test of
tests/drivers/i2c/i2c_api pass on it8xxx2_evb board.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Certain stm32 soc's have a single shared irq for all adc channels
on those soc's only a single channel is supported.
Added a Kconfig that enables a shared irq for stm32f2x, stm32f4x,
stm32f7x soc's. The shared IRQ uses a flag to limit the number of
interrupts defined to only 1. A shared irq handler is added which
determines which ADC instance the interrupt is for, it then calls
into the existing interrupt.
Signed-off-by: Marius Scholtz <mariuss@ricelectronics.com>
The gd32_exti_isr function may be unused if the GPIO driver is not
enabled but EXTI is (no IRQ will connect to it). This may be improved in
the future by requiring explicit enablement of the exti DT node.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The default I2C channel 3 is used by alternate function of GPIO H1/H2
Krabby uses GPIO F2/F3 as I2C channel 3, so we need to add the
compatibility of the GPIO F2/F3.
TEST=test on it8xxx2_evb:
zmake configure -b zephyr/projects/it8xxx2_evb/
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Adding these definitions help ease of porting POSIX applications.
They currently do nothing in the core network stack and will
return an error if used. However, they help port some POSIX
without changing these. In particular, this enables using the
Nim programming language's standard library with Zephyr.
- The values copy Linux amd64, similar to the other SO_OPTIONS
- Add SO_SNDBUF to fix simplelink wifi
- Use compat options in simplelink wifi
Signed-off-by: Jaremy J. Creechley <jaremy.creechley@panthalassa.com>
An additional devicetree poperty `single-wire` is added
to uart and usart bindings of stm32. The driver checks this value
during initialization and enables the single wire mode when set.
Signed-off-by: Jonathan Hahn <Jonathan.Hahn@t-online.de>
Use pm_state_cpu_get_all to obtain CPU states instead of using extra ROM
duplicating existing information already holded by the PM subsystem.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The Event FIFO start address (EFSA) field within the Tx event FIFO
configuration register (TXEFC) occupies bit 15:2.
Change the CAN_MCAN_TXEFC_EFSA_POS definition to reflect this.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Rename a few CAN API functions for clarity and consistency with other
Zephyr RTOS APIs.
CAN_DEFINE_MSGQ() becomes CAN_MSGQ_DEFINE() to match K_MSGQ_DEFINE().
can_attach_isr() becomes can_add_rx_filter() since a filter callback
function is not an interrupt service routine (although it is called in
isr context). The word "attach" is replaced with "add" since filters are
added, not attached. This matches the terminology used is other Zephyr
APIs better.
can_detach() becomes can_remove_rx_filter() to pair with
can_add_rx_filter().
can_attach_msgq() becomes can_add_rx_filter_msgq() and documentation is
updated to mention its relationship with can_add_rx_filter().
can_register_state_change_isr() becomes can_set_state_change_callback()
since a state change callback function is not an interrupt service
routine (although it is called in isr context). The word "register" is
replaced with "set" since only one state change callback can be in
place.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This patch controls the SPI of the stm32H7 mcu when using
the DMA transfer. Starting and ending the transfer
are specific according to the RefMan.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
A generic function is used to give the register address to the DMA.
The SPI of the stm32H7 serie has two data registers for Tx and Rx
When the DMA is getting the address it differs between Rx and Tx.
As the stm32cube/stm32h7xx/drivers/include/stm32h7xx_ll_spi.h
has no such LL functions, the register address is get direclty.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The spi_stm32_complete() is checking spi flags which are valid when the
intance is still enable: disable afterwards. No more need to disable
the DMA transfer then
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Defines a function to control the spi busy state during DMA transfer.
After the DMA Tx, the spi might still have some data to Transmit.
The driver must wait for the SPI Tx before sending the next packet.
This is not required for the Rx part as the DMA Rx is already done.
Some mcus like stm32H7 have a TX complete bit, other must wait for the
TXE and BSY line.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Initial version of a PWM driver for GigaDevice GD32 SoCs. Only PWM
output is supported for now (no capture support).
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
NPCX7/9 has a different ADC register structure. NPCX7 has 3 threshold
detectors from offset 0x14 & has 10 input channels. NPCX9 has 6
threshold detectors from offset 0x60 & has 12 input channels.
This commit fixes the NPCX ADC register structure.
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
Theoretically, source id check is not mandatory in the context we use
VT-D here (i.e. non VM one, just multi-vector MSI support)
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Not sure this is requered as we do not mangle with domains, but let's
make sure this cache is clear.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
A surprising issue: while sys_set_bit() on VTD_GCMD_REG work on
apollo_lake, it seems to create border effect on elkhart_lake: it may
reset some previous bit to 0.
So switching to full write of the register at once, which works for
both.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
VT-D will only be enabled if MSI multi-vector will also be requested,
on x86_64, for all boards BUT QEMU ones.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
There is no point to enable VT-D if PCIE MSI multi-vector support is not
requested, as VT-D is uniquely being used to remap MSI multi-vector
based interrupts.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Those MMIO registers might be mapped in RAM and thus it's
really important to keep storage space for such mapping.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
QI operation are not supposed to last forever.
It's not an actual timeout based on clock, but a dummy counter instead.
That's because system clock might not have beed initialized yet, since
VT-D's init comes first (and that same init will use QI...)
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Depending on a VT-D capability, it might be necessary to flush objects
from the cache.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Looks like it's mandatory to invalidate the Interrupt Entry Cache in
VT-D and the only way to do so is to enable Queued Interface.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
IR faults are non-recoverable, so it's good to know why. Thus let's
handle the fault event and print the fault.
Other faults are printed as well.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Looks like a source of fault if pieces of IRTE are written instead of
the whole 64 bits block it belongs to.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
If VT-D's interrupt remapping is in place, all IOAPIC RTEs need to get
remapped as well (or then they will be simply blocked).
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Adding a way to pre-install the irg/vector on an irte and a way to get
an irte based on irq/vector.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This will not only be used by MSI remapping but by all relevant
interrupts.
Fix also IRTE settings:
- handle x2apic for destination id
- destination mode is always logical (as for IOAPIC)
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
In XAPIC mode, it's possible to tell VT-D to let interrupt in compatible
format passing through.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
SHV bit depends on the number of vectors allocated.
If it's facing a multi-vector MSI array, it will set the bit.
If not the bit must be 0.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Refactor to handle this case. This is valid only when MSI multi-vector
feature is enabled.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The is meant to fix a chicken & egg issue with MSI interrupt remapping.
Currently, drivers first connect the irq (by-passing any possible MSI
remapping), so the IRQ ends-up being remapped at the IOAPIC level which
is not what we want.
So adding a dedicated function to properly handle this case. This is
valid only for runtime dynamic IRQ connection obviously.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
And since it does yet another round of pcie_get_cap() on PCIE_MSI_CAP_ID
and PCIE_MSIX_CAP_ID, let's factorize that into a utility function and
change the relevant places to use that function instead.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The host reassembles fragmented advertising reports from the controller.
Non-complete advertising reports from different advertisers may not be
interleaved. If non-complete advertising reports from an advertiser
is received while advertising reports from another advertiser is
reassembled, an error message is logged and the advertising report is
discarded. Future scan results may be incomplete.
Advertising reports from legacy PDUs or complete extended advertising
reports may be interleaved as these do not require reassembly.
If the controller sends more advertising data than fits in the
reassembly buffer, the data is truncated. Further advertising reports
from the advertiser are discarded until the final complete advertising
report is received and discarded.
Signed-off-by: Herman Berget <herman.berget@nordicsemi.no>
Enable the emulated GPIO driver by default if instances exist in
devicetree. This removes the need to manually enable `CONFIG_GPIO_EMUL`
when `CONFIG_GPIO` is enabled.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
General refactoring to clean up and futureproof this driver.
Remove false dependency on CONFIG_CAVS_ICTL. This requires the CAVS
interrupt mask API, but doesn't touch the interrupt controller driver.
Remove a racy check for simultaneous interrupts. This seems to have
been well intentioned, but it's needless: the spinlock around the
last_count computation guarantees that colliding interrupts will
correctly compute elapsed ticks (i.e. the last will compute and
announce zero ticks, which is correct and expected). And this opened
a tiny window where you could incorrectly ignore a just-set timeout.
Factor out the specific registers used (there are only five) into
pointer-valued macros instead of banging them directly.
Unify interrupt initialization for main and auxiliary cores.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Instead of using maskstatus to see if an interrupt has fired,
use finalstatus instead. It has been observed that some
controllers do not update maskstatus correctly with incoming
interrupts, but finalstatus works fine.
FYI, the DW driver in Linux is also using finalstatus.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Recent changes in this function made the code now compatible
with the use of LL API to perform this configuration.
Use it to simplify the driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Fix hard fault due to NULL being passed as argument into
rssi_handler, which now derives the gsm_modem struct pointer from
the argument.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Disabling clock may conflict with concurrent usage of GPIOs and pins in
AF mode. This can be improved once a proper clock control API is in
place.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Add GPIO driver for Gigadevice SoCs. The driver supports devices with
the AF and AFIO models.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Add initial support for the GigaDevice External Interrupt Controller.
This driver is required to manage GPIO interrupts. Only EXTI lines 0 to
15 are supported for now (no LVD, RTC, etc.). Driver can be extended in
the future to add support for extra EXTI lines.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This change provides support for 4 IO read (via 4READ command) and
program (via 4PP). Flash memory pins SIO[0123], CLK and CS are used.
All of them are controlled by stm32 QSPI IP block.
The instruction code for fast reading as well as number of latency
cycles required are read from SFDP structure provided by flash memory.
The number of required read latency cycles when performing reading
is the sum of SPI-NOR memory mode bits and wait states (also named
as 'dummy cycles').
It also has been assumed that memory, which supports fast read (4READ),
also will support fast programming (4PP command) as this information is
not available in SFDP.
One also need to enable the QUAD IO support in board's device tree by
defining 'spi-bus-width = <4>' property. It is required as it may
happen that not all QSPI dedicated pins are used (for example only two
of them are available).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
For proper operation of QUADSPI IP block, both sides of communication;
NOR flash memory and STM32 controller need to support 4 IO
transmission.
After this change the QSPI stm32 driver is able to program NOR flash
memory to switch itself to use all 4 IO lines (SIO[0123]) to transmit
and receive data.
The QE bit (in SPI-NOR's Status Register) is the non-volatile one, so
setting it is done only once (at first boot of the device).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This commit provides define for reading the control register (CR) on
the flash memory.
In that register the information about 4B addressing is stored.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Some flash memories connected to QUADSPI IP block on stm32[fh]7 devices
require proper reset pulse before configuration.
This patch adds two new properties - the 'reset-gpios' phandle,
which allows specifying GPIO pin for RESETn pulse and
'reset-gpios-duration', which provides the time (in ms) for reset
duration.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The 'flash-id' property defines the number of QSPI's dedicated GPIO
bank (and flash ID), which will be used to communicate with flash
memory.
For example, on stm32h7xx it is possible to use 'quadspi_bk1_*' and
'quadspi_bk2_*' set of pins, so one may need to select between them
when required.
By default - pins from 'quadspi_bk1_*' bank are used, so the
'flash-id = <2>;' property, when your use case (e.g. PCB design)
requires it, forces usage of 'quadspi_bk2_*' pins.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The stm32 HAL code for qspi (SHA1: 5c8275071ec1cf160bfe8c18bbd93):
stm32cube/stm32h7xx/drivers/src/stm32h7xx_hal_qspi.c implicitly
depends on the stm32h7xx_hal_mdma.c driver as it uses unconditionally
'HAL_MDMA_Abort_IT()' function.
To avoid build breaks - no matter if QSPI IP block works with DMA
or interrupts - the CONFIG_USE_STM32_HAL_MDMA shall be defined.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
In npcx_itim_evt_isr, it updates the cyc_sys_announced variable and
then calls sys_clock_announce() to update the kernel curr_tick variable.
If an ISR handler with higher priority preempts the timer ISR after the
sys_clock_announce is updated and before the sys_clock_announce() is
called, it will read the wrong time when calling k_uptime_get() because
the cyc_sys_announced and the curr_tick are not synchronized.
The commit fixes the problem by raising the timer's interrupt priority
to the highest one (i.e. 1 in npcx's configuration).
This commit also moves the computation of the delta cycle inside the
spinlock in sys_clock_elapsed() to prevent another potential racing
condition.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
Convert the CAN loopback driver from being configured via Kconfig to
multi-instance configured via devicetree.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
gsm_ppp_stop should cancel possible running work items.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
The 'work' argument of a delayable work's handler should be
converted to delayable work before passing into the CONTAINER_OF
macro.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
This commit introduces the following changes:
* nrf_rtc_timer is extended with a capability to handle RTC overflow,
allowing it to operate on absolute RTC ticks, rather than relative
ticks.
* overflow handling is ZLI-proof and relies on the sys clock
handler being executed twice every RTC counter's overflow.
* callbacks are given an absolute RTC tick value as a parameter instead
of CC register's value. The absolute RTC tick value is the RTC counter
value set during CC channel configuration extended to 64 bits.
* in case the timer's target time is in the past or is the current tick,
the timer fires as soon as possible, however still from the RTC's ISR
context.
* in case an active timer is set again with the same target time, it is
not scheduled again - only its event data is updated. Otherwise, the
timer is scheduled as usual.
* a scheduled timer can be aborted.
* system clock functions are now using 64 bit values internally.
Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Signed-off-by: Paweł Kwiek <pawel.kwiek@nordicsemi.no>
ESP32 uart_poll_in should return 0 on success and not
the total amount of data read.
This also adds a check in fifo_fill call to
avoid negative values, otherwise it would send garbage
to uart
Closes#41352
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Don't re-enable the DIO1 interrupt when the modem is in sleep mode. This
fixes the power regression introduced in Zephyr v2.7.0 #41026.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
The msg_sram resides in the sram region, where the
m_can controller direcly access it. Whenever the driver
writes to the msg_sram and operations are triggered, the
cache needs to be invalidated.
Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
RM 0453: the sw is allowed to write the Oversampling
ratio or shift of the ADC Config.Reg.2 only when ADSTART = 0
(no conversion is on-going). So disabling it will be stopped.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
RM 0453: the sw is allowed to write the Data Resolution bits
of the ADC Config.Reg.1 only when ADEN = 0 (ADC disable).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add a dummy driver for the `vnd,gpio` compatible to allow compilation of
drivers utilising GPIO when running "build_all" tests.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
This commit adds the API of page_layout that will make test of
test/drivers/flash pass on it8xxx2_evb board.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Change the can_tx_callback_t function signature to use an "int" (not an
uint32_t) for representing transmission errors.
The "error" callback function parameter is functionally equivalent to
the return value from can_send() and thus needs to use the same data
type and needs to be able to hold negative errno values.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The driver performs AT commands configurations using the
system workqueue, this can delay the workqueue by up to 6
seconds to wait for the modem replies, which isn't ideal.
This PR creates a dedicated workqueue for the gsm, and
provides a helper function to reschedule work items to the
gsm workqueue.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
STOP command was issued in the same transmission message
and as from esp-idf, this should be moved into a new
transmission.
Although it works in most scenarios, SHT3X sensor is one
case that presents reading error.
Closes#41385
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
The PINCTRL_DT_(INST_)DEFINE macros already defined the trailing ;,
making its usage inconsistent with other macros such as
DEVICE_DT_DEFINE.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
PR #38482 made the sam0 i2c send NACK when receiving a single message
Fixes#38878Fixes#41016
Signed-off-by: Christoffer Zakrisson <rustypig91@gmail.com>
SYS_INIT can be used for the same purpose, what is being run is simply
an initialization hook.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
If there are no console messages input at an interval of 15
seconds, the system will be able to enter suspend mode.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Add length checks before calls to net_buf_add_mem
for dynamically sized data.
This should give a better error response than hitting
the __ASSERT in net_buf_simple_add.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
some build error due to adding rt11xx support without testing
update mclk enable to avoid add pinmux driver
note:
some other PRs still in progress to full enable i2s on rt platform
this fixing: #41153
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Specify in the API that the callback must be registered before the
channel is enabled, fix the NRFX IPC driver to be compliant and change
the MBOX sample.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Fix a problem introduced in 6ea54db334 that caused the poll operation to
take 10x more time than intended.
Signed-off-by: Mateusz Kwiatkowski <kfyatek+publicgit@gmail.com>
MCHP ADC configuration register need to be updated with appropriate
clock time values for high & low time clock.
Signed-off-by: Aditya Bhutada <aditya.bhutada@intel.com>
Deprecate the can_attach_workq() API call.
This API is limited in its functionality (it does not work with
userspace, it uses one common buffer size for all work queue instances).
Similar functionality can easily be implemented using the
can_attach_msgq() API along with the generic triggered work API
(e.g. using k_work_poll_submit()).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Convert the CAN shell from using can_attach_workq() to using
can_attach_msgq() and triggered work via k_work_poll_submit().
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Driver was not behaving according to API description and
was not returning -EBUSY when uart_rx_enable() was called
on already enabled receiver.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
This is a follow-up to commit 4dfab40cac.
The calculation of the pixel period is done incorrectly and results
in higher than configured refresh frequency if pixels are refreshed
in groups. Fix that and lower the base frequency for the timer and
PWM so that wider range of refresh frequency can be used also with
the pixel grouping.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Sending AT+CWLAP was introduced with commit f2859f9501 ("drivers:
wifi: esp_at: changes to scanning") as a way to easily test introduced
changes, rather than on purpose. Remove that now, as there is no
particular reason to send it and additionally it breaks setup phase:
<err> modem_cmd_handler: command AT+CWLAP ret:-5
<err> wifi_esp_at: Init failed -5
with ESP-AT firmware v2.1.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
PCIE now uses the new interface. And pcie_alloc_irq() is only made
available when CONFIG_PCIE_CONTROLLER is unset. So only for x86 atm.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
i2c_burst_write can have portability issues with certain i2c
peripherals that can fail when this api is called. This fixes the case
where this can be easily replaced with i2c_write in mcp230xx,
pca95xx, stmpe1600, max17055, and tmp112.
Signed-off-by: Ryan McClelland <ryanmcclelland@fb.com>
So far driver was using SENSE mechanism for all or none edge
interrupts. This was not convenient since in some modules may
require IN event to be used and other did not. Converting it to
use a mask specified in the device tree. Pins indicated in the
mask will use sensing.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Add a new DT property named "pixel-group-size" that allows users to
configure the driver to refresh the matrix by illuminating multiple
LEDs in particular rows simultaneously. This way the maximum possible
brightness of the LEDs can be increased (as they can be lit longer)
and the timer interrupt handler is executed less frequently, what
results in decreased CPU load, but more GPIOTE/PPI channels needs to
be allocated if the PWM peripheral cannot be used. Thus, it is left
to users to select the configuration that suits them best.
Update definitions of both the bbc_microbit boards with this new
property, using the maximum available group size (to achieve maximum
possible brightness). For v2, no new resources are used (only all
channels in the already used PWM peripheral are now utilized).
For v1, two more GPIOTE and PPI channels are allocated.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Fix pin disconnection when COFNIG_PINCTRL=n, so that less power is used
in suspended state. This seems to be a copy-paste kind of bug, since
when both resuming and suspending the same configuration was applied.
Fixes: 5567d7ae07 ("drivers: serial: nrfx_uart: add support for
pinctrl")
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Some STM32 series need to configure health test register
for proper RNG behavior.
In addition, some also require to write a Magic number
before writing the configuration.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Rework bbc:microbit display support to use nRF LED matrix
display controller driver and allow to use it with
bbc:microbit v2 board.
This patch turns the driver into a higher level driver
using the display controller API. Code that directly
accesses hardware (GPIO) is removed.
This driver is reworked to be more generic. It still
has a lot of potential for improvement, but it requires
changes in all applications that use this tool.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
- Supporting multiple instances of ivShMem virtual devices.
- Introduces DT based configuration for ivShMem devices.
- Add DTS overlay file to test new multiple ivshmem instance capability.
- Enable BDF unspecified device initialization.
(limited to one instance. An improved version of pcie_bdf_lookup()
will come soon that fixes this limitation)
- Make PCIE DTS file macros available for a proper ivshmem device
properties parsing.
Sample for dts file:
pcie0 {
label = "PCIE_0";
#address-cells = <1>;
#size-cells = <1>;
compatible = "intel,pcie";
ranges;
ivshmem0: ivshmem@800 {
compatible = "qemu,ivshmem";
reg = <PCIE_BDF_NONE PCIE_ID(0x1af4,0x1110)>;
label = "IVSHMEM";
status = "okay";
};
};
Signed-off-by: Michael Schmidt <michael1.schmidt@intel.com>
The commit changes the default size of write_from_nvmc,
defined by CONFIG_NORDIC_QSPI_NOR_STACK_WRITE_BUFFER_SIZE, to 4,
making the write_from_nvmc operation enabled by default.
The Kconfig description for the option has been changes more clearly
describe how does the option impact compilation.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Modifying configuration to enable with gd32vf103
- Add usart definition to devicetree.
- Define USART_STAT as alias of USART_STAT0 if not defined it.
- Enable USART if SOC_SERIES_RISCV_GIGADEVICE_GD32VF103.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Change the settings to support pinctrl on the GD32VF103.
- Split soc/arm/gigadevice/common/pinctrl_soc.h
and put it into include/dt-bindings.
- Leave some definitions that can't handle with device tree compiler
in pinctrl_soc.h.
- Remove dependency to SOC_FAMILY_GD32 because always enabled it
if GD32_HAS_AF(IO)_PINMAX was selected.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
GD32V SoC uses divided clock from core-clock for machine timer clock.
Add config of clock divide factor to support GD32V.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Implemented driver for the simcom sim7080 modem.
This driver features Socket offloading, TCP, UDP, DNS,
SMS, GPS and FTP.
Signed-off-by: Lukas Gehreke <lk.gehreke@gmail.com>
In this commit, the driver sets the PM constraint to prevent the system
from entering the suspend state for a CONFIG_UART_CONSOLE_INPUT_EXPIRED
period when data come in. The constraint releases after the
CONFIG_UART_CONSOLE_INPUT_EXPIRED time expires, .
With this change, the PM policy doesn't have to check the timestamp
by calling npcx_power_console_is_in_use() explictly. So the related
npcx_power_console_is_in_use*() functions can be removed.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
The function that sets the driver's state of the sensor's
config register has a bug. This commit fixes that.
Signed-off-by: Pete Dietl <petedietl@gmail.com>
Instead of checking the SPI register flags, the spi_ll_stm32.h
has dedicated functions for that purpose.
They are abstracting the STM32 registers of SPI instance.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit introduces the following changes:
* nrf_rtc_timer is extended with a capability to handle RTC overflow,
allowing it to operate on absolute RTC ticks, rather than relative
ticks.
* overflow handling is ZLI-proof and relies on the sys clock
handler being executed twice every RTC counter's overflow.
* callbacks are given an absolute RTC tick value as a parameter instead
of CC register's value. The absolute RTC tick value is the RTC counter
value set during CC channel configuration extended to 64 bits.
* in case the timer's target time is in the past or is the current tick,
the timer fires as soon as possible, however still from the RTC's ISR
context.
* in case an active timer is set again with the same target time, it is
not scheduled again - only its event data is updated. Otherwise, the
timer is scheduled as usual.
* a scheduled timer can be aborted.
* system clock functions are now using 64 bit values internally.
Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Signed-off-by: Paweł Kwiek <pawel.kwiek@nordicsemi.no>
So far the lengths provided in event and ACL packets were not being
checked at all, which could have caused an overflow if the contents were
not to fit inside the net_buf.
Check the length and discard the packet when it doesn't fit.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Move odr and range properties for both accelerometer and gyro
from Kconfigs to Device Tree.
Fixes#41117
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This sample writes the tmp108 temperature to the console
once every 3 seconds. There are macro definitions included
for turning off and on alerts if that is set up, and
also using low power one shot mode.
Signed-off-by: Jimmy Johnson <catch22@fastmail.net>
Adding support for the TI TMP108 temperature sensor. This includes
over/under temp interrupt support as well as one shot, continuous
conversion and power down modes.
Signed-off-by: Jimmy Johnson <catch22@fastmail.net>
The init struct for DMA peripheral is allocated in stack
and must be initialized (e.g. with LL_DMA_StructInit here)
to avoid loading undefined values in the DMA peripheral
registers.
Signed-off-by: Abel Radenac <a.radenac@lacroix-sofrel.com>
DT_INST_HAS_PROP macro is not available, DT_INST_NODE_HAS_PROP needs to
be used instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add a display driver and the corresponding devicetree binding for a LED
matrix with rows and columns driven by nRF SoCs GPIOs. Such matrix can
be found, for example, in the BBC micro:bit boards.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Some tests like:
tests/kernel/sched/metairq/kernel.scheduler.metairq
tests/kernel/profiling/profiling_api/kernel.common.profiling
tests/kernel/sched/schedule_api/kernel.scheduler
tests/kernel/sched/schedule_api/kernel.scheduler.multiq
tests/kernel/profiling/profiling_api/kernel.common.profiling
tests/kernel/workq/work_queue/kernel.workqueue
don't support that the current thread change when writing a message with
printk (which uses poll_out). So, we remove the call to k_yield which is
useful only for optimizing cpu usage by forcing a thread change if the
usart send stack is full.
Signed-off-by: Julien D'ascenzio <julien.dascenzio@paratronic.fr>
Replace usages of DT_PARENT(DT_DRV_INST(idx)) with more idiomatic
DT_INST_PARENT(idx).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Call `gpio_stm32_clock_request` unconditionally with "true" if no
runtime PM is enabled, "false" otherwise. In case the GPIO was enabled
(e.g. by a bootloader), the device will be left in proper state when
runtime PM is enabled.
Also added pm_device_runtime_init_suspended to indicate that device is
in a suspended state (will prevent pm_device_runtime_enable to suspend
the device again).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The function is only used by the driver itself. This likely comes from
pre-runtime PM API usage.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Make gpio32_stm32_configure use runtime PM API (so that it can be used
externally without further effort). The raw version of the function (no
PM put/get) has been introduced for internal use.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The suspend operation for this device is a clock gating operation (i.e.
fast), so use synchronous put to skip unnecessary overhead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The PM runtime API (get/put) provides an inline implementation when not
built-in. Such implementation always returns 1, so it is safe to not
guard PM runtime calls and check for < 0.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The PM runtime API (get/put) provides an inline implementation when not
built-in. Such implementation always returns 1, so it is safe to not
guard PM runtime calls and check for < 0.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The original parameter (k1) setting may let the I2C frequency be a
little bit higher than 100k Hz, which causes the timing Tsu:sta (set-up
time for a repeated START) to violate the spec. This change fixes the k1
parameter and also changes the HLDT to the suggested value in the
datasheet.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
The STM32 docs state that the ADC may not be calibrated unless
the ADC is disabled (ADEN=0). This commit implements this constraint
Fixes#40936
Signed-off-by: Pete Dietl <petedietl@gmail.com>
Change the function pm_device_runtime_enable() to return 0 on
success or an error code in case of error.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Create an explicit ina230 driver which is supposed to
work with 230 and 231 variants. While at it switch
to i2c_dt_spec helpers and change device-tree node
names to use - instead of _ in order to follow
convention.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
- B91 SoC requires to set RX mode again if channel is changed
- Fixed wrong ACK packet detection, mask should be used
Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
Add checks for the upper boundary in access_read/access_write
instead of the homeopathic ASSERTS.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This commit aligns lps22hh sensor driver to latest multi
instance sensor driver model.
In particular it makes use of the stmemsc common routines
and move ctx handler inside struct config, so that the
bus_init routines can be totally avoided.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This flag may cause host to more ambitious power saving behavior,
not all Zephyr USB classes or applications may be ready for this
now. Allow to disable option USB_DEVICE_REMOTE_WAKEUP.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
PRE_KERNEL_1 is to be used for devices that have no dependencies
and do not use kernel features, such as those that rely solely on
hardware present in the processor/SOC. This commit updates these
gpios to initialize during the PRE_KERNEL_1 rather than the
POST_KERNEL. Some SoC drivers are moved to PRE_KERNEL_2 due
to dependencies.
A lot of 'other' drivers can depend on GPIOs though phandles
(such as reset lines, data or command gpios, etc...). Most of these
drivers that would need this would come up on the POST_KERNEL,
and it's likely the driver may not be up yet as it should be defined.
Signed-off-by: Ryan McClelland <ryanmcclelland@fb.com>
USDHC driver did not pass disk test (failed during multiple writes). Add
logic to wait for the SD card to be idle before reading new data, so
that the test will pass. Also, add logic to reject OOB reads and writes
to the disk.
Fixes#39942
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
GD32 HAL use two USART status register name, USART_STAT and USART_STAT0.
This add a redefine to make USART_STAT as defaut name.
Signed-off-by: HaiLong Yang <cameledyang@pm.me>
Added a driver to enable the GPT timer on RT1xxx parts to be used
instead of systick as a clock source. The timer is set to run in reset
mode, and uses the low frequency 32kHz oscillator for power savings
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add support for the 8 channels TCA9548A I2C mux.
Added a new binding ti,tca9548a binding inheriting
properties from ti,tca954x-base and defining its own compatibles fields.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Add an optional "reset-gpios" phandle-array
field to the driver common yaml.
The reset GPIO channel and pin can be defined
in device tree as a node property.
The driver then deassert the reset signal at mux
initialization if a "reset-gpios" has been specified.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Prepare the driver to upcoming support of more mux references.
Rename all TCA9546A related files to TCA954x.
Keep ti,tca9546a and ti,tca9546a-channel compatible
for backward compatibility reasons.
New tca954x-base binding embedding common properties,
tca9546a binding inherits from it and define its own compatibles fields.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Make use of the i2c and spi DT APIs introduced in
2946a535 and c894ad12 that get i2c_dt_spec and spi_dt_spec
as input arguments.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The warning below appears once -Waddress-of-packed-mem is enabled:
/__w/zephyr/zephyr/drivers/sensor/bmi160/bmi160.c: In function
bmi160_gyr_channel_get:
/__w/zephyr/zephyr/drivers/sensor/bmi160/bmi160.c:795:23: error: taking
address of packed member of struct <anonymous> may result in an
unaligned pointer value [-Werror=address-of-packed-member]
795 | data->sample.gyr, val);
| ~~~~~~~~~~~~^~~~
/__w/zephyr/zephyr/drivers/sensor/bmi160/bmi160.c: In function
bmi160_acc_channel_get:
/__w/zephyr/zephyr/drivers/sensor/bmi160/bmi160.c:807:23: error: taking
address of packed member of struct <anonymous> may result in an
unaligned pointer value [-Werror=address-of-packed-member]
807 | data->sample.acc, val);
| ~~~~~~~~~~~~^~~~
To avoid the warning, make the struct non-packed, since it is not
necessary in this case given that a union already guarantees that the
pointer to the union points to each member of the union equally..
More info in #16587.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The warning below appears once -Waddress-of-packed-mem is enabled:
/__w/zephyr/zephyr/drivers/gpio/gpio_sx1509b.c: In function
'port_write':
/__w/zephyr/zephyr/drivers/gpio/gpio_sx1509b.c:456:19: error: taking
address of packed member of 'struct sx1509b_pin_state' may result in an
unaligned pointer value [-Werror=address-of-packed-member]
456 | uint16_t *outp = &drv_data->pin_state.data;
To avoid the warning, use an intermediate void * variable.
More info in #16587.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Add bindings for SDL based display controller.
Rework SDL based display controller driver to obtain
configuration from devicetree. Remove unnecessary casts,
add multi-instance support.
Add display controller node and chosen property
to native_posix devicetree.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
ssd16xx driver is not well designed and does not pass configuration
via device->config but via struct ssd16xx_data, this was not taken
into account in the commit 4d6d50e2bc
("display: ssd16xx: convert to spi_dt_spec").
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
this allows using a pin numbering scheme as per Espressif's
documentation and HAL usage, where pin counting does not wrap
up when reaching a given number.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
Voltage scaling computation should be done in multiple cases.
Add a function that takes into account all cases.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Deprecate the use of CAN-specific error return values and replace them
with standard errno values.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The init responsibility moves to the drivers themselves. The npcx itim
initialize doesn't work now. This adds timer initialization for npcx
itim to fix it.
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
The original code erroneously used:
uint16_t *val;
sizeof val
instead of:
sizeof *val;
This commit fixes this problem and removes an unnecessary
buffer from the stack
Signed-off-by: Pete Dietl <petedietl@gmail.com>
SDK 2.10 changed the PHY API. These updates are
needed as part of moving to SDK 2.10
1. add phy / mdio ops init
2. update PHY_Read/Write HAL call
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Set pinmux driver to use RTCIO interface for to handle
dedicated IOs pull-up/down configuration.
Without this, some GPIOS won't have pull-up enabled
properly.
Also, current implementation automatically disables
output pin when input pin is set. It also performs the
oppositte. This PR changes it only to enable what is
requested, either input or output.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
irq_line and irq_enabled call is not necessary as the interrupt
allocater enables it during its initialization.
it also adds end packet to all write transmission instead
of only at the end (burst data scenario)
Add check in gpio configuration check to avoid wrong gpio pins
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Driver has dedicated workqueue for IRQ processing.
Submit work to dedicated workqueue intead of system workqueue.
It also fixes driver functionality when NET_TC_TX_COUNT is set to 0.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
STM32H7 has different power supply modes but now Zephyr supports just LDO
and direct SMPS. This commit introduses POWER_SUPPLY_CHOICE configuration
parameter and add support for missed power supply modes.
Signed-off-by: Gennady Kovalev <gik@bigur.com>
Fixes#40730.
A dead lock could happen if 2 threads with differents priorities use
poll_out. In fact, the lock data->tx_lock could be lock by a thread with
lower priority and then a thread with higher priority can't take the
lock. There was a race condition here:
/* Wait for TXE flag to be raised */
while (1) {
if (atomic_cas(&data->tx_lock, 0, 1)) {
/* !!!!!!!! RACE CONDITION !!!!!!!!!!!!!!
if (LL_USART_IsActiveFlag_TXE(UartInstance)) {
break;
}
atomic_set(&data->tx_lock, 0);
}
}
To fix race condition, the interrupts are locked in poll_out.
Signed-off-by: Julien D'ascenzio <julien.dascenzio@paratronic.fr>
Refactor the mcp230xx driver to generically also support
SPI IO expanders, renaming it to mcp23xxx in the process.
Signed-off-by: Peter Johanson <peter@peterjohanson.com>
Add driver for MEC172x QMSPI with local DMA(LDMA). The driver
support SPI asynchronous operation.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
DMA controller is enabled and tested for cortex M7 core. The M7 core was
tested on the loop and channel link transfer tests.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit adds support for editing the voltage levels on the buck
regulators on the PCA9420 PMIC
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This commit adds a generic i2c regulator driver, and enables the NXP
PCA9420 PMIC IC using this driver. The regulator driver also exposes an
additional API in include/drivers/regulator/consumer.h, which allows
drivers to implement support for adjusting voltage levels and current
limits, if their device supports it.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
the RT685 contains an additional flexcomm peripheral, that supports
only I2C. This commit adds this peripheral to the device tree,
and enables pins and clocks for flexcomm15.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Catch up on the CAN driver API argument naming changes:
- Unify naming of callback function pointers as "callback".
- Unify naming of user-specified callback function arguments as
"user_data".
- Instances and pointers to struct zcan_frame are named "frame",
not "msg", to avoid confusion with the CAN message queue support.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit adds Xen consoleio serial driver. It is needed to receive
kernel messages from Zephyr in case it runs as Xen privileged domain
(Dom0). There is no console ring buffer for such domain, so regular
uart_hvc_xen driver can not be used (privileged domain input/output
are possible only through consoleio interface).
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
This commit adds support of interrupt-driven API for UART-like Xen PV
console driver. It is implemented via Xen event channels. It allows to
send and receive data by chunks (not single symbols) and without
polling.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
This commit adds support of Xen Enlighten page and initial support for
Xen event channels. It is needed for future Xen PV drivers
implementation.
Now enlighten page is mapped to the prepared memory area on
PRE_KERNEL_1 stage. In case of success event channel logic gets
inited and can be used ASAP after Zephyr start. Current implementation
allows to use only pre-defined event channels (PV console/XenBus) and
works only in single CPU mode (without VCPUOP_register_vcpu_info).
Event channel allocation will be implemented in future versions.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
In #40140, all on-chip gpios where made to use `CONFIG_GPIO_INIT_PRIORITY`.
The lmp90xxx and sx1509b are off-chip gpios. This commit reverts those
changes for these two devices.
Signed-off-by: Ryan McClelland <ryanmcclelland@fb.com>
Adds a driver using the SNVS high power and optionally low power
RTC instances. A device specific function `mcux_snvs_rtc_set` is
provided to update the current counter value.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Update the SPI context during all transceive functions. This fixes a
deadlock where SPI transactions failed to give back the semaphore.
Verified on NPCX9 based Chromebook.
Signed-off-by: Keith Short <keithshort@google.com>
The internal functions of this driver needed either `device *`
or `st7789v_data *` as argument. Standardize to
using `device *`.
Signed-off-by: Casper Meijn <casper@meijn.net>
RT11xx USDHC lacks some watermarking features that RT10xx SOCs include.
Place #ifdef guards around these features.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This adds an spi master mode driver via bitbanged gpio. Only syncronous
transfers are implemented. Clock signal timing is accomplished via busy
waits, the gpios are manipulated via the standard gpio interface; these
two factors limit the frequency at which it can operate - but here
a simple and generic implementation was chosen over performance.
The driver supports the various clock polarity and phase
configurations, and can also work with word sizes which are non
multiples of 8bits, currently up to 16 bits.
A sample program is also added demonstrating basic use of the driver
with 9bit data words.
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
Rename the PM_STATE_DT_ITEMS_LIST macro to PM_STATE_LIST_FROM_DT_CPU to
make its purpose more clear. Similar naming scheme is found e.g. in the
GPIO API.
Associated internal macros and docstrings have been adjusted, too.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
A couple of drivers violated MISRA 5.7 rule (Tag name should be unique),
triggering CI compliance errors.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
A Cortex-M specific function (sys_clock_isr()) was defined as a weak
function, so in practice it was always available when system clock was
enabled, even if no Cortex-M systick was available. This patch
introduces an auxiliary Kconfig option that, when selected, the ISR
function gets installed. External SysTick drivers can also make use of
this function, thus achieving the same functionality offered today but
in a cleaner way.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Remove the weak symbol definition
- Notify about the capability of disabling via a selected Kconfig option
(CONFIG_SYSTEM_TIMER_HAS_DISABLE_SUPPORT)
- Provide a dummy inline function when the functionality is not
available
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Split Kconfig into individual files for each driver. This improves
overall readability of the Kconfig options.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The weak symbol sys_clock_driver_init has been removed, therefore moving
the init responsability to the drivers themselves. As a result, the init
function has now been made static on all drivers and moved to the
bottom, following the convention used in other areas.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Adds the ability for I2C drivers to report synchronous transfer stats
using a I2C specific macro to define the device instance.
The macro creates a container for device_state which allows for per
instance device class common data structure to be used in the device
class api (ex: i2c.h). This is used to maintain per driver instance
stats for all i2c drivers. This is a reusable idea across other device
classes as desired.
Using Kconfig device class stats may be turned on/off individually
this way as well, in this case I2C_STATS.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
MCUX PWM driver used hardcoded clock source. update driver to use clock
bindings to determine PWM peripheral clock frequency.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Adds optional device tree properties to insert delays between spi chip
select assert/deassert and the clock edges, and also between spi
frames and transfers to the mcux flexcomm spi driver. If the properties
are not set, no additional delay is inserted.
Verified expected behavior on mimxrt685_evk and check with a scope
that the pre- and post-delay could be changed from the device tree
properties.
Signed-off-by: Bryce Wilkins <bryce.wilkins@gmail.com>
The UART1 is not actually accessible on the HiFive1 since the
QFN48 package for the FE310, used by this board, does not expose the
required pads. However, it is still possible to use the UART1 on HiFive1
emulators (e.g. using UART0 for debugging and UART1 for SLIP).
Unfortunately, the UART0 and UART1 currently have different default
configurations when it comes to the configured transmission watermark
(txcnt). With a txcnt of zero (the default for UART1) the UART is not
actually usable (see #18118). Contrary to UART0 (see #23699), the UART1
does therefore not work by default on Zephyr which took me some time to
figure out.
This commit aligns the default UART1 configuration with the UART0,
thereby making it work by default.
Signed-off-by: Sören Tempel <tempel@uni-bremen.de>
Instead of busy wait until completed transaction, the constraint set
is used before enabling tx interrupt to not allow system to enter
suspend when tx is transmitting.
Application defined policy should use the pm_constraint_get function
to check if given state is enabled and could be used.
TEST=Test on hayato board(soc:it8xxx2), the logs print normally before
system enters suspend.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
After the commit "dts: ksz8974: change port number to start at zero."
(SHA1: aa6217697e)
the lan ports are numbered starting from zero (not as previously from
one), so code assigning tags shall take this into account.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
After the "dts: ksz8974: add support for ksz8863"
(SHA1: b0e4886dfa) commit the port numbering
for KSZ8794 was wrong.
This IC has 3 ETH ports (with linear offset), with port 4 being the
"master" with non linear offset (i.e. 0x50 instead of linear 0x40).
Such situation can be explained with similarity of this IC to ksz8795,
which has 4 LAN ports, and then the 0x40 offset is used.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The name of macro to enable tail tagging support in DSA KSZ driver is
CONFIG_DSA_KSZ_TAIL_TAGGING, not DSA_KSZ_TAIL_TAGGING.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The check for CPU port on the KSZ8794 when the switch is initialized,
is not required as the last port number is always smaller than the CPU
port.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
The device PM callback needs to be used only to suspend/resume devices.
If the system cannot be suspended because UART is in a particular
state, the pm_constraint_set/release API should be used. For NPCX UART,
the chip can't enter low power idle state until UART completes the data
transmission.
This commit changes NPCX UART to use pm_constraint_set/release & fixes
UART lost data from low power idle.
Fix#40621
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
- added messages check and fix before transfer
- fixed START and STOP signal generation conditions
- fixed semaphore release for empty messages
Signed-off-by: Konrad Sikorski <znfgnu@gmail.com>
Fixes: #40538
The TEMP_NRF5 setting requires MULTITHREADING, therefore add this
dependency to Kconfig.
The TEMP_NRF5 supports an alternative driver implementation using the
TEMP_NRF5_FORCE_ALT setting.
Because it cannot be known whether an alternative implementation has
the same dependency, then the MULTITHREADING is OR'ed with
TEMP_NRF5_FORCE_ALT, as to allow enabling of TEMP_NRF5 if an alternative
driver is provided.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
This commit adds support for IMX6SX PWM.
The PWM module is the same module present on the IMX7D and so dts
bindings has been renamed following the one present on linux.
Signed-off-by: Antonio Tessarolo <anthonytexdev@gmail.com>
Adds DMA support to NXP's LPSPI driver. This can be enabled by selecting
the KConfig symbol CONFIG_SPI_MCUX_LPSPI_DMA, and requires the LPSPI
instances enabled in the devicetree to have valid DMA instances
assigned.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Without this change, when DTS SPI device node has node ID = <0>, the
value of 0 is assigned during SPI configuration and written to
whichPcs member in master_config structure.
This value wrongly overrides the default value read from NXP's DSPI
HAL (kDSPI_Pcs0 = 1U << 0).
Such situation occurs on ip_k66f board, where the DSA device -
controlled via SPI has the node ID equal to 0 (i.e. reg = <0>).
Signed-off-by: Lukasz Majewski <lukma@denx.de>
This commit is enabling the Debug support clock
like the stm32L0 or F0, the APB peripheral clock enable register 1
has a bit to clock DBGMCU before use.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit is controlling the WWDG during the Stop mode in debug.
WWDG1 is frozen while the core is in Debug mode, setting the bit
of the DBGMCU APB1 peripheral freeze register (DBGMCU_APB1FZ2)
for the stm32MP1 soc devices.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit is controlling the WWDG during the Stop mode in debug.
WWDG1 is frozen while the core is in Debug mode, setting the bit
of the DBGMCU APB3 peripheral freeze register (DBGMCU_APB3FZ1)
for the stm32H7 soc devices.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Remove check if frequency is equal to zero. A value of `ODR = 0` is
explicitly allowed by manufacturer / datasheet.
This has prevented applications from using the lis2dh power-down-mode,
which is set via `ODR = 0`.
For reference see "Table 28. Data rate configuration" in datasheet p.33.
Fixes#35486.
Signed-off-by: Markus Brüx <markus.bruex@grandcentrix.net>
In case of MSIS selected as system clock source it is necessary
to set Voltage scaling (VOS) when freqency is greater than 24MHz
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
When MSI trimming values where set to 0,
and MSIS is used as system core clock and MSI > 4 MHz,
it causes uart to fail.
There is no need to set thoses trimming values.
So keep the default reset value. (keep ST Factory calibration)
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Because on stm32u5 MSIS is the default clock after reset,
changing MSIS range means immediate frequency change.
Thus it is important to do it after flash latency change
in case of higher new frequency.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
The device PM subsystem _depends_ on device, not vice-versa. Devices
only hold a reference to struct pm_device now, and initialize this
reference with the value provided in Z_DEVICE_DEFINE. This requirement
can be solved with a forward struct declaration, meaning there is no
need to include device PM headers.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Make nrfx GPIO driver part of the PRE_KERNEL_1 initialization stage. As
a result, the GPIO driver can now be initialized before UART if
required, a device that is also initialized during PRE_KERNEL_1.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This patch adds support for the new pinctrl API to the UART driver. The
old pin property based solution is still kept so that users have time to
transition to the new model.
Notes:
- A new property to disable RX has been introduced: disable-rx. It is no
longer possible to do it automatically depending on pin information,
since it's not available when using pinctrl.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This patch adds support for the new pinctrl API to the UARTE driver. The
old pin property based solution is still kept so that users have time to
transition to the new model.
Notes:
- Some build assertions cannot be performed since the driver does not
have direct access to pin settings anymore. As a result user will not
be notified if HWFC is enabled but RTS/CTS pins are not configured.
- Hardware flow control can be enabled regardless of pin configuration,
it is now up to the user to configure RTS/CTS pins in DT.
- Some RX enable checks that were performed using pin information has
been replaced with a DT property that informs if RX is enabled or not.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add support for configuring UART/UARTE peripheral pins.
Co-authored-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add initial support for nRF pin controller driver. The implementation in
this patch does not yet support any peripheral. Only states
representation and basic driver functionality is introduced.
Note:
The nrf_pin_configure function has been marked as __unused since it may
not be used in certain scenarios until all peripherals are supported by
the pinctrl driver. For example, if only UART/E is supported but the
board does not enable UART, the function will never get called. However,
that board will likely have other peripherals that will gain support in
the future.
Thanks to Marti Bolivar for bindings documentation.
Co-authored-by: Marti Bolivar <marti.bolivar@nordicsemi.no>
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
commit 54907c7014
("drivers: spi: spi_context: improve support of multiple cs gpios")
added function to initialize all CS GPIOs defined in devicetree.
This function, spi_context_cs_configure_all, is intended to be
called during SPI driver initialization (POST_KERNEL init level).
It is also obvious that a SPI driver was not used at that time,
and no bus configuration (struct spi_config) is assigned to
SPI bus (spi_context.config).
The spi_context_cs_configure_all function has a homeopathic
ASSERT to validate CS levels, which causes a null pointer
dereferencing by ctx->config->operation if asserts are
enabled.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Use the new pinctrl API to configure pins.
Since STM32F1 series require pinctrl option and required register
address is parent timer address in place of own node register address,
use PINCTRL_DT_INST_CUSTOM_REG_DEFINE in place of usual
PINCTRL_DT_INST_DEFINE for this specific series.
Additionally, remove the automatic selection of PINMUX API.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use the new pinctrl API to configure pins.
Additionally, rename usb_pinctrl to usb_pcfg to better fit
new pinctrl API.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use the new pinctrl API to configure pins.
Additionally, rename eth0_pins to eth0_pcfg to better fit
new pinctrl API.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add initial version for STM32 pinctrl driver. Driver has been written
re-using many of the already existing parts in
drivers/pinmux/pinmux_stm32.c.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use nrfx_gpiote and nrfx_ppi allocators to allocate channels
at runtime instead of fixed, device-tree based allocation which
is harder to maintain.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
This adds :
- Generic PCIe Controller layer implementing the current PCIe API
- Generic PCIe Controller in ECAM mode driver
The Generic PCIe Controller layer provides:
- Configuration space read/write
- single bus endpoint enumerations
- Endpoint I/O, MEM & MEM64 BARs allocation
- Endpoint I/O, MEM & MEM64 BARs get & translation for drivers
The Generic PCIe Controller in ECAM mode driver provides:
- Raw DT RANGES properties into usable PCIe regions
- Configuration space read/write into ECAM config space
- PCIe regions allocation & translation
The limitations are:
- No support for PCIe prefetchable regions
- No support for PCIe bus configuration (only bus0 is supported)
- No support for multiple controllers (no domain-id in BDF)
Support has been designed to initially support Root Complexes with
Root Complex Integrated Endpoint, which was designed for Embedded
Systems with internal-only PCIe Endpoints on bus 0.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Replace unpacked in6_addr structures with raw buffers in net_ipv6_hdr
struct, to prevent compiler warnings about unaligned access.
Remove __packed parameter from `struct net_6lo_context` since the
structure isn't really serialized.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Replace unpacked in_addr structures with raw buffers in net_ipv4_hdr
struct, to prevent compiler warnings about unaligned access.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Change gpio_emul_input_set_masked_pend to log when it returns an error.
Changed all calls to gpio_emul_input_set_masked* to check the return
value.
Changed the function gpio_emul_input_set_masked_pend to apply the mask
to the provided values and not return an error if there are excess
values. In almost every call to that function, the value wasn't being
limited to bits set in the mask, so they were failing if there was more
than one gpio configured for INPUT|OUTPUT with a value of 1.
Fixes#40646
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Since drivers implement a callback based on action and not the state,
we should be using the API based on the action instead of the one based
on the state.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Fill in received bytes in USBIP_RET_SUBMIT packet
Currently this field is unconditionally set to 0 and therefore not
filled in conveniently. This may mislead the USB host which is correctly
acknowledged that the transaction was sucessful but it cannot check the
actual received bytes.
Test application:
```python
import usb
data = (0xFF, 0xFF)
print("Opening loopback device")
device = usb.core.find(idVendor=0x2FE3, idProduct=0x0009)
print("Writing test data", data)
written = device.write(0x1, data)
print("Written", written, "bytes")
```
Before:
```
$ ./test_loopback.py
Opening loopback device
Writing test data (255, 255)
Written 0 bytes
```
After:
```
$ ./test_loopback.py
Opening loopback device
Writing test data (255, 255)
Written 2 bytes
```
Signed-off-by: Raúl Sánchez Siles <rsanchezs@k-lagan.com>
Use DT_INST_ENUM_IDX_OR and always default to full-speed
if CONFIG_USB_DC_HAS_HS_SUPPORT is not set or maximum-speed
property is not defined.
Remove low-speed setting since device stack does not support it.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
In the current USB device support, the sizes of bulk endpoint
are mostly configure through Kconfig and do not care if a device
is high-speed capable. The information if a USB device controller
supports high-speed comes from devicetree. Add a Kconfig option to
map this information and configure bulk endpoint sizes
accordingly.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Define a custom IEEE802154 based L2. The user can then use those symbols
to implement their own 802.15.4 based L2, based on those symbols, w/o a
need to modify the Zephyr tree.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Some 802.15.4 L2 implementations expect that FCS length is included in
the overall packet length while others not. Allow to configure this
behavior, based on the selected upper layer.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Introduce a common config for all 802.15.4 based L2 implementations.
This way, any custom 15.4 L2 implementation will be able to
automatically enable use 15.4 driver, w/o a need to modify the actual
Kconfig.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
The CAVS_IDC_IPM driver happens to be used only on non-2.5 hardware,
but it's best to be clear in the conditional compilation when we're
talking about hardware-dependencies and when we mean software
configuration. This was mixed up in a few spots.
Also fix a warning that creeps in on non-default drivers choices about
an undeclared ipm function.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
All the in-use contents of these files have now been moved to the
intel_adsp core, and they are configured via devicetree and kconfig.
Remove the legacy headers.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Each platform was defining its own shim.h header, with slightly
variant field definitions, for a register block that is almost
completely compatible between versions. This is made worse by the
fact that these represent an API imported fairly early from SOF, the
upstream version of which has since diverged.
Move the existing shim struct into a header ("cavs-shim.h") of its
own, remove a bunch of unused symbols, fill in definitions for some
registers that were left out, correct naming to match the hardware
docs in a few places, make sure all hardware dependencies are source
from devicetree only, and modify existing usage to use the new API
exclusively.
Interestingly this leaves the older shim.h header in place, as it
turns out to contain definitions for a bunch of things that were never
part of the shim register block. Those will be unified in separate
patches.
Finally: note that the existing IPM_CAVS_IDC driver (soon to be
removed from all the intel_adsp soc's) is still using the old API, so
redeclare the minimal subset that it needs for the benefit of the
platforms in transition.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This is dead code. It's based on the cAVS "IPC" mechanism to allow
communication to and from the host CPU. But there is no test rig in
the Zephyr tree for the protocol defined. And in fact the only
Zephyr-based user of the IPC mechanism (Sound Open Firmware) has its
own IPC driver and speaks its own protocol with the host kernel. That
driver needs to migrate into Zephyr soon and this legacy bit is just
confusing.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Recent work to this platform added a new, cleaner low level API to the
interrupt controller. Replace the hand-cooked register access with
that. This is still not as good as having proper multicore support in
the intc_cavs driver, but it's at least better.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Device data is cleared on deinitialization. This operation removes
some important information. Let's restore the defaults each time
the device is initialized.
Signed-off-by: Pawel Dunaj <pawel.dunaj@nordicsemi.no>
fix uart_sam0_irq_update to only clear the RXS bit by writing only the
RXS bitflag to the INTFLAG register. Performing an |= opperation
with the bitflag for RXS incorrectly clears all pending interrupts set
since writing 1 to a INTFLAG clears that bit field. This causes a race
condition on when TXC will be cleared before all bytes have finished
being clocked out on tx and TXC being set 1 again. If tx finishes first,
any driver using uart_irq_tx_complete will deadlock the system.
Signed-off-by: Ron Smith <rockyowl171@gmail.com>
sam0 does not currently have a uart_irq_tx_complete method for interrupt
driven mode.
This is especially important since the sam0 platform has seperate
interrupt signals for TX data register empty and TX complete therefore
the TX register being empty does not nessisarily mean the data has been
shifted out.
Drivers should check uart_irq_tx_complete if it needs to guarantee
that the data has been fully transmitted in a hardware agnostic way.
Signed-off-by: Ron Smith <rockyowl171@gmail.com>
Aim of this change is to remove the need for the pinmux driver
on stm32f1 series to access the base address of the pinmux owner
device.
This is achieved by a modification in the device tree pin definition.
Instead of providing a generic information on type of the remap
(such as NO_REMAP, PARTIAL_REMAP, FULL_REMAP), the remap field
encodes all the information required to perform the remap register
configuration:
-Address of the targeted remap register in AFIO peripheral
-Position of the remap configuration in the remap register
-Mask used for the remap configuration encoding
-Value of the expected remap configuration.
All the possible remap configurations are encoded and predefined
in a new stm32f1-afio.h dt-bindings include.
To match this new configuration, all stm32f1 -pinctrl.dtsi should
be regenerated to use these new remap definitions.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Review pinmux macro definition to a more portable format,
in preparation for new remap information encoding on stm32f1 series.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
A lock was added to manage situation where the API poll_out and irq API
are used in same time.
Signed-off-by: Julien D'ascenzio <julien.dascenzio@paratronic.fr>
Program flow will behave incorrectly (memory and instruction fetches
return invalid data) if Flexspi is accessed by the Flexspi driver while
being used as XIP memory by the Cortex M7.
Set logging to disabled by when XIP mode is used in the memc and
flexspi drivers, and warn the user if they attempt to enable it.
Fixes#40133
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Extends STM32 PWM driver to support capturing pulse width, period,
or both.
The approach used is based on the PWM Input sections in reference
manual RM0351 by ST in the chapters on timers.
The LL library by ST is used for all extensions to the driver.
Only the disco_l475_iot1 board was available for testing on hardware,
using tests/drivers/pwm/pwm_loopback.
Since timers are a generic component, it is assumed that other STM32
boards will behave the same
Fixes#39394
Signed-off-by: Tilmann Unte <unte@es-augsburg.de>
Current driver set a fixed prescaler value for the lpuart
that caused certain baudrate configurations to fail due to
LPUARTDIV overflow the LPUART_BRR register.
This PR attempt to calculate a suitable PRESCALER for the
selected baudrate, throws error and return if it couldn't get
an optimal one.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Add a pin control driver for GD32 SoCs using the AFIO model.
Thanks to Gerson Fernando Budke for testing and implementation
suggestions.
Co-authored-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Clock ISR was running 2x the frequency.
Also fixes clock_get_cycle which was returning
wrong values.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Check return value from recv() passed by usbip_recv().
Fixes: #39849Fixes: #39869
Coverity-CID: 240221
Coverity-CID: 240244
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
It does not make sense to use branch coverage with macro LOG_ERR().
It is still covered with line coverage.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
1.Putting the PWM_CHANNEL_X, PWM_PRESCALER_CX information
in the description.
2.Use the common definition EC_FREQ.
3.Use the common macro IT8XXX2_DT_ALT_ITEMS_LIST.
4.Stop using DRV_CONFIG, DRV_REG macro.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
HTS221 is a humidity and temperature sensor (thus HTS) that can be wired
on i2c or SPI bus. On SPI bus however, it uses the 3-wire mode, aka:
half-duplex.
Now that SPI API exposes half duplex operation, let's enable the SPI bus
on that sensor.
Let's move to a better DTS integrated driver as well, and also use
stmemsc interface.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This is meant to expose half/full duplex configuration option on regular
configuration. So far, dual/quad/octal are not exactly supported, as it
would require extensions to the SPI buffer for a full support.
So moving these modes to an extended operation attribute
(32 vs 16 bits), disabled by default.
And exposing half/full duplex configuration bit. Full duplex being the
default option.
Fixes#19134
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Port some drivers to the recently introduced macros to showcase its
usage and be able to do some initial testing (nRF52840).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The macro already mentions in the docstrings that PM is not supported:
"Invokes DEVICE_DEFINE() with no power management support".
This patch removed the PM entry from the macro and ajusts its uses.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Define the device using DEVICE_DEFINE macro, so that a single option can
be used regardless of PM being enabled or not.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Since there are no more users and dependencies of
Kconfig option USB_UART_CONSOLE in the tree,
remove the remains and the option USB_UART_CONSOLE.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Do not change init level and priority of console driver
if Kconfig option CONFIG_USB_UART_CONSOLE is enabled because
commit 37f4d9ba63
("usb: cdc_acm: rework cdc_acm_poll_out to non-blocking")
changed CDC ACM UART driver so that it more closely mimics
the real controller and CDC ACM UART driver now uses the same
init level and priority as regular serial driver.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This commit fixes dual bank flash handling on stm32g0 targets.
In contrast to other Series (G4, L5) the flash page size does not change
in single bank configuration (2KiB in both configurations).
nSWAP_BANK:
While the reference manual(RM) only documents:
"This bit selects the bank that is the subject of empty check upon boot"
as expected, this behaves similar to BFB2 on G4 and SWAP_BANK on L5.
It has been observed that this bit swaps the address mapping of bank1
and bank2, regardless of DUAL_BANK bit being set or not.
As documented in the RM the nSWAP_BANK bit is ignored when the BOOT_LOOK
bit is set. This applies to the empty check as well as the address
mapping.
On this Series FLASH_CR_BKER must be set in single-bank as well as
dual-bank configuration for erase operations on bank2 regardless of
the swap status.
On a G0B1RE (dev-id: 0x467) I could not observe a difference between
DUAL_BANK flash option bit set and not.
It this may be different on 256KiB Flash targets.
The HAL indicates that "FLASH_SALES_TYPE_0" only uses a single bank if
OB_DUAL_BANK_VALUE is not set, but as I don't know which SoC this is
and I can't test the behaviour and the driver does not take this into
account.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit makes no functional changes, it only refactors the
driver such that dual bank flash handling can be easily added.
Instead of using HAL macros directly in the code, new macros
with STM32G0 prefix are defined.
The erase_page function gets passed the offset instead of the page,
and the FLASH CR reg is written once with all erase parameters.
flash_stm32_wait_flash_idle is already called before each
write to CR, consequently it is also made sure CFGBSY flag
is not set.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Some series (namely g0, u5, wb, wl, ?) use CFGBSY to indicate
that FLASH_CR is not ready to be modfied.
This commit adds this flag additionally to other the flash busy flags,
in flash_stm32_wait_flash_idle such that the driver waits before
trying to modify PG, PNB[6:0], PER, and MER bits in FLASH_CR.
Additionally, dual bank variants of STM32G0 have a seperarate BSY2 flag
for flash bank two.
Until now this was not yet checked in flash_stm32_wait_flash_idle.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
In STM32G0 HAL FLASH_FLAG_xxx defines don't follow the pattern of
other Series to simply redefine the FLASH_SR_xxx Msk.
Instead an ID for the SR reg and the position of the Error flag
are defined.
As a result error checking in flash_stm32_check_status was not working
until this fix on stm32g0 series.
In order to avoid complexity in the driver, the ifdef-ery of the flags
was moved to the header file.
Other series except g0 use FLASH_FLAG_xxx defines, because those
are valid for both cores in dual core(wl) and in secure/non-secure
targets(l5,u5).
FLASH_STM32_SR_ERRORS mask is introduced to check for any active error
in the SR.
The flags for SIZERR, MISERR, FASTERR are newly introduced.
the latter two are only required once fast programming is used,
which is not yet the case for any series.
The FLASH_SR_OPTVERR flag (option validity flag) is also present
in the SR, but is not added.
Also ecc errors are generally not checked, but these are in a different
register.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
An attempt to simplify the ifdef-ery around FLASH_SR is made.
Define Registers and flags in the header file instead of including
several individual operations in the driver.
FLASH_FLAG_BSY is not only defined for STM32L5, but also other series.
Therefore use this flag instead of FLASH_SR_BSY.
Only the g0 series definition is not valid in our context,
therefore use FLASH_SR_BSY1 instead.
No functional changes, only refactoring.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
New Kconfig CONFIG_PPP_NET_IF_NO_AUTO_START
to have an option to disable of starting of the PPP networking interface
right after the init.
Signed-off-by: Jani Hirsimäki <jani.hirsimaki@nordicsemi.no>
IT8XXX2 uses shared ns16550.c driver which does not provide a power
management callback(pm_action_cb), so create driver to handle
IT8XXX2 specific UART features.
note: pm_action_cb(old name: pm_control_fn)
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
For port_set_bits_raw(), port_clear_bits_raw(), and port_toggle_bits(),
the second parameter sould be gpio_port_pins_t type. Currently, it
doesn't have other side effect, but it sould be fix. This commit fixes
it.
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
Prescaler was misplaced in pwm binding, instead of timers binding.
For example, TIM6/TIM7 doesn't have PWM capability,
but have a prescaler.
This change also prepares the introduction of timer based counter
(which requires prescaler at timer level)
For compatibility reason temporarily use pwm prescaler if it exists,
otehrwise use timers prescaler.
And thus avoid to avoid breaking boards out of tree.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Trivial fix of compilation error "invalid operands to binary "
when CONFIG_CAN_AUTO_BUS_OFF_RECOVERY = n
Fixes#40290
Signed-off-by: Lucas Dietrich <ld.adecy@gmail.com>
Updates to MEC172x eSPI driver to support ACPI shared
memory region and EC Host Command Subsystem through
ACPI_EC1 and Embedded Memory Interface (EMI).
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Refactors all of the on-chip GPIO drivers to use a shared driver class
initialization priority configuration, CONFIG_GPIO_INIT_PRIORITY, to
allow configuring GPIO drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
Most drivers previously used CONFIG_KERNEL_INIT_PRIORITY_DEFAULT or
CONFIG_KERNEL_INIT_PRIORITY_DEVICE, therefore the default for this new
option is the lower of the two, which means earlier initialization.
Driver-specific options for off-chip I2C- or SPI-based GPIO drivers are
left intact because they often need to be initialized at a different
priority than on-chip GPIO drivers.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
This driver aliases a regular `int` to `atomic_t` but that
should be updated to `long` with the change to `atomic_t`.
Added a comment to highlight that the variable was aliased.
Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
The print specifier for `atomic_t` should be updated
to `%ld`, `%lu`, or `%lx` to account for the type
change of `atomic_t` to `long`.
Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
In commit 918a574c88 ("clock: add k_cycle_get_64") this driver was
augmented with a count64() method to get a 64 bit cycle output from
the two-32-bit-word device registers.
Unfortunately it appeared to be trying to use a spinlock around the
two (low/high) reads to protect against overflow. But that doesn't
work: spinlocks protect against other CPU code using the same
spinlock, not against a hardware counter that is incrementing in real
time!
Thankfully there was already a count() routine in place that does a
detect-overflow-and-retry loop to solve this. Use that.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Add a macro to retrieve the iso data load length (the
length stored in the iso header) with a bit mask that
ensures that we only take the first 14 bits.
This is to remove any RFU bits that may have been set.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
When a frame is sent with a cleared ACK request bit, the transmit
metadata contains a NULL pointer to the ACK frame.
The pointer must not be dereferenced in such case.
Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
The modem sockets poll implementation does not allow
a combination of poll on modem sockets and on other sockets
like eventfd. This blocks trivial application signalling. Current
users are using a poll timeout, which needs to check if other
work needs to be done in the thread (eg: lwm2m engine).
To allow proper signalling with eventfd, the non offload poll
methods needs to work for the modem sockets.
This commit is implementing this for POLLIN.
Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
Introduce combined GPIO drive strength flags for GPIO controllers only
supporting either default or alternative drive strength regardless if
the pin is driven to a high or a low level.
Fixes: #30329
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
ptp_clock_adjust() API call for mcux driver has a bug where
increment gets compared with an unsigned int, causing it to
always return -EINVAL.
Signed-off-by: Alex Sergeev <asergeev@carbonrobotics.com>
The return value of uart_fifo_fill could potentially be negative, so
make sure the code doesn't do anything bad in that case.
Fixes#39823
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Make sure negative error returns from uart_fifo_read() are correctly
handled.
In the same go, the logic of reading packet headers (ACL/event/ISO) is
refactored into its own helper function. This also fixes having an
appropriate name for the variable that tracks how many header bytes have
already been read (it was called "to_read" and now it's called
"bytes_read").
Fixes#39805
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This adds API to support datum more than 8-bit wide. Drivers are
still responsible for the implementation.
Fixes#31914
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The commit removes an error check from the erase loop and instead
add breaks in places where errors that would break an execution of
the loop occur.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
The STM32U5x device has ADC instance of different versions
similar to the stm32H7 about the oversampling.
ADC1 of 14bit resolution has a ratio from 1..1024 on OSR[9:0]
ADC4 of 12bit resolution has a ratio on OVSR[2:0]
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit extends the configuration of the oversampling
ratio and shift for the stm32U5xx soc, depending on the
ADC instance: ratio is a value from 1..1024 or a LL_ADC_OVS_RATIO_x
to be used with the stm32Cube LL function.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
For some stm32 soc devices, the USART (or UART) flag RXNE is cleared
by the LL_USART_ClearFlag_RXNE function which directly writes
the RXNE bit of the Status register. This is the case with the
stm32F1x, stm32F2x,stm32F4x, stm32L1x.
Some other are using the Rx Data Flushing function.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Uart post kernel initialization does not allow starting shell
properly. This issue was added in UART unifying PR.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Take into account the return code of the bus_init function
and propagate codes from the init* functions to the user
instead of hardcoded -EIO. While at it set the ERROR
level message to the logs.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
In some cases, it is quite useful to have the possibility to also
include zero-length buffers in a buffer set used in transfers
(for example, when frames in a protocol consist of several parts,
of which some are optional). So far, the behavior of spi_context
update functions was that the transfer in a given direction was
finished when a zero-length buffer was encountered in the buffer
set. Change those functions to simply skip such buffers. Correct
in the same way also the spi_context_buffers_setup() function.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Do not use any timeout in the slave mode, as in this case it is not
known when the transfer will actually start and what the frequency
will be.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Remove the DT_CHOSEN_ZEPHYR_CANBUS_LABEL macro and replace it with
DEVICE_DT_GET(DT_CHOSEN(zephyr_canbus)) were possible.
Where both devicetree CAN controllers and Kconfig specified CAN loopback
controllers are supported, the macro is replaced with
DT_LABEL(DT_CHOSEN(zephyr_canbus)) for now.
This is the first pass for removing the requirement for devicetree
labels for CAN controllers.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit makes nrf5_config_mac_keys function more generic.
Is uses lookup table for storing keys to override. It removes old keys
before storing new ones.
Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
This is a follow-up to commits 99daca9bba
and ae03c0a6bf.
nRF SPI driver shims cannot use devicetree instance indexes, they need
to use the DT_NODELABEL macro and SoC peripheral instance indexes.
Correct the macros used in initialization of CS GPIOs in those shims.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Both DRDY and motion interrupts behaves like level signals since they
remain asserted until they're cleared. Configuring them as edge
interrupts is dangerous because if we ever miss an interrupt, it may
never get cleared and thus will never trigger again.
Treating them as edge signals seems to have no advantages, other than
being marginally simpler to implement.
The patch has gotten many hours of run-time on real hardware using a
nRF52-based board and a LIS3DH with both interrupts connected and
heavily utilized.
Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
This change adds `k_cycle_get_64()` on platforms that
support a 64-bit cycle counter.
The interface functions `arch_k_cycle_get_64()` and
`sys_clock_cycle_get_64()` are also introduced.
Fixes#39934
Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
Kconfig USB_DEVICE_REMOTE_WAKEUP option depends only on
USB device controller capability, but is not controlled
by the USB device controller drivers configuration.
Move USB_DEVICE_REMOTE_WAKEUP option to drivers and
make it promptless.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Even if not used DMA HAL is required in L4/F7 SD HAL driver.
Add them for these specific series.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit adds shell commands for the reset cause API
- show: show the persistent reset cause
- clear: clear the persistent reset cause
- supported: list all supported reset causes
Signed-off-by: Alexander Wachter <alexander.wachter@leica-geosystems.com>
This commit changes the shell argument name from shell to sh
to satisfy the warning
"Violation to rule 5.7 (Tag name should be unique) tag: shell"
Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
Rename the Zephyr chosen property for specifying the default CAN bus
controller from "zephyr,can-primary" to "zephyr,canbus".
The "zephyr,can-primary" property name was selected in antipation of
adding support for redundant CAN networks, which we have yet to
add. Meanwhile, the "primary" term causes confusion for non-redundant
CAN bus configurations (and the "can" term doesn't match the name of the
Zephyr CAN bus subsystem).
The CAN in Automation (CiA) 302-6, which deals with CANopen network
redundancy, uses the terms "default interface" and "redundant
interface". If/when we add support for redundant CAN networks, the
"zephyr,canbus" chosen property can be supplemented with a
"zephyr,canbus-redundant" chosen property.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The previous bf68b67 commit incorrectly passes minfo.mdm_rssi
value to the modem context data_rssi member during the driver
initialization which causes the `modem info` shell command
to return 0 as RSSI value. Fix that by changing data_rssi
modem ctx member to a pointer that is assigned to the RSSI
variable stored within the modem driver context structure.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
add ledc to board dtsi file,
change compatible and device define in pwm driver,
add yaml for board ledc support,
fix missing include for board in gpio include
Signed-off-by: Andrei-Edward Popa <andrei_edward.popa@upb.ro>
Changed pwm_pin_set_cycles into pwm_pin_set_nsec
to decrease power consumption. Changed default
value for period to 100000. There is no need in having
period for pwm leds equal to 100 cycles as human eye has ~100 fps.
Signed-off-by: Jan Zyczkowski <jan.zyczkowski@nordicsemi.no>
CONFIG_UART_MUX_DEVICE_NAME is used as a prefix for the uart muxes
name. Pointer comparison will always return false
Fix#39774
Signed-off-by: Guillaume Lager <g.lager@innoseis.com>
drivers: modem: gsm: Quectel EC21 and BG9x act as a gsm modem without
problem, but COPS commands can returns just one value with 'mode'.
Format and oper are not mandatory. This modification reads 'mode'.
Also a modification on modem_cmd_read_cops_cmd is needed.
Signed-off-by: Jair Jack <jack@icatorze.com.br>
Use i2c_hal functions to enable support for
multiple SoCs.
Use DT compat to enable I2C from device
tree configuration
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
PCA9633 driver does not cunnetly support multiple devices.
Updated the driver to use DT_INST_FOREACH_STATUS_OKAY to
configure all devices defined in the device tree.
Convert driver to use `i2c_dt_spec` helpers.
Fixes#40076
Signed-off-by: Daniel N. Hansten <dnh2000@gmail.com>
This joins all clock control handling to same source
by using hal clock functions. It also brings ESP32C3
clock support.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
This commit enables the HSI48 clock for the stm32U5 soc family
to use the USB device peripheral.
Enable the VDD USB voltage supply.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Since cs gpios are initialized during driver initialization
remove spi_context_cs_configure that is not longer need.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In case when we have multiple devices connected to the
one SPI interface the initial state of CS gpios after
MCU reset is floating and it might be low that prevents us from
communicating between particular devices. Fix that by
initializing all provided cs gpios and setting them as inactive.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Add extra cs_gpios and num_cs_gpios members into
spi_context structure that will be used to
initialize all defined cs gpios during the driver
initialization using SPI_CONTEXT_CS_GPIOS_INITIALIZE macro.
While at it add a new spi_context_cs_configure_all
function that allows the user to configure
all available cs gpios in inactive mode.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
A couple of SPI drivers use CONFIG_KERNEL_INIT_PRIORITY_DEVICE
as init priority for driver initialization. Let's change
it to the dedicated CONFIG_SPI_INIT_PRIORITY to make it
compatible with other ones.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Any exposed PTM root device will by default see their root capability
enabled so they will become PTM responder.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Such module is missing and will prove to be useful for future features
and/or printing out debug messages on existing ones.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
When the "Read data register not empty" irq occurs,
this commit is cleaning the RXNE flag by flushing the RX register
since the Receive Data Reg. (USART_RDR) has not be read previously
This could be the case when aborting a Rx for example.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
During SDMMC card init, HW_FC is disabled by default, overwriting
driver configuration.
To avoid this, move HW FC configuration after card init.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Deinitialize the nrfx_qspi driver for periods when the device
is suspended. For flash chips with "has-dpd" property set, when
suspending/resuming the device, issue also the enter/exit Deep
Power-down Mode command, respectively.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Use the read-only device config structure (so far used only for storing
the flash chip size and its JEDEC ID) to store the nrfx_qspi driver
configuration (it is not modified after initialization, so there is no
need to keep it in RAM) and fill it with settings read from devicetree,
processing them all at compile time (e.g. use the DT_STRING_UPPER_TOKEN
macro instead of switch-case blocks for getting values of "readoc" and
"writeoc" properties).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Refactors all of the EEPROM drivers to use a shared driver class
initialization priority configuration, CONFIG_EEPROM_INIT_PRIORITY, to
allow configuring EEPROM drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers. The
exceptions are at2x and emul drivers which have dependencies on SPI,
I2C, or flash drivers and must therefore initialize later than the
default device priority.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
The commit removes redundant flash_id argument that the function
can obtain itself from dev.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
If a transmission is made with poll_out and immediately after an other
transmission is made with interrupt api the transmission is locked.
We fix this behavior by clearing the tx_poll_stream_on flag during the
irq_tx_enable function
Signed-off-by: Julien D'ascenzio <julien.dascenzio@paratronic.fr>
Making function inline doesn't provide any benefit here, and is
inconsistent with all other definitions.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The PM callback is no longer referenced as "pm_control" but
"pm_action_cb", so reflect this new naming on the callbacks.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In order to have Espressif SoCs working with
the same uart drivers, all low level functions
are now replaced to hal_espressif HAL calls.
This also changes pinmux, gpio and uart
init order to meet its dependencies.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Move all PM device runtime API calls from pm_device* to the
pm_device_runtime* namespace.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Do not limit the length of the prepared transfer to the shorter of
provided TX and RX buffers if both are used. The SPIS peripheral
cannot handle scattered buffers anyway, so there is no point in
getting the common part of TX and RX buffers for a partial transfer,
like it is done for SPI and SPIM peripherals; everything what is
possible needs to be transferred in one shot. For the same reason,
there is no point in calling spi_context_buffers_setup() and using
the related part of the spi_context structure, hence the call is
removed and buffer pointers are used directly.
Also return an error if a requested transfer length exceeds the SPIS
peripheral hardware limit, instead of silently limiting the transfer
like it was done so far.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
In order to convert from degrees to radiants the SENSOR_DEG2RAD_DOUBLE
macro must divide the argument by 180 degrees and multiply by PI
radiants, and not the other way around. Please note that same macro
is already defined in the correct way in other sensor drivers as well.
(Fix#39483)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add a Kconfig symbol to enable use of SDMMC hardware flow control.
In specific cases, this feature could help to avoid FIFO ovderrun
and underrun errors.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add get_config function to I2C emulator.
Also update tests using I2C emulator to use i2c_get_config.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Add get_config function to NPCX I2C driver. The master mode is hardcoded
and get the speed from a controller.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Some applications need to get the current I2C configuration. Add a
proper callback to I2C API under Kconfig option not to change
applications that don't need this feature.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
This commit is fixing the error on clock control for the AHB3
in the stm32_clock_control_off function.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Added watchdog implementation which is using counter device
to implement watchdog driver API. Watchdog timeout is called from
counter interrupt context. Some counter implementations support
using ZLI interrupt level which can be use here as well. Watchdog
like this can be used along hardware watchdog to cover for its
limitations, i.e. Nordic watchdog resets unconditionally after
62uS after triggering watchdog interrupt. It is not enough time
to dump logging data.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Return -EBUSY (not 0) from pwm_pin_enable_capture() if PWM capture is
already in progress.
Fixes: #39817
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The FIU/UMA module in the NPCX chip provides an dedicated SPI interface
to access the SPI flash. This commit adds the driver support for it.
With this commit, the application can call the flash APIs
(via spi_nor.c) to access the internal flash of NPCX EC chips.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Change-Id: I32bbf09f6e014b728ff8e4692e48151ae759e188
Use a more precise Kconfig symbol name to avoid namespace conflicts when
more NRFX-dependent drivers will be added.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Refactors all of the DMA drivers to use a shared driver class
initialization priority configuration, CONFIG_DMA_INIT_PRIORITY, to
allow configuring DMA drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
Most drivers previously used CONFIG_KERNEL_INIT_PRIORITY_DEFAULT or
CONFIG_KERNEL_INIT_PRIORITY_DEVICE, therefore the default for this new
option is the lower of the two, which means earlier initialization.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Refactors the remaining display drivers that didn't already use the
shared driver class initialization priority configuration,
CONFIG_DISPLAY_INIT_PRIORITY.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
This commit adds minimal support of Xen hypervisor console via UART-like
driver. Implementation allows to use poll_in/poll_out char interface for
uart_console.c driver directly to HV console instead of using Xen
virtual PL011 UART. Future implementation will support interrupt driven
interface on Xen event channels, currently it is under development.
Also this commit introduces early console_io Xen interface, which allows
to receive printk/stdout messages quickly after start, but requires Xen,
built with CONFIG_DEBUG option.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
The maximum number of concurrent filters depends on the hardware and
the driver implementation. This API allows the application to obtain
the maximum number of available filters.
Signed-off-by: Martin Jäger <martin@libre.solar>
Setting the power mode to enabled causes other initialization to not
occur. Restore the power mode set upon entry when exiting.
Signed-off-by: Ryan Holleran <rhollerar@gmail.com>
Change format in various shell_error calls from int to long unsigned
int.
Warning:
warning: format '%d' expects argument of type 'int', but argument
6 has type 'long unsigned int'
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Fixes interrupt-driven operation. With the previous way of
handling the TX FIFO and the interrupt flags, the operation
of the UART was prone to stalling when using it as the
console I/O device.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
Add support for the Xilinx Zynq-7000 SoC family to this driver. This
includes some SoC-specific register accesses when setting an updated
TX clock divider, also, the device tree binding now supports higher
MDC clock divisor values when the current target SoC is a Zynq rather
than a ZynqMP.
With regards to the use of this driver in a QEMU simulation of the
Zynq-7000, the Kconfig file is modified so that the driver is not
enabled unless QEMU networking is set to Ethernet mode.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
Modification of the ARM architected timer driver and its configuration
data in order to address an erratum which exists at least in the Cor-
tex-A9 CPU, and which can also be observed in the QEMU implementation
of the Cortex-A9.
Comp.: ARM Cortex-A9 processors Software Developer Errata Notice
ARM document ID032315
Erratum 740657
This erratum causes a spurious interrupt pending indication with the
interrupt controller if no new compare value is written within the
timer ISR before the interrupt is cleared. This is usually the case
in tickless mode. If the spurious interrupt is not prevented, the
timer ISR will be called twice, but on second execution, the pending
flag is not set within the timer's register space. Not handling this
issue will lead to erratic tick announcements to the kernel.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
A single PWM driver can be used for multiple LED numbers. In that
case -EALREADY may be reported. It should be ignored.
Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
Rewrite the NRFX IPC driver to properly support multi-channel addressing
leveraging the newly introduced MBOX APIs.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
One limitation of the current IPM API is that it is assuming that the
hardware is only exporting one single channel through which the data can
be sent or signalling can happen.
If the hardware supports multiple channels, the IPM device must be
instantiated (possibly in the DT) several times, one for each channel to
be able to send data through multiple channels using the same hw
peripheral. Also in the current IPM API only one callback can be
registered, that means that only one driver is controlling all the
signalling happening on all the channels.
This patch is introducing a new MBOX API that is supporting
multi-channel signalling and data exachange leveraging and extending the
previous (and outdated) IPM API.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
This is a driver for the Synopsys DesignWare MAC. It should work
with the "DesignWare Cores Ethernet Quality-of-Service" versions 4.x
and 5.x.
This driver uses a zero-copy strategy, meaning that the hardware
reads and writes data directly from/to packet fragment buffers
provided by the network subsystem without first copying the data into
a dedicated DMA bounce buffer.
Platform specific setup is necessary for the hardware to work.
Currently, only the STM32H7X series is implemented and tested.
While this part needs refinement, this driver performs better and uses
far less code space than the HAL-based alternative.
Not yet implemented:
- MDIO (it is WIP, currently relying on default PHY config)
- PTP support
- VLAN support
- various hardware offloads (when available)
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Refactors all of the DAC drivers to use a shared driver class
initialization priority configuration, CONFIG_DAC_INIT_PRIORITY, to
allow configuring DAC drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers. The
exceptions are dacx0508, dacx3608, and mcp4725 drivers which have
dependencies on SPI or I2C drivers and must therefore initialize later
than the default device priority.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Adds functionality to receive LoRa packets asynchronously. Reception
runs continuously until cancelled by another call to `lora_recv_async`.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
MEC172x eSPI driver, eSPI pin programming, interrupt updates related
to eSPI and other updates for MEC172x eSPI driver.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Add RSSI member into gsm_ppp_modem_info structure in order to
get that information using the gsm_ppp_modem_info function.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
Make modem_info structure public in order to allow the user
to get modem information using gsm_ppp_modem_info function.
Move modem info query commands into separate function
that's called only once during gsm configuring because
there is no necessity to re-querying modem since
they should not change.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
After recent changes in the driver, the predefined `data` pointer in
`uarte_nrfx_pm_control()` would not be used in CONFIG_UART_ASYNC_API
configuration. Fix this by replacing `get_dev_data()` calls with
predefined data pointer where applicable.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
On the stm32H7 family, there are ADC which have Oversampling ratio
of 10 bits OSVR[9:0] in the CFGR2 register. It means that oversampling
512x or 1024x are possible.
Other values are not allowed as the oversampling field of the struct
adc_sequence (adc.h) is 2^oversampling.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The adc_stm32_oversampling function is used to configure
the ratio and shift for each sequence->oversampling
depending on the soc serie and ADC instance in the serie
In the stm32H7 serie, only ADC3 of ADC_VER_V5_V90 version
have a LL_ADC_OVS_RATIO_x contant (other a 9bit value).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Change the access to the PCSEL register by using the LL function
because on the STM32H7xx soc, some devices have no PCEL register
especially on ADC3 of the stm32H723.
The LL function manages this difference.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add support for dynamic pin control, that is, allow to change device pin
configuration at runtime. Because no device de-initialization is
available yet, this API has limited usage options, e.g. modify pin
configuration at early boot stage (before device driver is initialized)
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Initial skeleton for pinctrl drivers. This patch includes common
infrastructure and API definitions for pinctrl drivers.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Introduce Kconfig for setting the driver initialization priority across
the entropy drivers and add a call to the logging template.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
The PM action callback had an incorrect signature, probably a leftover
from the actions conversion.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Convert cc2529 driver to `spi_dt_spec` and `gpio_dt_spec`. Required a
whole driver conversion from passing around the driver data struct to
passing around the driver itself.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Convert cc1200 driver to `spi_dt_spec` and `gpio_dt_spec`. Required a
whole driver conversion from passing around the driver data struct to
passing around the driver itself.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Convery mcp12s17 GPIO driver to `spi_dt_spec`. Also perform some minor
cleanup on non-standard device data pointers.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
With the introduction of `EXPERIMENTAL` and `WARN_EXPERIMENTAL` in
Zephyr all drivers settings having `[EXPERIMENTAL]` in their
prompt has has been updated to include `select EXPERIMENTAL` so that
developers can enable warnings when experimental features are enabled.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
With the introduction of `EXPERIMENTAL` and `WARN_EXPERIMENTAL` in
Zephyr all subsys/net and drivers/ethernet/Kconfig.e1000 settings
having `[EXPERIMENTAL]` in their prompt has has been updated to include
`select EXPERIMENTAL` so that developers can enable warnings when
experimental features are enabled.
The following settings has EXPERIMENTAL removed as they are considered
mature:
- NET_OFFLOAD
- NET_PROMISCUOUS_MODE
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
The setting UART_ASYNC_API is no longer considered experimental.
Also remove `new` from title and help test as the feature no longer can
be considered new.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Refactors all of the console drivers to use a shared driver class
initialization priority configuration, CONFIG_CONSOLE_INIT_PRIORITY, to
allow configuring console drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEFAULT to preserve
the existing default initialization priority for most drivers.
The driver-specific option, CONFIG_NATIVE_POSIX_CONSOLE_INIT_PRIORITY,
is left intact because the native posix console driver needs to
initialize after the UART console driver when both drivers are enabled.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Refactors all of the counter drivers to use a shared driver class
initialization priority configuration, CONFIG_COUNTER_INIT_PRIORITY, to
allow configuring counter drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers. The
exceptions are the maxim_ds3231 and mcp7940n drivers which have a
dependency on a SPI driver and must therefore initialize later than the
default device priority.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Refactors all of the CAN drivers to use a shared driver class
initialization priority configuration, CONFIG_CAN_INIT_PRIORITY, to
allow configuring CAN drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers. The exception
is the mcp2515 driver which has a dependency on a SPI driver and must
therefore initialize later than the default device priority.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Move odr options from Kconfigs to Device Tree. Moreover add
in DT a power-mode option to select among 4 possible values
(PD, LP, HR, HF). The power mode cannot be currently set from
sensor APIs.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This commit aligns lis2ds12 sensor driver to latest multi
instance sensor driver model.
In particular it makes use of the stmemsc common routines
and move ctx handler inside struct config, so that the
bus_init routines can be totally avoided.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Port the lis2ds12 sensor driver on top of the lis2ds12_StdC
HAL interface (in modules/hal/st/sensor/stmemsc/).
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Make use of the new DT facilities that introduced two new
bus structures, spi_dt_spec and i2c_dt_spec, as well as the
macros, SPI_DT_SPEC_INST_GET and I2C_DT_SPEC_INST_GET, to
retrieve info from DT.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Fix the usage of sensor shell module that calls sensor_sample_fetch
function with SENSOR_CHAN_ALL id which is not supported and
causes the following error:
uart:~$ sensor get INA237 current
Failed to read sensor: -134
channel idx=31 current = 0.000000
Fix that by adding support for SENSOR_CHAN_ALL channel id.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
With the introduction of `EXPERIMENTAL` and `WARN_EXPERIMENTAL` in
Zephyr all subsys/canbus, subsys/net/l2/canbus, and drivers/can settings
having `[EXPERIMENTAL]` in their prompt has has been updated to include
`select EXPERIMENTAL` so that developers can enable warnings when
experimental features are enabled.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
With the introduction of `EXPERIMENTAL` and `WARN_EXPERIMENTAL` in
Zephyr all subsys/bluetooth and drivers/bluetooth/hci settings having
`[EXPERIMENTAL]` in their prompt has has been updated to include
`select EXPERIMENTAL` so that developers can enable warnings when
experimental features are enabled.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
When the ITS is configured with a large number of DeviceID bits,
up to 32, the Device Translation Table can be configured as
"indirect" mode consisting of a 2-level table with the first
level entries pointing to a second level table for each
group of DeviceIDs.
This is necessary to support platforms with DeviceID bits > 16.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
This PR updates GPIO driver to use DTS information
regarding gpio availability.
This also fixes interrupt handling and
also removes kconfig definition for GPIO port.
A few configuration checks were also added to
improve code usage.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Use of '__DEPRECATED_MACRO' was not compatible with the way macro
is used later in this driver.
Remove it and keep the warning as vector for deprecation information.
Additionally, replace DT_NODE_HAS_PROP with DT_INST_PROP as
using the former is not recommended with boolean properties.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Refactors all of the ADC drivers to use a shared driver class
initialization priority configuration, CONFIG_ADC_INIT_PRIORITY, to
allow configuring ADC drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers. The
exceptions are lmp90xxx, mcp320x, and mcux_adc16 drivers which have
dependencies on GPIO, SPI, and/or DMA drivers and must therefore
initialize later than the default device priority.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
The current modem sockets poll implementation has 2 limitations
as of today:
- not following posix spec wrt timeout of -1 (should be forever,
but as today it's was returning immediately)
- not able to poll from multiple threads on different sockets
on the same modem.
This pull request should implement these limitations.
Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
DT_INST_NODE_HAS_PROP() returns true always since the boolean
tag is valid. Use DT_INST_PROP_OR() to get the real value.
Fixes: baecd7e55a drivers: uart_ns16550: Remove CMake-based templating
Signed-off-by: Timo Teräs <timo.teras@iki.fi>
Fix the limits for the timing parameter calculations.
The lower limit for the phase_seg2 value is wrongly specified as 1 to 7,
but 1U is substracted before writing it to the CTRL1:PSEG2 register
field. This results in register field values between 0 and 6, but 0 is
an invalid value for the PSEG2 register field.
The upper limits for several of the timing parameters are wrong as well,
but this does not result in invalid register field values being
calculated. It can, however, result in not being able to meet CAN timing
requirements.
The confusion in specifying the limits likely stems from the timing
calculations and timing limits using the "physical" values, whereas the
registers fields all use the "physical" value minus 1. When the
datasheet says "The valid programmable values are 1-7", the
corresponding limits should be set to 2 to 8 to take the "minus 1" into
account.
Fixes: #39541
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Refactors all of the clock control drivers to use a shared driver class
initialization priority configuration,
CONFIG_CLOCK_CONTROL_INIT_PRIORITY, to allow configuring clock control
drivers separately from other devices. This is similar to other driver
classes like I2C and SPI.
Most drivers previously used CONFIG_KERNEL_INIT_PRIORITY_OBJECTS or
CONFIG_KERNEL_INIT_PRIORITY_DEVICE, therefore the default for this new
option is the lower of the two, which means earlier initialization.
The even lower defaults for STM32 and Arm Beetle are preserved by
SoC-family level overrides.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
This enables accessing the hyperflash through the flash api.
Added a feature to memc_mcux_flexspi that waits for flexspi bus to be
quiet.
Signed-off-by: Nicolai Glud <nicolai.glud@prevas.dk>
There is no power channel within the name array that
is used by e.g INA23X so let's add it to have support
in sensor shell commands.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
Use the shared CONFIG_SERIAL_INIT_PRIORITY for driver initialization
priority.
Override the default value for the NEORV32 SoC to ensure the serial
driver is initialized after the syscon driver by default.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
When creating a socket, be sure to check the address
family and set the correct address family option in
the AT command.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Add a Kconfig option, similar to the one that is already available
for nRF5340, that allows enabling the REG0 (VDDH) DC/DC converter
in nRF52840. Make use of this option in Nordic boards: nRF52840 DK
and nRF52840 Dongle.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Not all STM32 parts have at least 5 DMA interrupt vectors for DMA2. In
particular, some STM32F1 XL-density devices only have 4 DMA2 interrupt
vectors, with Channels 4 and 5 sharing the same vector. Added
#if DT_INST_IRQ_HAS_IDX(1, 4) to prevent compiler errors on these SoCs.
Signed-off-by: Josh Hansen <jhansen3141@gmail.com>
Refactors all of the serial drivers to use a shared driver class
initialization priority configuration, CONFIG_SERIAL_INIT_PRIORITY, to
allow configuring serial drivers separately from other devices. This is
similar to other driver classes like I2C and SPI.
The default is set to CONFIG_KERNEL_INIT_PRIORITY_DEVICE to preserve the
existing default initialization priority for most drivers. The one
exception is uart_lpc11u6x.c which previously used
CONFIG_KERNEL_INIT_PRIORITY_OBJECTS.
This change was motivated by an issue on the frdm_k64f board where the
serial driver was incorrectly initialized before the clock control
driver.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Both nRF I2C drivers (i2c_nrfx_twi and i2c_nrfx_twim) perform the bus
recovery procedure in reaction to timeout (500 ms) of any requested
message transfer. Add implementation of the I2C API recovery function
in both these drivers so that it is also possible to execute this
procedure directly.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Size of data pointer for event revival must be at least sizeof
event queue item.
Update to send whole event (id + event)
Signed-off-by: Pavlo Hamov <p.hamov@venstar.com>
Add __printf_like modifier to validate strings used by shell.
Fixing warnings triggered by this change.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
1) Allow use of interrup driven instance.
ROM implementation could be selected via dts compatiable.
2) Use UART rx fifo and timeout interrupt for end of message detection.
Added to decrease interrupts count on data reception
3) Use ESP_LL api.
Signed-off-by: Pavlo Hamov <p.hamov@venstar.com>
When CLOCK_CONTROL_NRF_FORCE_ALT is enabled then calibration is
performed outside of the driver. In that case certain Kconfig
options where present which were dedicated for case when calibration
is performed by the driver. Side effects of those options lead to
conflicts when CLOCK_CONTROL_NRF_FORCE_ALT was enabled. Fixed
those conflicts by introducing Kconfig option which indicates
whether calibration is performed by the driver or not.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Model descriptions in Kconfig.ssd1306 should be ssd1306 instead of
ssd16xx, these may be copied from driver for ssd16xx.
Signed-off-by: Huang Qi <no1wudi@qq.com>
- Per datasheet (Rev 1.0, Page 29): When enabling adv_power_save, there
needs to be a 1ms inter-write registers delay. With this addition, the
driver will work at SCLK frequencies faster than 100kHz.
- Added helper function reg_write_with_delay() to factor these writes.
Signed-off-by: Luis Ubieda <luisf@croxel.com>
Updated uart_rx_enable() and uart_tx() to use timeout given
in microseconds. Previously argument was given in milliseconds.
However, there are cases when milliseconds granularity is not
enough and can significantly reduce a throughput, e.g. 1ms is
100 bytes at 1Mb.
Updated 4 drivers which implement asynchronous API. Updated
places where API was used.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Replaces the prefixes of gpio_matrix_in and gpio_matrix_out
to unify those function calls on all supported socs.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
When the driver was called to set the period length for a channel
to 0, it set the COUNTERTOP register in the PWM peripheral to 0,
what resulted in an undefined behavior of the peripheral (and lack
of the STOPPED event sometimes).
The PWM API does not precise how should a zero length period be
handled; some drivers return the -EINVAL error in such case, some
do not. This patch fixes the pwm_nrfx driver so that it does not
change the previously used COUNTERTOP register value when the period
length is set to 0, and because the pulse cycles are always limited
by the driver to period cycles (so 0 in this case), in result the
relevant channel is simply deactivated. This allows users to switch
off a channel by requesting the pulse width to be set to 0 without
providing a non-zero period in such call.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Implement the CPU idle task. The system should enter this task when
there is no any task to ensure power saving.
Tested on it8xxx2_evb board. It will reduce 12.5mA when system enters
the CPU idle task.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
STM32G0/F0 SoCs allow to remap PA11/12 to PA9/10. Some boards
were manually configuring this remap. This patch centralizes this
functionality to the pinmux driver, allowing boards to enable the
remap directly in board dts file.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
When existing stop mode 1&2, VCO is set to range 4
and should be set back to range 1 to allow full speed
operations.
Rather than setting VCO at startup, set it inside clock
setting procedure so that it could done
in clock reset procedure when existing stop modes.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
If CONFIG_WIFI_ESP_AT_SCAN_MAC_ADDRESS: mac addr included in
scanning results.
if CONFIG_WIFI_ESP_AT_SCAN_PASSIVE: passive scanning is used instead of
default active scanning.
If CONFIG_WIFI_ESP_AT_SCAN_RESULT_RSSI_ORDERED: scanning response
ordered by RSSI.
Signed-off-by: Jani Hirsimäki <jani.hirsimaki@nordicsemi.no>
On LSM6DSO sensor the INT1 pin is used for both generating the drdy
interrupt and for switching to I3C hotjoin mode just after reset if
it is at logical '1' level. It might happen that after a board
reset the logical level '1' is preserved (maybe a level shifter)
forcing the LSM6DSO to enter erroneously in I3C mode, breaking any
attempt to communicate with it. (Fix#38902)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This kconfig is only used for one board and is simply an alias
to another kconfig. So remove CONFIG_DW_ICTL_OFFSET and apply
the value directly to the other kconfig.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Uptime in milliseconds is assigned to uint32_t variable, which results
in integer overflow after enough time has expired. Additionally
milliseconds part (which should be 0-999) is assigned directly from
uptime, without subtracting full seconds.
Fix both issues by using int64_t variable and calculating milliseconds
with modulo.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Convert all CS control logic to be based on the `gpio_dt_spec` member
instead of the standalone `port`, `pin` and `flags` members.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Co-authored-by: Jordan Yates <jordan.yates@data61.csiro.au>
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
Co-authored-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
async_rx_disable does not re-anable RXNE interrupt, it was disabled
during async_rx_enable
Signed-off-by: Manojkumar Subramaniam <manoj@electrolance.com>
Removing two unused "struct fdc2x1x_data" to fix warnings
when compiling with PM_DEVICE=y.
Signed-off-by: Igor Knippenberg <igor.knippenberg@gmail.com>
All ARC CPUs (supported by Zephyr) don't lose core interrupt
controller configuration after switching to sleep mode / modes,
so we don't need to save & restore it's configuration with PM.
This PM code most likely was added for Arduino 101 (Genuino 101)
board which isn't supported by Zephyr anymore - so we can drop
it.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
We don't use '_VectorTable' in the driver, so let's drop it's
declaration.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
In some configurations (e.g. edge interrupt triggers),
an interruptible event occurs during ISR and the host interrupt
controller does not see the new event due to IIR is constantly
asserting interrupts. For example, the callback handles RX and
then TX. If another character comes in before end of TX processing
(TX interrupt still asserts while raising RX interrupt), the host
interrupt controller may not see this new event. So if needed,
the IER is being toggled to re-assert interrupts at the end of ISR
to nudge the host interrupt controller to fire the ISR again.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Remove Kconfig options for enabling device instances in favor of
taking that information only from device tree. Prior to that
change there was a mix of devicetree and Kconfig.
Bring back use of CONFIG_GPIO_NRF_INIT_PRIORITY.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Allow the user to register function callbacks that
are executed during gsm modem configuring and stopping.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
GPIO L/K groups:
On IT81202 (128-pins package), the pins of GPIO group K and L aren't
bonding with pad. So we configure these pins as internal pull-down
at default to prevent leakage current due to floating.
GPIOH7:
On IT81202/IT81302, the GPIOH7 isn't bonding with pad and is left
floating internally. We need to enable internal pull-down for the pin
to prevent leakage current, but IT81202/IT81302 doesn't have the
capability to pull it down. We can only set it as output low,
so we enable output low for it at initialization to prevent leakage.
After setting: power saving=2.26mA
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
The magnetometer on the LSM303DLHC has a different gain conversion
factor for LSB to Gauss for the Z axis than it does for X, Y. This
commit takes into account the different conversion factors, and
adds the correct coefficients for each gain setting and axis.
Signed-off-by: Kevin Townsend <kevin.townsend@linaro.org>
This constraint on the AHB prescaler is removed.
The ahb-prescaler is allow from 1-512.
For stm32 common and stm32U5 devices.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Remove APIs used in the pre-DT era. In case manual access is required,
`stm32_dt_pinctrl_configure` can still be used as a shortcut with data
initialized in the expected format.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Fixes: #38959
Currently, the I2C driver returns I2C status register value as error
code when error happen. This PR fixes returning system number and
the return values is negative for error.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Change the REMAP bits of the AFIO_MAPR of the stm32F1x soc
with local MACRO without changing the SWJ_CFG (write-only bits).
The serial wire JTAG configuration is taken from the Z_AFIO_REMAP
(value of the CONFIG_GPIO_STM32_SWJ_xxx))
and not read from the MAPR register.
It accesses to the MAPR register directly instead of LL functions.
Note that Remapping on the MAPR2 is not to change.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Timer STM32 LPTIM currently supports 2 clocks sources: LSE & LSI.
LSE (external) is defined as default but its availability depends
on board support package and then may not be available.
This ends up in situations where users have LSE implicitly selected
while no crystal is available on board, leading to non functional
LPTIM.
To avoid this situation, makes LSI clock, which is always available
(since internal to the SoC), the default LPTIM source clock.
Then, default case will be functional. Users will then be able to
select LSE if needed.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Some functions were being re-defined as macros if certain conditions
were not met.
Fix violations to rule 5.5
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
console_input_init is only used in the same scope it is implemented.
There is not need to have it defined elsewhere.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
interrupt controller, also places its relevant
peripheral sources allowing drivers to use the
DT macros instead of espressif headers.
Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
Changes the modem_context_sprint_ip addr to write into a provided
buffer. This approach fixes a referencing to a non existing stack
variable, without using a lot of stack space.
Tested using the by building all used modems and tested on HW using
IPv4.
Fixes: #38459
Signed-off-by: Sjors Hettinga <s.a.hettinga@gmail.com>
Depending of the soc and SPI peripheral, the Frame-Format of the
SPI can be configured to support TI or Motorola protocol.
This is configured through a new DTS property.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
- correct the names of buffers used by message queues so that it
is possible to have multiple instances of the driver (in case
such need appears in the future)
- make `stop` and `discard_rx` normal structure members, not bit
fields, as they are modified in the interrupt handler and that
could lead to overwriting of other bit fields located in the
same memory unit
- add a log message providing the actual frame clock (WS) frequency
(i.e. PCM rate) that the driver was able to configure (due to
hardware limitations, it is not always possible to achieve the
exact requested frequency and the driver selects the closest one
available, so make it more visible to users
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Remove unnecessary condition that effectively limits the usability
of the I2S format to two channels mode only.
Although the description of the `i2s_config` structure contains
a remark that for the I2S format the specified number of channels
is ignored and always two are used, in fact only one other in-tree
driver (i2s_sam_ssc) applies such limitation.
The nRF I2S hardware has no problem with handling the I2S format
with audio data for only one channel, so there is no need for having
this limitation in the driver, and without such mode of operation of
the driver it is impossible to feed it with PCM data directly from
the PDM peripheral working in one channel mode.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
When creating a socket, all of the registered socket implementation are
processed in a sequence, allowing to find appropriate socket
implementation for specified family/type/protocol. So far however,
the order of processing was not clearly defined, leaving ambiguity if
multiple implmentations supported the same set of parameters.
Fix this, by registering socket priority along with implementation. This
makes the processing order of particular socket implementations
explicit, giving more flexibility to the user, for example when it's
neeed to prioritze one implementation over another if they support the
same set of parameters.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Put the maximum number of bytes into Tx FIFO in the fill_fifo routine
to reduce CPU usage.
Previously, the THRE bit was checked in a loop, but, according to doc -
"In the FIFO mode, it is set when the XMIT FIFO is empty, and is
cleared when at least one byte is written to XMIT FIFO.", so only one
byte was transferred every interrupt. That was generating a big amount
of interrupts, which consumes CPU time.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
Update drivers regarding latest multicast group join/leave monitor
changes which now supports both IPv6 and IPv4 multicast addresses.
Signed-off-by: Markus Fuchs <markus.fuchs@ch.sauter-bc.com>
The args_number and args_no structures could be removed
But other parameter checks we still preserved.
Signed-off-by: Dennis Ruffer <daruffer@gmail.com>
This is a frequently used command during hardware bringup
The listen command was not actually implemented
Also uncrustified and check_compliance.py
Signed-off-by: Dennis Ruffer <daruffer@gmail.com>
This implements support for the optional Interrupt Translation Service
(ITS) module of the GICv3 Interrupt Controller.
The current implementation is designed for MSI/MSI-X interrupt delivery
in mind.
The gicv3 driver calls each ITS INVALL command when LPI interrupts are
enabled/disabled.
A simple atomic integer is used to allocate unique LPI INTIDs to ITS
users.
CPUs numbers are directly mapped as ICIDs into the Collections Table.
As a limitation it doesn't support indirect Device table to simplify
implementation but may use a large amount of memory.
INV, DISCARD, MOVI and MOVALL commands are not implemented.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
The LPI (Locality-specific Peripheral Interrupts) are edge-triggered
message-based interrupts that can use an Interrupt Translation
Service (ITS) to route an interrupt to a specific Redistributor and
connected PE.
This implement the necessary LPI support when an ITS is enabled.
The LPI states are stored in memory-backed tables.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Implements a shim layer driver using st hal for
I3G4250D gyro, mounted for example on stm32f3_disco_E.
No support for triggers included yet.
Signed-off-by: Jonathan Hahn <Jonathan.Hahn@t-online.de>
When SMP is enabled all the cores are announcing a tick and this is
causing too many ticks to be announced. Announce the tick even if this
is zero.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
This reverts commit 43309296b8.
Fixes: #38403
The referred commit introduced `zephyr_library()` for pinmux drivers but
also resulting in #38403 because several boards has `CONFIG_PINMUX=y`
without selecting any pinmux drivers from `drivers/pinmux` thus
generating the following warning:
> No SOURCES given to Zephyr library: drivers__pinmux
>
> Excluding target from build.
This commit reverts the changes so that this warning disappears.
This results in pinmux drivers from `drivers/pinmux` to be located in
libzephyr.a which is messy, but has been so for a long time, even before
Zephyr 1.14 LTS.
The future pinctrl API will be designed in such a way that this problem
will not occur. Thus the old behavior is acceptable until the transition
to pinctrl API has completed.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
GPIO initialization was moved to PRE_KERNEL_1 with commit
590162a5cc06c72b70dee93f410b878bc0935f1f.
This had the consequence of having AFIO init done after GPIO init
as a consequence, this sequence ends up with AFIO clock disabled,
and hence negative impact on AFIO expected services.
Additionally, to save some flash, compile out afio init when not
required.
Fixes#38870
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Fixes: #38403
Removing unneeded `imply GPIO` and `CONFIG_GPIO=y` occurrences where no
files are added to the gpio zephyr library.
Also removed `CONFIG_GPIO=y` occurences where this is handled by
defconfigs for the soc or board.
Selection of GPIO without selecting any drivers results in the warning:
> No SOURCES given to Zephyr library: drivers__gpio
>
> Excluding target from build.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Fixes: #38403
The two eth_native_posix.c and eth_native_posix_adapt.c are now added
to the common drivers__ethernet Zephyr library.
Instead of creating a dedicated library for just two files those files
are now added to the common ethernet library, see also #8826.
Instead, the dedicated compile definitions required for those files are
specified using COMPILE_DEFINITIONS on the source files.
This also avoids the following warning as the ethernet library is no
longer empty.
> No SOURCES given to Zephyr library: drivers__ethernet
>
> Excluding target from build.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Fixes: #38403
Adding NET_DRIVERS menuconfig so that network drivers are grouped
together in its own menu entry under drivers, similar to most other
drivers.
This further has the advantages that `CONFIG_NET_DRIVERS` can be used
for testing to determine if network drivers has been selected.
This changed revealed a dependency loop where both `select` (for SLIP)
and `depends` (for PPP) which both depends on NET_DRIVERS` where in use
in the dependency tree for Qemu networking, especially NET_SLIP_TAP.
This is handled by defaulting `NET_DRIVERS` to `y` when building for a
Qemu target.
`SLIP` had a dependency to `!QEMU_TARGET || NET_QEMU_SLIP`. This is
changed so that SLIP prompt depends on `!QEMU_TARGET` which provides
full user control in hardware but makes the symbol promptless on Qemu
targets.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Fixes: #38403
Changing Bluetooth drivers from being a menu into a menuconfig.
This aligns the Bluetooth driver configuration with other driver
configurations as well as provides a setting which identifies if
Bluetooth drivers has been enable.
This further helps to avoid empty Zephyr libraries for bluetooth
samples.
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
Setting Oversampling also applies on stm32L5 but disabling
the ADC will cause endless loop except for the stm32L0 serie.
Errata applies only on stm32G0 soc series when
writing ADC_CFGR1 register.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add hardware flow control support for the EFR32MG21 and other modules
using GPIO_USART_ROUTEEN_RTSPEN (and GPIO_USART_ROUTEEN_CTSEN) instead
of the Kconfig SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION.
The driver already contained the section settings the RTS and CTS pins
for modules using the GPIO_USART_ROUTEEN_(RTS|CTS)PEN define, but it was
not compiling because of an #ifdef checking only for
CONFIG_SOC_GECKO_HAS_INDIVIDUAL_PIN_LOCATION and not both.
Signed-off-by: Steven Lemaire <steven.lemaire@zii.aero>
Code removed:
- IT8XXX2 doesn't support soc level software interrupt hence remove
them.
- To use common macro to access csr (control status register).
- To remove CONFIG_RISCV_HAS_PLIC related code. IT8XXX2 uses its own
interrupt controller code.
- To remove ite_write and ite_read. We don't use them anymore.
Code changed:
- Return true from arch_irq_is_enabled() when external interrupt-enable
bit, and SOC's IER are both true.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Update sam0 i2c driver to directly send/receive next message if it is
in the same direction and the current message has no stop or restart
flags. Seems like in some drivers this is the expected behaviour.
Fixes#36857
Signed-off-by: Christoffer Zakrisson <rustypig91@gmail.com>
The st7789v_transmit function does not return any error code (void), so
ret = st7789v_transmit(...) is wrong.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The interrupt config flags for an IO should be separate
from the standard IO configs because the interrupt config
is a separate API.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
k_work_schedule may return other non-negative value than 0.
When driver was adapted to the new k_work API that was not
taken into account.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Add support for Quectel modem in gsm_ppp modem driver.
The CMUX cmd is based on MUX application notes v1.0(2020-09-22)
for BG95, BG77 and BG600L. Tested and working on EC21e.
As the gsm_ppp doesn't do power control, it is required to power
on the modem manually in the application.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Apply the same changes as the previous commit made in the spi_nrfx_spim
shim, to keep these two shims aligned.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
According to the nRF5340 PS, for 32 Mbps high-speed SPI using SPIM4,
drive configuration H0H1 must be used. The underlying nrfx_spim driver
does it properly in its initialization function, so change the shim to
(re)initialize the driver when the SPI configuration is to be changed
(only then the speed to use is known), to avoid the need of duplicating
the corresponding code in the shim itself.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
According to the nRF5340 PS, SPIM4 only supports 32 Mbps when
the application core is running at 128 MHz. This patch adds
the corresponding check.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Ensure the GPRS connection APN settings match the PDP
context. This it best to ensure proper IP connectivity.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Ensure that the IP family is synchronized between the PDP
context and the GPRS connection.
There were cases where they could get out of sync.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Assign the IPv6 address from the LTE network to the
network iface.
Configure DNS resolver with IPv6 DNS address from the
LTE network.
Fix socket AT commands to account for IPv6 addresses.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
In the DNS work callback ensure the iface is up
(on the LTE network) before trying to reconfigure the
DNS resolver with the DNS address.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
The stm32wl version of the sx126x driver disables the NVIC interrupt in
the radio isr to prevent retriggering while the event gets handled in
the workqueue. Since the interrupt condition is still present while the
line is disabled, the interrupt pending bit remains set in the NVIC, so
after the handler finished, when irq_enable() gets called, the interrupt
fires immediately again with no status bit set in the radio registers.
Apart from the no-op interrupt, this has the side effect of bringing
the radio out of sleep as soon as the interrupt bit are read and
cleared, which increases the idle state power consumption.
Adding a NVIC_ClearPendingIRQ() before irq_enable() seems to fix the
problem. It should not cause any issue with missing interrupt events, as
if there are pending bit on the Radio, the NVIC pending bit would be
re-set immediately.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
1. Add support for multiple syscon entries (as a side effect, this also
fixed syscon.c implementations which weren't being linked to their
syscon.h counterparts).
2. Add support for different width registers in syscon.
3. Add tests for syscon
Signed-off-by: Yuval Peress <peress@chromium.org>
These are the only two display drivers initializing in APPLICATION.
Dependency exposed with LVGL with initialization at same level and
priority.
Fixes#38690
Signed-off-by: David Leach <david.leach@nxp.com>
When CONFIG_PM_DEVICE_RUNTIME is enabled, if a pin is configure as
input after an output pin has already being configured the device is
wrongly suspended.
Fixes#38433
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Now that we're clearer around pm constraints management in various
TX cases (poll streams, irq driven or async), make some code
simplifications to ease readability.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Introduce new logic to set/release pm_constraint during serial TX
transactions.
First change is to introduce an internal flag and utility functions
to control the set/release constraint balancing per uart device.
This way, whatever the mix of transactions or API calls, we
ensure a single uart device can only do 1 or 0 to the PM state
constraint. Constraint can't then be set more than once, released w/o
having been set or released more than it was set.
The last part of the change reworks the triggers for constraints
set/release operations.
In order not to disturb driver operations, if irq driven mode or PM is
enabled, don't enable TC interrupt handling by default.
Instead, map the pm_constraint setting to the way TC flag is handled
in normal mode of operations (irq driven or async).
As a consequence, in irq driven mode, pm_constraint is set/released on
tx_enable/tx_disable api calls, which gives API user full control
on transaction protection vs low power operations.
Finally, we emulate the same behavior on TX poll transaction, by
enabling TC irq at the start of a stream and disabling TC irq once
stream is completed. This is controlled with a dedicated device flag.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
TWIM peripherals cannot perform write transactions from buffers
located in flash. The content of such buffers needs to be copied
to RAM before the actual transfer can be requested.
This commits adds a new property (zephyr,flash-buf-max-size) that
informs the driver how much space in RAM needs to be reserved for
such copying and adds proper handling of buffers located in flash.
This fixes an issue that caused that e.g. the DPS310 sensor driver
did not work on nRF SoCs that only have TWIM, not TWI peripherals.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Issue an error logging message when the i2c_nrfx_twim driver lacks
a concatenation buffer big enough to properly handle a call to
i2c_burst_write() function, to give the user a hint what is wrong.
Also use by default a 16-bytes long concatenation buffer for every
instance of the i2c_nrfx_twim driver. Such value should cover most
of the simple uses of the i2c_burst_write() function, like those
in the stmemsc sensor drivers, and when a longer buffer is needed,
the user will be provided with the above message pointing to the
property that should be adjusted.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
If CYC_PER_TICK does not divide the (now - last_count) quantity exactly with integer math, the subsequent multiplication before incrementing last_count causes a drift. This commit eliminates the redundant division-followed-by-multiplication and fixes https://github.com/zephyrproject-rtos/zephyr/issues/37852
Signed-off-by: Berend Ozceri <berend@recogni.com>
Fix power-save-mode (PSM) operation.
When in PSM, do not bring the networking interface down
when an out-of-coverage event occurs.
When PSM goes into hibernate, this will cause an
out-of-coverage event to occur, even though the device
still has access to service.
Keeping the networking interface in the up state
allows an app to send data whenever it needs to.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Using DTR to control sleep modes is a legacy mode
of operation. Remove control of DTR IO.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Sleep mode 0 (driven by DTR) is only recommended for use
as a legacy option.
Sleep mode 1 is recommend by Sierra Wireless.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
uart_sam0_dma_tx_done callback triggers when the last byte
is transferred from the tx sram buffer to the sercom DATA register.
However the byte has yet to be transmitted completely which can lead to
incorrect event handling if UART_TX_DONE is expected to signal
the end of transmission.
Signed-off-by: Ron Smith <rockyowl171@gmail.com>
Fixes a compile error for the err_check function not being found if
if CONFIG_UART_INTERRUPT_DRIVEN is not enabled.
Signed-off-by: Ron Smith <rockyowl171@gmail.com>
fixes peripheral drivers such as async uart that rely on dma being
ready failing because dma is not initialized yet.
Signed-off-by: Ron Smith <rockyowl171@gmail.com>
On those STM32 series, setting of this feature is conditioned to
the ADC state: it is allowed to set/reset the oversampler (OVSE bit)
and set the Oversampling ratio (OVSR bits) in the ADC_CFGR2 register
only when ADC is disabled or enabled without conversion on going.
Then is the ADC re-enabled.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
On those STM32 series, setting of this feature is conditioned to
the ADC state: it is allowed to write the Data resolution (RES bits)
in the ADC_CFGR1 register only when ADC is disabled (ADEN=0).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The ticker `ticks_drift` is propagated via the ticker
elapsed callback, in order to provide necessary information
to correctly calculate total elapsed durations by states and
roles that use ticker extensions to mitigate scheduling
collisions by drifting within a permitted window.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
The function usdhc_board_access_init was returning a non-zero
value as the variable "ret" is also used to store the GPIO
level for card-detect.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The net_core device initialization has a subtle dependency
on the PTP clock initialization. Adding a Kconfig and set
it to a priority level less than net_core. This will ensure
the initialization sequence.
Fixes#38571
Signed-off-by: David Leach <david.leach@nxp.com>
Snprintf calls should be avoid when not necessary, instead snprintk
should be used as it offers the same functionnalities at a lower cost
in flash.
Signed-off-by: Xavier Chapron <xavier.chapron@stimio.fr>
commit id ec2b9d42af missed that ivshmem
uses pcie_msi_enable as well, thus fixing it now.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
According to reference manual, use of TC is "to avoid corrupting the
last transmission when the USART is disabled or enters Halt mode.". It
is safe to remove it since it is not checked when CONFIG_PM=n.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In the current implementation the STM32 UART driver required to enable
`CONFIG_PM_DEVICE` when `CONFIG_PM=y` to function properly. The main
reason is that in some situations, like in polling mode, transmissions
are not fully synchronous. That is, a byte is pushed to the _queue_ if
it is empty and then the function returns without waiting for it to be
transmitted to the wire. This makes sense to make things like per-byte
transmission efficient. However, this introduces a problem: the system
may reach idle state, and so enter low power modes before the UART has
actually finished the last data in the queue. If this happens,
communications can be interrupted or garbage data may be put into the
UART line.
The proposed solution in this patch uses PM constraints to solve this
problem. For the IRQ/DMA case it is easy since we can set the constraint
before transmission start, and when the completion (TC) interrupt is
received we can clear it. However, the polling mode did not have the
capability to signal the completion. For this case, a simpler IRQ
routine is provided to just release the constraint. As a result, the PM
hooks are not required and so system can operate with just `CONFIG_PM`.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Do not set DLAB bit in Line Control Register when the access to
the baud rate divisor registers is not needed.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
This function wasn't being defined when SMP_BOOT_DELAY was set or when
SMP wasn't enabled. There's no reason for either, then function
doesn't depend on any kconfig-dependent build-time state, and (given
that we use -ffunction-sections) it won't appear in output binaries
unless called.
And there are use cases (e.g. z_smp_start_cpu()) where we need that
function even when BOOT_DELAY is enabled.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
When the MSI clock is selected as source on the stm32wbx device,
the MSI has a range to choose the MSI input frequency.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
When affinity routing is enabled for Non-secure state
( GICD_CTLR.ARE_NS is '1'), need to set routing information
for the SPI interrupt.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
The equality check for remap was not being performed since the local
variable remap was assigned to the value being checked just before the
check. Some minor simplifications have been performed (fixed variable
types).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit now sets the Zephyr library property `ALLOW_EMPTY` to
silence the warning:
`No SOURCES given to Zephyr library: drivers__interrupt_controller`
Signed-off-by: Torsten Rasmussen <Torsten.Rasmussen@nordicsemi.no>
The struct stm32_pinmux_conf structure (and stm32_pin_func_t type)
are not used, so remove them.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The val2 calculation was done using (1000000 / 40960) as
multiplying factor, which was sometimes leading to a
int32 overflow. So, let's use the equivalent (but smaller)
(3125 / 128).
Fix#38090
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The driver code for the Maxim DS3231 has repeated code for bit
manipulation to transform time data between binary and binary coded
decimal. Use the new BCD header functions instead.
Signed-off-by: Jake Swensen <jake@swensen.io>
This adds shell support for FPGA drivers.
Signed-off-by: Mateusz Sierszulski <msierszulski@internships.antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
This adds driver for EOS_S3 SoC FPGA.
Signed-off-by: Mateusz Sierszulski <msierszulski@internships.antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
This adds new FPGA controller which allow to control FPGA chips.
FPGA controller has been created to enable bitstream loading
into the reprogrammable logic. It adds completely new API,
which enables to check status of the FPGA chip, power it on
or off and reset it.
Signed-off-by: Mateusz Sierszulski <msierszulski@internships.antmicro.com>
Signed-off-by: Tomasz Gorochowik <tgorochowik@antmicro.com>
This patch changes condition of 'depends on' of sifive UART driver
to support other SoCs of SiFive Freedom series.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Add a shim that allows using the nrfx PDM driver via the Zephyr API.
Add also missing devicetree nodes representing the PDM peripherals
in the nRF52 Series SoCs.
Extend the "nordic,nrf-pdm" binding with a new property that allows
specifying the clock source to be used by the PDM peripheral (so that
it is possible to use HFXO for better accuracy of the peripheral clock
or, in the nRF53 Series SoCs, to use the dedicated audio oscillator).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The free run timer will be used to count before entering hibernate
mode. Move the related registers to the head file for accessing.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Remove the locally MSI/MSI-X capabilities ID define and use the
newly introduced one from the PCI Code and ID Assignment
Specification Revision 1.11 document header.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Extend the PCIe API to find Extended Capabilities in the PCI Express
Extended Capabilities located in Configuration Space at offsets 256
or greater.
Note: the Root Complex Register Block is not supported
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
enable spi driver to support dspi edma
add support for shared dma mux spi port
for shared spi port we need judge the irq source
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
The additional depends on SOC_FAMILY_SAM was redundant.
Add sam4l_ek to dfu sample exclude since it was failing on
arduino_due.
Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
IRQ_CONNECT macro last argument is architecture-specific flag,
but now there is instance id at this place.
This PR set architecture-specific flag to 0.
Signed-off-by: Grixa Yrev <GrixaYrev@yandex.ru>
Atmel sam0 adc peripheral have multiple interrupt vectors for same5x
devices. This configure interrupt vector by name to ensure that proper
interrupt handle will be executed.
Fixes#37779
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The Kconfig refactor that replaces some single-symbol 'if's with
'depends on' added a second entry. That entry allows flash driver
be selected for SoC's without support. This fixes the 'depends on'
entry to allows only SAME/V SoCs.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The code was wrongly calling DMA_Abort on a channel
that not initialized. This fixes Issue#38078
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Position over LTE (PoLTE) can be used to locate a device as
an alternative to GNSS.
Increase RX thread stack size for PoLTE processing.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Allow application control for starting modem driver.
This allows network attach to be randomized.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
So fare flash simulator had been forced to use the statistic
subsystem.
This patch introduces CONFIG_FLASH_SIMULATOR_STATS which allow to select
whether the statistic is involved in flash_simulator operations.
This patch allows to reduce flash footprint when the statistic is
not required.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
For getting the address of the RAM region in the application we need to
extend the api for the flash_simulator.
This path introduce flash_simulator_get_memory() call which allow to
do so.
Signed-off-by: Sigvart Hovland <sigvart.m@gmail.com>
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Fixes the issue where uart_sam0_irq_tx_ready would return true if
the INTFLAG was set even though the INTSET bit for the given
interrupt was not enabled yet through uart_sam0_irq_tx_enable.
Signed-off-by: Ron Smith <rockyowl171@gmail.com>
For low power operation, set the IP connection reconfig
flag when receiving a startup report.
This will ensure the GPRS connection is reconfigured
before any socket operations take place.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Allow the driver to run if a SIM card is not present.
This allows public HL7800 APIs like firmware updates
to be used even if no network is available.
Remove duplicate query ICCID command.
Signed-off-by: Andrew Hedin <andrew.hedin@lairdconnect.com>
This changes "__nocache K_HEAP_DEFINE()" to use the new
K_HEAP_DEFINE_NOCACHE() macro. This fixes a build error
as K_HEAP_DEFINE() is specifying its own linker section
so that it is no longer possible to specify another
linker section.
Fixes#38108
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
For some reason, XCC fails to build complaining segfault
during CGPREP phase. Adding an assignment to a volatile
return value seems to fix this. This provides an easily
revertable commit to workaround the issue.
Fixes#37734
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
When ack data for extended address is set with the
nrf_802154_ack_data_set function, the extended address
must be reversed to the IEEE 802.15.4 address transmit
order in order to be properly matched.
Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
Error handling was missing in numerous places, mostly on GPIO related
callbacks. Some error codes were not correct (-EINVAL vs -ENODEV) and in
some cases error was not propagated correctly.
Fixes#38117
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Error handling was missing in numerous places, mostly for GPIO related
callbacks. An assertion has been used in the context of thread callback.
Fixes#38132
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Apply the same fix in bd8afe9365
(" drivers: sensor: clean up zephyr_library calls") to remove
redundant code in the sensor driver build system files. Additional
instances of the antipattern have crept in.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The result of temperature and relative humidity ticks ranges from 0 to
65535 which is the range of a uint16_t variable. Intermediate tmp
variable type has also been adjusted.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The max-erase-time property was introduced for the STM32 flash driver,
but it was inserted as an optional property in the generic
soc-nv-flash binding which is used by other SoCs.
Make it a required property in a new st,stm32-nv-flash binding
instead, since it is at present a vendor specific property.
Update the DTS files accordingly. Keep the existing "soc-nv-flash"
value in the compatible list in each case, so that DT_HAS_COMPAT(...
soc_nv_flash) tests on these nodes will still succeed, but put it
after a newly added "st,stm32-nv-flash" compatible, so that the
SoC-specific binding will be used as it is discovered first by the DT
tooling.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Add logging for NRFX_USBD_EP_ABORTED event inside
control transfer events handling, otherwise "Unexpected event"
error message in this regard confuses the users.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Note that the it8xxx2 does not support a status register so that
functionality is omitted.
This change also adds driver tests that build both the npcx and it8xxx2
drivers.
Signed-off-by: Yuval Peress <peress@chromium.org>
There was a typo that snuck into the bbram driver for npcx.
Fix the driver and update the Kconfig to automatically include the
driver if the compatible string exists in the dts. This ensures that
the driver is built when building the npcx evbs.
Signed-off-by: Yuval Peress <peress@chromium.org>
Change IPM_STM32_HSEM Kconfig definition so that it picks the correct
default automatically depending on which cpu node is enabled in the
device tree, rather than relying on board specific Kconfig overrides.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
This changes pci_msi_enable() to take IRQ number as a function
parameter. The old behavior relies on putting the IRQ number
into the interrupt line register in the PCI config space
during IRQ allocation, and reading it back when enabling IRQ.
However, the interrupt line register is only required to be
read-/writable when legacy interrupt is supported on the device.
Otherwise it has undefined behavior. On ACRN, they don't even
care about this register and always wires it to 0x00.
So this commit changes the behavior in pci_msi_enable() to not
require reading back the interrupt line register and instead
takes the IRQ number via function parameter.
Fixes#36765
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
by including interrupt allocation feature whenever an Xtensa-based
Espressif SoC is selected.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
to make use of Espressif's hal in order to ease both
driver maintenance and code reuse between socs.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
In the dma.h there is a dma_ctx structure using a magic code
to be identify. This structure must be prepared as a new
element of the dma_stm32_data.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This fixes/improves the rounding errors that are introduced
through the truncation of integer division.
Signed-off-by: Leonard Pollak <leonardp@tr-host.de>
This commit removes PHY and MDIO specific code from the ATSAM
Ethernet driver and instead relies on a separate PHY driver to
handle the PHY.
Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
This commit adds support for Ethernet PHY drivers via a PHY API.
It also includes a driver for a generic MII compliant PHY
which supports most PHYs on the market.
Separating PHY driver from the SoC specific Ethernet driver
simplifies the Ethernet driver code and enables code re-use.
Drivers for specific PHYs with more advanced features, such as
RGMII delay in PHY can be developed independent of the Ethernet
MAC driver.
Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
Some GPIO related calls were not being checked for error.
This patch also fixes coverity issue 236651.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some GPIO related functions were not being checked for errors.
This patch fixes coverity issue 236653.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some GPIO related calls were not being checked for errors.
This patch fixes coverity issue 236650.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
gpio_add_callback was not being error-checked. Some other minor cleanups
(rc var to the top, remove redundant log).
This patch fixes coverity issue 236649.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some GPIO related calls were not being checked for error.
This patch fixes coverity issue 236648.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some GPIO related calls were not being checked for error.
This patch fixes coverity issue 236647.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Fix the formula used to compute RH/ticks formula according to the Table
9 of the datasheet.
This patch also fixes coverity issue 238360.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Fix the formula that computes T/ticks according to the details found on
Table 9 of the datasheet.
This patch fixes coverity issue 238343.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
I2S direction was not checked correctly in the i2s_nrfx_configure
function.
This patch also fixes coverity issue 238365.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add Digital-to-Analog Converter driver (based on DACC module) for Atmel
SAM MCU family. Only SAME70, SAMV71 series devices are supported in
this version.
Tested on Atmel SMART SAM E70 Xplained board.
Origin: Original
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Add sam4l full finite state machine based on Atmel Software Framework.
This allows driver detect protocol errors and sync all requests. This
version is compliance with Linux USB tests.
Note: Tests are timing sensitive and log may affect results.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The RISC-V Platform-Level Interrupt Controller (PLIC) was moved from the
RISC-V Privileged Specification v1.11 to a separate specification
(see https://github.com/riscv/riscv-plic-spec).
Reflect this by not automatically enabling the PLIC interrupt controller
driver for all RISC-V privileged SoCs, but only for SoCs with the
CONFIG_RISCV_HAS_PLIC Kconfig option enabled.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Follow up on commit bfd45e5b8c
("drivers: remove Kconfig option CONFIG_UART_CONSOLE_ON_DEV_NAME")
Remove Kconfig options
CONFIG_BT_UART_ON_DEV_NAME and CONFIG_BT_MONITOR_ON_DEV_NAME
since all UART drivers are converted to devicetree and we can just use
DEVICE_DT_GET(DT_CHOSEN(zephyr_bt_uart)) and
DEVICE_DT_GET(DT_CHOSEN(zephyr_bt_mon_uart)).
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Microchip MEC172x series I2C driver implementing controller
and target modes. The driver implemenents its own I2C port
pin control functions and does not depended upon pinmux. Future
updates will make use of PINCTRL when that subystem is finalized.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
After update of stm32 cube l1 V1.10.3,
SPI_CR2_FRF doesn't exist for all stm32L1 MCU,
thus LL_SPI_SetStandard() is also not defined for all stm32l1 MCU.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
This adds basic support for the Silabs Si7210 hall effect magnetic
position and temperature sensor. It is able to get magnetic field and
temperature in the default scale of the sensor (depending on the
variant). It also supports going into sleep mode without measurements
through the device power management infrastructure.
It is most notably missing support for scale change, measurement
averaging and filtering, and alert pin configuration (threshold,
hysteris, tamper).
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
the correct value is returned when using sensor channel get function to
read z-axis value
Signed-off-by: Vojislav Milivojevic <milivojevicvoja@yahoo.com>
Reduce interval of warning timer, so we can print more
warning messages (ex. MEPC, task ID...) before watchdog reset.
Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
We add disable event timer at the beginning of critical section
for two reason:
1.For K_TICKS_FOREVER case: since no future timer interrupts
are expected or required, so we disable the event timer.
2.Others case: according it81202 spec, when timer enable bit
from 0->1, the timer will reload counts and start countdown.
Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
On STM32WL, HSE clock can take 2 specific options:
-hse-tcxo
-hse-div2
Enable support for these options.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The conversion to devicetree seems to be half lost
for this driver. There are already bindings and nodes for
compatible "altr,jtag-uart", update driver to use it.
Remove last mention of CONFIG_UART_CONSOLE_ON_DEV_NAME.
Resolves#37207
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Remove CONFIG_UART_MCUMGR_ON_DEV_NAME and use
DEVICE_DT_GET(DT_CHOSEN(zephyr_uart_mcumgr)).
Add usb.overlay, which contains chosen node and cdc-acm-uart node,
to smp_svr sample.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Remove device_get_binding(CONFIG_UART_CONSOLE_ON_DEV_NAME)
and use DEVICE_DT_GET(DT_CHOSEN(zephyr_console)) to get
chosen "zephyr,console" node.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This adds support for the TI INA219 Zero-Drift, Bidirectional
Current/Power Monitor with I2C Interface
Signed-off-by: Leonard Pollak <leonardp@tr-host.de>
bugfix: NULL termination is required by
dns_resolve_reconfigure API so null terminate the DNS
server list.
Fix checkpatch warning.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Include sys/atomic.h instead of sys/atomic_builtin.h, so that build for
platforms with non-default atomic implementation will still succeed.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
net_buf_skipcrlf() will remove all \r\n characters from the buffer.
If the data after CONNECT\r\n contained \r or \n it would
be removed, resulting in dropped data.
Fix this to only remove two bytes to ensure data is not dropped.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Change socket RX trailer (EOF) missing to warning and
keep socket RX data instead of discarding.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
So far pcie_get_mbar() has been the only way to retrieve a MBAR. But
it's logic does not fit all uses cases as we will see further.
The meaning of its parameter "index" is not about BAR index but about
a valid Base Address count instead. It's an arbitrary way to index
MBARs unrelated to the actual BAR index.
While this has proven to be just the function we needed so far, this has
not been the case for MSI-X, which one (through BIR info) needs to
access the BAR by their actual index. Same as ivshmem in fact, though
that one did not generate any bug since it never has IO BARs nor 64bits
BARs (so far?).
So:
- renaming existing pcie_get_mbar() to pcie_probe_mbar(), which is a
more relevant name as it indeed probes the BARs to find the nth valid
one.
- Introducing a new pcie_get_mbar() which this time really asks for the
BAR index.
- Applying the change where relevant. So all use pcie_probe_mbar() now
but MSI-X and ivshmem.
Fixes#37444
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This is the configuration of the stm32h723 where the
dma1 & dma2 of type V1 with a MUX. Even if DMA is of type V1,
the 'feature' does not exist with DMAMUX
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The RT1170 platform adjusted the result parameter in the callback
function to be a uint64_t. The adjustment is to conditionally change
the callback definition and then cast the result value to a size that
fits the reported values across the various SOCs.
With error results, cast result to uint64_t and modified the called
function to print a uint64_t value.
With the RX/TX status, result is a MB value that doesn't exceed 64
so the result value is cast down to a uint32_t.
Fixes#37691
Signed-off-by: David Leach <david.leach@nxp.com>
1. Add support for NXP LPC USB controller
2. Do not check the return value from the
kUSB_DeviceControlRun command as not all SDK drivers
return a value
3. Use the kUSB_DeviceControlPreSetDeviceAddress
command to set device address
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Enable PWR clock unconditionally for L4, L5 and U5
like it is done on other stm32 series
Fixes#37781
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
The delay will ensure last byte has been latched in before
This also change the method of reading status register from re-send
read status command on each read to read status register continuously.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
When there is no grove sensor driver enabled, cmake warns
that the library has no sources. Fix that by adding
a new kconfig to be used by CMake to selectively
include the grove directory.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
When there is no sensor driver enabled, cmake warns that
the library has no sources. Fix that by wrapping cmake
library instructions inside kconfig.
Fixes#37765
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
When there is no console driver enabled, cmake warns that
the library has no sources. So only include the console
directory when CONFIG_CONSOLE is enabled.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Detect failed transmissions using `lora_send` by only waiting for some
multiple of the actual on-air time before giving up.
We use this instead of the inbuilt TxTimeout functionality because the
value of this timeout is set by `lora_configure`, and therefore doesn't
change with different packet lengths. This is a limitation of the
underlying `RadioSend` function, not the Zephyr driver.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Change the behaviour of `lora_send` to block until the transmission
completes. The current asynchronous behaviour is exposed through the
new function `lora_send_async`. This naming convention brings LoRa in
line with other asynchronous subsystems.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
1. Do not throw an error when FSL_FEATURE_USDHC_HAS_HS400_MODE
is defined
2. Add support for the case when the card detect is handled
by the USDHC module
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The original NIOS-II developer and former vendor is Altera, which is
now part of Intel. Let's not add a new vendor prefix for something
that already exists and has been acquired; move it to use the existing
'altr,' prefix instead.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Rename:
- grove,light to seeed,grove-light
- grove,temperature to seeed,grove-temperature
The "grove" brand applies to a family of products by Seeed (sic):
https://www.seeedstudio.com/category/Grove-c-1003.html
Therefore we should use the existing vendor seeed.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
I can't find any reference anywhere showing that the manufacturer of
the LPD8803 or LPD8806 LED scripts is a company called 'colorway'.
Use 'greeled' instead; these seem to actually be manufactured by
GreeLed corporation.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
It should be "maxim,max30101", because the vendor prefix for this
company is "maxim", not "max".
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
It should be "u-blox,sara-r4", because the vendor prefix for this
company is "u-blox", not "ublox".
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
This PR will change accessing the related pinctrl macro from soc_dt.h
And the pinctrl of SCL and SDA were got from pinctrl-0 and pinctrl-1,
respectively. Change it to get from pinctrl-0 only.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
This adds the driver for Omnivision OV2640 image sensor.
The driver provides support for 10 different resolutions in range from
160x120 to 1600x1200 in both JPEG and RGB565 pixel formats. There are
also mutliple configuration options, e.g. hflip, vflip, saturation and
brightness control.
Signed-off-by: Robert Szczepanski <rszczepanski@antmicro.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Also sort the entries alphabetically.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Some display drivers may actually be initialized after LittlevGL
as those drivers and LittlevGL's lvgl_init() all have SYS_INIT()
at APPLICATION and init priority the same as application init
priority. Depending on how the final binary is linked, these
drivers may initialize after lvgl_init() resulting in it not
able to find a display driver. This changes the value of
CONFIG_DISPLAY_INIT_PRIORITY so that the display drivers that
make use of this kconfig are initialized a bit earlier to
ensure that they are actually initialized before lvgl_init().
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Note that the include to subsys has been moved from
under the drivers into subsys, as it is actually
the subsystem's job to make sure the include
directories are correct.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a, simply
build a separate static library for the top level of sensor
drivers. Also, for those that were not building its own
static library, make them do so as majority of sensor
drivers are building their own static libraries.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Note that the include to subsys/bluetooth has been
moved from under drivers/bluetooth to subsys/bluetooth,
as it is actually the subsystem's job to make sure
the include directories are correct.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting the object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This changes the build command so the I2C EEPROM slave
is being grouped into the I2C static library.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Also sort the entries alphabetically.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This changes the init priority of native posix console to 99.
When building for native_posix, it is usually assumed that
the output would be stdout. With old priority at 60, UART
console, for example, can be initialized later which means
printk() would not go to stdout. So changing the native posix
console to be (hopefully) initialized last.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Also sort the entries alphabetically.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Instead of putting object files inside libzephyr.a,
simply build a separate static library as most other
driver types are doing this already.
Also sort the entries alphabetically.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The STM32_DMA_SLOT macro from include/drivers/dma/dma_stm32.h
must be used here, especially for dma of type v2bis.
In this case, the dma-cell is not defined and slot is null.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The log level was always set to debug. Defining BT_DBG_ENABLED same
as for other bluetooth files allows to switch off debug log messages.
Signed-off-by: Martin Jäger <martin@libre.solar>
The current code uses dev->data for finding back the instance data
structure in various places, but for the dio1 irq callback, dev refers
to the GPIO device node (not the LORA radio one), so dev->data returns a
pointer to the GPIO data rather than a "struct sx126x_data".
Fix that by using CONTAINER_OF to find back the correct structure from
the callback pointer.
The bug was introduced in:
74efaa920a drivers: sx126x: refactor few functions for stm32wl support
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
LOG_INF: It's meant to write generic user oriented messages.
LOG_DBG: It's meant to write developer oriented information.
use LOG_DBG instead of LOG_INF to hide debug message.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
Updating to the SDK 2.10.0 for select platforms.
west.yml:
- Update to point to the NXP HAL update with SDK 2.10.0 files
- modules/tee/tfm needed to be updated to synchronize the
LPCXPRESSO55S69 platform SDK to version 2.10.0 to be in sync
with Zephyr usage of SDK 2.10.0
drivers/counter/counter_mcux_pit.c:
- underlying SDK 2.10.0 adjusted the setting by -1 so need
to adjust the reported value set by +1
drivers/ethernet/eth_mcux.c:
- SDK2.10 ethernet driver provided an assert test that highlighted
we were using the wrong clock source on various platforms.
drivers/memc/memc_mcux_flexspi.c:
- SDK2.10 added compile time conditional on whether a field was
defined for the flexspi configuration structure.
Signed-off-by: David Leach <david.leach@nxp.com>
Max SPI chunk len was missing from the
implementation, causing SPI to hang up in some
conditions.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
add flow_ctrl filed and give it initialized value
based on hw_flow_control.
Initialize mcux lpuart based on flow_ctrl
Signed-off-by: Mark Wang <yichang.wang@nxp.com>
This introduces a new kconfig CONFIG_DISPLAY_INIT_PRIORITY
to specify the initialization priority for display devices.
Most of the display devices are using APPLICATION and
CONFIG_APPLICATION_INIT_PRIORITY which is not entirely
appropriate for devices. Due to linking order, the display
device may be initialized after application code at same
init level and priority. This results in the display device
not ready to be used for application code. So this kconfig
option allows the display devices to be initialized earlier
if needed.
For the drivers using CONFIG_APPLICATION_INIT_PRIORITY,
they have been changed to use CONFIG_DISPLAY_INIT_PRIORITY
instead.
Note that the default value for CONFIG_DISPLAY_INIT_PRIORITY
is the same as CONFIG_APPLICATION_INIT_PRIORITY at 90 to
avoid any functional changes.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add ADC driver version 2 for MEC172x using new in-tree headers
and device tree properties. Update the ADC shell for the new driver.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Add config macro to set interrupt as level triggered for ARM CPUs
Merge all timer configures into one place, then no need to overwrite
hpet_timer_conf_get/set() functions in SoC layer
Make hpet_timer_comparator_set() as the only register access function
to implemented in the SoC layer
Signed-off-by: Dong Wang <dong.d.wang@intel.com>
According to Atmel SAM datasheet when writing data to the latch buffer
"32-bit words must be written continuously, in either ascending or
descending order. Writing the latch buffer in a random order is not
permitted." To enforce the requirement we need to call a memory barrier
instruction after copying every word of data to the latch buffer. In
the absensce of __DSB() call the ARM processor is free to change order
of AHB transfers. This has caused the driver to occasionally corrupt
data programmed in the flash.
Fixes#37515
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
When enabling MSI & MSI-X, the code seemed to handle fallback to MSI
when MSI-X is not available, but the logic uses MSI-X even if not
available and the MSI path never gets used.
Fixes: a2491b321e ("drivers/pcie: Add support for MSI-X")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
When building on non-X86 platforms K_MEM_PERM_RW gets undefined.
Fixes: a2491b321e ("drivers/pcie: Add support for MSI-X")
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Convert ws2812 LED strip driver to `spi_dt_spec`. Also moves the init
function implementation outside the declaration macro.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Convert the at2x eeprom driver to `spi_dt_spec` and `i2c_dt_spec`.
I2C functions are not fully converted due to the non-standard addressing
scheme.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Microchip XEC has been using the standard NS16550 driver.
Using the standard NS16550 driver requires extra HW programming
for XEC UART in board level and did not support XEC GIRQ interrupt
programming. We add an XEC specific driver and remove UART specific
register programming from the board level and implement interrupt
support. Also, by implementing a SoC specific driver we can add
driver PM in the future.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
based on uart rom functions, also enable console driver
on top of this driver, which enables logging
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
Add optional support for the DRDY/INT pin. This avoids waiting a fixed
time for the temperature and humidity conversion to finish.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Soft-reset the TI HDC20XX sensor during init to bring all registers in a
known and consistent state.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The temperature and humidity samples are 16 bits long and can therefore
fit in a uint16_t variable. This save 4 bytes of RAM.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Some STM32 SOC, like stm32h745 and stm32h747 doesn't have IPCC.
Provide a STM32 HSEM based ipm driver for these SOC.
Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
Make the `lora_recv` operation thread safe by copying memory directly
in the callback instead of deferring copying to the original caller.
To ensure pointer validity, this requires performing operations "inside"
the `modem_release` context.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Ensure that the modem is not asked to perform new operations before the
previous operation completes.
An atomic variable is used instead of a mutex as multiple threads need
to release the lock. A semaphore isn't used as there is no indication
whether `k_sem_give` gives the semaphore or not, which is required to
determine if `Radio.Sleep()` should be run.
`Radio.Sleep()` is only ever run by the context that successfully
releases the modem usage, to guard against double calls.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Transition the receive synchronisation method from a single driver
semaphore to a function specific k_poll_signal. This is required to
allow the modem to be released without introducing race conditions on
the signalling mechanism.
Without this change, the RX can either be signalled before the modem is
released, unblocking the calling thread before the modem is put back to
sleep, or after the modem is released, in which case a second thread
could start using the semaphore before the original thread is signalled.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
If no packet was received in the provided timeout, manually transition
to sleep mode. If a packet was received, the rx_done callback
automatically transitions the modem to sleep.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Fixes issue 34879
This PR updates previous PR's 37138 and 37139.
Refer to issue 34879 for information from MCHP HW
designers. A delay after enabling interrupts is a
more appropriate work-around than depending upon
behavior of ARM DMB instruction.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
RT platforms that support TRNG IP (rt10xx and rt6xx) need to set
RNG and CSRNG to Xoroshiro and CTR_DRBG respectively instead of
using TRNG as random source.
Fixes: #37307
Signed-off-by: David Leach <david.leach@nxp.com>
This is a follow-up to commit 3656ba5ae9.
Do not enforce pull-up resistors to be enabled on RXD and CTS pins
in nRF UART drivers, as in certain hardware designs this may be
undesirable or may even make certain hardware not working.
Instead, provide devicetree properties that allow enabling of those
resistors when it is actually needed.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Driver's RX thread can wait some time before a free buffer is available.
When resources are limited we can easily run out of them.
Fixes#36891.
Signed-off-by: Jan Pohanka <xhpohanka@gmail.com>
Extended driver configuration in device tree to enable ZLI interrupt.
When zli is set in the device tree then event handlers for alarm and
top is called in ZLI interrupt context. It means that kernel primitives
cannot be used there.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Extended driver configuration in device tree to enable ZLI interrupt.
When zli is set in the device tree then event handlers for alarm and
top is called in ZLI interrupt context. It means that kernel primitives
cannot be used there.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Before entering initialization mode, we left sleep mode, then request
to leave again sleep mode before returning from can_stm32_init() is
useless.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Disabling the time-triggered communication mode (TTCM) is done twice in
the setting of the master control register (MCR). So, let's remove the
second.
Signed-off-by: Dario Binacchi <dariobin@libero.it>
The driver only support use case where the channels are used in mutual
exclusion.
Origin: Original
Signed-off-by: Guillaume Lager <g.lager@innoseis.com>
Fix for issue 34879.
Microchip MEC GPIO hardware can trigger a spurious interrupt when
interrupt detection is set to edge mode especially falling edge mode.
Clearing the status immediately after enabling interrupt detection does
not work because the hardware takes a small number of AHB clocks to
set the status. After interrupt detection enable we use an ARM data
memory barrier to insure the write completes before clearing spurious
status and enabling the interrupt in the GIRQ.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Deprecate the xoroshiro128+ PRNG algorithm in favour of xoshiro128++.
xoshiro128++ is a drop-in replacement which is invisible from the user
perspective.
xoroshiro128+ is unsuitable because it is explicitly a floating-point
PRNG, not a general-purpose PRNG. This means that the lower 4 bits of
the output are actually linear, not random (from the designers,
https://prng.di.unimi.it/). This means 1/8th of the generated data is
not random.
Additionally, xoroshiro128+ is not a 32bit algorithm, it operates on
64bit numbers. For the vast majority of Zephyr devices, this makes the
PRNG slower than it needs to be. The replacement (xoshiro128++) is
32bit, with no loss in state space (still 128 bit).
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
This commit adds flash driver in non-secure mode for stm32l5x
series with icache enabled. This commit also adds a flash
programming error status check applicable for all platforms
except stm32f1 series.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
Instead of passing target states, use actions for device PM control.
Actions represent better the meaning of the callback argument.
Furthermore, they are more future proof as they can be suitable for
other PM actions that have no direct mapping to a state. If we compare
with Linux, we could have a multi-stage suspend/resume. Such scenario
would not have a good mapping when using target states.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
According to the documentation the OFF state has to be used when the
devices is fully turned off, ie, power removed. Most drivers were using
a sort of fall-through for all non-active states, leading to behaviors
not following the specifications.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Return -ENOTSUP if the requested state is not supported
- Remove redundant "noop style" functions.
- Use switch everywhere to handle requested state (not necessary in all
drivers, but better take off with consistency in place after current
changes).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The verb tense for the suspended state was not consistent with other
states. The likely reason: state was being used as a command/action.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The difference between low power and suspend states is a thin blur line
that is is not clear and most drivers have used indistinctly. This patch
converges to the usage of the suspend state for low power, since
contrary to the low power state, it is used by both system and runtime
device PM. The low power state is still kept, but its future is unclear
and needs some discussion.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some devices are using PM_DEVICE_STATE_FORCE_SUSPEND as a sort of low
power state, something that is not correct. In fact, this state is not
an actual state and will be eventually moved, if found necessary, to an
action or command.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The device PM control function will only be called if the requested
state is different from the current one. A significant amount of drivers
were checking for state changes, now unnecessary. This patch removes all
this redundant logic.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Since the state is no longer modified by the device PM callback, just
use the state value.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The callback is now invoked to set the device PM state in all cases, so
the usage of ctrl_command is redundant.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The device PM subsystem already holds the device state, so there is no
need to keep duplicates inside the device. The pm_device_state_get has
been refactored to just return the device state. Note that this is still
not safe, but the same applied to the previous implementation. This
problem will be addressed later.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Update the Microchip XEC pinmux driver to use system I/O
routine for read/write of registers instead of direct use
of volatile and CMSIS defines. Add GPIO port number to
bindings instead of using hard coded value from chip headers.
Modify SoC DTSI pinmux syntax, requires "pinmux: pinumx {..."
or the DT macros will not work. Since pinmux is used by MEC152x
we update its chip pinmux DT.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Add support for TI TLC59108 an I2C 8-bit LED driver.
Supported blinkink period: 41ms to 10730ms
Supported brightness value: 0 to 100%
This driver supports the following APIs:
1. led_blink
2. led_set_brightness
3. led_on
4. led_off
This is a modified version of the NXP PCA9633 driver.
Signed-off-by: John Kjellberg <kjellberg.john@gmail.com>
The USB configuration option is actually a global switch
to enable USB drivers in general, but currently only
the device controller drivers are meant.
USB device controller drivers also have USB_DEVICE_DRIVER option.
Thus the option USB is actually redundant and can be replaced
by the self-explanatory option USB_DEVICE_DRIVER.
The name USB itself is not unique and should not be used as an
configuration option.
With these changes the option USB_DEVICE_DRIVER generally
enables USB device controller drivers. The option USB_DEVICE_STACK
enables USB device support. It is sufficient to enable only option
USB_DEVICE_STACK because it selects USB_DEVICE_DRIVER.
CONFIG_USB Kconfig option is temporary added to subsys/usb/Kconfig.
This is necessary to pass CI and will be removed again
when the USB configuration has been adapted in modules.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
based on uart rom functions, also enable console driver
on top if this driver enabling logging
Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
The LL_ADC_ConfigOverSamplingRatioShift function for
the stm32H7xx soc serie differs from other for the 'ratio':
"This parameter can be in the range from 1 to 1024"
Note that in the stm32h7xx_ll_adc.c the LL_ADC_OVS_RATIO_xxx value is
defined for ADC of type ADC_VER_V5_V90.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Use macros and types from usb/usb_ch9.h header where it
is possible. This patch also adds local macros, USB_REQTYPE_GET_DIR
and USB_REQTYPE_GET_TYPE, which is an intermediate solution and
these will be removed later.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add watchdog support to the mimxrt685 platform.
The mimxrt685 platform is excluded from the watchdog
test case because the test case uses variables in the
noinit section that need to be retained through a reset
but the rt685 does not retain this memory through a
reset.
Signed-off-by: David Leach <david.leach@nxp.com>
When building tests/drivers/build_all/modem on native_posix_64 we get:
modem_cmd_handler.c:545:9: error: ret may be used
uninitialized in this function
[-Werror=maybe-uninitialized]
Fix by adding simple initialization of ret = 0 at start of function.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The Texas Instruments TCA9538 is an 8 pin GPIO port expander.
It operates on an I2C bus with 2 configurable address pins. The
device has an interrupt output pin that is asserted when any pin
configured as an input changes state.
Added under the PCA953X name to allow other similar parts to
use the same driver.
Signed-off-by: Kieran Mackey <kieran.mackey@lairdconnect.com>
After powering-on the sensor, and before every measurement, it loads
the NMV. We must wait until this process is completed otherwise
we will read weird values.
Since it was observed that the time may be a bit long after a cold
start, it is more convinient to just wait until the sensor iready,
without a timout.
Signed-off-by: Efrain Calderon <efrain.calderon@aquarobur.com>
To ensure that we have the same behaviour with a power cycle
and by pressing the reset button, we can perform soft reset
in `bme280_chip_init()`.
Signed-off-by: Efrain Calderon <efrain.calderon@aquarobur.com>
Microchip MCP7940N is a Real-Time Clock/Calendar. It operates on a I2C
bus. It can be used to set a calendar time and has two alarm channels.
When an alarm is asserted the state of the MPF pin of the MCP7940N will
change (depending on gpio active high/active low setting) to trigger an
interrupt.
Signed-off-by: Kieran Mackey <kieran.mackey@lairdconnect.com>
Add Atmel sam0 sercom[uart] pinctrl bindings and implements pinctrl at
driver level. It changes all sam0 boards to use new feature and remove
pinmux driver dependency for sercom[uart]. The samples that require a
binding were update to keep consistency and avoid errors.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Introduce soc_port common functions. The sam0 pinmux driver was
refactored to use soc_port_pinmux_set common function.
This create the common base to implement sam0 pinctrl functions.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Busy check APIs now return boolean type. Due to that change, the
function names have also been adjusted. The common name pattern for
boolean check type APIs is "PREFIX_is_CONDITION". For example,
"pm_device_is_busy". pm_device_busy_check has been renamed to
pm_device_is_busy and pm_device_any_busy_check to pm_device_is_any_busy.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The following device busy APIs:
- device_busy_set()
- device_busy_clear()
- device_busy_check()
- device_any_busy_check()
were used for device PM, so they have been moved to the pm subsystem.
This means they are now prefixed with `pm_` and are defined in
`pm/device.h`.
If device PM is not enabled dummy functions are now provided that do
nothing or return `-ENOSYS`, meaning that the functionality is not
available.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
TI recently released a new version of the HDC2080 datasheet, which
slightly update the temperature conversion formula, with a temperature
offset of -40.5°C instead of -40°C. Adjust the code accordingly.
In addition the datasheet also describes a voltage dependent
compensation of -0.08°C/V above 1.8V, however it's not something easily
doable with the current sensor framework, so just ignore that part.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Microchip HAL update used by MEC152x projects with eSPI
definition changes. Remove hack from XEC ESPI driver since
the missing symbol is in the HAL.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
The STM32 G0, G4, H7, L0, L4, WB and WL series have hardware support for
oversampling. This patch adds support for it, using the oversampling
value provided in the adc sequence. The result is shifted right
accordingly to not change the resolution of the measured value, like it
is done on other ADC drivers.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Driver does not correctly take ic out from sleep mode on init.
Added logic to update mode register on init to take the leddriver
out from sleep mode.
See datasheet for register details.
Fixes#37180
Signed-off-by: Daniel N. Hansten <dnh2000@gmail.com>
Add clock_control driver to stm32u5 support.
For this series, now deprecated STM32 clock Kconfig symbols
are not added.
Due to a divergence in MSI clock definition, PLL1 use
instead of PLL and lack of sufficient abstraction abstraction
for these a dedicated file has been added.
This should be reshuffled:
- once a better abstraction is provided by LL API for these
- when some stm32 clock control driver rework will be done
after complete removal of Kconfig STM32 clock symbols.
Tested in MSI, HSI, PLL based HSI and PLL based MSI.
Not tested on HSE due to lack of compatible hardware.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Fixed the following assertion causing by high level functions
enable gpio interrupt at the same pin at least two times:
ASSERTION FAIL [!arch_irq_is_enabled(irq)]
@ ZEPHYR_BASE/arch/common/sw_isr_common.c:84 IRQ xxx is enabled
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
This is more or less the flow of AT+CIPSEND:
RX TX
-- --
AT+CIPSEND=<...>
OK
>
<data to be sent>
SEND OK / SEND FAIL
'sem_response' semaphore is released by receiving 'OK'. Then after
receiving '>' (which releases 'sem_tx_ready' semaphore) actual data is
sent. Waiting for 'SEND OK' or 'SEND FAIL' is implemented by waiting on
'sem_response' (the same as for 'OK'), which mean that resetting this
semaphore just after sending all data is racy.
Fix that race condition by resetting 'sem_response' just after receiving
'OK', so that neither 'SEND OK' nor 'SEND FAIL' will appear yet (they
will not be sent as long as we won't send whole payload).
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Sending AT+CIPSEND=<...> command results in following reply:
OK
>
modem_cmd_send_nolock() invocation was setting command handlers for '>',
but as 'OK' was received first, it was handled as a generic reply. After
receiving 'OK' this function was unsetting command handlers. Then
modem_cmd_handler_update_cmds() was called once again in order to
register '>' handler once again. There was a small period of time where
'>' was not being handled at all.
Fix that race condition by using just introduced modem_cmd_send_ext(),
which allows to leave commands handlers in place and get rid of race
condition where expected command could be missed.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
There are currently modem_cmd_send() and modem_cmd_send_nolock()
functions, each with slightly different behavior regarding acquiring (or
not) sem_tx_lock. Introduce a generic function that will allow caller to
select behavior using flags.
While at it, add possibility to disable setting and unsetting command
handlers. This will be useful in situations when there are multiple
replies expected one after the other coming as a response to single
command. This is the case for example with ESP-AT driver, which expects
following data as response to AT+CIPSEND command:
OK
>
where 'OK' is handled by static CMD_RESP (so releasing response
semaphore right away), while '>' is handled by dynamic
CMD_HANDLER (which is releasing another semaphore). Keeping command
handlers in place allows to receive '>' without race condition because
of small period of time where command handlers are not set.
Convert modem_cmd_send_nolock() and modem_cmd_send() to static inline
functions, as they are just a specific invocation of
modem_cmd_send_ext() function.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Add a shim that allows using the nrfx I2S driver via the Zephyr API.
Add also missing devicetree nodes representing the I2S peripherals
in the nRF52 Series SoCs.
Extend the "nordic,nrf-i2s" binding with a new property that allows
specifying the clock source to be used by the I2S peripheral (so that
it is possible to use HFXO for better accurracy of the peripheral clock
or, in the nRF53 Series SoCs, to use the dedicated audio oscillator).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Create version 2 of the MEC GPIO driver to support MEC172x to not
interfere with MEC152x. When the MEC172x ECIA interrupt aggregator
driver is ready, this driver will use ECIA for registering GPIO
interrupt callbacks instead of maintaining its own interrupt table.
Add V2 DT binding.
Add the Kconfig configuration settings for the MEC172x GPIO
V2 driver at the SoC and board level.
Add port id to DT allowing use of DT FOR EACH macro in the driver.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
This driver supports the TI INA230 and INA231 Bidirectional Current
and Power Monitors. The devices work on the I2C interface and are
created from DT nodes with a compatible property matching "ti,ina23x".
The following datasheets were referenced while developing the driver:
https://www.ti.com/product/INA230https://www.ti.com/product/INA231
Twister passed:
twister -T tests/drivers/build_all/sensor/
Testing was performed on the stm32g071b_disco board with the following:
Load: ~170 ohms
Voltage: 5V
Measured Values:
Voltage: 5.1 V
Current: 0.032 A
Power: 0.157 W
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
Use `dma_reload()` instead of `dma_config()` within DMA callbacks. This
significantly shortens time required to reconfigure DMA engine to
transmit / receive the next data block and allows to configure higher
I2S bus data rates.
The maximum I2S data rate supported by the driver is still lower than
that of underlying hardware. To fully support hardware capabilities the
I2S driver would have to use scatter-gather / linked-list DMA transfer.
This is currently not supported by the DMA driver.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Update Microchip XEC RTOS timer driver adding MEC172x support and
using more device tree properities in the driver. We must also update
the XEC counter driver to use the new GIRQ DT properties.
Add new properties to RTOS timer and RTC timer YAML. These two timers
are linked due to option using a high speed timer for kernel busy wait.
Add Kconfig logic for XEC RTOS timer to MEC172x SoC.
Enable the Microchip XEC RTOS timer in the MEC172x evaluation board.
Add device tree nodes for most peripeherals.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
The KBC/ACPI event data is 4-byte in width and composed of
event/data/type fields. However, the field position is defined by each
chip vendor via macro and not unified in the current implementation.
The commit uses the structure bit field to define and unify the field
position. It helps the application access it with a common approach.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Change DSA API to use `net_if` directly to make API calls instead of
indirectly via `dsa_context` and `switch_id`.
Remove unused `switch_id`, `switch_enable_port`, and `dsa_get_context`.
Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
Changed slave interface initialization code to be more generic and less
dependent on a specific number of ports.
Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
Changed port numbers to start at zero since they're used as indexes
into various arrays in the code.
Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
In the eeprom read operation, when rambuf was available
mutex was not unlocked after the read. Consequence of that is
that device was blocked after that read for incoming operations.
This commit fixes the issue
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Add driver implementation and header files for a MEC172x
aggregated interrupt driver. Enable the parent(ECIA) node
to have the driver initialize interrupt hardware for use.
Enable child nodes for those GIRQs used for aggregation.
Refer to chip documention for the list of GIRQs restricted
to aggregation and those which support direct mode.
Add chip level device tree node for MEC172x EC interrupt
aggregator parent and GIRQ children. Each child node contains
a list of sources representing the source bit position in the
GIRQ registers.
Add DT bindings for ECIA and GIRQ nodes.
Add build file(s) and configuration items for the MEC172x ECIA
aggregated interrupt driver. Add and enable the MEC172x interrupt
driver on the MEC172x evaluation board(EVB). Enable parent node to
initialize ECIA hardware. Child nodes are left disabled until a
future driver needs them.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Add basic counter driver based on Timer Counter (TC) module for Atmel
SAM family.
Remarks:
- The driver is not thread safe.
- The driver does not implement guard periods.
- The driver does not guarantee that short relative alarm will trigger
the interrupt immediately and not after the full cycle / counter
overflow.
Tested on Atmel SMART SAM E70 Xplained board
Origin: Original
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Change naming of TC_CHANNEL to TcChannel in Tc struct to align with
a new convention used by samv71, samv71b series.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
According to the Reference Manual of several series(G0,L5,WL,WB,...)
RNG_DR register value should only be used if it is different from 0:
"Because when it is the case a seed error occurred between RNG_SR
polling and RND_DR output reading (rare event)."
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit introduces an automatic recovery procedure in cases an
entropy source error was detected.
- On Series with soft reset support a soft rest is executed.
- On Series w/o soft reset support the pipeline is cleared by reading
the RNG_DR 12 times.
With this changes the check for seed errors uses SEIS flag instead
of the SECS flag.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Interrupt polarity register don't support rising and
falling edge triggered at the same time, so I correct
logic operation to match this.
Signed-off-by: Ruibin Chang <ruibin.chang@ite.com.tw>
This commit adds crypto support for several series which have
the same/very similar or same AES IP.
This includes G0, G4, L5, WL.
WB is also very similar but, expects the app to load the key via CKS.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
z_smp_init() is only available if CONFIG_SMP is defined,
smp_timer_init() also depends on two Kconfig parameters. Also make it
conditional in cavs_timer.c. Also clarify some SMP-related comments
there.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
The irq will be enabled at the condition of start or repeat
start of I2C. If timeout occurs without being wake up during
suspend(ex: interrupt is not fired), the irq should be
disabled immediately.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Add support for power management and the shutdown mode for bq274xx fuel
gauge sensor. This now allows boards that have any kind of low power
mode to turn on or off the sensor.
Tested on a Company's custom board with bq27421 sensor on it.
Signed-off-by: Luka Lopotar <luka.lopotar@greyp.com>
The flag source_periph seems to be incorrectly set in dma_stm32.
In case the transfer direction is from periph to mem, then the
stream->source_periph is 1 (true) else it is false.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
All the macro for dma-cells are now in the
include/drivers/dma/dma_stm32.h header file.
So the include/dt-bindings/dma/stm32_dma.h is no more
useful and removed from #include.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The macro to set the element of the dma-cells for each peripheral
are defined in the dma_stm32 header file
and used in the periph driver (as dma client)
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This is the dma V2bis which is particular DMA V2 instance for
stm32F1 and STM32L1 soc series. This DMA does not use the dma slot
Otherwise it is similar to version V2.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Implement a clock control driver for Microchip MEC172x handling
configuring the 32 KHz input sources for the PLL and peripheral-32k
clock domains. MEC172x differs from MEC152x. MEC152x had one 32K source
for both PLL and peripherals. MEC172x allows the two domains to use
independent 32 KHz sources. Device tree updated to provide addresses
of hardware used by the driver.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
the macro STM32_LSE_CLOCK is always defined and therefore systems
without lse crystals hang on startup.
Used #if instead of #ifdef.
Signed-off-by: Alexander Wachter <alexander.wachter@leica-geosystems.com>
Because these two functions are called from threads and ISR.
And they run a bit-wise OR operation on the interrupt registers.
So protect them to prevent race condition between thread and ISR
context where causing an interrupt won't enable as expected.
eg.
- Pseudo code of thread enable IER1's bit1:
1. load word from IER1 (0x40) and write into CPU register S1
=> S1=0x40
2. Or S1's bit1
=> S1=0x42
(But if an interrupt is triggered here)
3. Store word to IER1 from S1
=> IER1=0x42
(IER1 will be 0x42 not 0x43, IER1's bit0 is disable again due to the
race condition above)
-Pseudo code of ISR enable IER1's bit0
1. load word from IER1 (0x40) write into CPU register S2
=> S2=0x40
2. Or S2's bit0
=> S2=0x41
3. Store word to IER1 from S2
=> IER1=0x41
4. Go back to thread.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
This commit adds a driver implementation for the LM75 I2C temperature
sensor.
Signed-off-by: Alexander Wachter <alexander.wachter@leica-geosystems.com>
reuse the lpc's lpadc driver for rt1170, modify the dts and add
some macro to shield some code of LPC series. Also add the
board support inside the tests/drivers/adc/adc_api/src/test_adc.c,
and a dts node:zephyr,user inside
samples/drivers/adc/boards/mimxrt1170_evk_cm7.overlay
Signed-off-by: Crist Xu <crist.xu@nxp.com>
This converts register access from macro to functions.
This allows SoCs to override these functions if needed.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This allows the HPET timer to use kconfig to specify clock
frequency instead of relying on calculation at runtime.
When the frequency is known at build, this allow the toolchain
to optimize some calculations.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This renames MIN_DELAY to HPET_CMP_MIN_DELAY, and also allows it
to be overridden. The default delay is for HPET with relative
high frequency, and may not suitable for all HPET
implementations.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This extracts the hard-coded value into a macro which can be
overridden. This is in preparation for SoCs where the period
is not in femptoseconds.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This patch states that the Everlight B1414 LED controller is compatible
with the Worldsemi WS2812. Some information about it is added to the
WS2812 DT binding and driver Kconfig files.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
Since this driver is working reliably, let's use k_usleep() instead of
k_busy_wait() (as suggested in a TODO comment) to latch and reset the
LED strip controller.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
Some devices compatibles with the WS2812 IC have a different reset/latch
delay.
This patch introduces the "reset-delay" optional property for the WS2812
DT binding and adds support to the ws2812_spi driver. This new property
allows to configure the reset/latch delay of a WS2812 compatible LED
strip controller from its DT node.
If omitted the driver uses 8 microseconds by default (which is good for
the WS2812 IC).
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
Some devices compatibles with the WS2812 IC have a different channel to
color mappings (e.g. RGB, BGR, RGBW, etc).
This patch introduces the "color-mapping" required property for the
WS2812 DT binding and adds support to the ws2812_gpio and ws2812_spi
drivers. This new property allows to configure the color to channel
mapping of a WS2812 compatible LED strip controller from its DT node.
Since this property also allows to know if a white channel is available,
then this patch removes the "has-white-channel" property.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
When DMA switches from one buffer to another ENDRX followed by
RXSTARTED is generated. Code flow assumes that ENDRX will be
handled before RXSTARTED but this may not be the case if there
is a short between ENDRX and RXSTARTED and event occurs after
ENDRX event check but before RXSTARTED event check. In that case,
RXSTARTED event is handled first. Such case may happen if there
is a higher priority interrupt that may preempt UARTE interrupt
handler.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Add a new property to the "nordic,nrf-clock" binding to allow
configuration of the HFCLKAUDIO frequency.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Refactors the mcux lpc driver to use DT_INST_FOREACH_STATUS_OKAY instead
of hardcoding each instance. Tested with samples/basic/button and
samples/basic/blinky on mimxrt685_evk_cm33.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
In certain build cases we get the following compiler warning:
i2c_rcar.c: In function 'i2c_rcar_transfer_msg':
i2c_rcar.c:168:6: warning: 'ret' may be used uninitialized in
this function [-Wmaybe-uninitialized]
Fix this by initializing ret to 0 at start of function.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit aligns the nRF5 ieee802154 driver with the latest
API changes necessary to handle security-related flags properly.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
RTC interrupt was reading CC value and passing it to the handler.
However, higher priority interrupt could preempt RTC interrupt
and set new CC value. In that case CC value read in the RTC
interrupt context was not the one that triggered the interrupt.
Added fallback to COUNTER value if that case is detected.
Using COUNTER is not as precise as CC because it returns time
when event was handled and not when event occured but it is the
only option since CC value is overwritten.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The zephyr sam gmac driver don't get register address and, in some
cases, peripheral id from devicetree. This replace headers constants
in favor of devicetree values.
This fix wrong Atmel SAME7x/SAMV7x gmac register address and add
missing peripheral id property for SAM family.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The current GMAC compatible not allow especialize properties by SoC
family. Split current generic Atmel GMAC compatible into two new
compatibles which are defined by SoC families. This increase the
freedom and avoid odd situations.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
A syscon device is a device managing a memory region containing a set of
registers that are not cohesive enough to represent as any specific type
of device. We need a driver for that because several other drivers could
use the same region at the same time and we need to io-map the region at
boot for MMU enabled platforms.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Assuming gpio devices are required by pinmux which is used
by any device make it a device that is initialized in preliminary
steps of platform init.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move GPIO devices clock handling in stm32_pin_configure function
which is also used in stm32_setup_pins.
Additionally, add device usability check to be sure gpio driver
was initialized before being used by pinmux pseudo driver.
Last, going from the assumption that GPIO devices should be
initialized before being used by pinmux, then there is no need
to enable clock in case CONFIG_PM_DEVICE_RUNTIME=n.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add support for the STM32WL integrated radio, based on the sx1262. The
STM32WL implementation does not use any GPIO, and the signals are routed
to other units of the SoC and accessed with the ST HAL.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Convert the standalone part of the sx126x driver to the new gpio_dt_spec
APIs. This allows moving the specific GPIOs in that part of the driver
and out of struct sx126x_data.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
This adds support for controlling the SUBGHZSPI NSS line in STM32WL
devices. This is a special dedicated SPI port only connected to the
radio device internally, chip select happens through a bit in the PWR
module. Adding a special dt-property to identify the port, it all gets
built out on non-WL devices.
Deduplicate the existing dts bindings in the process, and add the new
one for the special spi with the new property.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Current impĺementation fails due to missing stop bit
when reading data. This fixes it and refactor the implementation
by adding k_busy_wait when waiting I2C bus completion.
Also, this implementation is based on esp-idf v3.0.
It will be refactored based on latest esp-idf v4.3 using proper
low level calls.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Fixes#34015
The STMPE1600 is an I2C based GPIO expander. This initial patch
only supports reading from/writing to the pins on the STMPE1600,
and there is currently no support for interrupts.
Signed-off-by: Titouan Christophe <moiandme@gmail.com>
To be able to get a tokenize DT string without the quotes. Deprecate
also DT_ENUM_TOKEN and DT_ENUM_UPPER_TOKEN.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Fix a couple of issues related to Power Management:
1. A build error because 'dev' was used even if not declared
in the caller routine scope
2. The lis2mdl power management init specific routine was
not declared in in the device instance definition
Signed-off-by: Armando Visconti <armando.visconti@st.com>
So far modem API used UART device names / labels. Change API to operate
on device pointers instead, so that we stop using device_get_binding()
in modem core and in some DT compatible modem drivers.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
When stopping the interface, also abort the RX routine and enable RF
power saving. Will re-start RX on iface start.
Also fixed a bug with `cmd_fs` crashing at RF wakeup because `rf_mode`
was allocated on stack.
Signed-off-by: Stancu Florin <niflostancu@gmail.com>
CRC16 was removed by simply decreasing length of the last fragment by 2.
This worked as long as last fragment was longer than 1 byte. If not,
then last fragment was corrupted (its length ended up being 65535),
leading to undefined behavior.
Fix CRC16 removal by utilizing recently introduced
net_pkt_remove_tail(), that properly handles multiple fragments.
Reported-by: Jim Paris <jim@jim.sh>
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
If a write offset isn't a multiple of the nor page size, and the
length is too large to fit within a single page, it could wrap around
in that page.
Tested on i.MX RT1064 internal flash using NVS settings
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
replace custom crc8 with sys/crc8
use sys_put/sys_get helpers for byteorder specific operations
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Add driver for sensirion consumer humidity sensor line.
Supports shtc1 and shtc3, but only shtc3 is tested.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Instead of waiting forever for the SPI transfer to complete, let's use
a timeout value and bail out if elapsed. The timeout value logic is,
xfer_len/frequency + tolerance
Tolerance value can be modified using a Kconfig symbol,
CONFIG_SPI_COMPLETION_TIMEOUT_TOLERANCE. It defaults to 200ms.
Fixes: #33192
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Fix macro used in g4 file to enable LSE clock.
Then, to avoid no-op configurations, generate an error
when MSI Hardware auto calibration is selected but LSE
clock is not enabled.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This PR addresses radio signal stength measurement during
and before PPP session. The PR provides provides facility
of readout for both +CSQ and +CESQ versions depending
upon the modems. This PR follows the idea of rssi readout
of PR#35496. Additionally, reliable Cell info update
is also ensured.
Signed-off-by: Tahir Akram <mtahirbutt@hotmail.com>
This patch add support for I2C on the Renesas R-Car.
This I2C hardware block can be found on various Renesas R-Car
SoC series.
It allows to perfom read and write on I2C buses in an
interrupt based way on R-Car Gen3 H3ULCB board.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Add NXP Kinetis Low Power Timer (LPTMR) OS timer driver shim. Since the
LPTMR does not support asynchronous changes to the timer period, only
non-tickless mode is supported.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The config/data casts are not strictly necessary. Furthermore, config
was being casted to non-const.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Use the recently introduced struct gpio_dt_spec to store GPIO
information and operate with them.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This is called in ISR context and timeout must be set
to K_NO_WAIT.
Reported-by: Pieter De Gendt <pieter.degendt@basalte.be>
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This commit adds a serial dummy driver compatible to vnd,serial.
This is needed that devices can access the uart device in tests
like tests/drivers/build_all/... .
Add myself as codeowner to avoid complicance check failure.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Use GPIO output high and low to simulate I2C start and stop
conditions to restore i2c to normal.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Create the pinmux phandle to the I2C driver node in the
devicetree. When the pinmux_pin_set function in
i2c_it8xxx2_init can refer to the setting of this phandle.
It is more flexible to use.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
The SoC driver name is 'USB High-Speed Interface (USBHS)'. This rename
from usb_dc_sam to usb_dc_sam_usbhs allowing add others SoC drivers
like 'USB Device Port (UDP)' that is found at SAM4S/E variations.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Add single-register MMIO GPIO driver for complex cases where
only several fields in register belong to GPIO lines and each GPIO
line owns a field with different length and on/off value.
Such CREG GPIOs are used in Synopsys em_starterkit and HSDK boards.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
This commit add the support of "Interrupt driven UART"
to the R-Car UART driver and enable it in the related
Kconfig.
The driver is supporting nearly all the methods that are
described in the "Interrupt driven UART" part of the
uart_driver_api.
This new version of the driver has been tested on
H3ULCB board by running "uart_basic_api" test suite.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
This commit adds entropy support for stm32wl and stm32g0.
Pll is used as clock source and has to be enabled,
other clock sources are not supported at the moment.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
To support single core stm32wlex series, cpu2 prescaler is set
only on dual core soc variants.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The callback is not used anymore, so just delete it from the pm_control
callback signature.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
the device PM callback is not used anymore by the device PM subsystem,
so remove it from all drivers/tests using it.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Armv8-A and Armv8-R both support PSCI. So PM_CPU_OPS_PSCI's
dependency should be "ARM64" rather than "ARMV8-A".
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
There is a name clash when using G4 series LL TIM driver depending on
the inclusion order of the LL TIM and pinmux headers. If the LL headers
are included after pinmux is included, AF1 and AF2 definitions used by
pinmux clash with the AF1 and AF2 TIMx register names.
In order to solve this problem with minimum impact, the following has
been done:
1. Prefix the AFx and ANALOG definitions with STM32
2. In order to avoid changing all *-pinctrl.dtsi files, the STM32_PINMUX
macro contatenates STM32_ with the provided mode.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This commit adds a new Kconfig option CLOCK_CONTROL_NPCX_EXTERNAL_SRC.
With this option enabled, the internal 32.768 KHz clock (LFCLK) is
generated by the on-chip Crystal Oscillator (XTOSC). Otherwise, the
LFCLK is generated by the Low-Frequency Clock Generator (LFCG).
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
refactor flash_page_get_info to simplify and to avoid using mixing the
usage of an off_t (offs) and an uint32_t (page_index).
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
In stm32l5xx soc, the LL_DMA_InitTypeDef has 2 more fields
(DoubleBufferMode and TargetMemInDoubleBufferMode) that must be
initialised with 0 else the configuration is wrong and gives
wrong values to the LL_DMA_Init function. Due to this the test
tests/drivers/dma/loop_transfer too would fail.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
Fix some leftovers from the pm_device_state changes.
Fixes build problem introduced in
cc2f0e9c08.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
This change ensures the CPU won't get an interrupt number which is
being generated.
it8xxx2 has a limitation for interrupt vector register.
CPU may read incorrect interrupt number in ISR.
The following is an example that got incorrect interrupt number:
1. Register IVECT = 0x10. (no interrupt pending/IVECT_OFFSET_WITH_IRQ)
2. Chip INT6 interrupt occurs (IVECT = 0x16) and jump to ISR.
3. Read interrupt vector register to determine interrupt number.
4. Higher priority interrupt occurs (for example: INT158, IVECT = 0xAE)
while the CPU is reading the interrupt vector register for EC INT6,
CPU may end up with an incorrect interrupt number between 0x16 and 0xAE.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
__LL_RCC_CALC_HCLK1_FREQ is only available for WL and WB series,
for other series __LL_RCC_CALC_HCLK_FREQ should be used.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The nRF QSPI has a configurable delay from the rising
clock signal to the actual sample point measured in
clock cycles. This commit exposes that delay as a DTS
parameter without modifying existing behavior.
Signed-off-by: Abram Early <abram.early@gmail.com>
The definition of qspi_flash_get_parameters, that implements
the mandatory get_parameters API call for the driver, was incorrectly
placed within block conditionally compiled when
CONFIG_FLASH_PAGE_LAYOUT is defined.
The commit fixes the issue that was causing compilation error
when the config has not been set.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
This commit selects LL_RCC_RNG_CLKSOURCE_CLK48 as a clock source
to rng peripheral. LL_RCC_RNG_CLKSOURCE_CLK48 is CLK48 divided by 3.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
Add basic support for TI HDC20XX series (e.g. HDC2010, HDC2021, HDC2022,
HDC2080). It is able to get temperature and humidity in the default
14-bit resolution. Triggers, resolution selection, interrupt line, auto
measurement mode are currently not supported.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
For esp32c3 related ROM located functions instead
of esp32c3_rom.
Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
by adding the soc specific files such: soc initialization code,
linker scripts and support for esp32c3 devkitm
Signed-off-by: Felipe Neves <ryukokki.felipe@gmail.com>
Signed-off-by: Felipe Neves <felipe.neves@espressif.com>
hal_espressif repository was updated from esp-idf v4.2
to esp-idf v4.3 to allow latest Espressif chips integration.
As a consequence, it added a few changes in drivers
and peripherals. To maintain bisectability, changes in this
PR cannot be split. Here are some details:
wifi: update linker script by adding libphy and new attributes.
spi: update some APIs and fixed missing wait_idle check
west.yml: esp32: update hal to new version
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Move all PM_DEVICE_STATE_* definitions to an enum. The
PM_DEVICE_STATE_SET and PM_DEVICE_STATE_GET definitions have been kept
out of the enum since they do not represent any state. However, their
name has not been changed since they will be removed soon.
All drivers and tests have been adjusted accordingly.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
If stream socket is marked as pending close, make sure that send()
caller gets notified about it, so that application layer can decide to
stop trying to send anything more.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
So far send errors were silently ignored. This is okay for
UDP (datagram) sockets, as there is no guarantee that packets will
actually be sent successfully. In case of TCP (stream) stream sockets
however, application layer expects network stack to send requested data
as stream, without losing any part of it.
In case of send errors on stream sockets mark that socket to be closed
and stop sending any subsequent network packets, so that data stream
won't have any holes.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Fix for Issue#35658.
Update the custom vector table to add the OS Event timer
interrupt which is used on RT685 as the kernel system timer
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
This commit removes the huge if condition section and is
replaced with DT APIs to get the maximum erase time of a
stm32 flash from dtsi.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
Commit c045cbd336 added support for internal voltage reference source,
but in practice only the temp sensor is supported. Fix that.
Also change the code to keep the existing paths so that VREFINT and
TEMPSENSOR can be used at the same time.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Fix i2c emulated bus initialisation code to use children of specific i2c
bus DTS node instead of first i2c bus instance.
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
The patch fixes driver compile errors and ADC management for the f3x
series. It was developed and tested for the stm32f373 variant.
Tested-by: Dario Binacchi <dariobin@libero.it>
Signed-off-by: Dario Binacchi <dariobin@libero.it>
Add the lptim1 device node definition and enable the corresponding
exti interrupt in sys_clock_driver_init().
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Converts the spi_nor flash driver to use `spi_dt_spec` as a
demonstration of the simplifications that the API enables.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Replace device_get_binding() with DEVICE_DT_GET to obtain the PS/2
controller and clock control device objects. It helps to improve the
efficiency for driver initialization as DEVICE_DT_GET is processed
at the link time rather than run time.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
The PS/2 module in npcx provides a hardware accelerator mechanism
including an 8-bit shift register, a state machine, and control logic
that handle both the incoming and outgoing data. The hardware
accelerator mechanism is shared by 4 PS/2 channels. To support it,
this CL separates the PS/2 driver into channel and controller drivers.
The controller driver is in charge of the PS/2 transaction. The channel
driver is in charge of the connection between the Zehpyr PS/2 API
interface and controller driver.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Promote the "edac mem" shell subcommand to a generic "devmem" root shell
command. This command is useful for poking around registers and memory
outside of the EDAC drivers.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Using helper functions decreases function complexity numbers reported
by static code analyzers.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Check errors returned by edac_ecc_error_log_clear() and
edac_parity_error_log_clear().
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Refactor EDAC API making it more clear, removing unneeded typedefs and
using check for optional and assert for mandatory APIs.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
In drivers/sensor/CMakeLists.txt, we have various lines like this:
add_subdirectory_ifdef(CONFIG_FOO foo)
Then drivers/sensor/foo/CMakeLists.txt says:
zephyr_library()
zephyr_library_sources_ifdef(CONFIG_FOO foo.c)
This is redundant; the foo/CMakeLists.txt won't be added to the build
system unless CONFIG_FOO=y in the first place, so there's no need for
extra boilerplate testing it again.
Remove all these unnecessary instances in each sensor driver's
CMakeLists.txt using this pattern:
zephyr_library()
zephyr_library_sources(foo.c)
In a couple of places, the '.c' extension is missing. Add them in for
consistency when that happens.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
RXTO event is generated always after ENDRX and driver relies
on assumption that ENDRX event is handled before RXTO. However,
when interrupt is preempted after ENDRX check returned false
and RXTO event is already set handling order would be swapped.
Added addtional check to handle RXTO event only if ENDRX is not
set. If ENDRX is set, it means that it is not yet handled. RXTO
event is not cleared and interrupt will be triggered again and
ENDRX event will be handled first.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The lis2dw12 sensor can generate the TAP interrupt only on INT1,
while DRDY can be generated on both. The int-pin DT property
specifiy on which pin the DRDY (and not the TAP) can be generated.
This commit fix the way the trigger is set: first the driver checks
the trigger type (DRDY or TAP), then it uses the int-pin information
only in DRDY case but allows setting TAP regardless of int-pin (it
always routes it on INT1).
The previous code was first checking int-pin: if it was INT2 then
the driver refused setting TAP triggers.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This commit aligns lis2dw12 sensor driver to latest multi
instance sensor driver model.
In particular it makes use of the stmemsc common routines
and move ctx handler inside struct config, so that the
bus_init routines can be totally avoided.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Remove all odr values from Kconfig and always init it
at 12.5Hz. It is responsibility of application to set
the rate to a different value using SENSOR_ATTR_SAMPLING_FREQUENCY.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Move lis2dw12 trigger pulse configurations from Kconfigs to Device Tree.
Moreover the dts properties have been renamed as 'tap', which sounds a
better name to immediately catch the feature behind it. Since tap
threshold cannot be zero, this value (which is the default in dts
binding) is used to enable/disable the device feature per each axis.
The event can be generated on INT1 only.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Use gpio_dt_spec structure (and related APIs) in config for configuring
the gpio used for drdy and pulse interrupts.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Take the int-pin information (i.e. what pin between INT1
and INT2 the drdy is attached to) directly from DT.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Default the option MEMC_STM32 to "y" when the device node is defined and
enabled, so that the driver is selected automatically when the board
supports it and MEMC is enabled.
Remove the default conditional on serise as it's redundant with the one
in soc/arm/st_stm32/common/Kconfig.defconfig.series.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Add support for RT1170. The fuse register that holds
the unique device ID is different as compared to the
RT10XX series
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
UART CR_SIN interrupt enable/disable are invoked when CONFIG_PM enable.
This removes the guard for UART CR_SIN interrupt enable/disable to fix
the build issue.
Fixed#36520
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
bits property indicates the number of in-use slots of available slots
for GPIOS. We have a similar property ngpios in gpio-controller.yaml,
we will use ngpios to calculate port_pin_mask. Let's remove bits and
only use ngpios.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
Similar to #32218 and #34032
Flush ART cache before erase operation
(preparing ART activation)
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Similar to #32218 and #34032
Flush ART caches before erase operation
(preparing ART activation)
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
This implement the same flush cache functionality already present in the
other stm32 series flash drivers, used to avoid bus errors when writing
big chunks of data to the flash.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
The flash_stm32l4x driver seems to work out of the box on the WL series.
This just adds the necessary config changes to let the driver build and
run when SOC_SERIES_STM32WLX is selected.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
When the temperature is lower than 20C, adc_temperature is smaller than
(data->t_ref << 8), which should yield a negative value for dT. While dT
and adc_temperature are correctly declared as signed, the subtrahend is
wrongly casted to unsigned, yielding insanely high temperature values.
Fix that by casting it to int32_t instead of uint32_t.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This change has more detail about providing the I2C peripheral
device's address to help pinpoint any issues that are device
specific and not bus specific.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Use DEVICE_DT_GET instead of device_get_binding to obtain the controller
node, so that the device address gets resolved at link time.
This means we can move the pointer form the data to the config
structure, and get rid of the data structure and associated boilerplate
entirely.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert the various device_get_binding() calls used to get the device
clock node to use DEVICE_DT_GET. The latter is processed at link time,
so it should be a bit more efficient.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Instead of explicity ORing together the compatible drivers,
CAN_RX_TIMESTAMP now depends on CAN_HAS_RX_TIMESTAMP
which is selected by the drivers primary Kconfig option. In addition,
stm32fd does not need to select this option since it selected by
the underlying M_CAN driver.
Signed-off-by: Abram Early <abram.early@gmail.com>
The stm32_lptim driver is hardcoded to use lptim1.
Make the Kconfig option depend on the presence of the node label in the
devicetree, so that there's one less list of supported SoC to keep track
of.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
The NXP LPC syscon driver failed to build on several platforms for
various reasons. We need dts support on LPC55s1x and LPC55s2x, the
driver doesn't seem like it will work on LPC54114 so we exclude it
there for now.
Additionally, fix a dtc warning on LPC55s6x based on unit-address in
the node naming needing to be lowercase.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit clears current settings of the PWM perihperal
that are stored inside device structure.
This makes sure that PWM period and prescaler is configured
as expected after driver was suspended.
Signed-off-by: Radoslaw Koppel <radoslaw.koppel@nordicsemi.no>
NPCX WIMU CR_SIN is used to wake up soc from NPCX sleep power state.
The wake-up IRQ enabled when UART init. It causes the wake-up IRQ to
generate many extra interrupt events, which causes the system too busy
to handle other events. This PR moves the UART wake-up IRQ enabling
from UART init to npcx_power_enter_system_sleep() to avoid the
interrupt storm.
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
Add flash driver for it8xxx2. The driver can implement
flash read, write and erase that will be mapped to the
ram section for executing.
TEST="flash write 0x80000 0x10 0x20 0x30 0x40 ..."
"flash read 0x80000 0x100"
"flash erase 0x80000 0x1000"
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Add support for the Xilinx GEM Ethernet controller, which is integrated
in both the Xilinx Zynq and ZynqMP (UltraScale) SoC families. The driver
supports the management of a PHY attached to the respective GEM's MDIO
interface.
This driver was developed with ultimately the Zynq-7000 series in mind,
but at the time being, it is limited to use in conjunction with the
ZynqMP RPU (Cortex-R5) cores. The differences are minor when it comes
to the adjustment of the TX clock frequency derived from the current
link speed reported by the PHY, but for use in conjunction with the
Zynq-7000, some larger adjustments will have to be made when it comes
to the placement of the DMA memory area, as this involves the confi-
guration of the MMU in Cortex-A CPUs.
The driver was developed under the qemu_cortex_r5 target. The Marvell
88E1111 PHY simulated by QEMU is supported by the driver.
Limitations currently exist when it comes to timestamping or VLAN
support and other minor things. Those haven't been implemented yet,
although they are supported by the hardware. In order to be fully
supported by the ZynqMP APU, 64-bit DMA address descriptor format
support will be added.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
This CL introduces six properties, clock-frequency, core-prescaler,
apb1/2/3/4-prescaler in pcc (Power and Clock Controller) node to
configure clock settings. It also removed the original Kconfig options
used for the same purpose.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
In npcx series, we use ITIM64 as system kernel timer. Its source clock
frequency must equal to CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC. This CL
added check during initialization to prevent ambiguous condition.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Rename OSC_CLK as OFMCLK to meet npcx datasheet. The Oscillator
Frequency Multiplier Clock (OFMCLK), which is derived from
High-Frequency Clock Generator (HFCG), is the source clock of cortex-m4
core and most of NPCX hardware modules.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
it need to be a && between two condition, to satisfy
the comment: only 12 / 13 bit resolution is supported,
if FSL_FEATURE_LPADC_HAS_CMDL_MODE is not defined. not
using ||.
Signed-off-by: Crist Xu <crist.xu@nxp.com>
Since we are writing a register it makes more sense for the type
to be unsigned. This hopefully address a compile warning we get
with clang:
error: implicit conversion from 'int' to 'int16_t' (aka 'short')
changes value from 32768 to -32768 [-Werror,-Wconstant-conversion]
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
If CONFIG_ICM42605_TRIGGER is not set the driver doesn't build. There
are a few places that need ifdefs based on CONFIG_ICM42605_TRIGGER for
the driver to build correctly.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Configured UART/UARTE input pins to have pullups. Otherwise when
uart is disconnected pins are floating and generate receiver
errors.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The definition of the STM32_LSE_CLOCK is given by the
drivers/clock_control/stm32_clock_control.h
to the hci/ipm_stm32wb driver
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add multi-instance support to the MS5607 driver. This is needed to
easily add I2C support later. It also simplifies a bit the driver
initialisation by using more static values.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
axis1bit16 and axis3bit16 unions are no longer used
and can be deleted from all .h files that are referencing
them.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Align all sensor drivers that are using stmemsc (STdC) HAL i/f
to new APIs of stmemsc v2.00.
Requires https://github.com/zephyrproject-rtos/hal_st/pull/7
(merged as 575de9d461aa6f430cf62c58a053675377e700f3)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Reprocess keyscan event processing in case of an I2C bus read
error. Otherwise, the HT16K33 will be stuck (when used in IRQ mode, not
in polling mode) and no new IRQs will be delivered.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Convert the keyscan portion of the Holtek HT16K33 driver to adhere to
the kscan API instead of the GPIO API.
When this driver was introduced the kscan API was not present. The
keyscan driver was therefore implemented as a GPIO interrupt driver.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
The was a missing comma in the DEVICE_DT_INST_DEFINE macro and the
SAME71 HAL tweaks the name of a struct so we have to work around that.
Fixes#36095
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Update the LoRaMac-node library to the last stable release and fix
the Zephyr glue code to match it. Move CMakeLists.txt to the main
Zephyr repository to simplify loramac-node module maintenance.
Signed-off-by: Ilya Tagunov <tagunil@gmail.com>
Make kscan init priority higher, since it is lower than some buses like
I2C, making some devices to fail initialization if not tuning
priorities.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Change Highlights:
- Fix error check after `k_work_reschedule_for_queue`. A value of 1
means job was scheduled which was resulting in a ton of "<err>
wifi_eswifi: Rescheduling socket read error" logs getting printed
due to the erroneous check
- When using the B-L475E-IOT01A, attempts to use a TLS socket result
in a hang when socket offload is enabled so I'd like to have a way
to disable the option. To accomplish this, I I switched the
`CONFIG_NET_SOCKETS_OFFLOAD=n` Kconfig option from `select` to
`imply`.
- There was a missing `net_context_set_state()` call when
`CONFIG_NET_SOCKETS_OFFLOAD=n`. I applied the same fix from #30664
for this case to fix the issue.
Signed-off-by: Chris Coleman <chris@memfault.com>
This commit adds the flash driver for nucleo_f207zg platform.
This has been tested with flash test application.
Signed-off-by: Krishna Mohan Dani <krishnamohan.d@hcl.com>
We do not need the return value of k_sem_take() so ignore it.
Coverity-CID: 236602
Fixes#36313
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
It is necessary to put the device in standby to change the contents of
CTRL_REG1. This register is used to change the sampling frequency.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
The bq274xx fuel gauge does a softreset when configuring, after
which the device is polled and sealed. However the sleep logic
was inverted so the poll became blocking.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
The STM32H7 series has a special ADC, which is calibrated
on the factory. The calibration values are stored in flash
and must be retrieved upon powering up the device.
Failure to calibrate the device leads to missing codes in
the ADC readings.
Fixes#35529
Signed-off-by: Lasse Sangild <lsangild@gmail.com>
Fix typo in configuration phase to prepare the driver
for incoming add of Interrupt driven uart mode.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
The macros are used to get the pin(s) of a given driver instance. Add
_INST prefix to match convention used by the devicetree.h. The original
macros can now be used to obtain pin(s) of an arbitrary device instance
identified by the nodelabel.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
Query the numerical network operator id, location area code (LAC)
and cell id. Following AT commands are used:
AT+COPS?
AT+CEREG?
Functionality is enabled by CONFIG_MODEM_CELL_INFO=y.
Tested with uBlox SARA-R410M-02B.
Signed-off-by: Hans Wilmers <hans@wilmers.no>
Query the numerical network operator id, location area code (LAC)
and cell id. Following AT commands are used:
AT+COPS?
AT+CEREG?
Functionality is enabled by CONFIG_MODEM_CELL_INFO=y.
Tested with uBlox SARA-R410M-02B.
Signed-off-by: Hans Wilmers <hans@wilmers.no>
Implement numerical network operator id, location area code (LAC)
and cell id in modem context and modem shell.
Please note that the functionality to query these values must be
implemented in the modem driver.
Signed-off-by: Hans Wilmers <hans@wilmers.no>
Mark qemu_x86 and native_posix drivers to support both
TXTIME and PTP clock so that we can use txtime sample application
for testing.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Switch from using internal 6pf to internal 7pf load capacitor for LFXO.
Use a default clock accuracy of 50PPM as this matches lab results.
50PPM should be sufficient for common operating temperatures of
25degC +- 15.
Signed-off-by: Johan Stridkvist <johan.stridkvist@nordicsemi.no>
When frame counter is managed by the radio driver the upper layer
needs to be informed about the frame counter changed. The upper layer
looks for the most recent frame counter in the transmitted frame,
this is why the tx_payload need to be updated after processed by
the radio driver.
Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
The EFR32MG21 doesn't have a RMU and thus the driver isn't relevant for
that SoC series. Add a Kconfig exclusion so the driver isn't available
on EFR32MG21 SoCs.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Correct MEC15xx HAL value for DnX warn.
For consistency add automatic ack into the driver.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Create the pinmux phandle to the ADC driver node in the
devicetree. When the pinmux_pin_set function in
adc_it8xxx2_channel_setup can refer to the setting of
this phandle. It is more flexible to use.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Since we removed various series headers, move stm32 driver
under main driver/pinmux folder.
Take this change into account into various drivers.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
These headers were deprecated since release V2.5.0.
Users are expected to use dts based configuration API.
Remove these headers.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit extends the capabilities of the nRF IEEE 802.15.4 radio
driver with IEEE802154_HW_TX_SEC capability.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
Make the APIC_TIMER_IRQ_PRIORITY Kconfig depend on APIC_TIMER ||
APIC_TSC_DEADLINE_TIMER to hide it in menuconfig when not applicable.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This commit provides implementations for the reset cause
API functions as part of hwinfo.
Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
Remove useless definiton STM32F7X_SECTOR_MASK and use CMSIS instead.
By the way fix bug as '|' should be in fact '&',
but thanks to '~' inversion, '|' is now good.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Copy back the TX buffer content back into the upper layer
in case of a TX failure.
This is necessary in when frame encryption by the radio driver
is used. The shim layer for the nRF5 driver has a buffer, that
is used by the driver to authenticate and encrypt the frame
in-place. In case of a TX failure, the buffer contents
are propagated back to the upper layer. The upper layer
must use the same secured frame for retransmission.
Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
Use the nrf_802154_retransmit_csma_ca_raw and
nrf_802154_retransmit_at_raw API to retry the frame transmission
after a failed attempt.
The retry must be performed only in response to
a nrf_802154_transmit_failed event.
Signed-off-by: Rafał Kuźnia <rafal.kuznia@nordicsemi.no>
Function 'nrf_802154_transmitted_timestamp_raw' is not serialized and
connot be used for multi-core devices yet.
Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
This allows the current speed of the connection (100Mbps/10Mbps) and
if it is operating in half or full duplex to be queried
Signed-off-by: Jamie McCrae <jamie.mccrae@lairdconnect.com>
The enc424j600 chipet has 1-byte commands to enable or disable
interrupts which an be used rather than the currently used 4-byte
commands to speed the process up by a factor of 4x
Signed-off-by: Jamie McCrae <jamie.mccrae@lairdconnect.com>
The flash write function casts a void * to flash_prg_t, which can be 2,
4 or 8 bytes long depending on the SoC. This can trigger a hard fault
exception if data is not aligned, such as when passing a constant string
from settings_save_one().
Copying the chunk of data to a temporary variable on the stack to avoid
the problem.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Commit 95b916d104 ("drivers: wifi: esp32: fix reconnect issue")
switched from thread created at runtime to statically defined thread.
The difference is mainly visible for simple applications that use
CONFIG_NET_CONFIG_AUTO_INIT=y, where networking setup code is executed
before main() and any statically defined threads. All ESP32 events are
just queued and never handled, so conditions enforced by
CONFIG_NET_CONFIG_NEED_IPV4=y are never met (e.g. Zephyr networking
layer is never informed about being connected).
Switch back to thread created at runtime, which starts at the moment
when k_thread_create() is invoked. This allows ESP32 event processing to
happen just after ESP32 WiFi driver gets initialized and before Zephyr
network auto initialization code (CONFIG_NET_CONFIG_AUTO_INIT=y).
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Simplify the the AT2x EEPROM instance initialization macro a bit by
converting it to use the new DT helper macros for SPI and GPIO.
This also saves a few bytes when only AT24 support is enabled.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Fill the ACK timestamp field in nRF5 driver. This is required by
OpenThread for the proper CSL transmitter functioning.
Signed-off-by: Eduardo Montoya <eduardo.montoya@nordicsemi.no>
Add `hwinfo_get_reset_cause` and `hwinfo_clear_reset_cause` to retrieve
and to clear cause of system reset on supported platforms.
Different platforms can provide different causes of reset, however
there is a great deal of overlap. `enum reset_cause` can be expanded in
the future to support additional reasons, as additional platforms are
supported.
Signed-off-by: Arvin Farahmand <arvinf@ip-logix.com>
Propagate Download and Execute (DnX) entry warning.
Add missing handler for SUS warning power down ack.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
This kconfig option enables runtime configuration of UART
controllers. This allows application to call uart_configure()
to configure the UART controllers and calling uart_config_get()
to retrieve configuration. If this is disabled, UART controllers
rely on UART driver's initialization function to properly
configure the controller. The main use of this option is mainly
code size reduction.
Fixes#16231
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
In this CL, instead of a constant value, we use the length of property
'pinctrl-0' of adc0 to indicate the number of ADC channels in different
npcx series.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This driver is for classic CAN, it makes use of CAN interface
in FIFO mode.
This driver support Standard ID as well as Extended ID.
Tested on H3ULCB, Ebisu platform, with external adapter and
in loopback mode.
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
Move filter match function to can_utils.h, so that it
can be reused for Renesas driver.
Preserve copyright from Karsten Koenig.
Signed-off-by: Julien Massot <julien.massot@iot.bzh>
STM32WL series have an extra APB3 bus with the SUBGHZSPI device on it.
Add the relevant code to enable and disable that clock, and to obtain
the actual clock rate. This is enough to run the STM32 SPI driver
against it.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Add ADC support for the STM32WL family, this seems to work following
most of the L0X code path.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
If the transaction of write to read is divided into two transfers,
the second transfer will go to check bus busy and cause i2c reset.
This change adds flag to eliminate this situation.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Add multi-instance support and make use of the stmemsc i2c/spi
read/write routine that has been introduced to simplify the ST
sensor drivers code.
Moreover, move spi-full-duplex property from Kconfig inside Device
Tree, so that each LIS2MDL instance can be configured selectively
in accordance to how it is used in h/w.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
LiteX GPIOIn module provides possibility to change IRQ mode
and edge via CSRs. This commit adds support for that feature.
Signed-off-by: Robert Szczepanski <rszczepanski@internships.antmicro.com>
This adds missing option to disable IRQs.
Devicetree is modified to match previous commit with custom IRQ CSR
addresses.
Signed-off-by: Robert Szczepanski <rszczepanski@internships.antmicro.com>
This adds an option to set IRQ pending and IRQ enabled CSR adresses
in devicetree since these can be custom in LiteX.
Signed-off-by: Raptor Engineering Development Team <support@raptorengineering.com>
This commit adds support for GPIO interrupts in GPIO driver for Litex
SoC Builder.
Signed-off-by: Robert Szczepanski <rszczepanski@internships.antmicro.com>
Simplify the the MCP320x instance initialization macro a bit by
converting it to use the new DT helper macros for SPI.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Simplify the LMP90xxx instance initialization macro a bit by converting
it to use the new DT helper macros for SPI and GPIO.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
commit d31ed3be04 enabled multiple
instances but when multiple instances are actually used the code does
not compile
Signed-off-by: Guillaume Lager <g.lager@innoseis.com>
This CL replaces series-prefix "npcx7-" with family-"npcx-" for npcx dts
nodes such as 'espi-vws-map' and 'miwus-int-map'. Since we plan to
introduce the npcx9 and later series, adding a new node such as
npcx9-espi-vws-map for each series is more complicated and not
necessary.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
For some reason a few drivers were not converted to the new device PM
callback signature. The reason may be because the device PM part is
compiled only when CONFIG_PM_DEVICE=y, a condition not enabled in CI by
default.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The data-sjw value was incorrectly written to the NBTP register when it
should be written to the DBTP register.
This fixes a regression introduced by
5e0ca9b41e.
Signed-off-by: Christoph Steiger <c.steiger@lemonage.de>
The lis2mdl temperature samples work with a level of 25 Celsius.
When temperature goes below that level the samples become negative
and there was an issue in properly propagating the sign.
Fix#35910
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The lps22hh 24 bit raw sample is left aligned, which means that
it needs to be right-shifted by 8 before applying conversion.
Moreover the conversion has been simplified for clarity.
Fix#35871
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Use gpio_dt_spec structure and related macros for both drdy
and AnyMotion interrupts, to have a more compat, readable and
safe code. Moreover, skip setting DRDY or AnyMotion trigger
from application if the corresponding irq-gpios has not been set.
(This commit also fixes#34794)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
If the supplied sjw in the timing parameters is zero,
the sjw parameter should not be changed.
This fixes the uninitialized swj in can_set_bitrate.
Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
Fix the compilation of i2c_gpio.c after the gpio_config() syscall was
removed.
Fixes: 3632815e2e
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Move to using port property for a few cases in which we need to know
which specific hardware port a device is for. This allows us to
remove the PORT0/1 Kconfig options. This also fixes the issue that
assumed pio0 would map to DT_INST(0) and pio1 would map to DT_INST(1)
Fixes#35693
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Currently zephyr has no means to control access to the uart
driver when it is inactive, e.g. shell is not aware of uart
being in idle state and calls asynchronous api. Add early
return to TX starting procedure if device is idle.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Fixing error introduced in 951e72b947
where ifdef was converted to IS_ENABLED. Ifdef was required because
element in the struct does not exist when multithreading is disabled.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
This commit it to resolve following bugs:
* Operands don't affect result.
* Logical dead code in stm32_adc driver.
Above mentioned bugs were solved by adding parenthesis and
changed the method of comparing. Since comparison of ADC
channel_id with the channel may cause loss of value.
So instead of direct comparison, introduced a mechanism to
convert channel constant to a decimal using
__LL_ADC_CHANNEL_TO_DECIMAL_NB() and strips away
the INTERNAL_CH bit and then compare with channel_id.
fix:
* zephyrproject-rtos/zephyr#35130
* zephyrproject-rtos/zephyr#35136
Signed-off-by: Affrin Pinhero <affrin.pinhero@hcl.com>
OpenThread expects the FCS field at the end of the ACK frame to be
passed with `otPlatRadioTxDone`.
Signed-off-by: Eduardo Montoya <eduardo.montoya@nordicsemi.no>
Device won't reconnect automatically even if
AP station is available. This fix adds the carrier event, indicating
that network is present again enabling DHCP bound event.
Also, internal wifi event callback was added into wifi
driver to enable proper event handling.
Update west.yml to bring exposed wifi event callback.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Fixes#33843
There was a verification function for can_set_bitrate calling a syscall
implementation. But, can_set_bitrate is not a syscall and does not need
to be because it is accessing the driver through other syscalls.
Fixes#34734
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
For the native posix build the sleep calls used in tasks will stall
the zephyr instance which sets an upper limit on the data processing
interval to once every 20-30 millisecond.
This change reduces the duration of the sleep calls and increases the
TICKS_PER_SECOND to allow for shorter sleeps. This is needed to
support the data rates needed for LE Audio streaming. The rate is
tuned to support up to bidirectional 5ms ISO-intervals.
This change also increases the ISO buffer count from 1 to 5 to
allow for some buffering in the controller, which is needed for
gapless playback and/or use of burst number larger than 1.
Signed-off-by: Casper Bonde <casper_bonde@bose.com>
Microchip HAL 1.2.0 fixed a bug in the define of GPIO
control register MUX field. The incorrect MUX defined
cleared by GPIO input pad disable field by accident.
After the MUX definition was corrected the pinmux driver
must be modified to mask off the input pad disable for
the pin to be operational.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
Change the drivers's compatible from atmel,sam-tc to atmel,sam-tc-qdec.
The atmel,sam-tc should be reserved for the future counter driver.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This commit reverted while loop on tx only.
This commit solves SPI loopback failure and SPI wrong behaviour on RX.
fix:
* zephyrproject-rtos/zephyr#35297
* zephyrproject-rtos/zephyr#35539
Revert "drivers/spi: STM32: This solves SPI infinite loop on Tranceive"
This reverts commit 50c2acbc03e7a48a09880b6fcb8c22256bffa70c.
Signed-off-by: Affrin Pinhero <affrin.pinhero@hcl.com>
Most APIs have the default synchronous and an asynchronous version
with the sufix _async because that is the most common use.
All devices in tree right now are using the synchronous version, so
just change it to be consistent with the rest of the system.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
arc_v2_irq_unit_init function will init all interrupts and disable
they, we must make sure we call it first before we use interrupts.
so we need to increase its priority to highest in PRE_KERNEL_1 stage.
Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
Make custom RTT locking configurable and select it where it is needed.
When using RTT for tracing we want to use the default locking.
Update both segger and tracerecorder modules to support that.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
As per description of the sys_clock_elapsed() function, "the kernel
will call this with appropriate locking, the driver needs only provide
an instantaneous answer". Remove then the unnecessary locking from the
function, as it only adds an undesirable delay.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Replace suffix ull to ULL to increase code readability and prevent
unexpected behaviours, because the lowercase character l shall not be
used in a literal suffix
Found as a coding guideline violation (MISRA R7.3) by static
coding scanning tool.
Signed-off-by: Maksim Masalski <maksim.masalski@intel.com>
After system reset (SETETHRST) interrupt enable register (EIE)
has the default value 0x8010 and global interrupt enable flag (INTIE)
is set. This is not desired and the INTIE flag should be set only at
the end of the initialization.
Disable INTIE flag and set desired interrupts sources in
a single write command just right after system reset.
Resolves: #35091
Reported-by: Jamie McCrae <jamie.mccrae@lairdconnect.com>
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
The controller has several interrupt sources which are signaled
via a single INT pin. Only the interrupt sources that are explicitly
switched on during controller initialization may generate an interrupt
signal. Currently there are only PHY Link Status Change Interrupt
and RX Packet Pending Interrupt enabled. So there is no other reason why
an interrupt can be triggered.
Terminate interrupt handling thread on unknown interrupt
only when debugging, as there are concerns that stopping
thread in the field is going too far.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Function should return -ENOTSUP when asynchronous api is not
supported by the device.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Deadlock may occur when uart device was put to low power state
while uart_poll_out was in progress. Poll out pends until uarte
is ready to send new byte and it is detected by endtx and txstopped
events being set. When uarte was disabled while poll_out was pending
events were never set and that lead to deadlock. Added a step
in going to low power state in which CPU waits for txstopped event
and only after that uarte peripheral is disabled.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
(same considerations as commit 2f01479b)
In a multi-instance driver it may happen that on some h/w
one device should use interrupts and a second device should use
polling mode. So, CONFIG_IIS2ICLX_TRIGGER is not enough to discriminmate
if interrupt inizialization routine should be called or not; the choice
is now based whether the "irq-gpios" property is present in the DT
for that particular instance or not.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Use gpio_pin_configure_dt() and gpio_pin_interrupt_configure_dt()
for drdy_gpio: they result in a more readable code.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The STM32F0 MCUs (except STM32F030XC) don't have a DMA channel selection
register (DMA_CSELR). This patch fixes the build of the dma_stm32 driver
for them.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
With this patch the sys_clock_set_timeout function counts the cycles
elapsed while computing the systick timer's new load (tickless mode).
This cycles are then added to the total cycle count instead of being
lost.
This patch mitigates uptime drifting in tickless mode (especially when
high frequency timers are registered).
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
When using the uart driver with interrupt and async api
at the same time (instance for interrupt and instance for async),
the transmission complete interrupt was handled in the async
handling section, even when interrupt driven api is used.
This caused transmission to not work properly in interrupt mode.
The fix is to move the interrupt mode handling to the begginning
of the isr. If async mode is used then interrupt mode code
will not be run.
Signed-off-by: Shlomi Vaknin <shlomi.39sd@gmail.com>
The reboot option of the +KSRAT command is only
supported by newer firmware.
Add a check to determine what version of the command
to use when setting the RAT.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
If the label property is missing in a "pwm-leds" compatible DT node
(which is almost always the case), then the device name is now set to
DT_NODE_FULL_NAME instead of "LED_PWM_$inst" previously.
This allows applications to use the DEVICE_DT_NAME macro to retrieve
the device name instead of gessing an arbitrary string.
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
On Apollo Lake, each GPIO controller has more than 32 pins.
But Zephyr API can only manipulate 32 pins per controller.
So the workaround is to divide each hardware GPIO controller
into 32-pin blocks so each block has a GPIO driver instance.
Compounding to the issue is that there cannot be two device
tree nodes with same register address. So another workaround
is to increment the register addresses by 1 for each block.
So when mapping the address, the lowest 8-bit needs to be
masked to get the actual hardware address.
Fixes#28551
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
In case of multi-instance the driver tries to discover whether
there are devices attached to SDx/SCx sensorhub bus. If not it
just turns the shub_inited variable (inside data structure) to false
and skips doing any further sensorhub related action for that
particular IIS2ICLX device instance, regardless the fact that the
macro CONFIG_IIS2ICLC_SENSORHUB is enabled.
Moreover, the info found during the enumeration process for a
particular instance (number and types of attached devices) must be
saved inside the per-instance data structure, so that more than one
IIS2ICLX device can be used as a sensorhub without interfering with
the others.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
In case of multi-instance the driver tries to discover whether
there are devices attached to SDx/SCx sensorhub bus. If not it
just turns the shub_inited variable (inside data structure) to false
and skips doing any further sensorhub related action for that
particular LSM6DSO device instance, regardless the fact that the macro
CONFIG_LSM6DSO_SENSORHUB is enabled.
Moreover, the info found during the enumeration process for a
particular instance (number and types of attached devices) must be
saved inside the per-instance data structure, so that more than one
LSM6DSO device can be used as a sensorhub without interfering with
the others.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This avoid IRQ to be handle before iface init is finished
(especially before iface address is set)
Fixes#32771
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
The logging macros use _Generic() atm and it started to complain
when we are trying to print pointer value of gsm_dlci and gsm_mux
structs. Cast the pointer value to (void *) to overcome this.
Fixes#35329
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
uarte_enable function was not supporting a case when async
api was enabled but instance did not use it. Added runtime
check for async instance presence.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Driver was failing when interrupt mode was enabled for given
instance but interrupt driven TX part was not used. In that
case uart was not disabled after sending a byte which resulted
in continuous interrupt triggering. Added check for
fifo_fill_lock which is set when uart_fifo_fill is used.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The default behavior of the +KSRAT= command has
changed to not reboot the HL7800.
Adjust the command so the reboot takes place properly.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
This commit fixes the ADC driver flow. And add internal
reference voltage to ADC driver API. And correct the
data buffer that only need to store raw data.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
After i2c_reset, there is still no external pull-up I2C bus,
and finishing off the rest of loop causes the code to hang
indefinitely.
This patch fixes that if I2C bus is not available(No external
pull-up), dropping the transaction.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
-ENOSYS should be returned if the operation is not implemented. This
issue was causing some PM tests to fail, as -ENOSYS was expected.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use gpio_pin_configure_dt() and gpio_pin_interrupt_configure_dt()
for drdy_gpio: they result in a more readable code.
Moreover, this commit includes also the fix for PR #35156
(i.e. CID 235979, add check for gpio_pin_configure() return val).
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Resetting the dma_tx.buffer_length after the dma_tx.counter
calculation, instead of before.
We need to reset the buffer_length when the transmission is finished,
but in order to give the correct value to the uart_event_tx struct,
we use the dma_tx.buffer_length in the calculation of the
dma_tx.counter, used for the len of the event (number of bytes sent).
I found this problem, when I wanted to use the uart_event_tx.len for
freeing the used space inside a ring buffer (ring_buf_get_finish),
and it didn't work, I logged the values of the uart_event_tx struct,
and found out it always was 0, because the buffer_length was 0,
and the whole buffer was transmitted (stat.pending_length also 0).
Signed-off-by: Prema Jonathan van Win <jonathanvanwin@gmail.com>
This commit loops on rx not empty only if rx_buf is enabled.
And if rx_buf is not enabled, it loops on tx empty status.
Signed-off-by: Affrin Pinhero <affrin.pinhero@hcl.com>
In case of the following sequence of UART events:
- UART_ENDRX
- UART_RXRDY
- TIMER_RXTIMEOUT
The application receives one more byte that was received,
due to RX counter alignment upon ENDRX event.
The proposed fix moves the RX byte counter alignment to the
RX timeout event handler.
Signed-off-by: Tomasz Chyrowicz <tomasz.chyrowicz@nordicsemi.no>
Add check to see that the GPIO devicetree node is actually enabled
before we build the PSoC6 GPIO driver.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
If we try and build the MiV uart driver with interrupt support enabled
we get some errors related to code that hasn't been updated. Fix the
compile errors and add SERIAL_SUPPORT_INTERRUPT to the Kconfig to
hopefully catch these issues in the future
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
STM32 internal temperature sensor driver.
This sensor can be used to measure the temperature of the CPU
and its surroundings.
Signed-off-by: Eug Krashtan <eug.krashtan@gmail.com>
In the power mgmt conversion of void *context to uint32_t *state this
driver got missed and shows build errors with power mgmt is enabled.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The cache API currently shipped in Zephyr is assuming that the cache
controller is always on-core thus managed at the arch level. This is not
always the case because many SoCs rely on external cache controllers as
a peripheral external to the core (for example PL310 cache controller
and the L2Cxxx family). In some cases you also want a single driver to
control a whole set of cache controllers.
Rework the cache code introducing support for external cache
controllers.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
In a multi-instance driver it may happen that on some h/w
one device should use interrupts and a second device should use
polling mode. So, CONFIG_LSM6DSO_TRIGGER is not enough to discriminmate
if interrupt inizialization routine should be called or not; the choice
is now based whether the "irq-gpios" property is present in the DT
for that particular instance or not.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Move ctx structure from struct data to struct config, so that
it can be filled at compile time and we could get rid of the bus
init routines.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
NPCX clock has some limitations about the frequency range &
synchronization between core clock & other clocks. Add build assert to
check whether NPCX clock setting correct. This also fixed soc_clock.h
to consist with datasheet.
Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
If the modem drivers are built on a 64-bit platform we get errors with
the logging code due to use of size_t. Update to use %zX to handle this
correctly between 32-bit and 64-bit platforms.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The context parameter used across device power management is
actually the power state. Just use it and avoid a lot of
unnecessary casts.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Modern hardware all supports a TSC_DEADLINE mode for the APIC timer,
where the same GHz-scale 64 bit TSC used for performance monitoring
becomes the free-running counter used for cpu-local timer interrupts.
Being a free running counter that does not need to be reset, it will
not lose time in an interrupt. Being 64 bit, it needs no rollover or
clamping logic in the driver when presented with a 32 bit tick count.
Being a proper comparator, it will correctly trigger interrupts for
times set "in the past" and thus needs no minimum/clamping logic. The
counter is synchronized across the system architecturally (modulo one
burp where firmware likes to change the adjustment value) so usage is
SMP-safe by default. Access to the 64 bit counter and comparator
value are single-instruction atomics even on 32 bit systems, so it
beats even the RISC-V machine timer in complexity (which was our
reigning champ for "simplest timer driver").
Really this is just ideal for Zephyr. So rather than try to add
support for it to the existing APIC driver and increase complexity,
make this a new standalone driver instead. All modern hardware has
what it needs. The sole gotcha is that it's not easily emulatable
(qemu supports it only under kvm where they can freeload on the host
TSC) so it can be exercised only on hardware platforms right now.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Move LUT to driver.
Update CMake to include SoC specific driver.
Fix mimxrt685_evk LUT header spacing.
Signed-off-by: Saurabh Jagdhane <saurabh.jagdhane@nxp.com>
Adding Reset and Write-protect pins initialization during AT45 driver
start-up. Usually these pins are driven high when not used.
The AT45 device incorporates an internal power-on reset circuit, so
there is no initial on-off reset sequence.
Signed-off-by: Eug Krashtan <eug.krashtan@gmail.com>
To keep compatibility between the old GPIO API implementation and a new
one introduced in the Zephyr 2.2.0 release the gpio_pin_configure()
function was accepting interrupt flags. In the new API implementation
interrupt flags are only accepted by gpio_pin_interrupt_configure()
function.
This temporary support for INT flags in gpio_pin_configure should have
been removed in the Zephyr 2.4.0 release.
Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
The shared interrupt controller depended on interrupt-cell sense
to inialize the interrupt using IRQ_CONNECT.
Forward the "sense" property only conditionally to be able to
use the driver all drivers that don't define it.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The size of the array holding the client information is determined
from the number of dt supports dep ordinals.
Finally remove the Kconfig symbol for the number of clients.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The intc_shared driver used kconfig to set the number of clients.
This commit changes the driver to determine the number of clients
per instance using supports ordinals information from device tree.
Leave the kconfig symbol for the number of clients, it now only defines
the array size in driver data and therefore an upper limit of how
many clients can be defined in dts.
It will be removed later with changes of driver data struct.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The intc_shared driver until now had the possibility to enable
up to two instances of the driver using the symbols SHARED_IRQ_0
and SHARED_IRQ_1.
This commit removes those Config options, and instead instantiates the
driver using DT_INST_FOREACH_STATUS_OKAY macro.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Implementation of the Bosch M_CAN IP driver.
This driver is just the base for a specific SoC implementation.
Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
The energy consumption on nrf52840 is unnecessarily high when
CONFIG_NORDIC_QSPI_NOR is used due to Anomaly 122. The nrf_qspi_nor
driver is unitialize after QSPI usage and initialize before using
it again.
Semaphore objects are used to allow multiple threads exclusive access
and efficient usage.
The main assumption made was that all QSPI API is stateless, in the
sense that it is not required to store any peripheral state before
uninit. Also, the QSPI driver was supposed to be synchronous, except
for the erase operation, in which the nrf signals its start, instead of
its end. While the flash is performing the erase, an uninit followed
by an init doesn't work. For that reason, polling is done before
every uninit.
Tests were made with a simple LittleFS application in a custom board
using flash MX25R3235F and another with the LittleFS flash sample
using nrf52840 DK that has a MX25R6435F. Current consumption dropped
from 630 uA to ~10uA in both cases.
Signed-off-by: Rodrigo Brochado <git.rodrigobrochado@gmail.com>
Previously to this commit, nothing was done to restore the bus to an
healthy level.
However, I2C devices sometimes needs help to recover from an aborted
transaction.
Therefore, we now add a call to nrfx_{twi, twim}_bus_recover().
Signed-off-by: Xavier Chapron <xavier.chapron@stimio.fr>
Fixed check condition for GPIO pin number.
This check is done
before reading or writing value for the pin.
Verified on ehl_crb.
Signed-off-by: U Divya <u.divya@intel.com>
Added support for GPIO driver for Intel Elkhart Lake
board.
The GPIO driver will support pin value read/write operations,
pin direction and interrupt configuration. ACPI enumeration
support and support for different GPIO communities is also
present.
Verified on ehl_crb.
Signed-off-by: U Divya <u.divya@intel.com>
ADC emulator is designed to be used in tests on native_posix board. It
supports 1-16 bit resolution range and all GAINs from enum adc_gain.
Reference voltages and number of emulated channels are set through dts.
Using special API from drivers/adc/adc_emul.h it is possible to set
constant voltage value returned by given ADC channel or set custom
function which allows to simulate complex output.
Also reference voltages can be changed in runtime using the API.
The CL also includes:
- Add adc definitions of ADC emulator in
tests/drivers/adc/adc_api/src/test_adc.c for supporting test suites.
- Add test for ADC emulator API in tests/drivers/adc/adc_emul/
Signed-off-by: Tomasz Michalec <tm@semihalf.com>
add dma support to adc driver
add HW trigger dma support
using new dma api to request dma channel
tested on frdm_k82f and frdm_k64f
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Usage of k_work object from within net_pkt results in undefined behavior
in case when net_pkt is deallocated (by net_pkt_unref()) before work has
been finished.
Use per socket k_work object (sock->send_work) to submit send work and
put net_pkt objects onto k_fifo (sock->tx_fifo). Add a helper function
esp_socket_queue_tx() for that, which will make sure that packets are
enqueued only when send work handler will be successfully submitted (so
that all packets are consumed/dereferenced).
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
This patch add support for polling based UART
on the Renesas R-Car SCIF (Serial Communication Interface
with FIFO)
This hardware block can be found on various Renesas R-Car
SoC series.
It allows to get console on R-Car Gen3 H3ULCB board.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Avoid calling PPI driver when enhanced poll functionality is
disabled. Fixing a case when driver failed to compile when
enhanced poll is disabled for all instances.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
In some cases, VddIO2 is required to get port working.
Looking in details, VddIO2 should be set on start up
but not toggled on/off in PM use cases.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Implement power mgmt hooks to support PM_DEVICE and
PM_DEVICE_RUNTIME.
In case of PM_DEVICE_RUNTIME, clock is requested for bank writes
so it is requested before configuring and released only if pin
is not configured as output.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Recently WiFi ESP32 driver (utilizing WiFi radio in ESP32 SoC) was
introduced into drivers/wifi/esp32/ and it already caused confusion as
there was existing drivers/wifi/esp/ directory for ESP-AT
driver (utilizing external WiFi chip, by communicating using AT commands
from any serial capable platform). So question has arisen whether it is
good to merge both, while they are totally different drivers.
Rename ESP-AT driver to be placed in drivers/wifi/esp_at/, so that it is
easier to figure out difference between "esp32" and "esp_at" just by
looking at driver name. Rename also DT compatible and all Kconfig
options for the same reason.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
nrfx 2.5.0 release includes the patch in the nrfx_twim driver that
fixes the driver behavior for zero-length transfers. No need to keep
the same fix in the shim layer.
This effectively reverts cb86a2b306.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Remove reset pin requirement from devicetree as this
is not required for modem functionality, and is not
used in the driver anyways.
Signed-off-by: Emil Lindqvist <emil@lindq.gr>
The request id is given by the DMA request MUX id which start at offset
1 and are vaid until req_nb + gen_nb.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit updates the revision of hal_nordic component
and introduces necessary changes to the IEEE 802.15.4 driver
to match latest nRF IEEE 802.15.4 radio driver API.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
esp_reset() is called from net_if init function, which holds net_if lock
after commit 24b49f4399 ("net: if: Add locking"). At the end of
esp_reset() there is a blocking wait on `sem_if_up` semaphore. This
semaphore can be release only by esp_init_work(). esp_init_work()
however blocks on net_if operations, because net_if init function (which
invokes esp_reset() underneath) is still holding net_if lock. As a
result there is a deadlock, because esp_reset() and esp_init_work() are
both waiting on each other.
Remove waiting for `sem_if_up`, so that net_if init can exit and release
net_if lock.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
This patch fixes a bug of SPI driver for SiFive FE310.
Current implementation sends/receives only first buffer even if
an user passed two or more struct spi_buf to driver.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
This commit fixes the flash latency calulation in clock_control_init
for stm32wb and stm32wl series:
For these series new_hclk_freq can't be used to set the flash latency,
because the flash clk uses a different prescaler.
Without this fix, the flash latency could be set to an inadequat value
in cases wehere the new AHB3/AHB4 prescaler is different from the
new cpu1 prescler.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit adds missing initialization of rcc prescalers for
stm32wb and stm32wl series when hse or hsi are selected as
system clock.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
stm32wb only has a single msi clock range, in contrast to wl, l4, l5
which have a second range that is active after exit from standby mode.
This difference must be taken account of in the driver.
This commit abstracts __LL_RCC_CALC_MSI_FREQ macro such that all series
can be supported, additionally the switch to the msirange
(LL_RCC_MSI_EnableRangeSelection) is now only executed on series
that support it.
As a result stm32wb socs can use msi as sysclock.
The same should be done for stm32l0, but this commit series limits
the scope of socs to avoid getting too bloated.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commmit restructures the clock_controller code such that the cpu2
prescler assignment later can be excluded for single core socs.
The stm32wl mcu line has variants with a single cortex-m4 core
(stm32wle5), therefore the prescaler for the second clock should
only be set for dual core socs.
This commit still checks for the complete series
(CONFIG_SOC_SERIES_STM32WLX) as the single core variants are not
yet introduced, later the condition should check for a flag like
CONFIG_SOC_STM32WL5X instead.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit fixes several occurences where a struct members is wrongly
dereferenced, which causes a compile error in case the msi clock is used
as system clock.
Only affects stm32wb and stm32wl with MSI selected as sysclock.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit continues simplifying the generation of
isActiveFlag/clearFlag funtion pointer array for the request generators
and does the same for the table_ll_channel.
Additionally move struct dmamux_stm32_channel to c file.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit uses dt property dma-channels instead of ll defines to
make sure every soc has correct number of function pointers defined.
While commit 5f6218a tried to fix this for g0 series, this caused
regression for other series(e.g. stm32g431). Using UTIL_LISTIFY and
dt properties this should finally be fixed and reduce boilerplate code.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
NRFX UARTE would write to user supplied buffer on IRQ without checking
whether or not the supplied buffer had available space left to write
one char
Signed-off-by: Arne Edholm <arne.edholm@assaabloy.com>
In prts of the code, we use rcc node "clocks" property to testify the
use of device tree for clocks configuration.
This doesn't work in case of stm32h7 m4 targets as for those,
"upstream rcc" clock configuration, such as sysclk source selection,
is done on m7 core and hence rcc node doesn't have a "clocks"
property.
To work around this, use alternate "d1cpre" property in case of
stm32h7 targets.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Cortex-M4 stm32mp1 zephyr relies on chip Cortex-A for clock
configuration.
No change is then required for conversion to dts based clocks
configuration, but we do need to exclude use of newly deprecated
Kconfig symbols.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add new symbol CLOCK_CONTROL_STM32_HAS_DTS to exclude definition
of other CLOCK_CONTROL_STM32_* symbols when dts based configuration
is in use.
CLOCK_CONTROL_STM32_HAS_DTS is defined based on availability of
"clocks" property in rcc node.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Symbol CLOCK_STM32_HSE_CLOCK will remain in use in context of stm32
clock_control configuration using device tree, cf commit
a7989f64a3.
In preparation for next change, separate it from the others symbols
definition. Also make it non dependent from other Kconfig symbols.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
If modem receives an IPv6 address, buffer overrun
would occur. Fix this by checking string length to
ensure what type of IP address needs to be parsed.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
device_pm_control_nop has been marked deprecated so we get a CI
build error due to its use. Replace with NULL to fix the issue.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Change to make i2s_config const missed a case in the SAM driver.
Without this we get build errors when building in CI.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Remove the config BOOT_TIME_MEASUREMENT and corresponding #ifdef'd code
throughout (kernel/init.c, idle.c, core/common.S , reset.S, ... ) which
hold the extern hooks for z_timestamp_main and z_timestamp_idle in the
removed boot_time test suite.
Signed-off-by: Jennifer Williams <jennifer.m.williams@intel.com>
The current rf2xx driver not implement any configuration. Add
the minimal structre to implement rf2xx driver configuration and
implement IEEE802154_CONFIG_PROMISCUOUS mode.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Configure transceiver to create a 0 period backoff and perform only one
time the CCA without transmission retires for failures.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The current RF2XX driver only support IEEE802154_TX_MODE_CSMA_CA. Add
IEEE802154_TX_MODE_DIRECT to allow transmit packets immediately without
performing random backoff, CCA and retransmission process.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The MAX17262 is an ultra-low power fuel-gauge IC which implements the
Maxim ModelGauge m5 algorithm. The IC monitors a single-cell battery
pack and supports internal current sensing for up to 3.1A pulse
current. The IC provides best performance for batteries with 100mAhr
to 6Ahr capacity.
Signed-off-by: Matija Tudan <mtudan@mobilisis.hr>
This is always defined since:
755d09e149 include/drivers/clock_control: stm32: Update for STM32F1
support
So the condition has currently no effect and causes the prescaler to
always be set to /2.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
This commit implements the OpenThread APIs to pass MAC keys and
frame counter to the radio layer in order to process the
transmission security. This is needed for the correct functioning
of a CSL transmitter.
Signed-off-by: Eduardo Montoya <eduardo.montoya@nordicsemi.no>
This commit aligns iis2dlpc sensor driver to latest multi
instance sensor driver model.
In particular:
1. make use of some few DT helpers:
- get bus devices with DEVICE_DT_GET
- get SPI information with SPI_CONFIG_DT_INST
- get drdy gpios with GPIO_DT_SPEC_GET
2. make use of the stmemsc common routines and move ctx
handler inside struct config, so that the bus_init
routines can be totally avoided.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The STM32H7x flash has an integrated ECC that can correct single
errors and detect double errors. When a double ECC error is detected,
the DBECCERR1/2 flag is raised and there is a bus fault.
We now mask this bus fault and check the error flags. ECC errors are
logged with the offset of the data. Single ECC errors cause a warning
to be logged and double ECC errors return -EIO.
Fixes#33140.
Signed-off-by: Göran Weinholt <goran.weinholt@endian.se>
Now that we have specific bindings for STM32F100 devices,
we need dedicated treatment for PLL source HSI case.
Otherwise, we end up using undefined symbol STM32_PLL_PREDIV1.
Please note that previous code compiled, it was assigning
a wrong value to prediv. This had no consequence because
prediv value is forced in Cube LL functions.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
According to RM0041.pdf clock tree for stm32f100xx devices is
different from both STM32F10X density and connectivity lines devices,
but is a combination of both.
Rework symbols definitions so that STM32F100xx is neither of those
and uses:
- CLOCK_STM32_PLL_MULTIPLIER as on SOC_STM32F10X_DENSITY_DEVICE
- CLOCK_STM32_PLL_PREDIV1 as on SOC_STM32F10X_CONNECTIVITY_LINE_...
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Two minor tweaks and a semantics change:
- fix a whitespace nit
- use gpio_pin_configure_dt()
- turn the LED on in case the percentage is nonzero
The last change patterns this driver after behavior in the Android
lights HAL, which recommends analogous behavior when the user requests
a color change in a non-RGB LED:
Do your best here. [...] If you can only do on or off, 0 is off,
anything else is on.
https://source.android.com/reference/hal/structlight__state__t
I think this behavior makes more sense.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Use the CODE_DATA_RELOCATION_SRAM config to indentify code relocated
to SRAM so we can setup the MPU for the SRAM region used for code
relocation.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
