The original driver has two defects: 1. When setting the next timeout
value the original implementation simply sets a delta value equal to
ticks * CYC_PER_TICK. This operation is reckless and may incorrectly
"reset" the fractional tick, causing clock skew. 2. The original
implementation doesn't handle the counter overflow situation. When the
counter overflows from 0xffffffff to 0x0, the uptimer counter becomes
incorrect. We have fixed above issue by rewriting most of the functions in
this driver and verified it by running all tests under
tests/kernel/timer folder.
Signed-off-by: Zhengwei Wang <zwang@ambiq.com>
As far as I can tell it appears that the hardware
does not support acceleration of ICMPV6 checksums.
For now, the easiest way to fix the runtime failure of
IPV6 is just to disable the hardware acceleration if
IPV6 is expected to be used.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Moves the rtio_ prefixed lockfree queues to sys alongside existing
mpsc/spsc pbuf, ringbuf, and similar queue-like data structures.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Introduce the stm32h7RS serie to the gpio driver,
based on the stm32h7
The SBS controller is used to configure the EXTI line among
the different GPIO port.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Introduce the stm32h7RS serie to the pin control driver,
New GPIO port M, N, O, P
Then add the complete list and from A to P (16 port
coded on 5 bits)
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Introduce the stm32h7RS serie to the clock_controller,
based on the stm32h7 clock driver
Datasheet DS14359 rev 1 gives CPU max freq of 500MHz
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add the property of drive-strength to drive a high or low current
selection. If this property is not configured, it is the default
setting. According to the SPEC, the default drive current selection
varies from different pins.
Define the high level 0b: 8mA
low level 1b: 4mA or 2mA
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Calculate and set a proper Transceiver Delay Compensation Offset (TDCO)
based on FlexCAN FD timing.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Introduce a custom STM32_GPIO_WKUP GPIO flag.
Use the newly introduced stm32_pwr_wkup_pin_cfg_gpio() public
function to configure GPIO pins, that have the STM32_GPIO_WKUP
flag in DT, as sources for STM32 PWR wake-up pins, on the condition
that there is a wake-up pin that corresponds to each of them.
These GPIO pins can then be used to power on the system after Poweroff
like a reset pin.
Signed-off-by: Abderrahmane Jarmouni <abderrahmane.jarmouni-ext@st.com>
Rename the "bus_speed" and "bus_speed_data" fields of struct
can_driver_config to "bitrate" and "bitrate_data" to match the
corresponding devicetree properties and the terminology used in the rest of
the CAN subsystem API.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Deprecate the CAN controller bus-speed/bus-speed-data properties and rename
them to bitrate/bitrate-data to match the terminology used in other CAN
devicetree properties and the CAN subsystem API.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
SPIM12x instances can perform DMA only from memory region
that is cacheable by default.
SPIM12x instances pins are configured via CTRLSEL mechanism,
which prevents the GPIO registers from ensuring correct bus
state when peripheral does not drive the bus lines.
External configuration of SPIM12x ENABLE register fixes this issue.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
Chip Select signal must be deactivated only after transaction
is finalized. In async case this means it cannot be done from
`transceive` call context, as this context is left as soon as
transfer is initialized.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
Fix error due to compatible string changing in DT and
forgetting to update this driver with the change.
Also make the counter symbol hidden.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
DMA_INTEL_ADSP_HDA_TIMING_L1_EXIT should be set by default
for both Intel ACE15 and ACE20 platforms.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Minutes and hour values are incorrectly compared with MAX_SEC.
Compare minutes and hour to MAX_MIN and MAX_HOUR respectively.
Signed-off-by: Daniel Kampert <DanielKampert@kampis-elektroecke.de>
Legacy shim takes less flash so it should be a first choice on cores
with less code memory (like RISCV cores on nrf54h20). Adding new
instances support to the legacy shim.
Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
The driver writes the scan entry mode to the display controller on each
set_window call. Multiple calls to set_window can be needed to update
a single frame buffer in the controller.
There's a performance improvement by only setting the scan mode when
the orientation is changed (set_orientation, see previous commit)
and when the profile has changed.
For the latter the scan_mode is lost on the controller
due to a software reset.
Signed-off-by: Sven Depoorter <svndepoorter@gmail.com>
I chose this approach instead of software rotation because I need it for
an ultra low power project.
Rotation in steps of 0, 90, 180, 270 degrees is done by changing
the data entry modes.
This commit removes the orientation-flipped property as it is redundant.
I made the assumption that the current driver implementation is right
about controller X/Y versus display width/height. The display controller X
parameter matches with the display height (dts) and display controller Y
parameter matches with the display width (dts). It looks like display
manufacturers choose to have it like this because a wider screen probably
makes more sense.
Tested on the reel_board with a 250x122 display (ssd1673 controller)
and a custom PCB with a 200x200 display (ssd1681 controller).
Also tested all orientations with various width/height dts overrides.
Signed-off-by: Sven Depoorter <svndepoorter@gmail.com>
Some vendor specific setup was done inside
the open() HCI function, those should be
inside setup() function instead.
Signed-off-by: Yassine El Aissaoui <yassine.elaissaoui@nxp.com>
Incorrectly placed preprocessor conditions caused exit_dpd
when there has been no instance of a device with
dpd_wakeup_sequence parameter.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Signed-off-by: Jan Tore Guggedal <jantore.guggedal@nordicsemi.no>
The functions fnmatch(), getopt(), getentropy()
and others are grouped into the standard Option Group
POSIX_C_LIB_EXT.
The getentropy() function is currently in-draft for
Issue 8 as of 2021.
https://www.opengroup.org/austin/docs/austin_1110.pdf
Not surprisingly, the POSIX_C_LIB_EXT Option Group
also includes the highly debated strnlen() function.
Moving that function will be deferred until later.
Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
The POSIX_MAX_FDS option does not correspond to any standard
POSIX option. It was used to define the size of the file
descriptor table, which is by no means exclusively used by
POSIX (also net, fs, ...).
POSIX_MAX_FDS is being deprecated in order to ensure that
Zephyr's POSIX Kconfig variables correspond to those defined in
the specification, as of IEEE 1003.1-2017. Namely,
POSIX_OPEN_MAX. CONFIG_POSIX_MAX_OPEN_FILES is being deprecated
for the same reason.
To mitigate any possible layering violations, that option is
not user selectable. It tracks the newly added
CONFIG_ZVFS_OPEN_MAX option, which is native to Zephyr.
With this deprecation, we introduce the following Kconfig
options that map directly to standard POSIX Option Groups by
simply removing "CONFIG_":
* CONFIG_POSIX_DEVICE_IO
Similarly, with this deprecation, we introduce the following
Kconfig options that map directly to standard POSIX Options by
simply removing "CONFIG":
* CONFIG_POSIX_OPEN_MAX
In order to maintain parity with the current feature set, we
introduce the following Kconfig options.
* CONFIG_POSIX_DEVICE_IO_ALIAS_CLOSE
* CONFIG_POSIX_DEVICE_IO_ALIAS_OPEN
* CONFIG_POSIX_DEVICE_IO_ALIAS_READ
* CONFIG_POSIX_DEVICE_IO_ALIAS_WRITE
Gate open(), close(), read(), and write() via the
CONFIG_POSIX_DEVICE_IO Kconfig option and move
implementations into device_io.c, to be conformant with the
spec.
Lastly, stage function names for upcoming ZVFS work, to be
completed as part of the LTSv3 Roadmap (e.g. zvfs_open(), ..).
Signed-off-by: Chris Friedt <cfriedt@tenstorrent.com>
Default the clock accuracy for the simulated 54L15 target
just as for the real target.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Fix the warning about control reaching end of non void
function by adding a default to the switch statement.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Make `struct arch_esf` compulsory for all architectures by
declaring it in the `arch_interface.h` header.
After this commit, the named struct `z_arch_esf_t` is only used
internally to generate offsets, and is slated to be removed
from the `arch_interface.h` header in the future.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Add the possibility to fetch specific sensor channels independently,
either pressure data with SENSOR_CHAN_PRESS or temperature data
with SENSOR_CHAN_AMBIENT_TEMP.
Additionally, the option to fetch both channels simultaneously remains
available using SENSOR_CHAN_ALL, thus not breaking any samples.
Signed-off-by: Chris Braissant <chrisbraissant@gmail.com>
This add basic support for the STM32 Digital Temperature Sensor found
notably on the STM32H7 series. It work in interrupt mode and support
basic power device management.
It does not support the more advanced features like using the
temperature threshold, triggers from LPTIM or using the LSE clock in
during sleep or stop.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The AD5593 conversion result also contains the channel read and not just a
value:
| adc channel (3 bits) | adc value (12 bits) |
This value was not removed from the result before using it as an adc value.
Reuse the AD5592 code to fix the issue.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Improve the Kconfig descriptions for the atmel,at2x EEPROM driver. This
driver works for a number of different EEPROM families manufactured by
vendors other than Atmel.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit refactors the Intel SSP DAI driver to support dynamic
management of SSP IP. This change additionally separates the
management of the DAI part from the management part of the SSP IP.
Key changes:
- Add new static functions to manage SSP IP power.
- Update the DAI SSP configuration functions to use the new management
approach.
- Update device tree bindings and instances to reflect the new SSP IP
management mechanism.
- ace30 (PTL) support.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
In the Intel platforms most of HPSRAM is used by modules when
are required. By default all these banks are powered off and are
enabled by L2 MM driver only when needed.
At the driver initialisation each unused page is unmaped and
when whole HPSRAM bank is unused the power is switched off.
Since mapping memory in MMU TLB and flushing it at system start is
not needed and time consuming, this patch modifies the init
sequence to avoid it.
Additionally it adds MMU maping and unmaping for pages allocated
from unused pool.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
headers for dmic are now part of the SoC and maintained per generation,
so create one header for PTL and build the code for PTL in some of the
drivers (dmic_nhlt).
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Before sending packet to controller the host needs to poll the status of
controller to know it's ready, or before reading packets from controller
the host needs to get the payload size of coming packets by sending
specific command and putting the status or size to the rx buffer, the CS
should be held at this moment to continue to send or receive packets.
This change is needed for the based SPI driver update.
Signed-off-by: Aaron Ye <aye@ambiq.com>
This commit adds support for the SPI which
can be found in Apollo3 SoCs, it can work in
both DMA and non-DMA modes
Signed-off-by: Hao Luo <hluo@ambiq.com>
Fix a compilation error occurring when a prescaler was set for ADC on F1
and F3 family.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add a semaphore to protect the disable access to the RNG peripheral
when the PM is going to suspend mode.
The change does not affect other stm32 than CONFIG_SOC_SERIES_STM32WBX
or CONFIG_STM32H7_DUAL_CORE
Signed-off-by: Francois Ramu <francois.ramu@st.com>
