When ENET_ENHANCEDBUFFERDESCRIPTOR_MODE enabled,
MAC will automatic capture receive nanosecond from 1588TMR
and return back to ENET_ReadFrame. It is a highest accuracy
recv timestamp_ns, we do not need manually read from 1588TMR.
By this change, receive timestamp accuracy increase
from 20us to 200ns above.
Signed-off-by: Chen Caidy <chen@caidy.cc>
The Broadcom pcie setup has a devicetree dependency like:
/pcie/paxdma -> /pcie/pcie -> /soc/pl330
Add a separate init symbol for iproc_pax_v2 so that these gets
initialized in order, fixes this error:
$ west build -p -b bcm958402m2_m7 tests/kernel/common \
-DCONFIG_CHECK_INIT_PRIORITIES=y
...
ERROR: /pcie/paxdma@4e100800 POST_KERNEL 40 < \
/pcie/pcie@4e100000 POST_KERNEL 50
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Set a dedicated priority for the video_mcux_csi instead of using the
default kernel device init priority. This allows initializing the device
in a sequence that matches the devicetree hirearchy compared to mt9m114.
Fixes the error:
ERROR: /soc/csi@402bc000 POST_KERNEL 50 <
/soc/i2c@403f0000/mt9m114@48 POST_KERNEL 60
found using:
$ west build -p -b mimxrt1064_evk samples/subsys/video/capture \
-DCONFIG_CHECK_INIT_PRIORITIES=y
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Fix for bug:
https://github.com/zephyrproject-rtos/zephyr/issues/59802
The DMA controller only supports one transfer size, but
the Zephyr DMA driver api allows specifying a source_data_size
and dest_data_size which might be different. An old
version was always using dest_data_size for the transfer
size (variable is called "width"), but a recent change
made the driver use the MIN for the source and dest data
sizes. The MIN choice breaks the I2S driver because it
always set source_data_size to 1, but dest_data_size was
typically 4 for like two-channel 16-bit PCM data. So the
old driver worked using dest_data_size, but the new driver
broke I2S using MIN since source_data_size was 1.
To prevent confusion, change the DMA driver to assert that
source_data_size and dest_data_size are the same.
Also assert that the source_address and dest_address for
each block_config are properly aligned for the transfer size,
since that is a documentated requirement for the DMA controller.
Also rename max_xfer to max_xfer-bytes to be more clear what
the units are, and use this value in many places that
are comparing block_size in bytes rather than converting
block_size to words by dividing by width and
then comparing to NXP_LPC_DMA_MAX_XFER.
Signed-off-by: Mike J. Chen <mjchen@google.com>
The MCUX DMA controller only supports a single data_size
for a DMA transfer, not separate ones for source and
dest. An older version of the DMA driver used
dest_data_size as the DMA transfer size, but the
current one uses MIN(dest/source) as the trasnfer
size, which breaks case when SPI wants to do 2-byte
transfers.
Signed-off-by: Mike J. Chen <mjchen@google.com>
Fix for bugs described in:
https://github.com/zephyrproject-rtos/zephyr/issues/59803
1. the size argument passed to i2s_write() was being ignored.
change the code so that the size is queued with the
tx mem_block and the dma transfer is configured with this
size.
2. change how CONFIG_I2S_MCUX_FLEXCOMM_RX_BLOCK_COUNT and
CONFIG_I2S_MCUX_FLEXCOMM_TX_BLOCK_COUNT are used so that
the queue buffers are allocated correctly when the two
config values are not the same
3. set source_data_size and dest_data_size to be the same
since the DMA controller can only set one size per
DMA transfer. the driver was already computing a dest_data_size
but always passing 1 for the source_data_size.
For I2S RX case, I think source_data_size should be
set to the expected FIFO read size instead of dest_data_size.
Also some smaller improvements like:
* don't allocate two dma_blocks for tx in the static dev_mem
when it only needs one
* memset both rx_dma_blocks together instead of separtely
* set dma_cfg block_count for tx and rx statically instead
of at runtime
Signed-off-by: Mike J. Chen <mjchen@google.com>
Depending on the ADC implementation it might happen that
the driver is waiting on an external interrupt. If this interrupt
gets lost, for instance due to a race condition with an external
port expander, the system will get stuck.
Making this configurable allows the user to recover from such
an error.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
A recent factorisation moved F2 to non const TIM_TypeDef.
This is an error, move it back to const TIM_TypeDef.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Fixes a bug in intel_adsp_gpdma_release_ownership(). Before fix, this
function actually did nothing for ACE platform and the ownership was
not released. Now ownership is released to host CPU + DSP.
Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
This PR is Calling "clock_control_on" and checking return value
(as is done elsewhere 10 out of 11 times)
CID 322066: Error handling issues (CHECKED_RETURN)
Signed-off-by: Francois Ramu <francois.ramu@st.com>
AXP192 is a small and simple power management IC featuring different
LDOs, DCDCs, AINs and also GPIOs. It also offers functionaltiy for
battery management.
This change includes the basic regulator driver functionaltiy for
LDO2-3 and DCDC1-3 as well as the mfd driver layer. Further drivers
for GPIO and ADC will follow.
Drivers have been developed and tested on M5StackCore2, an ESP32-based
board. Support for M5StackCore2 is still in progress.
Signed-off-by: Martin Kiepfer <mrmarteng@teleschirm.org>
Add few missing check on gpio_add_callback and gpio_add_callback_dt
calls, fixes a coverity warning.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
GT911 IC uses the INT pin to select the correct I2C address during
reset. However, some boards may not route this pin (or may only support
receiving inputs on it). This results in the I2C address selected by the
GT911 IC being arbitrary based on the state of the (floating) INT pin.
To resolve this, introduce an `alt-addr` property for this device. When
set, the INT pin will not be pulled low. Instead, the I2C address will be
probed at runtime, starting with the devicetree address and falling back to
`alt-addr`.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
New reset function which performs a full power reset
New hibernate function which powers down and wakes after
specified timeout
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
The `spi_mcux_transceive` had 2 return calls when the
`CONFIG_SPI_MCUX_LPSPI_DMA` flag was active. The first return would be
called and the later was unreachable. With the fix, now the return calls
are mutually exclusive. Also, the `transceive` call is not compiled with
the `CONFIG_SPI_MCUX_LPSPI_DMA` flag is active.
Fixes#59533
Signed-off-by: Dipak Shetty <dipak.shetty@zeiss.com>
Only 12-bit resolution is currently available in the driver,
and each of the 16-bit samples store the actual data
aligned to the left.
A sample should be shifted 4 bits to the right to allow
proper interpretation.
Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
With the phy-clock being specified in devicetree (and thus under user
control), there is no need to artificially enlarge the DPHY clock to
insure it is fast enough. Instead, we can calculate the DPHY clock
directly, selecting the closest realizable value that is at least as
fast as the value requested by the user.
Fixes#59215
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Both the IRQ API and Asynchronous API support callback.
However, since they are both interrupt driven, having
callbacks on both API would interfere with each other
in almost all cases. So this adds a kconfig to signal
that the callbacks should be exclusive to each other.
In other words, if one is set, the other should not
be active. Drivers implementing both APIs have been
updated to remove the callbacks from the other API.
Though, this still leaves the option to disable
the kconfig and allows both APIs to have callbacks
if one desires.
Fixes#48606
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add support of the dedicated STM32F0 14 MHz HSI clock for ADC.
Also remove ADC clock source selection as it is obsolete.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
When CONFIG_PM_DEVICE is enabled, the FDC2x1x driver includes code that
doesn't access the name of the shutdown pin's GPIO port correctly.
Correct this so the code derefences the right struct members.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
The FDC2X1X driver depends on newlib in Kconfig. This prevents the
driver from being built in a native_posix testing environment, which uses
an external libc from the host. Allow the driver to be built with an
external libc as well.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
STM32 RTC driver for the new RTC API.
Can't coexist with old COUNTER based RTC
Though supported by HW, RTC_ALARM still to be supported by driver
Signed-off-by: Kim Bøndergaard <kim.bondergaard@prevas.dk>
New RTC API seems to conflict with old RTC implementations based on
COUNTER
This scheme follows Zephyrproject-rtos issue 56599 while keeping backward
compatibility.
Signed-off-by: Kim Bøndergaard <kim.bondergaard@prevas.dk>
The SSP driver depends on DMA as there are references in the devicetree,
but it currently initialize before the DMA driver itself. This is
exposed by the build time priority checking
(CONFIG_CHECK_INIT_PRIORITIES=y) and shows up as:
ERROR: /soc/ssp@77a00 POST_KERNEL 32 < /soc/dma@7c000 POST_KERNEL 40
ERROR: /soc/ssp@77800 POST_KERNEL 32 < /soc/dma@7c000 POST_KERNEL 40
ERROR: /soc/ssp@77600 POST_KERNEL 32 < /soc/dma@7c000 POST_KERNEL 40
...
Bumping up the SSP priority so the initialization is in sync with the
devicetree node hirearchy.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The set_brightness function of the led_pwm driver uses a default PWM
period (defined in the pwms DT property) to compute a pulse passed to
the pwm_set_pulse_dt function. If this default period is greater than
2^32/100 nanoseconds (about 43 milliseconds) then the calculation may
overflow.
This patch prevents this overflow by running the pulse computation under
a cast with a larger type (uint64_t).
Reported-by: Scott Worley <scott.worley@microchip.com>
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
Add a Kconfig to have the ability to fine tune the amount of RAM that
the driver uses based on the number of channels expected to be used.
Most of the code is already there but just need this Kconfig to get the
benefit of it by reducing the size of the statically created arrays.
Also change the number of channels field in the configuration to a byte
instead of a 32 bit integer because that should be sufficient to
describe the number of DMA channels.
Rename LPC DMA Driver Kconfigs with namespace to MCUX_LPC
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Setting higher priority to reset controller to initialize it before
other dependent drivers running at CONFIG_KERNEL_INIT_PRIORITY_DEFAULT
priority which is 40.
Signed-off-by: Girisha Dengi <girisha.dengi@intel.com>
The rv32m1 pinctrl driver depends on clock controller, add a new symbol
and set it so it gets initialized after that, and before other devices.
Fixes:
$ west build -p -b rv32m1_vega_ri5cy tests/kernel/common \
-DCONFIG_CHECK_INIT_PRIORITIES=y
...
ERROR: /soc/pinmux@41037000 PRE_KERNEL_1 1 < \
/soc/clock-controller@41027000 PRE_KERNEL_1 30
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The Kconfig IEEE802154_NRF5_MULTIPLE_CCA option is added.
The new functions `z_ieee802154_nrf5_extra_cca_attempts_set` and
`z_ieee802154_nrf5_extra_cca_attempts_get` are added.
The ieee802154_nrf5.c is updated allowing to pass extra cca attempts
to nRF 802.15.4 Radio Driver.
Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
The macro used in an assert statement in the `sys_mm_drv_page_phys_get()`
function was using an older version of the naming scheme, fixed now.
Signed-off-by: L Lakshmanan <l-lakshmanan@ti.com>
TI K3 family of SoCs requires an extended set of registers to operate.
Extended functionality of the current driver to support the variant.
Signed-off-by: L Lakshmanan <l-lakshmanan@ti.com>
Convert the GT911 driver to the input subsystem, fix the existing boards
to work in the default config.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Flash API states that drivers should support write requests without
any restrictions on location or alignment of the source buffer.
Due to hardware limitations of the QSPI peripheral, the nrf_qspi_nor
driver currently fails to perform a write from a RAM buffer that is
not word-aligned. Fix this by using in such case the same mechanism
that is used when the source buffer is located in the internal flash
(copy data to a buffer located on stack).
Also correct the length parameter for writes from this stack-based
buffer to be the actual data chunk length, not always the size of
the buffer (as for CONFIG_NORDIC_QSPI_NOR_STACK_WRITE_BUFFER_SIZE > 4
this may lead to overwriting of some data located next in the flash).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add UDC driver for STM32 based MCU, relying on HAL/PCD.
This has been tested with cdc_acm sample on the following boards:
- 96b_carbon (STM32F4)
- disco_l475_iot1 (STM32L4)
- nucleo_wb55rg (STM32WB)
- nucleo_h723zg (STM32H7)
- stm32f3_disco (STM32F3)
This fails at runtime for the following:
- b_u585i_iot2a (STM32U5)
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Add a semaphore to ensure that only one transaction
happens at a time when threads want to transfer
simultaneously.
Signed-off-by: Wei-Tai Lee <wtlee@andestech.com>
Cache the delimiter string length in `parse_params`, instead of
calculating it on each character in the match buffer.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Given the following response: `+CIPSTA:ip6ll:"FE80::EDC:7EFF:FEDD:110C"`
The response delimiter is `:`, but there is also a quoted string that
contains the delimiter character. These delimiters should not be
considered when searching for the end of a parameter.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
This adds support for the bosch bmi085 and bmi088. This also includes
support for data sync mode.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
When the image is chain-loaded, clocks may already by initialized.
The driver was lacking support for already configured HSE and
PLL sources. When CONFIG_ASSERT=y get_startup_frequency was
failing since it did not recognize these sources.
It's the same issue that was addressed in #58109 for stm32u5.
Signed-off-by: Kacper Dalach <dalachowsky@gmail.com>
Check and propagate two return values.
Don't need to check return of the part id request, but make
sure that the value is initialized before the comparison.
Fixes#58575
Coverity-CID: 316152
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The return value is consciously not checked, because the operation
is expected to fail. And the real request is executed afterwards.
Fixes#58593
Coverity-CID: 316443
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This patch adds support for PWM blink which is found in intel's
PCH hardwares.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Changes the Kconfig option to allow disabling mutex support, this
is to allow other Kconfig options to disable the feature.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Change the default mbox initialization priority so that it initializes
before ipc, as some ipc drivers depends on it.
Found with:
$ west build -p -b nrf5340dk_nrf5340_cpuapp \
samples/subsys/ipc/ipc_service/icmsg_me \
-DCONFIG_CHECK_INIT_PRIORITIES=y
...
ERROR: /ipc/ipc1 POST_KERNEL 46 <
/soc/peripheral@50000000/mbox@2a000 POST_KERNEL 50
ERROR: /ipc/ipc0 POST_KERNEL 46 <
/soc/peripheral@50000000/mbox@2a000 POST_KERNEL 50
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The underlying HAL driver may improperly forward an samplerdy event even
if it's disabled in the configuration. Ignore the event to prevent error
logs until the issue is fixed in HAL.
Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
remove the sdk based TOTAL_DMA_CHANNELS macro and instead just use the
zephyr driver's num_of_channels field
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
When reading multiple ADC channel in parallel, an ADC command chain will be
build. This is similar to a linked list, as every command references the
next command.
Before this patch every ADC command after the first, would always reference
this initial command. So that during execution only two commands (the last
and first) would be executed which resulted in readout of only two analog
values. As Zephyr expected more to come in, the `read_adc` function would
block endlessly.
The patch fixes the behaviour and allows a correct chain to build up.
Signed-off-by: Elisabeth Friedrich <auxsys@flowerpot.me>
PCIe devices refer to interrupt nodes, but are initialized with the same
priority, making the sequence depending on the linking order. Add a new
symbol and set it to one unit after intc to ensure that the
initialization sequence is stable.
Found with:
west build -p -b qemu_cortex_a53 \
samples/drivers/virtualization/ivshmem/doorbell \
-DCONFIG_CHECK_INIT_PRIORITIES=y
...
ERROR: /soc/pcie@4010000000 PRE_KERNEL_1 40 <
/soc/interrupt-controller@8000000/its@8080000 POST_KERNEL 40
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The intc_gicv3_its driver is currently initializing in POST_KERNEL, but
PCIe device nodes depends on it and are initialized earlier. Change the
init level to PRE_KERNEL_1 to sort that out, and also put the driver in
line with other interrupt controller drivers.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The eSPI, I2C, and SPI emulators use devicetree macros to build an array
of devices on the virtual bus. Currently, they will add device nodes that
are not status-okay. This leads to linker errors because the respective
device drivers would not have instantiated device structs for these
nodes --assuming the driver was even compiled. This can be frustrating
if nodes need to be disabled for debugging or configuration purposes.
Update the bus emulators to only consider status-okay nodes by changing
the macros used to iterate over bus devices.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
Removed the unneccessary casts in the functions to remove warnings
during build for SoCs using RAT. Functionality reamins the same,
tested on board.
Signed-off-by: L Lakshmanan <l-lakshmanan@ti.com>
With NEORV32 v1.8.2 the UART module was changed to a simpler
implementation. This updates the UART driver for the open-source NEORV32
RISC-V compatible processor system (SOC).
Signed-off-by: Tim-Marek Thomas <thomas@sra.uni-hannover.de>
Add I2C target driver used buffer mode. The maximum accessible buffer
is 2044 bytes, the default is 256 bytes.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Add the callback functions of buf_write_received and buf_read_requested
to support buffer mode.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Fix for bug:
https://github.com/zephyrproject-rtos/zephyr/issues/59575
The dma version of the version of the driver can
invoke multiple intermediate dma transfers, like
when the spi_buf_set count is greater than one.
However, there is a bug where chip select is not kept
asserted for all intermediate dma transfers required
to process the entire spi_buf_set.
Signed-off-by: Mike J. Chen <mjchen@google.com>
Decouple interface and Wi-Fi APIs, Wi-Fi APIs are common independent of
Wi-Fi offload or implemented natively (This is preparation for
introducing Native Wi-Fi).
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
In order for TCA954X driver to work well, we know that
mux root must be initialized before channels.
(see #37786).
This commit is:
- Ensuring that this condition is met at build.
- Document needed values for menuconfig to help user.
- Edit these values for TCA954X test sample
Fixes#40833
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Add support of r8a77961 SoC to gen3 series.
Create a dtsi file with a common part for both r8a77951 and r8a77961.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Add MMIO mapping for Renesas CPG driver in order to avoid
mappings inside mmu_regions.c file. Remove MMU region for
Renesas CPG driver.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Delete IRQ lock/unlock calls from 'rcar_cpg_mstp_clock_endisable',
because 'rcar_cpg_mstp_clock_endisable' function is always called
under spin lock.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Add associative tables for core and mod clocks.
Add possibility to enable/disable any of core clocks which presents
in the associative table.
Add handler for setting rate to driver and use generic rcar cpg
function for getting rate.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Add associated tables of clocks and API for working with these tables,
from this moment the relationship between clocks and their divider are
built. After set rate of some Core clock, driver has to update all
in/out rates of all childrens recursively. During get/set rate calls
if out rate is unknown, we try to get parent in/out rates and its
divider, in case when parent doesn't have valid in/out rates we get
parent of parent and so on until we get parent with a valid in or out
rates.
Add generic Renesas functions for get/set rate of CPG.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Move cpg log module declare to common rcar cpg file. If the module
consists of multiple files, then LOG_MODULE_REGISTER should appear
in exactly one of them. Each other file should use LOG_MODULE_DECLARE
to declare its membership in the module.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Add MMIO mapping for PFC Renesas driver in order to avoid
mappings inside mmu_regions.c file.
Add a new system init function pfc_rcar_driver_init to PFC
Renesas driver for invoking a memory mapping macro.
Note: PFC Renesas driver doesn't use Zephyr Device Model.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Add MMIO mapping for UART Renesas driver in order to avoid
mappings inside mmu_regions.c file(s).
There are a lot of changes inside SCIF driver inside this
commit, because reg addr and size may be stored in RAM or
ROM and appropriately in different driver structures data
or cfg, and, because the name of field reg base is changed.
Note: it is common approach according to Zephyr documentation.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Added Region based Address Translation (RAT) module driver. Required by
a few Texas Instruments SoCs to fucntion. Uses
sys_mm_drv_page_phys_get() API with device_map() for address translation.
Signed-off-by: L Lakshmanan <l-lakshmanan@ti.com>
The block data length field should be in bytes. Setting this to a value
that is not a multiple of the data size results in a user setting error.
Running the ADC DMA test prior to this commit:
west build -p -b nucleo_u575zi_q zephyr/tests/drivers/adc/adc_dma
E: Transfer Error.
I: tc: 0, ht: 0, dte: 0, ule: 0, use: 1
E: DMA sampling complete, but DMA reported error -5
Existing tests using DMA on the nucleo_u575zi_q were not effected
because they only use a data size of one and continue to function
as expected:
west build -p -b nucleo_u575zi_q zephyr/tests/drivers/spi/spi_loopback \
-DOVERLAY_CONFIG="overlay-stm32-spi-dma.conf"
SUITE PASS - 100.00% [spi_loopback]: pass = 1, fail = 0, ...
west build -p -b nucleo_u575zi_q zephyr/tests/drivers/dma/loop_transfer
SUITE PASS - 100.00% [dma_m2m_loop]: pass = 3, fail = 0, ...
Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
The tables for the dest and src data width constants were incorrectly
swapped. This commit uses the correct constants and renames the tables.
This change is only cosmetic for the stm32u5 since these constants are
the same but the existing names were probably inherited from another
driver where the p_*/m_* prefix was more appropriate.
Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
Enable DMA error interrupts so that transfer errors are logged and
reported to the callback.
Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
- This includes the driver, test app, and sample app
- Only the boards\arm\xmc47_relax_kit board is supported for now
Signed-off-by: Bill Waters <bill.waters@infineon.com>
Avoid integer overflow in temp_sq calculation.
For an analysis of the value ranges for the temp_sq calculation
of mx5837-02 see below:
calculation:
dT = adc_temperature - ((int32_t)(data->t_ref) << 8);
data->temperature = 2000 + (dT * data->tempsens) / (1ll << 23);
temp_sq = (data->temperature - 2000) * (data->temperature - 2000);
given needed storage sizes:
t_ref is uint16_t,
adc_temperature is uint24_t,
data->tempsens is uint16_t,
ranges
=> dT: -16776960 <= dT <= 16777215 (25 bit)
=> data->temperature (TEMP):
intermed.(mult): -1099478073600 <= x <= 1099494785025 (41 bit)
TEMP: 2.000 - 131068 <= TEMP <= 2.000 + 131.069
TEMP: -129068 <= TEMP <= 133069 (17 bit)
So worst case we need 17 bit for TEMP, so the square of it would
overflow an int32_t. The nominal measurement range is
only -40 to 85°C, meaning a range of -4000 to 8500.
So normally the result for temp_seq would fit into a int32_t,
but we cast to be better safe than sorry. Also the 64-bit
multiplication won't be the dominating operation of the
whole calculation.
Fixes#58585
Coverity-CID: 316294
Fixes#58594
Coverity-CID: 316521
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Add the RCR_PRMS field to toggle the promiscuous mode in the Ethernet
controller.
Register a set_config function that can make use of the field when
CONFIG_NET_PROMISCUOUS_MODE is enabled.
Signed-off-by: Ambroise Vincent <ambroise.vincent@arm.com>
Replace the timeout for a SPI transceive in slave mode for STM32 DMA
operations with a K_FOREVER. Being an SPI slave means we do not
know when the transaction will start, hence it does not make sense
to have a timeout in such a case.
This will resolve issue #60000.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
The adc_driver_api structure provides .ref_internal
which previously was unset.
Now .ref_internal is set to the proper value.
Signed-off-by: Wojciech Sipak <wsipak@antmicro.com>
Move LOG_DBG print just after the printed h/w register is read, to avoid
coverity complaining about uninitialized variable.
Fix:
Coverity-CID: 316407 (issue #58591)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Split the native ptty serial driver in a top and bottom
to enable using it with embedded libCs.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Refactor the part of the flash simulator that interacts with the
host when build for native platforms, so it is possible to use
it also with the embedded libCs.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Fix `PWM_SetupPwm` function being called with `numOfChnls`
argument equal to 2, when in fact only one channel is being set up.
Also add 'U' suffix to `pwmFreq_Hz` unsigned integer argument in
the function call.
Signed-off-by: Gustavo Silva <gustavograzs@gmail.com>
In case of remapped reference counter for physical page
is differ to zero, but TLB entry for virtual address equal to
physical address will be disabled. Valid entry will be somewhere
in virtual space where particular physical page is remapped.
Since in adsp_mm_save_context() routine we go through physical
memory range, we need to include these pages in context save loop.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Currently MIPI devices are set to initialize before display drivers,
which is incoherent with how the mcux mipi-dsi device is declared in the
device tree.
This is detected with build time priority checking:
west build -p -b mimxrt595_evk_cm33 samples/drivers/display \
-DCONFIG_CHECK_INIT_PRIORITIES=y
ERROR: /soc/peripheral@50000000/mipi_dsi@31000 POST_KERNEL 40 <
/soc/peripheral@50000000/lcdif@210000 POST_KERNEL 85
Note that this also changes the priority of dsi_stm32, though that
should be ok since does not appear to have other dependencies in
devicetree.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Boot level based on parent node (PCI or no PCI device). Some platforms the
PCI bus driver depends on ACPI sub system to retrieve platform information
such as interrupt routing information. But ACPI sub system currently
support only post kernel and hence such platforms the UART driver instance
init should be invoked only post kernel in case parent node is PCI.
Signed-off-by: Najumon B.A <najumon.ba@intel.com>
This change introduces the "_rtc_timer" suffix for the system tick timer
driver "compatible" property and aligns naming conventions with the
actual CC13/26xx SoC series product policy.
This frees up the "_rtc" namespace to introduce additional APIs based on
the same peripheral in the future (not part of this PR):
rtc: rtc@... {
compatible = "ti,cc13xx-cc26xx-rtc";
...
timer {
compatible = "ti,cc13xx-cc26xx-rtc-timer";
...
};
counter {
compatible = "ti,cc13xx-cc26xx-rtc-counter";
...
};
pps {
compatible = "ti,cc13xx-cc26xx-rtc-pps";
...
};
};
Or alternatively an MFD pattern with similar requirements.
Fixing the namespacing now makes sense standalone as it reduces the
chance of custom drivers being broken in the future.
Redundant extension of the mandatory system clock devicetree node is
replaced with a single `status = "okay"` which seems to be the more
sensible default to avoid user error when defining custom boards.
Knowledgeable users can still override this if really needed.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Removes duplicate code and inconsistencies in the naming of the
cc13xx_cc26xx devicetree and RTC driver hierarchy and alignes it with
the actual TI product series naming hierarchy.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Refactor the host libC accesses to use the native simulator
host trampolines.
In this way we support building this driver with embedded libCs.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
The stm32 UART can output a "driver enable" signal on the RTS pin that
allows controlling e.g. external RS-485 drivers.
This can already be configured through the devicetree using the `de-*`
properties, but not through uart_configure(). This commit enables the use
of .flow_ctrl=UART_CFG_FLOW_CTRL_RS485.
This is supported on all devices other than l1, f1, f2, and f4 as found by
this search:
$ grep -rLw USART_CR3_DEM ../modules/hal/stm32/stm32cube/*/soc/*.h |\
grep -vE 'system_|partition_|stm32[^0-9]+[0-9]?xx\.h' |\
cut -d/ -f6 |\
sort -u
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
The code declares variables in switch-case blocks. This
seems to compile without an error on GCC 11 and newer,
but older compilers don't accept this code.
Signed-off-by: Damian Krolik <damian.krolik@nordicsemi.no>
The ISM330DHCX driver immediately segfaults when run in SPI mode. A bad
pointer is being passed into the `dev` param of `ism330dhcx_spi_read`.
Tracing this back, it appears that the handle field of the ctx struct
is being set to the device's data struct while `ism330dhcx_spi_read`
expects `ctx->handle` to be a pointer to a device struct.
Modify `ism330dhcx_spi_init()` to insert the correct pointer into the
context struct. Unfortunately this requires a cast to discard the
`const` qualifier, but this is how it is done in I2C mode (see
`ism330dhcx_i2c_init()`). The only other way would be to change the
declaration of `stmdev_ctx_t`, which is owned by the HAL module.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
gpio_nrfx_port_get_direction() is meant to check which inputs
are enabled, and does so by checking one bit at a time
and setting that bit into the "input" parameter.
But "input" was never zeroed, so any garbage ones it
may have remains.
Zero it.
This fixes a problem where if the "input" parameter was not
zeroed by the caller, the result of the funcion call
is undefined.
Detected by valgrind on:
tests/drivers/gpio/gpio_get_direction
Conditional jump or move depends on uninitialised value(s)
by gpio_get_direction_test_disconnect (main.c:64)
Conditional jump or move depends on uninitialised value(s)
by gpio_get_direction_test_output (main.c:102)
When running this test for the nrf52_bsim.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Static code analysis it has highlighted that a variable is beeing
accessed before initializing. This is a very minor fix
to resolve this potential issue.
Signed-off-by: Martin Kiepfer <mrmarteng@teleschirm.org>
This change corrects the it82xx2 resumed/suspended mechanism and power
policy flow. The sof package is used to judge if the device can be set as
suspended state. If there is no sof package received(suspended), the chip
power policy is set as standby(deep doze) mode. Meanwhile, the USB D+
interrupt is enabled. The interrupt is triggered at resume signal(from J
to K state). Chip sets its power state as active(doze) mode and disable
the interrupt.
Signed-off-by: Ren Chen <Ren.Chen@ite.com.tw>
Add SHA256 accelerator support for it8xxx2 series.
This driver passes the following test:
tests/crypto/crypto_hash/
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Since we have state that gets mutated between tests in the SBS fuel gauge
emulator we ought to reset its state before each test.
Add a reset rule to the SBS fuel gauge emulator that resets the state
before each test. Note: This includes allowing the emulator state to be
modified by user-threads.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
In order to support easier setup of test scenarios with fuel gauge
emulators, we should expose an API that can change internal emulator state.
Add a minimal fuel gauge emulator backend API for setting the charging
current and voltage with a sample implementation in the emul_sbs_gauge with
an associated driver test.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Calculate the calibration value at compile for ina23x.
Maximizes the precision of the calcualtion value by
using 64bit math at compile, allows for removal
of rshunt config option.
Code cleaned up with clang-format.
Co-authored-by: Trent Piepho <tpiepho@gmail.com>
Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
Changes rshunt-milliohms to rshunt-micro-ohms allowing for current
sensing of greater than 16.4A (1mOhm resistor). This is commonly
set to 100 uOhm for VMU/FMU boards/applications.
Co-authored-by: James Goppert <james.goppert@gmail.com>
Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
The `SPI_EMUL_INIT(n)` macro used to instantiate SPI bus emulators
builds an array of SPI devices attached to the bus, but always checks
instance #0 of the bus and not `n`. This makes multiple instances of an
emulated SPI bus unusable and popualtes them all with bus 0's devices.
Change the `0` to `n`, which matches how the I2C bus emulator does it.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
Update ESP AT modem driver to control the network interface dormant
state based on the network connection status, as described in the docs.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
SIUL2 may require multiple interrupt handlers instead of a single one as
currently supported for S32Z/E. This is needed to enable support on
S32K3.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Support pin control for NXP S32K3 devices and enable it by default on
mr_canhubk3 board configuration.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
The clock controller is a singleton controller for all the system-level
clocks (XOSC, PLL, CGM, etc) to provide run-time information to the
peripheral device drivers about the module's clocks.
Clock configuration is not yet supported.
Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
Split the SDL GPIO emulator driver in a top and bottom
to enable using it with embedded libCs.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Split the SDL input driver in a top and bottom
to enable using it with embedded libCs.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Split the SDL display driver in a top and bottom
to enable using it with embedded libCs.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Merges the condition for `UART_INTERRUPT_DRIVEN || UART_ASYNC_API` into
`UART_MCUX_FLEXCOMM_ISR_SUPPORT`.
Signed-off-by: Alp Sayin <alpsayin@gmail.com>
When UART_INTERRUPT_DRIVEN=n, mcux_flexcomm_isr and the data structure
inside is left unused. This patch turns off the build of the entire ISR.
Signed-off-by: Alp Sayin <alpsayin@gmail.com>
without the call of LPUART_ClearStatusFlags(), the interrupt can
immediately trigger again, blocking the application.
CONFIG_ASSERTS=n removes the assert() including the call of
LPUART_ClearStatusFlags().
Also removed LPUART_ClearStatusFlags call for unclearable
kLPUART_TransmissionCompleteFlag.
Signed-off-by: Jan Peters <peters@kt-elektronik.de>
Since clocks aren't declared in the devicetree for the stm32mp1
co-processor. Read the resulting clock divider here instead.
Signed-off-by: Sean Nyekjaer <sean@geanix.com>
Since clocks aren't declared in the devicetree for the stm32mp1
co-processor. Read the resulting clock divider here instead.
Signed-off-by: Sean Nyekjaer <sean@geanix.com>
Add a small delay between reading the transport header and reading the
HCI data. Failing to do so on a nRF9160<->nRF52832 link was reliably
resulting in the nRF9160 trying to read data before the nRF52832 had
set up the SPI transaction, resulting in the host reading a buffer full
of 0x00 and having to run the entire read result again.
Transceiving a 10 byte packet takes at least 31uS, while 100 byte
packets are around 150uS (duration of `spi_transceive` call). Waiting
1 tick to eliminate the need for most retransmissions is a valid
tradeoff.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add an option that signifies that the ESP modem may be reset at the same
time as the SoC by an external source. When this is the case, we first
wait for an unsolicited "ready" message from the modem, before
attempting to reset the device. This prevents two initialisation
sequences attempting to run at the same time.
We still want to wait for the complete initialisation sequence to
complete before returning in this case.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Don't unconditionally set the carrier to the off state in
`esp_iface_init`, as this is already done in `esp_reset` and the
function may be called after the modem has already completed the init
sequence and called `net_if_carrier_on`.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Wait for the init process to finish again, previously removed in
a8e6fc0b83. The original reasoning (deadlock with net interface locking)
no longer applies now that `esp_reset` is called in the device init
function, not in `esp_iface_init` (332a6f084a).
Without this change, if `reset-gpios` or `power-gpios` is set,
`device_is_ready` will return true even if the chip has fallen off the
board, as no communication is validated with the board.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Support device power management in spi_nor driver. Only use
SUSPEND/RESUME if `CONFIG_SPI_NOR_IDLE_IN_DPD` is not enabled to avoid
state conflicts.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Quite a few of the drivers meant for the POSIX arch
interacted with the host directly, and will not
work when we use an embedded libC.
Until we fix them, let's add the appropriate
kconfig dependencies to avoid users trying to build them.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This adds support for the TIMER1-4 counter.
Each counter has 24bits and can run on LP_CLK (15-32KHz)
or DIVN clock (32MHz) with prescaler 1-32.
Each counter can have one alarm set.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Enable automatic temperature measurements during charging.
Allows the PMIC to charge when the host is in low power mode.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
The vbus current limit is now written to the vbus startup
register. It is now applied at all times and does not need
to be updated on charger insertion.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
Because they are needed in SoC power.c, clock control init functions
for all other STM32 series has been exported as global.
This commit exports stm32_clock_control_init function as global for
STM32H7 series as well, making custom power management
implementations for STM32H7 series possible.
Signed-off-by: Tomislav Milkovic <tomislav.milkovic95@gmail.com>
NO_CACHE cannot be selected for certain cores.
Use ARCH_HAS_NOCACHE_MEMORY_SUPPORT as the condtion
to select NO_CACHE config
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The blink command should blink until the user presses a key, however on
some systems a pending keypress is present when entering the loop
causing it to immediate exit before getting a chance to blink.
Add a dummy read to clear the buffer before starting the blink loop.
Signed-off-by: Eric Holmberg <eric.holmberg@northriversystems.co.nz>
The device passed to the DMA callback is the DMA device. Instead use
the ADC device available in the private data.
Signed-off-by: Brett Witherspoon <brett@witherspoon.engineering>
Add fixed-clock clock control driver. This is a first step towards
making fixed-clocks a first-class citizen in the clock control
framework.
Since the change is hidden behind a Kconfig enable this is opt-in
for now.
Signed-off-by: Moritz Fischer <moritzf@google.com>
This adds a driver for Texas Instruments Cost-Optimized, Ultra-Small,
12-Bit, System-Monitoring ADCs. Currently only TLA2021 is supported,
TLA2022 and TLA2024 may follow based on this driver.
Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
A "switch" statement in intel_adsp_hda_dma_status() seems to be
missing a "break". The second "break" is unneeded but seems to be a
part of the coding style.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
This driver, due to its limited 24-bits counter, is already tracking a
cycle count in software. Allow that count to be a 64-bits value so this
won't wrap in a matter of only a few seconds when the hardware clock
is fast.
This is very cheap to do as expensive math operations (i.e. divisions)
are performed only on counter intervals whose values fit in 32 bits like
before.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Add ACPI support for Zephyr using acpica open source
project. ACPI subsystem use to discover and configure
hardware components, perform power management (e.g. putting
unused hardware components to sleep), auto configuration (e.g.
Plug and Play and hot swapping) etc.
Signed-off-by: Najumon Ba <najumon.ba@intel.com>
To ease building for workstation tests, instead of using
the ARM CMSIS instructions instrinsics directly,
use the NRFX macro that uses the compiler builtins when
necessary.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Instead of getting the hardcoded address from the DT structure
use its symbolic name (Also from DT) which will be resolved
by the nRF HAL definitions.
This allows the GPIO peripherals' addresses to be redefined
for the simulated targets.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Following the sam4s datasheet, the OVRE, PARE and FRAME flags should be
cleared after a uart error occured. This is done writing a 1 to the
RSTSTA bit in the UART_CR.
Signed-off-by: Ibe Van de Veire <ibe.vandeveire@basalte.be>
Default scan mode is Active. User can force the scan mode to passive
through Kconfig option or using 'passive' option from shell.
Using either of this option will override regulatory settings and
forces all scan channels to be passive only.
Signed-off-by: Ajay Parida <ajay.parida@nordicsemi.no>
Convert the XPT2046 driver to the input subsystem, change the api,
remove the callback and enable logic.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Fix incomplete reset cause to be reported for NXP MIMXRT1062-evkb.
In the event of a reset due to core lockup
or software reset request on a 1062 board,
the current NXP hwinfo driver reports an incomplete
reset cause (only Ipp reset pin).
This is happening because the 1062 uses a combined CPU lockup
and system reset request register bit that should be checked,
whereas the current driver only checks for the existence
of a lockup-only status bit.
This commit adds a check on the flag
FSL_FEATURE_SRC_HAS_SRSR_LOCKUP_SYSRESETREQ
already present in MIMXRT1062_features.h,
to report such a reset cause should it occur.
Signed-off-by: Casper Egholm Jørgensen <cjo@trackman.com>
Identify the Wi-Fi capability to the networking stack and also the type
of Wi-Fi (Native vs Offloaded), this helps identifying Wi-Fi interfaces
that can be used by applications.
Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
Usage of 64-bit address constants from devicetree without
an UINT64_C wrapping macro results in the following warning
and the cut-off of the address value:
"warning: integer constant is so large that it is unsigned"
This change fixes such issue for PLIC, MTIMER and UART in case
they are used with some 64-bit RISC-V platforms
Signed-off-by: Alexander Razinkov <alexander.razinkov@syntacore.com>
Add call to zephyr_syscall_header to kscan driver CMakeLists.txt, so
that the required syscalls will be generated when kscan drivers are
used.
Fixes#59710
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The ifdefs in in dmic headers is getting out of control and makes
maintainence very ddifficult, especially when having to maintain out of
tree SoCs sharing the same data and information.
Keep header clean and per SoC and share some common registers in one
place instead avoiding confusion and making it easier to read and
maintain.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This patch adds driver support for Microchip's PolarFire SoC I2C. This
initial support implements the Controller API only.
Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
This commit adds the jedec216 read sfdp and Read ID
function API. The qspi commands are issued to the
quad flash device.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
According to the stm32h5x product specifications, the values of the
voltage ragulator depends on the system clock as follows:
• VOS0 (Vcore = 1.35V) with CPU and peripherals running at up to 250 MHz
• VOS1 (Vcore = 1.2V) with CPU and peripherals running at up to 200 MHz
• VOS2 (Vcore = 1.1V) with CPU and peripherals running at up to 150 MHz
• VOS3 (Vcore = 1.0V) with CPU and peripherals running at up to 100 MHz
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add specific init priority for the stm32 DMAMUX device higher
than the CONFIG_DMA_INIT_PRIORITY, to be sure that the DMAMUX
initialization always comes after the stm32 DMA device init.
Its default value is set to 41 when the DMA_INIT_PRIORITY is
KERNEL_INIT_PRIORITY_DEFAULT (=40).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
PHY overrides have been checked against the latest version of TI's
SmartRF(TM) Studio. The result was regression tested (PER/performance)
against LAUNCHXL-CC1352P1 boards.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The length field in the header refers to the size of the MAC so it
shouldn't rely on constants describing PHY header length. While
currently both constants have the same value this will no longer be true
for enhanced PHYs and/or MAC frames as the number of FCS bytes may then
be four.
Also introduces an assertion that ensures that the given package buffer
does not exceed the TX buffer's length. An assertion is enough as the
package buffer is allocated at compile time.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The CMD_CLEAR_RX and CMD_SET_TX_POWER commands are declared and
initialized but not used anywhere. They are therefore removed to reduce
RAM/flash footprint.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Switch the driver to the soft CSMA/CA algorithm as an intermediate
compromise for improved standard compliance (namely expontential
backoff) until true hardware support can be implemented by chaining
radio commands.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The driver's CCA method had various issues and would always return an
error code. This is fixed in this change.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
This change introduces inline documentation with references to the
current version of the IEEE 802.15.4 standard.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The CC13xx/CC26xx Sub-GHz driver announces a hardware CSMA/CA capability
which it provides only partially. This change documents the gap.
The change also fixes two related issues with the current CCA
implementation:
- The given default ED threshold was above the allowed threshold
defined in the specification.
- The CCA timeout was not calculated according to the requirements
defined in the standard.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
This change introduces standard variable names used elsewhere in the
stack for improved naming consistency and readability.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The driver contained references to KConfig variables w/o the required
CONFIG_ prefix. This change introduces the missing prefixes.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The low-level configuration of the chip's radio commands was mostly
redundant. This change removes redundant configuration code.
This is also relevant as a preparation to supporting further frequency
bands and operating modes on the same SUN FSK channel page with
similar but slightly different settings (center frequencies, channel
spacing, modulation index as defined in the standard). The SUN FSK
standard defines plenty of such variations with different physical
characteristics and trade-offs. Such variations are highly relevant in
industrial applications which will be targeted by TSCH. Using the
correct settings is required for additional features (e.g. frequency
hopping) and interoperability.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The CC13xx/CC26xx Sub-GHz driver header file defined several constants
that were not used in the driver.
Other constants could be replaced with generic constants which were
introduced in the prior commit.
This change removes and/or replaces redundant definitions.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Set the initialization priority for the pinctrl_mcux_init to
CONFIG_KERNEL_INIT_PRIORITY_DEFAULT.
The pinmux nodes depend on pcc, which is currently initializing at a
later stage, using the default priority fixes it.
Found the error with:
$ west build -p -b frdm_k64f samples/basic/blinky \
-DCONFIG_CHECK_INIT_PRIORITIES=y
...
ERROR: /soc/pinmux@4004d000 PRE_KERNEL_1 0 <
/soc/pcc@40065000 PRE_KERNEL_1 30
ERROR: /soc/pinmux@4004c000 PRE_KERNEL_1 0 <
/soc/pcc@40065000 PRE_KERNEL_1 30
ERROR: /soc/pinmux@4004b000 PRE_KERNEL_1 0 <
/soc/pcc@40065000 PRE_KERNEL_1 30
ERROR: /soc/pinmux@4004a000 PRE_KERNEL_1 0 <
/soc/pcc@40065000 PRE_KERNEL_1 30
ERROR: /soc/pinmux@40049000 PRE_KERNEL_1 0 <
/soc/pcc@40065000 PRE_KERNEL_1 30
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Previous fix https://github.com/zephyrproject-rtos/zephyr/pull/58891
introduced failure in driver tests suite. This patch corrects the error
and reverts max_mapped_page field definition.
Adds max_mapped_pages stats reset after unmaping of unused memory.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
When CONFIG_PM_DEVICE is enabled IPC Device may be during power transition
during a call to intel_adsp_ipc_send_message function.
Changed signatures of intel_adsp_ipc_send_message and its sync version
to return int and negative error codes on error.
On attempt to send IPC message during Device power transition
-ESHUTDOWN error code is returned, on busy state -EBUSY.
Updated all function references.
Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
Generic header for system clock allows to define a sys_clock_idle_exit
function for the clock implementation.
Implemented the function in the intel_adsp_timer to reinitialize
device driver after the idle exit state.
Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
Guard NXP PINT related code with #ifdef CONFIG_NXP_PINT.
This prevents build errors on platforms that do not have a PINT but have
LPC GPIO.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
GPIO callbacks need to be initialized before being registered with a GPIO
driver, otherwise the NULL `handler` hits an assert.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Add a GPIO based quadrature decoder driver that reports relative axes
movements using the input subsystem.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Provides a way to use pinctrl to allow internal loopback
on a peripheral pin for testing purposes.
This is done by using output-enable on a input pin and
input-enable on a output pin.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Avoid timeout when taking semaphores in ISR.
This enables flash operations inside interrupted context
such as exceptions, allowing operations like saving core
dump to flash for instance.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Since the mtl platform, the stereo bit has been removed from the
CIC_CONTROL register and now it is marked as reserved. On some platforms
(mtl and above), the configuration blob still has this bit set, causing the
dmic driver to report an error. This commit changes the behavior of the
driver to only display a warning.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
The argument to the dmic irq is of type "struct device *" and dmic data
is actually part of it, thus make the cast correctly.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Allows to configure OSPI Manager IO ports with devicetree.
If properties are absent, then original default values
are preserved for compatibility.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Add Nuvoton numaker series UART support, including interrupt-driven,
also apply pinctrl and clock-control.
Signed-off-by: cyliang tw <cyliang@nuvoton.com>
Add Nuvoton numaker series clock controller support, including:
1. Do system clock initialization in z_arm_platform_init().
2. Support peripheral clock control API equivalent to BSP
CLK_EnableModuleClock()/CLK_SetModuleClock().
Signed-off-by: cyliang tw <cyliang@nuvoton.com>
Device dependencies are not always required, so make them optional via
CONFIG_DEVICE_DEPS. When enabled, the gen_device_deps script will run so
that dependencies are collected and part of the final image. Related
APIs will be also made available. Since device dependencies are used in
just a few places (power domains), disable the feature by default. When
not enabled, a second linking pass will not be required.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add support for communication with serial ports on native POSIX platform
via UART driver API. Serial port driver supports polling API,
configuration of the serial ports used via devicetree and command line
options, and runtime configuration with `uart_configure`.
Multiple instances of the driver are supported.
Example use and configuration is also demonstrated in the
`samples/drivers/uart/native_tty` sample.
Closes: #56586
Signed-off-by: Marko Sagadin <marko.sagadin42@gmail.com>
The word cpu was added to the names of functions, structs, types
and definitions to disambiguate the names and make room in the namespace
for soc clock control functions.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Moved dmic register definitions to a separate file dmic_regs.h and added
their description. Platform-dependent registers definitions are placed in
separate files. Used standard macros FIELD_PREP, FIELD_GET in operations on
registers.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Note that only the the hardware round robin port arbitration capability
is being used.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Basic support of VC capability, where a driver can enable VC and map its
traffic classes.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The initial implementation was broken during improvements.
There was incorrect assumption that all pages are unmapped at
initials state. In reality at the beginning whole memory is
powered on, so we should mark all pages as mapped. Later in
initialization code unused pages are unmapped and if after this
some banks become empty (all pages unmapped), the power is
switched off.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Update driver with low level power control and OpMode
functions to better represent operations used in power
mode transition diagram Figure 2 from the datasheet.
This also prepares the driver for use of these functions
for PM actions.
Extend the soft reset at initialisation to a full POR.
Add defines for maximum POR time and start up time.
Signed-off-by: Nick Ward <nix.ward@gmail.com>
Shorten lines lengths.
Remove bq274xx prefixes from static function names.
Removes repetition of bq274xx in logging.
Signed-off-by: Oleh Lozynskyy <oleh.lozynskyy@gmail.com>
That's correct. We are still fixing the Y2K bug in 2023 \o/
* write century to RAM register 0x32
* ensure year register is in [0,99] (inclusive)
Aside from that, there were a few other errors in the driver.
* translate epoch-centric RTC API year to begin at 1900
* fix off-by-one error with month limit
* fix off-by-one error with wday
* fix off-by-one-hundred error with year limit
* adjust timeptr values in rtc_mc146818_validate_time()
* adjust timeptr values in rtc_mc146818_validate_alarm()
With the above, the testsuite passes!
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
Previous commit added support of large transactions on I2C v2,
this commit implements some changes to also add support
of large transactions on I2C v1. Some refactoring is also done
to put the code in the right source files.
Fixes zephyrproject-rtos#58866
Signed-off-by: Michael Grand <m.grand@trustngo.tech>
This commit introduces a preprocessor checking mechanism for selecting the
correct RNGOUT FIFO memory base address depending on whether SL_TRUSTZONE
is used.
Fixes#59197.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
Local register read/write functions have been removed and replaced
with calls to the new MFD functions.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
Local register read/write functions have been removed and replaced
with calls to the new MFD functions.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
Local register read/write functions have been removed and replaced
with calls to the new MFD functions.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
Added an MFD driver for the nPM1300.
This driver has register access helper functions that can be used
by subsystems. This will avoid each subsystem having to duplicate
the register access code.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
The IS31FL3216A is a fun light LED controller. The LED current of each
channel can be set in 256 steps by adjusting the PWM duty cycle through
an I2C interface.
Signed-off-by: Guy Morand <guy.morand@bytesatwork.ch>
Adding device power management for the ti lp5569 led controller driver.
Allow the option to either use device power managemnt while keeping the
voltage on or to use device power management including using e.g. a voltage
domain that controls the led controller voltage on-demand.
Signed-off-by: Jonas Remmert <j.remmert@phytec.de>
Add a minimal driver for the ti lp5569 led controller. The driver supports
multiple instances. Commands on|off|set_brightness are supported.
Signed-off-by: Jonas Remmert <j.remmert@phytec.de>
The function `z_nrf_rtc_timer_exact_set` is added to allow
setting compare channel without possible creeping of cc val.
Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
Add memory mapping to driver in order to use driver with platforms based
on Cortex A with enabled MMU.
Signed-off-by: Mykola Kvach <mykola_kvach@epam.com>
Acknowledgment is mandatory if legitimately requested by the package's
"ACK requested" flag. The L2 layer will have to ensure that compliant
ACK packages will always be sent out automatically as required by the
standard.
For IEEE 802.15.4 compliance, the NET_L2_IEEE802154_ACK_REPLY option is
therefore being deprecated.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The existing calls to ieee802154_radio_send() and soft MAC ACK handling
were inconsistent and/or not properly integrated with more recent
radio driver capabilities as CSMA/CA and ACK in hardware.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The method ieee802154_radio_handle_ack() does not belong to the
PHY/radio layer but to the L2 layer. It is a callback called from the
radio layer into the L2 layer and to be implemented by all L2 stacks.
This is the same pattern as is used for ieee802154_init(). The
'_radio_' infix in this function is therefore confusing and
conceptually wrong.
This change fixes the naming inconsistency and extensively documents
its rationale.
It is assumed that the change can be made without prior deprecation of the
existing method as in the rare cases where users have implemented custom
radio drivers these will break in obvious ways and can easily be fixed.
Nevertheless such a rename would not be justified on its own if it were
not for an important conceptual reason:
The renamed function represents a generic "inversion-of-control" pattern
which will become important in the TSCH context: It allows for clean
separation of concerns between the PHY/radio driver layer and the
MAC/L2 layer even in situations where the radio driver needs to be
involved for performance or deterministic timing reasons. This
"inversion-of-control" pattern can be applied to negotiate timing
sensitive reception and transmission windows, it let's the L2 layer
deterministically timestamp information elements just-in-time with
internal radio timer counter values, etc.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
This patch adds the ability to change virtual i2c eeprom target address
at runtime using a single function.
Added CONFIG_I2C_EEPROM_TARGET_RUNTIME_ADDR as an optional Kconfig.
Signed-off-by: Sahaj Sarup <sahaj.sarup@linaro.org>
Currently, only the presence of a GIC is reflected in the device tree,
and its version must be set separately in each SoC's Kconfig.
This patch adds separate bindings for each GIC version whose presence
in the device tree automatically enables the corresponding Kconfig symbol.
Signed-off-by: Piotr Wojnarowski <pwojnarowski@antmicro.com>
Add driver for TCN75A temperature sensor. The following features are
supported:
- TCN75A oneshot mode, which allows single shot conversions with lower
power consumtion
- Resolution selection, up to 12 bit resolution (9 bit default)
- Triggering based on temperatue thresholds. If the TCN75A exits a set
threshold range, the application can be notified via a callback.
Signed-off-by: Daniel DeGrasse <daniel@degrasse.com>
Add command to set DVS mode, to aid in testing regulators that expose
this functionality. Since DVS modes are device specific, take an integer
as the mode identifier and pass it to the driver directly.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This help to decipher PCIe capabilities supported by each listed device.
Shown only on a selected device and not on the general list.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This adds a few line use zephyr_syscall_header() to include
headers containing syscall function prototypes.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
...instead of using CONFIG_ENTROPY_HAS_DRIVER. Since kconfigs
are guarded by CONFIG_ENTROPY_GENERATOR anyway, drivers are not
built unless CONFIG_ENTROPY_GENERATOR is also enabled.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
...instead of using CONFIG_SERIAL_HAS_DRIVER. Since kconfigs
are guarded by CONFIG_SERIAL anyway, drivers are not built
unless CONFIG_SERIAL is also enabled.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
...instead of using CONFIG_FLASH_HAS_DRIVER_ENABLED. Since
kconfigs are guarded by CONFIG_FLASH anyway, drivers are not
built unless CONFIG_FLASH is also enabled.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The I2C driver clock was initialized in board specific code, move it to
the driver as it is part of its responsabilities.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add a new pinctrl driver for TI CC32XX SoC. The driver has not been
tested, just implemented following datasheet specs and checked that it
compiles. Consider this as a best-effort driver to remove custom pinmux
code in board files.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The adc-shell uses a hardcoded list of defines to check whether it should
throw a compile-time error. The ADS1119 and ADS1112 driver both support
the APIs needed by the shell, so this commit enables support for them in
the hardcoded support list.
Signed-off-by: Jordan Montgomery <jordan.montgomery@getcruise.com>
This PR adds a custom driver for the ADS1112 ADCs. Unlike ADS1113/4/5
family served by the ADS1x1x driver, the ADS1112 does not use an address
pointer to address config registers. Instead, there is only one writable
register and all i2c writes will set it. The registers resemble the
ADS1119 device, but config bitmap is different, include a distinct data
rate table, gain table, and input multiplexing table. There is also not a
status register to be monitored with the ADS1112, as it uses config bit 7
for the same purpose instead of a separate register.
The driver was tested on hardware using the ADC shell interface. Manual
probing validated the voltages for the MUX_SINGLE configs at datarate 15
in CM_SINGLE. Higher gains were not tested and CM_CONTINUOUS is not
supported in this initial implementation.
The new driver has also been added to the existing ADC test using adc_emul
for completeness.
Origin: original
License: Apache 2.0
Purpose: Adding support for ADS1112 ADCs
Signed-off-by: Jordan Montgomery <jordan.montgomery@getcruise.com>
Add new `IEEE802154_CSL_DEBUG` Kconfig option that, when enabled,
prevents the radio to sleep after a delayed reception is finished.
This allows to debug CSL timing issues due to accuracy drifts in
communications between receiver and transmitter.
Signed-off-by: Eduardo Montoya <eduardo.montoya@nordicsemi.no>
This commit replaces the workarounds spread around the
drivers and subsystems with the updated PPP L2
interface.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
Don't wait for the IRQ line to be de-asserted in `bt_spi_send`. As this
function can be called by the RX processing thread, the previous
behaviour could cause deadlocks under heavy load:
* SPI RX thread starts blocking on `bt_buf_get_evt` due to load
* BT controller generates another event, asserting the IRQ line
* RX processing thread calls `bt_spi_send` in reponse to event
* RX processing thread blocks forever on the removed condition
There is no need to attempt to rate-limit how often `bt_spi_send` is
called to allow the RX thread to run. If the bus is so congested that
there is no remaining capacity, prioritising RX over TX is not going to
improve the situation.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
The RSSI value in net_pkt (net_pkt_cb_ieee802154.rssi) was used
inconsistently across drivers. Some drivers did cast a signed dBm value
directly to net_pkt's unsigned byte value. Others were assigning the
negative value of the signed dBm value and again others were offsetting
and stretching the signed dBm value linearly onto the full unsigned byte
range.
This change standardizes net_pkt's rssi attribute to represent RSSI on
the RX path as an unsigned integer ranging from 0 (–174 dBm) to 254 (80
dBm) and lets 255 represent an "unknown RSSI" (IEEE 802.15.4-2020,
section 6.16.2.8). On the TX path the rssi attribute will always be
zero. Out-of-range values will be truncated to max/min values.
The change also introduces conversion functions to and from signed dBm
values and introduces these consistently to all existing call sites. The
"unknown RSSI" value is represented as INT16_MIN in this case.
In some cases drivers had to be changed to calculate dBm values from
internal hardware specific representations.
The conversion functions are fully covered by unit tests.
Fixes: #58494
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
The prompt is referring to another existing driver(NXP S32),
now the correct name is displayed.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
If CONFIG_MCUX_DCNANO_LCDIF_EXTERNAL_FB_MEM is not set and
CONFIG_MCUX_DCNANO_LCDIF_FB_NUM is zero, a division by zero occurs.
Use the same framebuffer size definition as in the external-framebuffer
case to resolve this.
Fixes#58908.
Signed-off-by: Aedan Cullen <aedan@aedancullen.com>
drivers: serial: uart_sam0: fix uart_sam0_irq_update TXC reset bug
uart_sam0_irq_update function resets flags that will cause int. re-entry
existing implementation also clears the TXC flag if it is set
this breaks transmit complete detection
Per the SAMD5x/E5x Datasheet Sect. 34.8.6, writing '1' to the TXC will
clear the flag and disable TX complete interrupts, this should be
preserved through the irq_update for use in the tx_complete check function
The proper fix will cache the TXC value before conditionally clearing the
flag based on that cached value. If you do not condition this on the
cached value a race condition will periodically occur where
the TXC is cleared but never cached.
Fixes zephyrproject-rtos#55386
Signed-off-by: Peter McGaughey <peter.mcgaughey@daikincomfort.com>
Mux Control Register Index are internals of driver, now
moved from dt-binding header to driver itself.
Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
ARC EMSDP board has some peripherals are internal connected,
such as DW spi1 and DFSS i2c0. They are unmuxed and have fix
connection to spi-flash or sensor. For these peripheral, add
dummy mux type to avoid pinctrl ENOENT error.
Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
This reverts commit 2d03aaf99f.
The async API for NS16550 is incomplete. We are near the next
release so it is better to revert it for now, and a proper
correct implementation can be done before next-next release.
Relates to #57103
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The source clock_control_sam_pmc.c can not build without the
symbol SOC_ATMEL_SAM_MCK_FREQ_HZ which is contained in soc.h
This bug only shows itself if CONFIG_ARM_MPU is not enabled,
which probably includes soc.h through the <zephyr/arch/cpu.h>
which is not desired behavior.
This commit adds the missing header, making the source build
regardless of CONFIG_ARM_MPU.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
Write PWM match registers directly instead of using the frequency and
duty cycle fields of the MCUX HAL driver. This allows the driver to take
full advantage of the resolution supported by the FlexPWM when setting
duty cycle and carrier frequency.
Fixes#59080
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Check the return value from gpio_add_callback() and fail driver
initialization if non-zero.
Fixes: #58584
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Currently the flexcomm uart driver will not unlock IRQ
if there is an error, which might cause some problems, fix this.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Remove excessive debug output on Bosch M_CAN register access. This was
accidentially included in commit bbfc1f905c.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Fixed Input Set handling.
Flag had misleading names: whether "entry" happens to the left or to the
right is dependent on whether increment mode is active or not), so
switched to just using a "SHIFT" y/n flag instead. It also reflects better
the contents of the datasheet).
Updated romance text direction accordingly ("increment, no shift").
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Added several missing undeclared config variables causing the driver to
not compile properly.
Fixes#59078.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
1. Fix the reset function to reset correctly.
2. Ensure the controller handle is initialized before
calling the SDK functions.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Fail requests if the data does not fit inside buffer.
This commit only adds missing sanity checks but the native posix driver
remains broken at the design level. The amount of work to fix the native
posix driver in legacy USB stack is deemed too great to be worth it.
Coverity-CID: 195841, GitHub issue #58564
Coverity-CID: 240244, GitHub issue #58570
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Fix support for DVS modes, as the dvs_state_set implementation
previously had the mask and value parameters in the
i2c_reg_update_byte_dt function swapped.
Also, record the active DVS state and update the voltage get/set and
regulator enable/disable function to target the active DVS mode. This
will enable a user to configure multiple run modes, and modify target
voltages for those modes when in the new mode. When a user is utilizing
the MODESEL pins, update the active state but return an error so that
the application can still edit settings for the new DVS mode once it has
reconfigured the appropriate pins.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
add explicit boolean type to 'if' statement controlling expression,
consolidating it with 'stm32_exti_is_pending' function return type, thus
improving code readability and maintainability, complying with required
[misra-c2012-14.4] rule which states; The controlling expression of an
if statement and the controlling expression of an iteration-statement
shall have essentially boolean type.
Found as a coding guideline violation (Rule 14.4) by static code
scanning tool.
Note: Tested on STM32L5 Nucleo-144 board (stm32l552xx).
Signed-off-by: ferar alashkar <ferar.alashkar@gmail.com>
add an unconditional break to switch-clause's default case, complying
with required [misra-c2012-16.3] rule which states; An unconditional
break statement terminate every switch-clause.
Found as a coding guideline violation (Rule 16.3) by static code
scanning tool.
Note: Tested on STM32L5 Nucleo-144 board (stm32l552xx).
Signed-off-by: ferar alashkar <ferar.alashkar@gmail.com>
1. use 'BIT' macro instead of explicit left shift operations, since
'BIT' macro implicitly adds unsigned type suffix, avoiding possible
[shiftTooManyBitsSigned] scenarios, and
2. add an explicit uint32_t cast to 'BIT' macro argument, complying with
required [misra-c2012-10.1] rule which states; operands shall not be of
an inappropriate essential type.
Found as a coding guideline violation (Rule 10.1) by static code
scanning tool.
Note: Tested on STM32L5 Nucleo-144 board (stm32l552xx).
Signed-off-by: ferar alashkar <ferar.alashkar@gmail.com>
Compiling previous code using LLVM reveals that accessing line_range
values in runtime is not clean, as the following error is generated:
"error: initializer element is not a compile-time constant"
Replace runtime method by compile time using UTIL_INC and UTIL_x2
macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This makes Kconfig logging options for this driver depending on whether
the driver is enabled or not.
Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
Recent refactoring of the uart_async_api test (see commit
eb44414af9) revealed an issue
in the uart_nrfx_uart driver that it requested the next RX
buffer even if one was already set up (such request was just
ignored in the previous form of the test, so the problem did
not come out so far).
This patch prevents such incorrect requests from appearing.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
add explicit boolean type to 'if' statement controlling expression,
consolidating it with 'stm32_exti_callback_t' (function pointer), thus
improving code readability and maintainability, complying with required
[misra-c2012-14.4] rule which states; The controlling expression of an
if statement and the controlling expression of an iteration-statement
shall have essentially Boolean type.
Found as a coding guideline violation (Rule 14.4) by static code
scanning tool.
Note: Tested on STM32L5 Nucleo-144 board (stm32l552xx).
Signed-off-by: ferar alashkar <ferar.alashkar@gmail.com>
change for loop iterator/counter type to unsigned int, thus matching
that of struct stm32_exti_range's len member var, complying with
required [misra-c2012-10.4] rule which states; Both operands of an
operator in which the usual arithmetic conversions are performed shall
have the same essential type category.
Found as a coding guideline violation (Rule 10.4) by static code
scanning tool.
Note: Tested on STM32L5 Nucleo-144 board (stm32l552xx).
Signed-off-by: ferar alashkar <ferar.alashkar@gmail.com>
add enclosing parentheses enforcing and clarifying precedence of
operators, thus improving code readability and maintainability,
complying with *advisory* [misra-c2012-12.1] rule which states; The
precedence of operators within expressions should be made explicit.
Found as a coding guideline recommendation (Rule 12.1) by static code
scanning tool.
Note: Tested on STM32L5 Nucleo-144 board (stm32l552xx).
Signed-off-by: ferar alashkar <ferar.alashkar@gmail.com>
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC is not always the same as CPU frequency.
Referring to the `/cpus/cpu@0,clock-frequency` in DTS to determine
the CPU frequency.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Increase the size of the MCUX USB driver thread stack if using
the CONFIG_USB_DEVICE_LOG_LEVEL_DBG Kconfig, to avoid stack overflow
caused by many stack frames coming from the debug logs.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Change the Bosch M_CAN ISRs to only acknowledge the IRQs handled in the
given loop iteration (and not all IRQs supported by the given ISR) and move
IRQ acknowledge to the front of the ISRs.
Fixes: #58631
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Increase the default stack size for the MCP2515 CAN controller driver from
512 to 1024 bytes.
Fixes: #58761
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Increase the default CAN controller driver initialization priority from
KERNEL_INIT_PRIORITY_DEVICE (50) to 80 to allow CAN controllers on SPI
busses have their bus initialized prior to initializing the CAN controller
driver.
The only in-bound dependency on CAN controller drivers - apart from
application level code - is the drivers/net/canbus.c driver, which already
defaults to an initialization level of 81.
Fixes: #55745
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Move the Bosch M_CAN header file to include/zephyr/drivers/can/can_mcan.h
for use in out-of-tree drivers.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add documentation for the remaining functions, structs, and definitions in
the Bosch M_CAN header file. Fix a few mistyped Message RAM field names
along with misnamed macros and function found while adding documentation.
No functional changes.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Let's check the return values of all system calls
to ensure they do not error, or handle it gracefully
if they do.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
The rf2xx does not check the return value from gpio_add_callback
function, which can prevent it from detecting unexpected states and
conditions. This add error processing check and log.
Fixes: #58595
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Fractional part of the conversion was a thousandth of
what it should have been.
Also removes LOG_ERR use which causes excessive output
when logging enabled and using the sensor shell.
Signed-off-by: Nick Ward <nix.ward@gmail.com>
Replace the otrig configuration semaphore with a spinlock.
This will allow the dma_config function to be called from an ISR
and it will no longer shift the burden of waiting to be able to configure
the dma otrigs to the caller of the function, since the driver
will just spin on the lock until it can configure them, instead of
returning an error.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add two error code check for gpio_add_callback functions to avoid
triggering a coverity warning.
Drop a redundant initialization in the process.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The IEEE802154_2015 option is misleading, as it does not introduce full
802.15.4-2015 standard compliance but only random bits, plus it's
defined at the radio driver level, which brings yet another confusion.
Because of that, the option will be deprecated, and respective parts of
code that made use of it converted to use more specific configurations:
* nRF driver will now use CONFIG_NRF_802154_ENCRYPTION to specify
whether to compile in TX security
* net_pkt will only add extra 802.15.4 control block fields if
OpenThread is used, as they were solely used by this L2
* OpenThread radio layer will now use the OpenThread version to
determine whether to compile in TX security.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Clang reports 'initializer element is not a compile-time constant' when
trying to initialize structure with elements of constant array. The
compiler is wrong in this case because the elements of the array are
known at compile time, so there are no obstacles to initialize structure
using it.
The problem was fixed by removing 'range' array and using
DT_PROP_BY_IDX() to get values directly from DT.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Clang doesn't support push_options, pop_options and optimize pragmas.
Since "Ofast" is only applied to rng_pool_get() we can use function
attributes instead of pragmas.
Please note that clang doesn't support applying optimizations to
functions.
This change was verified by comparing assembler output.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
This patch fixes following compilation error when compiling using clang
drivers/dma/dma_stm32.c:364:42: error: equality comparison with
extraneous parentheses [-Werror,-Wparentheses-equality]
if ((config->head_block->source_address == 0)) {
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~^~~~
drivers/dma/dma_stm32.c:364:42: note: remove extraneous parentheses
around the comparison to silence this warning
if ((config->head_block->source_address == 0)) {
~ ^ ~
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Update the asserts to match the updated Bosch M_CAN minimum/maximum CAN
timing parameters.
Fixes: #58429
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The minimum/maximum CAN timing parameters for the STM32 FDCAN driver uses
the wrong values for the minimum, nominal phase segment values.
Using the static initializers fixes these and aligns them to the Bosch
M_CAN manual. The STM32G4 reference manual contains contradicting limits
for these register values.
Fixes: #58429
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The minimum/maximum CAN timing parameters for the STM32H7 FDCAN driver uses
the wrong values for the minimum, nominal phase segment values.
Using the static initializers fixes these and aligns them to the Bosch
M_CAN manual. The STM32H7 reference manual contains contradicting limits
for these register values.
Fixes: #58429
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The minimum/maximum CAN timing parameters for the Atmel SAM0 CAN driver
uses the wrong values for the minimum, nominal phase segment values. The
same goes for the maximum, nominal SJW value.
Using the static initializers fixes these and aligns them to the Bosch
M_CAN manual. The Atmel SAM C20/C21 family data sheet contains
contradicting limits for these register values.
Fixes: #58429
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The minimum/maximum CAN timing parameters for the Atmel SAM CAN driver uses
the wrong values for the minimum, nominal phase segment values. The same
goes for the maximum, nominal SJW value.
Using the static initializers fixes these and aligns them to both the Bosch
M_CAN manual and the Atmel SAM E70 family data sheet.
Fixes: #58429
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Some NXP SoC reference manuals contain a bug regarding the minimum values
for nominal phase segments. Valid Bosch M_CAN nominal phase segment
register values are 1 and up. Same goes for the maximum value for data
phase segment 2. Here, valid Bosch M_CAN register values are 0 to 31.
Using the static initializers fixes these.
Fixes: #58429
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Per Kinetis USB reference manual, when USB reset interrupt is asserted,
the driver should configure and enable the default USB control endpoint
0. Generally, when the reset interrupt is asserted, endpoint 0 is
already configured so the driver only needs to reenable it.
However, when usb_dc_detach is called and the module is reset, all endpoint
configuration will be reset. Thus, we need to manually configure USB
endpoint 0 when a USB reset interrupt is received, or the USB driver
will not function correctly after usb_dc_detach has been called.
Additionally, do not zero out all BDT entries in the usb_dc_reset
function. BDT entries are zeroed when an endpoint is configured, and
clearing BDT buffer pointers during device reset will cause a memory
leak.
Fixes#58407
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The pga enum internal reference voltage and gain values
were fixed in the code, but a comment was forgotten to be
updated. Correct the comment to match how the code uses
the enum.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
This patch ensures that the power domain to which the current HD DMA
instance belongs is power-up first.
In addition, it initializes the channels when coming out of SUSPEND
state, so this operation will be performed also when the stream is
started after the DSP comes out of D3 state.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Change the assertion when evaluating the baudrate to trig if
result is greater or equal to 16.
This will also match the comment : checking BRR.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The tachometer collects the data continuously setting a "data ready" bit
when it's ready. The availability bit has to be cleared before the
register is updated.
The driver also supports underflow detection, when the bit indicating it
is set the reading of "0" is returned.
The problem here is that there is that once the underflow bit is cleared
we might end up reading stale data.
To prevent that clear the "data ready" bit when underflow is detected
Signed-off-by: Kornel Dulęba <mindal@semihalf.com>
Fix the OTRIG related build error in the DMA LPC
by defaulting num_of_otrigs to 0 if a plarform using
the LPC DMA does not specify this property in devicetree.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
For Intel cavs2.5, access from LPGPDMAC to Audio Link Hub
RX/TX registers needs to be explicitly enabled before use.
The logic follow hardware initialization done in
SOF project sof/src/platform/intel/cavs/platform.c
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Found EMSDP board SPI-FLASH sample broke after adding DFSS
into spi_dw. Found wrong interrput mask resulting in false
interrupt enabled. Now fixed it to fit both DFSS and DW.
Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
This is a follow-up to commit 09fa46ee4e.
Before nrfx 3.0, the QDEC interrupt on REPORTRDY event was activated
implicitly when a `reportper` value other than `DISABLED` was used.
Now, the `reportper_inten` field needs to be used to activate this
interrupt.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
There is no need for iterating all the Bosch M_CAN filter elements in
Message RAM in order to find a free filter as the driver already keeps
track of assigned filters.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Restructure the Bosch M_CAN driver backend to use per-instance Message RAM
configuration.
This removes the need for a common, artificial "can" devicetree node for
SoCs with multiple Bosch M_CAN-based CAN controllers and allows for
per-instance configuration of the number of e.g. standard (11-bit) and
extended (29-bit) filter elements.
As part of the restructure, software handling of CAN filter flags was moved
from per-flags bitfields to per-filter bitfields, solving an issue when
using more than 32 standard (11-bit) filter elements or more than 16
extended (29-bit) filter elements.
Fixes: #42030, #53417
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The Bosch M_CAN Message Marker, an 8-bit field copied from Tx Buffer
elements to Tx Event FIFO elements to aid software in identifying Tx frame
status, need not be split into an index and a count, as the count is
unused.
Remove this split and replace "struct can_mcan_mm" with a simple "uint8_t".
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The Message RAM layout used by the STM32 FDCAN IPs contains a fixed number
of elements, even though the software can opt to use less standard/extended
filter elements. Change the BUILD_ASSERT() statements to reflect this.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Let the Bosch M_CAN front-end drivers supply their own Message RAM
read/write/clear functions.
This is preparation for supporting per-instance Bosch M_CAN Message RAM
layouts and for accessing Bosch M_CAN IP cores over peripheral busses.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Switch the Bosch M_CAN devicetree binding to use a bosch,mram-cfg property
for specifying the memory layout of the Bosch M_CAN Message RAM. This is
identical to the Linux kernel devicetree binding for Bosch M_CAN IP core
based CAN controllers.
This introduces an offset cell which can be used for controllers with
shared Message RAM between Bosch M_CAN instances.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Document that the Bosch M_CAN read/write register functions are allowed to
return -ENOTSUP for unsupported registers.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Basically, once a pin is configured for interrupt, we enable the latch
on it, in order not to miss short pulses.
The bottom half of the interrupt then reads the input port twice, to
read the latch and then read the potentially new state of the pins, to
compute the posedge, negedge, and level callbacks accordingly.
Signed-off-by: Vincent Geneves <vgeneves@kalray.eu>
When accessing GPIO by pin, access only the required port register
(instead of systematically accessing both PORT0 and PORT1).
Signed-off-by: Vincent Geneves <vgeneves@kalray.eu>
In case of BG95 where there is no reset pin, reseting the board
which uses a BG95 modem could result in powering-off the modem
(as oposed to "reset" the modem). This commit is an attempt
to handle this case and re-power the modem.
Signed-off-by: Andrei Hutanu <andrei.hutanu.i@gmail.com>
Using bg9x driver with bg95 specifically has the issue that BG95
modem replies with "RDY" when it's not fully initialized and AT
commands sent to the modem after this point would result in modem
reply of "ERROR". This commit adds a new prj.conf field in the build
configuration for custom unsolicited app ready string, with
the default being BG96 one ("RDY").
Signed-off-by: Andrei Hutanu <andrei.hutanu.i@gmail.com>
The BG95 pin configuration does not internally ever use the reset pin.
Because of this, there is no need to make reset pin mandatory.
Commit removes reset pin dependency [e.g. in case of BG95].
Signed-off-by: Andrei Hutanu <andrei.hutanu.i@gmail.com>
Add a property to the ADC channels which allows the configuration
of the current source pin.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
This PR relocates the sensor trigger sample application from the
`sensor_shell` sample to a subcommand in the actual sensor shell. The
subcommand has a UI for enabling a given trigger on a given sensor.
A built-in handler for the data_ready trigger is included that prints
the latest data to the log. Currently, only `SENSOR_TRIG_DATA_READY` is
supported but the groundwork is there to add others. Tested on a
`tdk_robokit1` board.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
Clean up whitespace etc. using clang-format after previous changes. No
functional changes intended.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Added support for interrupt-driven GPIO for this driver if an interrupt
line is defined. Note that interrupt support is optional in the GPIO
core so it may or may not be present.
The core provides a single state change notification whenever any line
changes state on a given bank, so we need to check the states of the
lines ourselves to determine what has actually changed.
Also, the driver treats the first and second GPIO banks as mostly
separate devices, but a single interrupt is shared by both banks, so the
ISR ends up being registered by the first bank which also triggers
handling on the second bank if required.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
The properties being read for the all-inputs and all-outputs flags in
the driver for the second GPIO channel did not match the ones listed in
the DT schema or the existing device tree files. Fix this.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
Added to the configuration function to enable
channel chaining for the DMA_LPC that utilizes
the total of the SOC OTrig channels.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Use CONFIG_USB_DC_NXP_LPCIP3511 instead of FSL_FEATURE_USB_USB_RAM
as the behaviour variation is based on the SDK driver used and not
if the SoC has a dedicated USB SRAM.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Conditionally enable the USB_DC_HAS_HS_SUPPORT as the
USB_DC_NXP_LPCIP3511 controller can have both HS and FS only.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Ports the Jinghua Display JHD1313 LCD (with RGB backlight) driver
to use the new auxdisplay driver interface. This driver is used on
the seeed grove LCD RGB display, and replaces it.
Signed-off-by: Jamie McCrae <spam@helper3000.net>
If you compile this code with Clang it will complain about casting a larger
type into a smaller enum.
```C
zephyr/drivers/clock_control/clock_control_nrf.c:120:37:
warning: cast to smaller integer type 'enum clock_control_nrf_type'
from 'clock_control_subsys_t' (aka 'void *') [-Wvoid-pointer-to-enum-cast]
enum clock_control_nrf_type type = (enum clock_control_nrf_type)subsys;
```
Adding `size_t` to the cast removes this issue. Another option could be to
add `-Wno-void-pointer-to-enum-cast` flag to the compile flags.
Signed-off-by: Sigvart Hovland <sigvart.hovland@nordicsemi.no>
The indended value for the delay after the software reset of adxl372 is
1ms. Adjust the value accordingly.
Fixes: a3e7cea
Signed-off-by: Antoniu Miclaus <antoniu.miclaus@analog.com>
Driver should just say the channel is not busy if
it is not setup rather than returning an error.
Also, change the channel index to int8_t rather
than uint32_t since it is being assigned negative
values and that width is more appropriate.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Clean up slashes in init macro to be less messy
Update copyright to reflect recent code changes by NXP
Update outdated driver description comment
Change irq driven api variables naming to be more specific
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The flexcomm uart mcux driver init macros have a lot
of unnecessary and confusing redundancy, so let's
simplify them.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The NPCX I2C controller has a port-controller hierarchy and the driver
is split in two files, with separate device struct and init functions.
These are currently initialized at the same level and priority, so the
actual order depends on what the linker does.
To avoid relying on the linking order, add a dedicated priority option
for the port that is set to go after the normal I2C one by default.
Found this by building with CONFIG_CHECK_INIT_PRIORITIES.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The uart_ite_it8xxx2 is relying on a node that depends on a matching
ns16550 symbol, such as:
ite_uart1_wrapper: uartwrapper@f02720 {
compatible = "ite,it8xxx2-uart";
...
uart-dev = <&uart1>;
};
But the two are currently setup to initialize at the same level and
priority. Add a dedicated priority symbol so that the wrapper device is
always initialized after the main one, regardless of the linker order.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Always clearing the interrupt status register was causing issues for
the sensor shell when interrupts were enabled but trying to read
one-off samples.
Signed-off-by: Yuval Peress <peress@google.com>
Update the sensor shell logic to use the new sensor_read() APIs and
make triggers an option of the sensor_shell sample (this avoids the
trigger stealing the interrupt status from one-shot reads).
Signed-off-by: Yuval Peress <peress@google.com>
Add a new async API based on the RTIO subsystem. This new API allows:
1. Users to create sampling configs (telling the sensor which channels
they want to sample together).
2. Sample data in an asynchronous manner which provides greater control
over the data processing priority.
3. Fully backwards compatible API with no driver changes needed for
functionality (they are needed to improve performance).
4. Helper functions for processing loop.
Signed-off-by: Yuval Peress <peress@google.com>
Enable direct framebuffer rendering using DCNANO LCDIF, to improve
performance when the call to display_write is attempting to refresh
the full display.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Enable the ELCDIF driver to directly write the framebuffer using
hardware, when an entire framebuffer update is requested. This will
enable better performance for applications that avoid partial
display updates.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Added intel LPSS DMA interface using dw common to support
usage of internal DMA in LPSS UART, SPI and I2C for
transfer and receive operations.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Added support for 64bit address source and destination
usage for dw common.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Use the DMA reload flag to indicate we wish to use
a circular chain of DMA descriptors to reload DMA
receive buffers.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
1. Transfers are not limited by XFERCOUNT transfer length of
LPC DMA descriptor. Added code to handle block sizes
greater than XFERCOUNT.
2. Use the reload_en flag to decide if we should setup
a circular descriptor chain.
3. Improve handling of source and destination width.
4. Number of DMA descriptors are defined by a Kconfig value.
5. Changed the dma_reload function to handle transfers
greater than XFERCOUNT.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Adds PHY driver. Works via MDIO API and
exposed ADIN2111 MDIO Clause 45
functions.
Link status detection is triggered by
ADIN2111 driver within offloaded IRQ
handler.
Supports:
- LED0, LED1 enable/disable
- Fatal HW error detection
- AN 2.4V tx mode enable/disable
The initialization order is important.
PHY 2 must be initialized after PHY1.
Therefore, it shall be defined after the 1st one
in the devicetree.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Adds MDIO driver. Works via exposed
ADIN2111 functions.
It is possible to access Clause 45 and 22 registers.
Due to MDIO API limitation Clause 45 access
is done using driver specific MDIO functions.
Provides API and functions for PHY driver.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Adds initial ADIN2111 2-Port 10BASE-T1L (SPE)
switch support. Works over SPI.
The driver creates 2 interfaces, 1 per port (PHY).
Configures multicast and broadcast filters.
The same unicast is applied to both ports.
Supports:
- Link state detection
- CRC enable/disable
- Ports config set
- Ports ETH stats
Provides functions for MDIO driver.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
The OpenTitan watchdog driver is a watchdog driver that can be configured
with two stages: a watchdog "bark", which generates an interrupt, and a
watchdog "bite", which resets the system. The two-stage watchdog can be
enabled by setting CONFIG_WDT_MULTISTAGE=y. Otherwise, the driver
functions as a single-stage watchdog.
A callback function may be set for the bark interrupt through the
wdt setup interface, but will only be used if the two-stage watchdog is
enabled. It must be configured for the first watchdog stage.
The driver controls only the watchdog portion of the OpenTitan AON timer.
Signed-off-by: Tyler Ng <tkng@rivosinc.com>
All posix arch boards are required to provide the same
tracing/print API.
So, instead of having a different driver for native_posix and the
bsim boards, let's have a common one which uses this API.
This in turn results in the printk strings being printed in
the same underlaying backend as before with individual drivers.
A part from this, the native_posix console driver was a full
backend for the now long gone Zephyr console shell
(named legacy_shell from 527256501f
until it was retired in fd0b7f7767).
The whole input handling in this driver was dead code
(since 140a8d0c8a)
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This commit enabled the Silicon Labs Bluetooth interface driver on the
EFR32BG27 SoC series in the Kconfig.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
This commits adapts the driver to the newer version of the EFR32 BT
blobs:
* libbluetooth_controller
* libbgcommon
* librail
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
Since not all GPIOs support voltage selection, configure voltage
selection register only if it is present.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
This adds support for the USB interface for the
Renesas Smartbond DA1469x device family.
Co-authored-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Signed-off-by: Niek Ilmer <niek.ilmer.aj@renesas.com>
Copy the LUT to SRAM before updating it. This avoids the application
reading LUT entries from FlexSPI while trying to write them to FlexSPI
configuration registers, which could result in invalid LUT entries being
added.
This update is applied to all in tree flash FlexSPI drivers, although
the failure has only been observed with the flash_mcux_flexspi_nor
driver.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add I2C target mode support for NPCX i2c driver. Verified with
i2c_target_api test suite on npcx9m6_evb.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Clean up the include/source lists in the sensors subsystem. Sort the
list, drop the empty lines that makes it look super long for no good
reason, get away with the tabs to align the file names that does not
really work anyway.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This make MCUboot build as Zephyr application.
Providing optinal 2nd stage bootloader to the
IDF bootloader, which is used by default.
This provides more flexibility when building
and loading multiple images and aims to
brings better DX to users by using the sysbuild.
MCUboot and applications has now separate
linker scripts.
Signed-off-by: Marek Matej <marek.matej@espressif.com>
Like other stm32 drivers, especially the stm32 flash ospi,
the DMA callback accepts a null or positive status.
It returns an error in case of negative.
BTW it also sets variable as unused, like stm32 flash ospi does.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Define two macros for calibration and oversampling for STM32 series that
possess these features, and use these macros instead of a list of series.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Rework oversampling by creating a const table containing possible
oversampling values and using this table instead of switch case.
Also disable ADC for all series before setting oversampling.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
'bw' parameter in 'lora config' command has a range of 0 to INT8_MAX.
However possible values of 'bw' (125, 250, 500) don't fit this range
and we need to extend it to 0 to INT16_MAX.
This fix has been tested on custom board with STM32L4 and SX1276.
Signed-off-by: Petr Sharshavin <sharshavin@mail.ru>
Calling for can_stop() method was not emptying FIFOs
and tx_msgq.
Resetting TX FIFO to empty it.
Emptying tx_msgq with "ENETDOWN" return code.
Fixes#50546
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Make sure MFD driver for nPM6001 gets built, and, that watchdog driver
comes later in the init sequence.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Make sure MFD driver for nPM6001 gets built, and, that GPIO driver comes
later in the init sequence.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add an API-less MFD driver for nPM6001. In this case, the MFD device
driver doesn't expose any API as plain I2C API is used within other
device drivers (regulator, GPIO, watchdog). This driver just initializes
some device properties.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Introduce the skeleton for multi-function device drivers. This driver
class is inspired by the same class found in Linux. Multi-function
devices expose multiple functionalities, for example, a LED driver,
regulator, GPIO controller, etc. The MFD driver class serves as a kind
of "parent" device where common functionality can be managed: bus
access, IRQ sharing, initialization code, etc.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Using EM2 or deeper sleep states (where HF clocks are off) requires
special care if BLE radio is used, since BLE radio relies on that clock,
and its power/clock requirements need to be taken into account
On SiLabs, radio PM is implemented as part of RAIL blob, which relies
on sl_power_manager HAL service. I've implemented SoC PM
state changes using sl_power_manager instead of emlib, and added
call to RAIL PM initialization in Gecko HCI driver.
Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
Before BURTC is initialized, clock to its APB CSR file is stopped, so
any attempt to read BURTC regs results in BusFault. However,
many parts of Zephyr may call sys_clock getters even before sys_clock
driver itself is initialized. This change adds support for that:
sys_clock_elapsed() and sys_clock_cycle_get_32() simply return 0
if BURTC is not init yet.
Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
The common init priority is a leftover from a previous implementation.
Remove it as it's not used.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Over time, some non-standard concepts and extensions were introduced
into the stack (in KConfig, in drivers, in the internal API and into the
implementation) which makes introduction of additional standard-
compliant extensions like TSCH (and others) unnecessarily difficult.
To introduce extensions like TSCH it is required for the IEEE 802.15.4
stack to become more structurally aligned with the standard again which
will be the focus of some of the upcoming preparatory changes.
One way to check and prove standard compliance is to reference the
standard from within the source code. This change therefore introduces
inline references to the IEEE 802.15.4-2020 standard wherever possible.
Deviations from the standard are documented with TODO or deprecation
labels to be addressed in future changes.
In the future, new code introduced to the IEEE 802.15.4 stack should
be documented and reviewed for standard-compliance to avoid further
divergence. Most importantly:
* MAC/PHY configuration (via net mgmt, radio API, devicetree or
KConfig) should always be directly linked to well-defined MAC/PHY
PIB attributes if visible to the MAC API or the end user.
* Net management/shell/radio API commands should have a documented
reference to the corresponding MLME action from the standard.
Signed-off-by: Florian Grandel <fgrandel@code-for-humans.de>
Functions nrf_802154_serialization_error and
nrf_802154_sl_fault_handler shall never return.
However `__ASSERT()` might expand to an empty instruction
CONFIG_ASSERT=n and is not enough to stop execution.
Signed-off-by: Andrzej Kuroś <andrzej.kuros@nordicsemi.no>
Add STM32C0 SOC to combined interrupt config in order to
make it support the I2C driver.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
Add a new regulator driver for Analog Devices ADP5360. While it is a MFD
device, only support for BUCK/BUCKBOOST regulators is added in this
patch.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
If an operational amplifier is used on the DAC output it is
preferrable to disable the DAC output buffer.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Make it possible to be able to change speed and duplex for the
STM32H7xx and API_V2 from the configuration settings.
This exists for the non-STM32H7x already today, so this is basically
copying the code for the other STM32's.
Please note that ST has a series incompability. For F1 and F2,
the duplex settings are named ETH_MODE_FULLDUPLEX respective
ETH_MODE_HALFDUPLEX. For F4, H7 and F7 the duplex settings are named
ETH_FULLDUPLEX_MODE respective ETG_HALFDUPLEX_MODE.
This should really be queried from the PHY (as previous programmer have
written in the code). But while waiting for a proper PHY solution,
this is intended as a stop-gap solution.
Signed-off-by: Stefan Petersen <spe@ciellt.se>
Since aadca692b3
the board code already sets the stdout/err buffering,
even if there is no console driver;
So there is no need to set it also in the console driver.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
It is possible that stm32_clock_control_init function is started
when the image is chain-loaded and hardware clocks are already
initialized to some state (PLL1).
Currently due to an assert in get_startup_frequency function
(which will trigger k_fatal_halt) the boot will stop on the
early stage if CONFIG_ASSERT=y. This is reproducible for example
with standalone MCUboot and TF-M with MCUboot.
Fixed by adding support for HSE and PLL1 clock sources at
get_startup_frequency.
Signed-off-by: Denis Mingulov <denis@mingulov.com>
Add VREF+ sensor driver and DT node definition.
This driver allows determining the actual voltage applied to an SoC's
VREF+ pin, by comparing the VREFINT internal bandgap voltage reference
with its factory calibration data.
In packages where VREF+ is bonded to VDDA, this permits direct measurement
of VDDA voltage.
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
Logic was wrong when testing if a slave is still attached. And i2c
driver was never disabled.
Test if one of the two slave_cfg pointer is not NULL to return
immediately.
Signed-off-by: Vincent Geneves <vgeneves@kalray.eu>
Since the introduction of the second slave address support, slave_cfg
pointer may be NULL when entering slave event function.
It happens when both targets are registered and then the first one is
unregsitered.
Test the pointer vs NULL before using it.
Signed-off-by: Vincent Geneves <vgeneves@kalray.eu>
Without this change, there's a difference between what the V2 Ethernet
HAL claims to be its capabilities in eth_stm32_hal_get_capabilities()
and what is actually enabled when CONFIG_ETH_STM32_HW_CHECKSUM is
disabled. This difference somehow causes the checksum in outgoing
packets to become 0, and hence seems to break networking at least on
some PHYs.
This commit disables HW checksums by default even when V2 driver is in
use, and this hence fixes networking when CONFIG_ETH_STM32_HW_CHECKSUM
is disabled.
This fixes#57629.
Signed-off-by: Ole Morten Haaland <omh@icsys.no>
Introduce DesignWare ARC Data Fusion IP Subsystem(DFSS) SPI
driver for ARC boards, i.e. EMSDP, which uses DW SPI to controll
SPI-Flash and DFSS SPI to connect external devices. Both drivers
share most source code, but DFSS uses ARC auxiliary registers.
Move FIFO depth setting to device tree.
Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
Renesas Renesas SmartBond(tm) have two ADC blocks:
GPADC and SDADC.
This change adds drivers for both.
Each ADC supports only one channel setup, drivers allow
to have multiply channels in sequence. Switching
between ADC sources in done in software.
GPADC has 10 bit resolution (accuracy can be increase
with oversampling). Values up to 3.6V can be measured
on selected pins. V30 and VBAT1 can also be measured.
SDADC has 14 bit resolution and can take measurements
from 8 pins (single of differential) and VBAT.
Signed-off-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
This is a follow-up to commit 223cc3c6bd.
When a peripheral pin is disconnected, the pinctrl driver should skip
applying of GPIO configuration, as there is no pin number available in
such case, but due to an incorrect check, it actually did not skip it
and used an incorrect pin number for that. In nrfx prior to 3.0.0, this
caused an assertion failure, but because of a fallback routine, things
could still work in most cases (when assertions were disabled) as that
GPIO configuration was just applied to P0.31. Hence the bug was not
discovered until now. In the recent nrfx, this causes a null pointer
dereference, so always a crash.
This commit corrects the mentioned check and also uses the term "psel"
instead of "pin" where it is possible that the value is not a correct
pin number, in the hope of preventing a similar problem in the future.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Until now iterable sections APIs have been part of the toolchain
(common) headers. They are not strictly related to a toolchain, they
just rely on linker providing support for sections. Most files relied on
indirect includes to access the API, now, it is included as needed.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The i2c_npcx_controller does not actually implement the i2c API, that's
implemented in the port driver and the controller one is in support of
that. This means there's no need to use the I2C specific instance
define, as that would end up adding the stats structure that would never
get used.
This was originally added in 7b1349cfe6.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Status readback has been added in the latest silicon revision.
.port_get_raw and .port_toggle_bits are now supported
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
Replace memcpy usage in write since it is not linked to non-external
flash which might cause read-while-write issues.
Move the function that invalidated the data cache inside the critical
section to avoid context switch before it is invalidated.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Check memc_flexspi_is_running_xip before calling
memc_flexspi_set_device_config in hyperflash init.
This aligns with the nor flash driver.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Hyperflash write operations resulted in invalid writes. This commit
fixes the issue by temporarily lowering the clock during writes.
This aligns with the mcux-sdk-examples.
Fixes https://github.com/zephyrproject-rtos/zephyr/issues/53855
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Add a function to update the flexspi bus clock. This is
needed when write operations are done to the hyperflash.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Driver was based on can_sam. SAMC21 has only 1 interrupt for one
can "output", so can interrupt has to executes two lines of
interrupts.
CAN is configured to use OSC48M clock via GLCK7. GLCK7 is set
by divider configured from dts.
Signed-off-by: Kamil Serwus <kserwus@gmail.com>
Looks like a copy/paste error when copying runtime to empty to runtime
to full. Fixing so that we're assigning to the right union member.
Signed-off-by: Peter Rowley <perowle@microsoft.com>
The buffer registers (chemistry, manufacturer name, device name) were
not implemented. Implemented by adding a new api interface for
retrieving buffer properties. fuel_gauge_get_block_property has been
added, and uses a memory buffer allocated in the app in order to
store the fuel gauge information.
Signed-off-by: Peter Rowley <perowle@microsoft.com>
Current driver only allows state-of-charge. Adding relative-state-
of-charge and absolute-state-of-charge to differentiate between the
different types. Updated sbs and max drivers to support new enum.
Discussed in issue #57523
Signed-off-by: Peter Rowley <perowle@microsoft.com>
For systems with a true dynamic 1-Wire nature, the 1-Wire devices
cannot be defined in the DeviceTree (the number of slaves in
the system is not known during the build time).
In other words, there are no pre-defined 1-Wire devices on the bus in
DeviceTree, and thus the slave_count variable is always zero.
That means the skip_rom functionality will always be called even if
there are multiple devices connected to the bus.
This commit allows the user to override this original behavior and avoid
the skip_rom call by ignoring the slave count variable.
Also, this work preserves full backward compatibility.
Signed-off-by: Pavel Hübner <pavel.hubner@hardwario.com>
Add a driver for the Xilinx AXI Timebase WDT logic core. This can be
instantiated on various Xilinx FPGA-based platforms such as the
Digilent Arty, although it is not part of the default image used with
the Zephyr board configuration.
The driver can also optionally implement the HWINFO API to allow
determining whether the last system reset was initiated by the WDT.
Since this is a standalone IP core which could be used a variety of
configurations, this support is optional in case the system/SoC it is
used with already implements this support.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
This driver implement basic functions of ili9342c controller
which comes mostly with IPS displays.
Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
The i2c shell write command outputs the error "Failed to read from
device" while it tries to write data to device.
This fixes the error by outputting "Failed to write to device" instead.
Fixes:
uart:~$ i2c write i2c@3ff53000 23 01
Failed to read from device: 23
Signed-off-by: Gaël PORTAY <gael.portay@rtone.fr>
This patch enables the PLL clock output and PLL ref clock
for second ethernet module in NXP's i.MxRT106x SoCs
Signed-off-by: Sumit Batra <sumit.batra@nxp.com>
1. spi.h is included twice. Remove one of the two "#include"
declarations.
2. The 'if' clause requires braces even for one line body.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The LSM6DSV16X is a system-in-package featuring a 3-axis digital
accelerometer and a 3-axis digital gyroscope for industrial and IoT
solutions. The LSM6DSV16X embeds advanced dedicated features such as
a finite state machine (FSM) for configurable motion tracking and a
machine learning core (MLC) for context awareness.
https://www.st.com/en/mems-and-sensors/lsm6dsv16x.html
This driver is based on stmemsc HAL i/f v2.02
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Current implementation of `nrfx_pwm_stopped_check()` doesn't work
as expected when user doesn't provide event handler.
Workaround for that is to use low level function for checking whether
STOPPED event arrived.
The workaround should be removed when `nrfx_pwm_stopped_check()`
will contain needed functionality.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
Set a thread name for the npcx keyboard scan task so it can easily be
identified in the stack dump shell command.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Various coding style fixes, typos, and others on the NPCX keyboard scan
driver. No functional changes.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Convert the NPCX keyboard scan driver to the input subsystem and add the
input to kscan compatibility driver to maintain functionality with the
current API.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
video_mcux_csi_init, which setups the CSI pins (i.e: calls
pinctrl_apply_state) was called after mt9m114_init which tries to do i2c
communication with the camera to read the chip id. But since one of the
CSI pins is the camera master clock, doing things in this order won't
work. This PR inverts the order in which the devices are initialized.
Signed-off-by: Michele Balistreri <michele@bitgamma.com>
The function to enable wakeup from deep sleep modes is not
available on all SoC's. Hence compile this only when the
wakeup_source property is enabled.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Change init level of the mcux lpc dma driver to be
PRE_KERNEL_1 because some other hardware drivers
used on the same platforms as the lpc dma will be
dependent on the LPC DMA and are also initialized
in PRE_KERNEL_1, such as the Flexcomm UART driver
when using UART_ASYNC_API.
Therefore, remove k_malloc from init function and
make those variables statically defined instead of
heap allocated.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Some miscellaneous fixes to LPC DMA driver regarding status tracking:
- If a DMA channel has not been configured for any transfer,
there will be a bug caused by the virtual channel being -1
and then trying to index -1 into the driver data structs.
Add -EACCES return code to indicate this situation.
- Return -EINVAL from get_status if channel number is invalid
- Update the busy flag in the LPC DMA callback function.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Fixes for bug:
https://github.com/zephyrproject-rtos/zephyr/issues/57560
* don't do CCC if no i3c devices in device tree
* don't wait for MCTRLDONE status when issuing stop
* don't do data part of transfer if buf_sz is 0
* don't limit transfers to only i2c devices in the device tree
so "i2c scan" shell cmd works as expected
Signed-off-by: Mike J. Chen <mjchen@google.com>
Commit 246393e830
("drivers: spi: spi_nrfx_spim: Remove nrf_frequency_t handling")'
introduced two changes, one of them is removing the function
get_nrf_spim_frequency with a strange justification.
This change breaks support for peripherals written in a common way,
where the maximum frequency is set to the maximum supported
by the peripheral, not the controller, see shields for example.
On the occasion of bringing it back, the original function was
refactored to be easier to read and understand.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add a USB device controller driver skeleton to use as a starting point
for implementing a specific driver.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
API function:
- `pl011_irq_tx_enable` is expected to enable and trigger TX interrupt.
Due to HW limiation, PL011 won't trigger TX interrupt if some data
wasn't filled to TX FIFO at the beginning. So that `isr_cb` must be
called at first time to enable TX irq.
- `pl011_irq_tx_ready` will return true when FIFO can accept more
data. Here we don't need wait TX FIFO to be empty.
- `pl011_irq_tx_complete` will return true when all data have been
sent from the shift register.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
To reduce the interrupt latency of MIWU events, the driver prepares a
dedicated callback function item list for each MIWU group in this PR. We
needn't check the MIWU table and group of the event in ISR. And the
maximum item number of each list is also limited to 8. After applying
this PR, the interrupt latency reduces to ~10us consistently.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Glitches were observed if a GPIO pin was configured by
ROM to a non-default state and then Zephyr PINCTRL
reconfigured the pin. The fix involves using the correct
PINCTRL YAML output enable and state flags. Reading the
current spin state and reflecting into new pin configuration
if the pin is output and the drive low/high properties are
not present. We also take advantage of GPIO hardware reflecing
the alternate output value in the parallel output bit before
enabling parallel output mode. Interpret boolean flags with
both enable and disable as do not touch if neither flag is
present. We give precedence to enable over disable if both
flags mistakenly appear. Note, PINCTRL always clears the
GPIO control input pad disable bit.
Signed-off-by: Manimaran A <manimaran.a@microchip.com>
A glitch was observed if a GPIO PIN was configured to a
non-default state by ROM and then Zephyr programs the pin
for the same configuration. Root cause is GPIO hardware
implementing two output bits for each pin. The alternate
output bit is in the pin control register and is r/w by
default. The other bit exists in the GPIO parallel ouput
register and is read-only by default. The hardware actually
reflects the pin's output value into both bits. The fix is
to configure the pin with alternate output bit read-write
and the last step is to disable alternate output which
enabled read-write of the parallel bit. GPIO API's can
then use the GPIO parallel out registers. Add logic to
return an error from the GPIO interrupt configure API if
a pin is not configured as an input. Hardware only performs
interrupt detection if the input pad is enabled.
Hardware supports a pin being configured for both input
and output. Applications should add the GPIO_INPUT flag
to all pin configuration requiring interrupt detection.
The interpretation of input and output flags for the
get configuration API appears to be only one of the
flags can be set. Please refer to the GPIO driver tests.
Updated GPIO interrupt configure to clear the input pad
disable bit due to interrupt detection HW is connected
only to input side of pin.
Signed-off-by: Manimaran A <manimaran.a@microchip.com>
Bug 1: Fix lsm6dsl_gyro_set_fs_raw does not clear FS125 to register when
setting the full range to be other values.
Bug 2: Fix lsm6dsl_gyro_channel_get does not use the current
gyro_sensitivity when getting data from the gyroscope.
Signed-off-by: Jackie Yang <jackie@jackieyang.me>
Several sections of the STM32 ADC driver are #ifdef by a combination of the
same SOC defines that share similar IPs. These are F2/F4/F7/L1, and
F1/F37x.
Each of these combinations is now replaced by a specific compatible, which
makes the code a bit lighter and more succinct.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add ifdef around some functions that don't exist for STM32F37x (ADC_V2_5)
like it is done for STM32F1x.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Inverts the logic of some #ifdef, replacing lists of newer series by a
list of NOT older series. This makes it shorter, and more future-proof as
future series are more likely to work out of the box, without need to
manually add a new define in each place.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Some STM32 families that need to check the ADRDY flag after enabling the
ADC were not doing it. The #ifdef has been updated to fix that.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Fix a compilation error for the ethernet driver smsc91x that
prevents the build with asserts enabled.
Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
This commit adds BLE support to the `efr32xg24_dk2601b` board. It also
modifies the SiLabs BT HCI driver to accomodate the EFR32xG24 SoC
series.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
BDCR and PWR_CR could be required for LSE or RTC for instance.
Enable it here as for now, no sophisticated PM handling is available
on F0 and F3 series.
Fixes#56449
Fixup for #56505
Signed-off-by: Kay P <kayo@illumium.org>
rx_thread() is started by eth_initialize(), while dev_data->iface is
populated by eth_iface_init() (called by net_init()).
Usually eth_iface_init() has completed by the time rx_thread() hits its
idle timeout and accesses dev_data->iface, but in case of a time-intensive
SYS_INIT item between eth_initialize() and net_init(), this is not
necessarily the case, causing a NULL dereference. This can be forced by
putting a k_sleep(K_SECONDS(5)) at the top of eth_iface_init().
Start rx_thread() in eth_iface_init() instead (which runs after
eth_initialize() due to init priorities) to make sure everything is
initialized properly.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Allows Ethernet communication between "cells"
in the Jailhouse hypervisor.
The vring queue deviates from a standard virtqueue
so is implemented separately.
Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
This allows finding the correct PCIe device when multiple devices
have the same vendor-id/device-id but differ in the class-rev register
Signed-off-by: Grant Ramsay <gramsay@enphaseenergy.com>
Driver init should be using instance based macros,
not nodelabels numbering, there is no guarantee
about which nodes will be assigned which instance numbers.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Add Kconfig guards for CONFIG_CAN_MAX_STD_ID_FILTER and
CONFIG_CAN_MAX_EXT_ID_FILTER as they only apply to the STM32 bxCAN driver.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Remove the STM32H7 specific Kconfig overrides for setting the maximum
number of standard and extended CAN RX filters as they are unused.
The number of available standard and extended filter elements for Bosch
M_CAN can be configured via the devicetree.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The SSD16xx driver used to use the SCREEN_INFO_DOUBLE_BUFFER flag to
indicate to the LVGL integration that it needs writes to be performed
twice. This was required because partial writes require both the old
and new buffer to be written.
This behavior is really an implementation detail and only applies to
partial refresh. Do this buffer maintenance in the driver instead.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Remove the optional call to ssd16xx_update_display() in
ssd16xx_clear_cntlr_mem(). This doesn't really belong in that function
and just adds a non-obvious boolean argument to the function.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Add support for partial refresh profiles. This makes it possible to
use partial refresh on generation 2 devices which are able to store
partial refresh LUTs in OTP.
Partial refresh is only enabled if a partial profile has been
provided. The display will use the full refresh profile if in this
case.
Devices that need custom LUTs and voltages can specify them separately
for the full and partial profiles. The controller will be reset when
changing profiles which means that profiles always override the
default reset values. This means that it is, for example, possible to
use default values and LUTs from OTP for a full refresh and a custom
profile for partial refreshes.
For example, to use a GoodDisplay GDEY027T91 with partial refresh
simply use the following device tree fragment:
display: ssd1680@0 {
compatible = "solomon,ssd1680";
spi-max-frequency = <4000000>;
duplex = <SPI_HALF_DUPLEX>;
reg = <0>;
dc-gpios = <&arduino_header 15 GPIO_ACTIVE_LOW>;
reset-gpios = <&arduino_header 14 GPIO_ACTIVE_LOW>;
busy-gpios = <&arduino_header 13 GPIO_ACTIVE_HIGH>;
/* Enable the built-in temperature sensor */
tssv = <0x80>;
width = <264>;
height = <176>;
/* Enable partial refresh using built-in LUT */
partial {
};
};
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Update the device tree bindings for the SSD16xx driver to make it
possible to specify multiple refresh profiles.
The only profile currently supported is the 'full' profile.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The SSD16xx driver currently provides basic support for most chips in
the Solomon Systech SSD16xx range of e-paper drivers. We currently use
the SSD1608, SSD1673, SSD1675A, and SSD1681 in various boards
supported by Zephyr.
The main user-facing difference between the various SSD16xx chips is
the resolution they support (sources & gates), but there are other
differences as well. For example:
* 8 or 16 bits used to represent x coordinates
* 8 or 16 bits used to represent y coordinates
* Differences in refresh configuration (SSD16XX_CMD_UPDATE_CTRL2)
* Differences in LUT sizes
The driver currently assumes that the user specifies the number of
bits used to describe coordinates. However, as we add support for more
chips, more of the differences will become apparent and need
workaround.
Comparing data sheets from different chips in the SSD16xx range
suggests that there are (at least) two different generations
present. These differ in the size of the LUTs they expect and the way
they handle partial refresh. This impacts register layout where
SSD16XX_CMD_UPDATE_CTRL2 uses bit 3 selects "mode 2" whereas older
devices uses this for a mode referred to as "initial".
In order to add support for partial refresh in newer devices, we need
to be able to distinguish between the different generations of the
chip. It might be possible to add a DT property to indicate the
revision, but that seems like a bit of an anti-pattern and it would be
hard for users to specify the correct chip generation.
This change introduces chip-specific compatible strings instead of the
generic SSD16xx. There is unfortunately clear pattern that can be used
to distinguish different generations, so the full chip name must be
specified. A benefit of this is that we don't need to specify the
width of the fields describing coordinates in device trees.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Only UVB_EVT_REQUEST type passes the pkt argument.
This was overlooked in the last refactoring and
resulted in a zero pointer dereference.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
LSM6DSL's datasheet [1] lists 1666, 3332 and 6664 as valid ODR values for
accel and gyro. Update those from 1660, 3330 and 6660.
[1] http://www.st.com/en/mems-and-sensors/lsm6dsl.html
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Commit e015c00300 ("sensor: add lsm6dsl sensor driver") that introduced
initial support for lsm6dsl used 245dps instead of 250dps. According to
referenced documentation at [1] the latter is correct.
Use value of 250 instead of 245 for gyro range.
[1] http://www.st.com/en/mems-and-sensors/lsm6dsl.html
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
This instance member is set as part of lsm6dsl_accel_set_odr_raw()
function, so there is no need to do it right before calling it.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Use the new dts properties for sampling time in the STM32 ADC driver:
- Get the sampling time from dts
- Remove all sampling time macro concatenation.
- Simplify/refactor setting of sampling time
- Check that sampling time is the same for all series using common channel
This also fixes a few cases where wrong sampling times were used for an
ADC instance (like ADC4 on U5, or ADC3 on STM32H723).
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
If clock frequency was already high and a ahb prescaler greater than 1
was used frequency could temporary become higher than allowed.
Signed-off-by: Benjamin Bigler <benjamin.bigler@securiton.ch>
Update LTDC driver to use LCDIF bindings, to simplify bindings
between LCD interface controller IP blocks.
Boards supporting the LTDC are also updated to use the properties as
declared by the new lcd controller binding
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Update MCUX ELCDIF driver to use new LCDIF bindings. This
update also adds support for configuring the root clock of
the ELCDIF module based on the pixel-clock property to the
RT11xx SOC clock init, as this SOC series has this IP block
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Update DCNANO LCDIF IP to use shared lcd interface binding. This
requires changes to the RT5xx SOC and RT595 EVK, as this SOC
uses the LCDIF IP, and configures the clock for it based off
the new pixel-clock property.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Introduce phy-clock property, which is used by MIPI devices to determine
the target clock frequency for the MIPI PHY. This property can vary
depending on the attached display and target framerate.
Update the MIPI DSI MCUX driver to utilize this property to configure
the MIPI host, and update the RT500 clock initialization to configure
the MIPI root clock based on this property.
Remove dphy-clk-div property from the MIPI DSI 2L binding, as it
is redundant with this change.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Move definitions of the STM32 FDCAN specific registers to the front-end
driver implementation and implement remapping of these registers to/from
the standard Bosch M_CAN registers.
Some of the STM32 FDCAN register bit fields are limited in size compared to
the Bosch M_CAN specification. This is due to hardware limitations on the
number of elements in the various sections of the Message RAM. Add build
assertions to ensure the number of elements specified do not exceed the
hardware limitations instead of using custom definitions for these fields.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Move definition of the NXP LPC MCAN specific Message RAM Base Address
register (MRBA) to the front-end driver implementation.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Some Bosch M_CAN IP core implementations use a fixed Message RAM
configuration, other use a fixed memory area and relative addressing,
others again have custom registers for configuring the Message RAM.
Move the responsibility for configuring the various Bosch M_CAN Message RAM
addresses to the front-end drivers. This removes some of the front-end
specific code from the backend. Provide a helper function for configuring
the most common variations.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Expose the can_mcan_read_reg()/can_mcan_write_reg() along with all the
Bosch M_CAN register definitions for use in Bosch M_CAN driver front-ends.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Let the Bosch M_CAN front-end drivers supply their own register read/write
functions.
This is preparation for handling non-standard Bosch M_CAN register layouts
directly in the front-end and for accessing Bosch M_CAN IP cores over
peripheral busses.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Use sys_read32()/sys_write32() instead of volatile struct for register
access. Be consistent in using unsigned constants in register
comparisons. Use locking around register read-modify-write operations.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This commit is a draft to support more controller implementations
with these drivers. The goal is also to make it easier to port
this driver to the new UDC API later.
We use compatible, like st,stm24f4-fsotg to support and enable
vendor-specific quirk. The core of the driver remains generic,
and therefore described and enabled by snps,dwc2 compatible.
STM32F4 support requires PINCTRL, even though pinctrl API is
generic, not all platforms implement it, so we have to include
and compile it conditionally.
Now we also switch to use new snps,dwc2 compatible and
explicitly force the controller into device mode,
as we do not support other roles or role changes.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add definition for GHWCFG1..4 registers to be able to obtain basic
information about PHY, endpoints, and Data FIFO.
Add GGPIO defines for STM32F4 SoC family USB controllers.
This implementation uses GGPIO to enable transceiver, VBUS
detection, and a few other functions.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Align and sort defines according to the position in memory.
Remove unnecessary parentheses.
Fix USB_DW_DSTS_ENUM_SPD_MASK.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Cleanup includes, fix build and missing kernel header include.
Move copyright notice to the top.
USB_DW_* macros are a bit misplaced in register header,
which is supposed to be about registers only.
USB_DW macro is used to point to base of controller register set.
Move it to driver code and add a new variable in driver's configuration
that takes the base address of the instance. This also makes later
porting to UDC API and support multiple instances easier.
Remove redundant DW_USB_IN_EP_NUM and DW_USB_OUT_EP_NUM
macros. Do not limit number of endpoint register in
struct usb_dw_in_ep_reg as it does not reflect common
register mapping of the controller.
Fix build warnings caused by USB_DW_EP_FIFO and use base variable
to calculate data FIFO access register.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
In the case that there is a situation where the controller
oscillator start-up timer doesn't expire, or the SPI can't
read the CLKRDY bit the driver would hang during init.
The config option ETH_ENC28J60_CLKRDY_INIT_WAIT_MS sets
the time that the driver will wait for OST before returning
an ETIMEDOUT error.
Signed-off-by: Dean Sellers <dsellers@evos.com.au>
According to the coding guidelines "dynamic allocation is not allowed".
This commit removes handling invalid DMA capable buffers by allocating
temporary buffer in a valid memory region, considering them as errors.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Add GDMA support for esp32s3.
Remove suspend/resume since they are optional and do
the same as start/stop.
Fix possible null pointer derreference.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
I2C driver overwrites i2c_msgs buffers, which
causes statistics to fail counting.
This creates new variables to hold msg buffer information.
Fixes#57532
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Mutexs were added to improve the overlapping phenomenon
because there is a part that shares the i2c line.
Signed-off-by: yeongnam chu <yeongnam.chu@assaabloy.com>
Add a function to wait for the full (bulk) Nor-octoflah erase command.
When erasing the full octo-flash, the drivers waits until
the operation is ready and the external NOR mem becomes ready itself.
The full (bulk) erase operation lasts for several seconds.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
- Update KCONFIG for flash driver to depend on
DT_HAS_FIXED_PARTITIONS_ENABLED, since that is necessary for the
driver implementation
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
Add driver for OpenTitan SPI host.
Tested and verified single SPI full duplex on opentitan_earlgrey in
Verilator.
Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>
Add a semaphore to the entropy mcux caam driver
to make the driver thread safe, since some static
variables in the HAL can be the source of
some race conditions.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Rather than the rings, which weren't shared between userspace and kernel
space in Zephyr like they are in Linux with io_uring, use atomic mpsc
queues for submission and completion queues.
Most importantly this removes a potential head of line blocker in the
submission queue as the sqe would be held until a task is completed.
As additional bonuses this avoids some additional locks and restrictions
about what can be submitted and where. It also removes the need for
two executors as all chains/transactions are done concurrently.
Lastly this opens up the possibility for a common pool of sqe's to
allocate from potentially saving lots of memory.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Renamed CONFIG_ADC_GECKO to CONFIG_IADC_GECKO to eliminate confusion
between the Incremental ADC found on series 2 silabs gecko MCUs, and the
ADC found on earlier gecko series.
Signed-off-by: Jared Baumann <jared.baumann8@t-mobile.com>
Introduce a new SiP SVC subsystem to provide ARM Silicon Provider based
supervisory call services. SiP SVC service provides the capability to
send SMC/HVC call from kernel running at EL1 to hypervisor/
secure monitor firmware running at EL2/EL3 and also added SiP SVC shell
commands to exercise the service.
Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>
Add driver for communicating with EL3/EL2 layer using smc/hvc call
for Silicon vendor Provided services for INTEL AGILEX SOC FPGA.
Signed-off-by: Mahesh Rao <mahesh.rao@intel.com>
Added device tree bindings and implementaion for setting the
spi controllers chip select setup and hold time settings.
Signed-off-by: Dean Sellers <dsellers@evos.com.au>
Most available AT45 flash chips have their first two sectors shorter
than the consecutive ones. Usually, the first sector is marked as 0a
and has its size equal to eight pages (one block) and the second one
(usually 0b) is the complement to the size of a regular sector.
This commits modifies the driver so that erasing of these first two
sectors is performed correctly. This modified behavior is configurable
with a new DT property so that it is still possible to also use legacy
AT45 chips that do not feature such sector split. Such legacy chips
usually also do not support the chip erase and sector erase commands,
so two more DT properties are introduced to cover that.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The HAL function PWM_SetupPwm does the inverse division to get the
number of pulses from the frequency.
In the case of a prescaler of 1 and a period of UINT16_MAX cycles
this would result in an uint16_t overflow.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
The LSM6DSO16IS is a system-in-package featuring a 3-axis digital
accelerometer and a 3-axis digital gyroscope for industrial and IoT
solutions. The LSM6DSO16IS embeds a new ST category of processing,
ISPU (intelligent sensor processing unit) to support real-time applications
that rely on sensor data. The ISPU is an ultra-low-power, high-performance
programmable core which can execute signal processing and AI algorithms
in the edge.
https://www.st.com/en/mems-and-sensors/lsm6dso16is.html
This driver is based on stmemsc HAL i/f v2.02
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add STMEMSC_CTX I2C/SPI/I3C macros that can be reused among all STMEMSC
based ST sensor drivers to populate the stmdev_ctx_t stucture.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Add test case for all drivers that are supporting the sensorhub
feature, and fix right away all the yet undiscovered issues.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
In the real MiV platform, UART does not have any interrupts routed to
the interrupt controller.
Up to this stage, the driver implemented a separate thread to simulate
interrupt operation to enable shell samples. This is not required anymore,
as Zephyr can run shell on interrupt-less UARTs.
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Re-enable reception on the UART instance when `UART_RX_DISABLED`
triggers, which can happen when errors occur on the line.
This stops the driver permanently moving into an unresponsive state.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
The emulated espi and i2c bus controllers do not depend on CONFIG_EMUL
being enabled. When these fake bus controllers are enabled by their
assoicated compatible in the devicetree without CONFIG_EMUL it results in
linker failures for underlying peripheral emulators which may be difficult
to understand. The SPI config already depends on EMUL.
Make the ESPI and I2C emulated controllers depend on CONFIG_EMUL. Note:
This still allows linker failures if CONFIG_EMUL=n, but the linker failures
will be consistently at device driver instantiation due to a missing bus
controller. Regardless, this will be easier to debug when someone forgets
to enable CONFIG_EMUL.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
The nrfx SPI driver depends on semaphores, which require multithreading
support to be enabled.
Signed-off-by: Eivind Jølsgard <eivind.jolsgard@nordicsemi.no>
- Added initial version of Infineon CAT1 Flash driver
- Added binding file for infineon,cat1-flash-controller.yaml
- Added overlays for subsys/nvs and drivers/flash_shell
to support cy8cproto_063_ble, cy8cproto_062_4343w boards
- Defined erase-block-size in PSoC6 MPN dtsi.
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
Use new nrfx hal function to memcpy from flash
instead of accessing the array directly.
That function is inlining a memcpy for real targets,
so there is no practical difference for those.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Add charging mode support the PI3USB9201 emulator and add a backend API
for connecting/disconnecting a portable device partner.
Signed-off-by: Keith Short <keithshort@google.com>
Update the result callback routine to also provide information about the
charging mode role. This permits tests to validate plug/unplug events
detected by the BC1.2 device operating in charging mode.
Signed-off-by: Keith Short <keithshort@google.com>
This PR adds a driver for the BMI323, which implements
the following features:
* Enable and disable accelerometer and gyroscope respectively
* Set full scale for accelerometer and gyroscope respectively
* Set data rate for accelerometer and gyroscope respectively
* Get samples (x,y,z) from accelerometer and gyroscope respectively
* Get die temperature
* Set trigger to accelerometer data ready, and accelerometer any motion.
The driver implements device and device runtime power management. If
runtime management is used, it is initialized into the suspended state,
which soft-resets the device to achieve the lowest possible power
consumption, otherwise it is resumed when initialized. When resumed,
the bus is initialized, the feature engine is enabled, and INT1 is
initialized.
The driver only implements the SPI bus at this time. The driver is
prepared to be expanded with I2C support in the future.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
Make use of positive status values in the DMA callback to pass
info to the DMA client after a successful DMA operation.
A completed DMA transfer uses the status 0 while a reached
water mark uses the status 1.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
Word size setting limited any SPI transaction to the frame
size. In addition to making the SPI inefficient this
broke drivers that set the word size. It appears that most
drivers use a one byte (8) size for this setting.
This change respects what I think is the intended use of
the word size setting. That is to set the length of
each element in a tx/rx buffer struct.
Signed-off-by: Dean Sellers <dsellers@evos.com.au>
Allow defining multiple instances of enc28j60.
Remove the ETH_ENC28J60_0 Kconfig option along with this.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Add the `full-duplex` property for the `microchip,enc28j60` node.
Replace ETH_ENC28J60_0_FULL_DUPLEX Kconfig option with this property.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
This patch adds MULTITHREADING as a dependency to the nrfx i2c driver.
The driver uses semaphores internally and can result in linker errors
if MULTITHREADING is not enabled.
Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
Updated the code to to invoke reset using PCR block
z_mchp_xec_pcr_periph_reset() instead of resetting
using I2C Configuration register
Signed-off-by: Manimaran A <manimaran.a@microchip.com>
Do not enable SOF event interrupt when the USB device driver is going to
discard the event anyway. This prevents completely unnecessary interrupt
handler from executing 1000 times a second when device is connected.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
nrfx 3.0 introduces parameter `_frequency` in
`NRFX_TIMER_DEFAULT_CONFIG()` macro. This patch aligns use of it.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
Reworked QDEC SHIM to suppor multi-instance peripheral. Patch includes
Kconfig alignment for proper instance handling.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
New nrfx release extended nrfx_i2s API and requires to specify
pointer to driver instance structure. This commit aligns SHIM
to reworked nrfx driver.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
Although existing nRF SoCs have only one I2S instance, the nrfx_i2s
driver has now multi-instance API and the related nrfx configuration
symbols need to be used appropriately.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
With new nrfx release SPIM driver stores frequency as a `uint32_t`
type representing frequency in `Hz` in its configuration structure.
Additionally `NRFX_SPIM_PIN_NOT_USED` has been removed,
`NRF_SPIM_PIN_NOT_CONNECTED` symbol is used instead.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
New nrfx release aligns PWM fields in driver instance structure
to common nrfx naming convention.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
New nrfx release replaces `nrf_wdt_behaviour_t` type
to `nrf_wdt_behaviour_mask_t` enumerator. As a result function
setting behaviour accepts `uint32_t` bitmask of behaviour.
This commit aligns symbols used in SHIM to the ones introduced
with the nrfx release.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
New nrfx release brings renamed macros and symbols in nrf_rtc.
This commit alligns RTC counter SHIM to it.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
New nrfx release brings change of Low frequency sources symbols
in nrf_clock hal to uppercase. This commit aligns all occurrences.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
When running cppcheck on eth_stm32_hal.c it generated a warning for
shiftTooManyBitsSigned.
The solution is to make sure that the numeric value shifted is unsigned.
Updated to use BIT() macro as suggested by GeorgeGCV.
Fixes: #57336
Signed-off-by: Stefan Petersen <spe@ciellt.se>
Fix link error when both modems' drivers are enabled
as they both define the same structure but did not
make it static.
This fixes the CI build failure of
tests/drivers/build_all/modem/drivers.modem.simcom_sim7080.build
on particle_boron
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Fix the following build warning:
include <fcntl.h> without CONFIG_POSIX_API
is deprecated. Please use CONFIG_POSIX_API
or #include <zephyr/posix/fcntl.h>
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Add the ability for the flash simulator to store its contents in a
memory region.
This allows filesystems on the flash simulator to survive a reboot.
And allows subsystems (e.g. coredump) to store their info on ram while
using the (existing) flash partition backend.
Add a example (for nucleo_f411re) that shows how to configure the flash
simulator for hardware (cfg discussion #54166).
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
Add support for a generic NTC, `ntc-thermistor-generic`. In this case,
the compensation table is provided via devicetree. Note that DT property
is prefixed with `zephyr,`, because while hardware related, it is linked
to a particular software implementation.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Refactor driver to align a bit more with its Linux counterpart, ie,
ntc_thermistor. This driver did quite a few _unconventional_ things,
like using "zephyr," compatibles, a dedicated node for pre-computed
compensation table (referenced by the actual pseudo-device node), etc.
The comparison helper function should likely be simplified as well (to
avoid the need for custom wrapper for bsearch), but this can be done
later.
In this refactor, each thermistor gets a compatible, e.g. "epcos,xxxx".
Compatibles are known by the driver, so are compensation tables. This
simplifies devicetree files. There's no need to bother about
compensation tables in **every** board file if Zephyr supports a certain
NTC model.
In general we should respect Linux bindings, which in the end influence
how drivers are implemented. In this case, this principle resulted in
simplified, easier to use code.
For future developers, this is how support for a new NTC can be added:
1. Add to the end of the driver:
```c
#undef DT_DRV_COMPAT
#define DT_DRV_COMPAT vnd_model
static __unused const struct ntc_compensation comp_vnd_model[] = {
{ x, y },
...,
};
#define DT_INST_FOREACH_STATUS_OKAY_VARGS(NTC_THERMISTOR_DEV_INIT,
DT_DRV_COMPAT, comp_vnd_model)
```
3. In driver's Kconfig make sure it depends on
DT_HAS_$DT_DRV_COMPAT$_ENABLED
Note: $X$ means _value_ of X.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
It looks like the Zephyr thermistor driver bindings were half-copied
from Linux ntc-thermistor. Zephyr principle is to maintain compatibility
with Linux, when possible, so there's no reason to deviate here. Convert
the connection type from a custom enum to a boolean, as Linux does.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This fixes this bug:
https://github.com/zephyrproject-rtos/zephyr/issues/57498
If bit 1 is set, then a write enable is required before
sending the 0xb7 instruction to enable the 4 byte address
mode, which this PR implements.
Signed-off-by: Frank Buss <fb@frank-buss.de>
1. Fix sensorhub names using the zephyr A.2 rule (use inclusive language).
The only exception is names within STMEMSC API and h/w register names.
2. Extend the STMEMSC API usage. It is always better to not code again
already existing functionalities.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Always set the interrupt pulse settings when sampling at greater than 4khz
to better ensure the interrupt line is toggled and caught correctly.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
SPI configuration did not set bit ordering or more importantly the clock
polarity which seemed to be misconfigured. Setting this corrects one more
quirk when working with this part on the TDK Robokit1
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Initial sensor driver for NPM1300 PMIC charger.
Includes basic configuration of charger voltage and current.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
The stm32_lptim_wait_ready() is waiting for the DIEROK flag
with a while loop. It should not be repeated.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
When dma is enabled, spi_xmc4xxx_transcieve_dma() needs to disable the
isr used by spi_xmc4xxx_transceive(). Renable the isr at the
end of spi_xmc4xxx_transceive_dma() instead of in spi_xmc4xxx_transceive().
Doing this in latter function will fail compilation when interrupt
support is enabled but dma is disabled.
This is regression from 8494b6413a
but was only caught when xmc47_relax_kit was added which tested this
scenario in tests/drivers/spi/spi_loopback.
Fixes#57494
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Ignore touch events from GT911 IC when TOUCH_STATUS_MSK bit is not set
in status register. This resolves an error where the GT911 driver would
report a touch event end directly after a touch occured, as the touch
status register would be 0x0, which the driver incorrectly interpreted
as a touch release.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Commit f1b0b458b0 mistakenly selected the
SERIAL_SUPPORT_ASYNC kconfig for the kinetis uart
driver when enabling the lpuart driver. Revert this,
because the kinetis uart driver does not support async api.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
SPI / QSPI flash with density above 16MB must use 4 byte addressing mode
also on sector erase.
This patch selects the right addressing mode and opcode when 4 byte
addressing mode is selected
Signed-off-by: Brian Juel Folkmann <bju@trackunit.com>
Use level triggered interrupts instead of edge triggered interrupts to
make it impossible for the interrupt line to be active without the RX
thread attempting to read pending data.
This fixes a race condition for re-enabling the interrupt in edge
triggered mode, where `gpio_pin_interrupt_configure_dt` is not called
before the controller re-asserts the interrupt line.
As a result the controller can be reset before booting the RX thread.
Fixes#53980.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Some single-precision float constants were being compared against
double-precision floats. Make the constants doubles.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Add Port 14/15 to device tree. These ports can only be configured as input.
Error out in gpio driver if user sets them as output.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Regenerate/rewrite the Bosch M_CAN register field definitions using the
GENMASK() and BIT() macros.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Use the FIELD_PREP() and FIELD_GET() macros instead of manual bitshifts and
masking. Be consistent in the use of register field definition macros.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename the local "const struct can_mcan_config *" variables from "cfg" to
"config" to be consistent with Zephyr conventions.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Get rid of the can_mcan_configure_timing() helper function as it provides
no benefit to just having the implementation split in can_mcan_set_timing()
and can_mcan_set_timing_data().
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Move the driver initialization function to the bottom of the file to be
consistent with Zephyr conventions.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Pass a pointer to the struct device for internal driver functions instead
of passing around a pointer to the register struct.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Reading the temperature calibration data requires disabling the icache
of the stm32h5x mcu.
Else a bus fault error occurs reading Address: 0x8fff8014-0x8fff818
Enable afterwards.
Signed-off-by: Brian Juel Folkmann <bju@trackunit.com>
When using gpio chip select the clock line seems to get stuck low after
some transactions. When attempting to use other SPI_CSR registers
the peripheral fails to work as expected.
Always using SPI_CSR[0] when using gpio chip selects resolves the issue.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
This patch introduces support for NXP S32 CANEXCEL (CANXL) peripheral.
CAN protocol supporting:
- CAN classic
- CAN FD
Remote transmission request is not supported as this feature is not
available on NXP S32 CANXL HAL.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
These variables are now provided by the FindBabbleSim
cmake module, which finds them in the environment or thru
west.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
In some cases, the enable pin may be already enabled by a previous
stage, e.g. bootloader. Therefore, it is not desirable to disable
the pin, as it could cause malfunctioning of the device. Refactor init
procedure so that we pick the right GPIO flags during the first
configuration stage.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some STM32 timers have more than one interrupt available.
When such timer is used it's likely that the first found interrupt
will not be the proper, 'cc' interrupt for input capture.
Existing implementation always connected the first irq, which worked
for timers with single, 'global' interrupt but broke input capture
for advanced timers with more interrupts.
Improve the IRQ connection logic by connecting the 'cc' interrupt
if it exists. Only if not found use the fallback mechanism of taking the
first index
Signed-off-by: Marek Metelski <marek@metelski.dev>
Add another helper function to send VW notification that is
neither a warning or conveys a system state.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Remove all enabling of CONFIG_EMUL_.* in favor of automatically enabling
peripheral emulators based on the compatible string presence in the device
tree and the one true CONFIG_EMUL.
Zephyr has long since moved to a model of enabling drivers based on the
presence of their associated IC's compatible string in the final devicetree
overlay. There is no reason that emulators can't align in just the same
way, and probably ought to to remove superfluous enabling of configs.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
According to the datasheet for Marvell PHY [1], the mode field of the
General Control Register 1 Page 18 occupies bits [2:0]. However, the macro
PHY_MRVL_MODE_CONFIG_MASK specifies the mask as 0x3, which would
correspond only to [1:0]. The code in phy_xlnx_gem_marvell_alaska_cfg()
uses the mask to set the mode field to 0 to set "RGMII (System mode) to
Copper" mode. Unfortunately, different chips have different reset values
(111 or 000) and in first case, the code would set the field to 100,
instead of 000.
Without this change, ethernet on Avnet MicroZed (Marvel Alaska 88E1512 PHY)
does not work.
Signed-off-by: Marek Vedral <vedrama5@fel.cvut.cz>
[1]: https://www.marvell.com/content/dam/marvell/en/public-collateral/phys-transceivers/marvell-ethernet-phys-alaska-88e151x-datasheet.pdf
If the boot loader already switched the system clock to PLL1 we need
to switch back to HSI first and disable PLL1 before we can configure
PLL1. Otherwise the register writes will simply be ignored and we'll
end up with an inconsistent state.
Most of the code has been recycled from `clock_stm32_ll_common.c`.
Signed-off-by: Sascha Silbe <sascha-pgp@se-silbe.de>
Signed-off-by: Sascha Silbe <sascha-pgp@silbe.org>
To be consistent with the current NXP clocking scheme,
move the LPADC clocking code to the SOC files where
all of the other peripheral clocking is done.
Also remove any other SOC-specific code to the
respective SOC file and out of this driver.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Code for power level property was accidentally
removed by accident from driver in commit 9921c59f40
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
spi_context_get_next_buf must not divide `len` by `dfs` because, in SPI,
buffer lengths are given in units of data (in this case, 16 bits), not in
bytes.
Signed-off-by: Daniel Gaston Ochoa <dgastonochoa@gmail.com>
- This includes the driver, test app, and sample app
- Only the boards\arm\cy8cproto_062_4343w board is supported for now
Signed-off-by: Bill Waters <bill.waters@infineon.com>
Added RTC driver that supports Motorola MC146818B
Enabled RTC set/get time and alarm, alarm callback
and update callback.
Counter and RTC uses same hardware in case of
Motorola MC146818, so they can't be used at a time.
Updated stand-alone mc146818 counter dts instances
to support rtc and counter with same compatible
string of "motorola,mc146818" on ia32, atom,
apollo_lake, elhart_lake and raptor_lake platforms.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
By default HSIDIV is set to 0x01, so default frequency is 32 MHz.
This register should be always set based on dts value.
Signed-off-by: Wojciech Slenska <wsl@trackunit.com>
The SAM GMAC driver is not able to use all of the receive buffers
concurrently. Frames larger than (buffer size) * (buffer count - 1) are
silently dropped. Fix it by adding one to MAIN_QUEUE_RX_DESC_COUNT.
Fixes#55701
Signed-off-by: Brandon Del Bel <delbel@umn.edu>
The `config` and `api` members of `struct device` are expected
to be `const`. This also improves reliability, as `config`
and `api` are stored in rom rather than ram, which has the
potential to be corrupted at runtime in the absense of an MMU.
Signed-off-by: Chris Friedt <cfriedt@meta.com>
There are use cases for the pcie_ep driver where we don't
necessarily need the dma functionality. Added ifdef's around
the dma functionality so that it's only available if we
specify the dma engines in the device tree similar to
```
dmas = <&pl330 0>, <&pl330 1>;
dma-names = "txdma", "rxdma";
```
Signed-off-by: Tarun Karuturi <tkaruturi@meta.com>
Signed-off-by: Chris Friedt <cfriedt@meta.com>
This patch adds support for the TI INA3221 current monitor.
This is the datasheet used for reference:
https://www.ti.com/lit/gpn/ina3221
Since this device has three channels, there is a custom attribute to
select which channel is to be used when getting a sample.
Measurements are done on all enabled channels.
Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
Make it possible to use CPOL/CPHA SPI clock modes with the SDHC driver.
Some cards require the clock to switch to low when not active.
Signed-off-by: Łukasz Hejnak (LeHack) <lehack-ghub@lehack.pl>
some floats were getting promoted to doubles or they needed to be
casted as doubles to be used by printf
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Following #56576, the `cs` field in `struct spi_config` is of type
`struct spi_cs_control` instead of a pointer to the same type.
`spi_xec_qmspi_ldma.c:qmspi_xec_init` tries assigning `NULL` to the
`.cs` field through a designated initializer, which causes a compilation
error.
This PR simply removes the `.cs = NULL` line. The designated initializer
will automatically zeroize the underlying GPIO pin info, which should
have the same effect that setting the pointer to NULL did previously.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
Disable the hardware I2C target detection on the IT82xx2 SoC family.
Note: The register setting of I2C target detection is different in
IT81XX2 and IT82XX2 SOC.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Simplify the STM32 ADC driver code by using the new ADC resolutions
property in dtsi files.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
- Remove build asserts in favor of DT enums
- Remove power level property since it is unused by SDK
- Correct voltage ref value in DT to correspond to
chip specific values documented in reference manuals
instead of corresponding to SDK enum names.
- Fix SOC devicetrees affected by these changes.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The MCUX USB device driver currently suffers from
some performance related issues caused by the removal
of the intermediate buffer in commit 4e6f80d37a.
This buffer was essential in the case when some USB
descriptors or data were in a slow access memory,
for example a flash memory accessed over flexspi.
USB DMA as AHB master would try to fetch the data,
but it would be too slow and USB peripheral
could not meet deadlines on the USB bus waiting for it,
and so it would send null packets instead causing errors.
This problem can be fixed by re-introducing an intermediate
buffer in RAM with the data copied from the slow memory by
the core before the USB transfer begins, so that USB DMA
is not responsible for fetching it from flexspi/flash.
Changes to MCUX USB Device Driver:
- Re-add intermediate buffer for USB writes in RAM
- Buffer is not needed for reads, add runtime check
to avoid copy overhead
- Buffer is not needed for platforms with USB RAM,
since the USB RAM itself acts as an intermediate buffer.
Compile with buffer code only when USB RAM is not present on
the platform, to avoid unecessary copy overhead.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This PR will divide the LPTIM clock freq to increase the max timeout.
Only one LPTIM instance is considered for PM timer.
The input freq becomes a fraction of the internal PCLK
source (mainly LSE clock). As the tick per sec does not change,
the minimum lptim counter must always be >0.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
On the stm32U5, when modifying the DIER register of the LPTIM peripheral,
a new write operation to can only be performed when the previous write
operation is completed and before going-on.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
CAVS platforms are not fully integrated with zephyr. Some of the
registers are still programed from SOF side. This feature can be enabled
for those platforms later when integration is fully done.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Adding function that is allowing to release ownership of the DMA. When
DSP is no longer using dma instance it ownership can be released.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This patch is refactoring device power flow routine. DMA instance will
not be power up after kernel initialization if device power management
is enabled. Power menager will power up device and its power domain if
device will be in use and disable it when it's no longer needed.
The DMA disabling part has not yet been implemented.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
When building drivers.modem.build we get a link error since
log_source_id_get() is not defined when CONFIG_LOG_MODE_MINIMAL
is defined.
Change ifdef protection to be CONFIG_LOG_RUNTIME_FILTERING
instead of CONFIG_LOG in the code to handle this case.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Mark the device as busy when it is locked to perform a flash operation
so that the PM subsystem does not try to suspend it. Also refuse to run
a PM action when the device is busy (in case `qspi_nor_pm_action()` is
called directly, not by the PM subsystem).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Implements a UART driver using PIO. Both PIOs are supported.
Only polling API is supported. Only 8N1 mode is supported.
Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
Added a generic driver for RaspberryPi Pico PIO.
This driver is an intermediate driver for abstracting the PIO
device driver from physical pin configuration.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
Signed-off-by: Ionut Catalin Pavel <iocapa@iocapa.com>
In some cases, it may be desirable to not have thread-safe reference
counting. For example, when CONFIG_MULTITHREADING=n.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Original computation seems to be based on
QSPI that has prescaler range [0, 255].
However, OSPI clock prescaler has different
value range [1, 256].
Adapt prescaler computation to valid OSPI
domain and add min value assert.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Set STM32CubeHAL ethernet version in use as V2 by default, on series
supporting it (H7, F7, F4). Not yet available on F2 series.
Add a choice symbol to explicit V1 version as deprecated.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The SAM GMAC driver is not utilizing the entire receive buffer, causing
large packets to be dropped. Fix it by setting Receiver Packet Buffer
Memory Size Select to Full (RXBMS = 3) in the GMAC_DCFGR register.
Fixes#55701
Signed-off-by: Brandon Del Bel <delbel@umn.edu>
When building with arm-clang we get warnings of the type:
wncm14a2a.c:828:14: error: array subscript is of type
'char' [-Werror,-Wchar-subscripts]:
} else if (isalpha(c2) != 0) {
^~~~~~~~~~~
Fix this by adding explicit casts to (int) when callinng isalpha()
or isdigit().
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Add spi_cs_is_gpio(_dt) helpers to check whether SPI CS is controlled by
GPIO or not. This both improves code readability and isolates SPI
internals.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
As of today it is not possible to use SPI dt-spec macros in C++,
something known and documented. The main reason is because `cs` property
is initialized using a compound literal, something not supported in C++.
This PR takes another approach, that is to not make `cs` a pointer but a
struct member. This way, we can perform a regular initialization, at the
cost of using extra memory for unused delay/pin/flags if `cs` is not
used.
Fixes#56572
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The help text indicates the range of value is 0-255, while the actual
maximum value acceptable is 100.
This commit updates the text to accurately reflect the acceptable
value range for the set_brightness API.
Signed-off-by: Chen Xingyu <hi@xingrz.me>
Replace custom macrology that was checking if any instance had the
int_gpios property with DT_ANY_INST_HAS_PROP_STATUS_OKAY.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add TRNG support for BG27, which has slightly different register
definitions in HAL, compared to BG22.
Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
port commit f7f47dc to stm32h5
Without this fix, ADC driver will hang when reading internal channels.
Signed-off-by: Brian Juel Folkmann <bju@trackunit.com>
The rvm32m1 platform always uses pinctrl, there's no need to keep
extra macrology around pinctrl. Also updated driver's Kconfig to `select
PINCTRL`.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The iMX platform always uses pinctrl, there's no need to keep
extra macrology around pinctrl. Also updated driver's Kconfig to `select
PINCTRL`.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The Microchip XEC platform always uses pinctrl, there's no need to keep
extra macrology around pinctrl. Also updated driver's Kconfig options to
`select PINCTRL`.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The MCUX platform always uses pinctrl, there's no need to keep extra
macrology around pinctrl. Also updated driver's Kconfig options to
`select PINCTRL` (note that some already did).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add STM32WL-specific sx126x_set_tx_params function based on the
STM32CubeWL modifications to LoRaMac-node.
Add the "power-amplifier-output" DT property to
"st,stm32wl-subghz-radio" for selecting between the RFO_LP and RFO_HP
output configurations provided by the above mentioned function.
Add the "rfo-lp-max-power" and "rfo-hp-max-power" DT properties for
defining the maximum design power of the respective outputs' matching
networks.
closes#48511
Signed-off-by: Kenneth J. Miller <ken@miller.ec>
The stm32f4 and stm32f7 serie has to compile the stm32_ll_rcc
layer to get the LL_RCC_GetSystemClocksFreq function.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Adapt the stm32 counter-timer driver to the stm32_ll function
prototype. Some stm32 families have
LL_TIM_OC_GetCompareCHx(TIM_TypeDef some others have
LL_TIM_OC_GetCompareCHx(const TIM_TypeDef.
This will fix compilation warning.
Adds the macro for stm32L0 16bit timers.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Fix a very old cmake warning for the nrf52_bsim due to the
console library being empty.
The printk backend was originally provided by the board
code for simplicity, but this left the console library
empty when building for this board.
Instead refactor that code to where all printk backends are.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
We should only try to register a printk backend
if printk is compiled in, otherwise we get a link
error.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
A recent commit broke the power-up sequences for other Intel
platforms.
Fixes: 1e5550d262 ("intel_adsp: ace20_lnl: ssp: Program new HW registers")
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
The logic to poll on CPA bit is not working on non-ACE2.0
platforms. This is causing regressions in SOF test suite with
dmic.
Fixes: 2547948544 ("intel_adsp: ace20_lnl: dmic: Program new HW registers for dmic")
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Use PRIxPTR macros to fix compiler warnings of the form:
i2c_xilinx_axi.c:266:50: warning: format specifies type 'unsigned long'
but the argument has type 'mem_addr_t' (aka 'unsigned int') [-Wformat]
LOG_INF("Configuring %s at 0x%08lx", dev->name, config->base);
~~~~~ ^~~~~~~~~~~~
%08x
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Change init priority for SMBus from KERNEL_INIT_PRIORITY_DEVICE (50)
to KERNEL_INIT_PRIORITY_DEFAULT (40) since other devices which depend
on SMBus (like EEPROM) have the same priority.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
This commit adds the Gecko IADC driver and support for it to the
efr32bg_sltb010a board.
Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
- Add Gecko BURTC sys_clock driver to handle wake up from EM2,3 states
- Remove custom PM policy and dependency on HAL sl_power_manager service
- EM1 supported in all configurations
- EM2,3 supported only if SysTick is replaced by BURTC
Signed-off-by: Roman Dobrodii <rdobrodii@antmicro.com>
For the POSIX architecture, add options to:
* Clear the flash content at boot
* To delete the file on exit
* To just keep the flash in RAM instead of a file in disk
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This commit removes the unused argument form the `slz_bt_init` function,
and makes it consistent with what `SYS_INIT` expects - `int (*)(void)`.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
The fuel gauge tests should *not* have to enable CONFIG_SENSOR in order to
get access to the sbs gauge emulator.
Allow fuel_gauge sbs_gauge direct access to emul_sbs_gauge.c
Signed-off-by: Aaron Massey <aaronmassey@google.com>
All other watchdog drivers also use POST_KERNEL, and it seems on some
platforms where the TCO watchdog is used not all dependencies are yet set
up by the PRE_KERNEL_1 level.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This commit adds the SiLabs Bluetooth HCI driver. It also enables this
BLE HCI driver on the efr32bg_sltb010a board.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
When ASAN is used cmd_status is kept, but it cannot be linked
as the shell module is not present, this prevents ASAN
being used with the nrf52_bsim.
Fix it by conditionally compiling this code only if the shell is
being used.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
When using a dummy buffer on the RX side, do not
increment the destination memory buffer address.
This issue was uncovered when running the SPI
loopback test.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The address increment logic was looking at both source
and destination parameters together. Separate them so
we can set one.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
HAL API changes in ethernet and pwm
SoC RT595 power management code change
west.yml update
Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
The function dai_ssp_poll_for_register_delay() is meant to poll the
register until the value of the mask bits is equal to the "val"
argument or until poll timeout has occured. WAIT_FOR() returns the value
of the checked expression, so the check should be modified accordingly.
This should prevent the errors seen during every SSP trigger as below:
<err> dai_intel_ssp: dai_ssp_poll_for_register_delay poll timeout reg 487432 mask 4 val 4 us 125
<err> dai_intel_ssp: dai_ssp_poll_for_register_delay poll timeout reg 487496 mask 63 val 0 us 937
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Move semicolon from end of DT_INST_FOREACH to DEVICE_DT_INST_DEFINE
to make multi-instancing possible. This caused some problems with
CI after adding adc node to native_posix dts.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
The spi-sam0 driver does not initialize DMA parameters when the MCLK
peripheral is defined in the microcontroller header file. Fix it by
copying the initialization code from the non-MCLK case.
Signed-off-by: Brandon Del Bel <delbel@umn.edu>
- Add initial version of Infineon CAT1 i2c driver.
- Add initial version of binding file for Infineon
CAT1 I2C driver
Signed-off-by: Sreeram Tatapudi <sreeram.praveen@infineon.com>
Errata sheet of the stm32U5 (ES0499) recommends to avoid clearing
the DMAT bit with LL_USART_DisableDMAReq_TX to re-start
a DMA transfer on the UART Tx block. The function becomes empty.
This is also seen for stm32H5.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This adds the SPI driver for the Renesas SmartBond(tm) DA1469x MCU family.
The driver only supports controller mode. All four SPI modes are supported.
Note that the lowest supported speed is 2285714Hz.
Requesting speeds higher than 16MHz, will result in a 16MHz SCLK.
Co-authored-by: Stan Geitel <stan@geitel.nl>
Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
The delayblock is bypassed when the <dlyb-bypass> property is true.
DT_NODE_HAS_PROP tests whether the property is defined at all,
not whether a boolean property is true or false.
To get a boolean property’s truth value,
use DT_PROP(node_id, prop) instead.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Remove all init functions that do nothing, and provide a `NULL` to
*DEVICE*DEFINE* macros.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The below is the unit test result for the driver and kernel of
it82xx2_evb board.
GPIO/gpio_basic_api: PASS
I2C/i2c_api: PASS
Flash: PASS
UART/uart_basic_api: PASS
PWM/pwm_api: PASS
WDT/wdt_basic_api: PASS
KSCAN/kscan_api: PASS
kernel/sched/schedule_api: PASS
kernel/sched/preempt: PASS
kernel/timer/timer_api: PASS
kernel/sleep: PASS
ADC/adc_api: PASS.
ADC note: conversion time~=61.6us
sample time delay~=60us
wait voltage stable time~=202.8us
Set sampling time to 500us will pass for ADC test.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Add the pinctrl node that has been remapped in the chip of it82xx2.
And modify kscan's pinctrl for the it82xx2.
And swap I2C default pins.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
On iMX.RT devices, the number of GPIO pins exceeds the maximum of
64 that the PINT interrupt controller can support. Therefore, two
interrupt lines are now shared between the GPIO modules.
This patch allows the user to set the interrupt source for a GPIO
peripheral. For most LPC devices, this will always be the PINT. For some
RT devices, the PINT cannot use pins on GPIO modules other than 0 and 1
as input, and thus the INTA and INTB sources should be used.
Since Zephyr does not support sharing these interrupt between all GPIO
controllers, the user must configure a subset of all GPIO controllers to
use the shared module interrupts. An example of how to do so is provided
for the RT595 EVK.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Remove PINT management code from the LPC GPIO driver, as this code is
now contained within the PINT interrupt controller driver, which exposes
an interface to install interrupt callbacks.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Introduce PINT driver, for NXP pin interrupt and pattern match engine.
The driver currently supports only the pin interrupt feature of the
PINT.
Add DTS entires for the PINT on LPC and RT devices that support this
peripheral, and remove the interrupt defintions that are PINT specific
from the GPIO module on these devices.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The OFLEN bit has to be set by the host driver for ACE2.x. The
ownership of the IP is now handled at the host driver level, no longer
the firmware.
Setting it at the firmware level is a no-op if the bit is already set
by the host driver, and will fail it isn't already set.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
This patch fixes i2svss field initialisation in Device Tree for LNL
platform. It fixes this bug: #482
Problem is observed only when using SSP_BLOB_VER_1_5 version.
Unfortunatelly this version is not tested in FW validation tests.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Clearing SPA bit together with OFFLEN bit causes FW hang.
This patch changes sequence to avoid that situation.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The upper ssp slot number should be retrieved from configuration
blob to support all possible settings. This patch fix this issue.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Repleace usage of shim2 device tree field with hdamlssp.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
In LNL platform GPDMA and ALH is no longer used. SSP uses LINK HDA
as a DMA engine. Therefore new shim, new register definitions and new
programming flows were defined.
This patch implements new SSP programming requirements for LNL.
Since HDA is shared between Host and DSP, link_config field was added to
dai_config structure. This one is provided by Host in new IPC4 fields
during interface configuration.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Normally, the driver deactivates the QSPI peripheral for periods when
no QSPI operation is performed. This is done to avoid increased current
consumption when the peripheral is idle. For the same reason, the base
clock on nRF53 Series SoCs (HFCLK192M) is configured for those periods
with the default /4 divider that cannot be used otherwise. However,
when XIP accesses are used, the driver must be prevented from doing
both these things as that would make XIP to fail. Hence, a function
is provided so that applications can inform the driver that XIP is
needed and the above idle actions should be suppressed.
This function (`nrf_qspi_nor_xip_enable()`) replaces the old one
(`nrf_qspi_nor_base_clock_div_force()`) that was intended for similar
purpose but after deactivation of the peripheral was introduced in
commit 95d867e8ed it became useless.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Update the RTC driver menuconfig title to match the unified format
introduced in c41dd36de2.
Move the RTC driver menuconfig entry so the menuconfig list is still
(mostly) alphabetically sorted.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add a dependency on CONFIG_NET_L2_ETHERNET for
CONFIG_ETH_INIT_PRIORITY. This hides the Ethernet driver initialization
priority option in menuconfig unless CONFIG_NET_L2_ETHERNET is selected.
CONFIG_ETH_INIT_PRIORITY cannot currently be moved inside the
CONFIG_ETH_DRIVER if-statement in Kconfig as it is used outside the
Ethernet driver source files.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Introduce dedicated init priority for AT2X EEPROMs connected via
I2C or SPI to ensure they are initialized after I2C/SPI by default.
Signed-off-by: Martin Jäger <martin@libre.solar>
Add a driver to support the Xilinx AXI IIC Bus Interface logic core, as
described in Xilinx document PG090. This can be configured for use on
most Xilinx FPGA-based platforms such as the Digilent Arty.
Both the 2.00a and 2.1 versions of the core are supported. The 2.00a
revision has a bug causing dynamic read mode to not be reliable. With
this version of the core the driver falls back to reading only 1 byte
per interrupt.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
The get_status api allows to query whether clock is turned on or off.
Like the get_rate call, the status of gated clocks (for specific
peripherals), as well as domain clock sources(HSE, PCLK, PLL_P,..)
can be checked this way.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Move the Segger RTT module Kconfig to modules/segger/kconfig. The Segger
debug library is not a driver and should not reside under drivers/debug.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The ISR prototype was changed some time ago
(6df8b3995e)
to (const void*) => fix isr function definition
to avoid a compile warning.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Align all sensor drivers that are using stmemsc (STdC) HAL i/f
to new APIs of stmemsc v2.02. Please note that now a new function
callback, mdelay(), must be provided in case the stmemsc HAL requires
to wait for a certain amount of milliseconds before or after some
special operations.
Requires https://github.com/zephyrproject-rtos/hal_st/pull/13
(merged as 5948f7b3304f1628a45ee928cd607619a7f53bbb)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
LTC1665/LTC1660 is a 8/10-bit Digital-to-Analog Converter
(DAC) with eight individual channels.
Signed-off-by: Marcus Folkesson <marcus.folkesson@gmail.com>
Don't check clock configuration before kernel was started since it
will prevent message to be displayed.
After kernel initialization, message is still valid and then ASSERT
more valuable to the user.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
MISRA Rule 5.7 requires uniqueness of tag identifiers. Shell is
frequently problematic because many code uses `const struct shell
*shell`. This causes CI noise every time one of these shell files is
edited, so let's update all of them with `const struct shell *sh`
instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The sleep after carrier activation was badly ported so the time
was 1000 ms instead of 1 ms.
Signed-off-by: Ibe Van de Veire <ibe.vandeveire@gmail.com>
When the phy_event state diagram ends up in the
eth_mcux_phy_state_read_status case, the eth carrier
is enabled. However, this step only happens when an
interface is available in the context.
Regardless of the state of the iface, the state machine
will switch to eth_mcux_phy_state_read_duplex in the next
iteration. Thus, the states diagram never returns to the
previous state. As a result, the eth carrier will never
be enabled in the future.
This problem is fixed by setting the wait state if the
iface is not available.
Signed-off-by: Ibe Van de Veire <ibe.vandeveire@gmail.com>
The OFLEN bit has to be set by the host driver for ACE2.x. The
ownership of the IP is now handled at the host driver level, no longer
the firmware.
Setting it at the firmware level is a no-op if the bit is already set
by the host driver, and will fail it isn't already set.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
In LNL platform GPDMA and ALH is no longer used. DMIC uses LINK HDA
as a DMA engine. Therefore new shims, new register definitions and new
programming flows were defined.
This patch implements new DMIC programming requirements for LNL.
Since HDA is shared between Host and DSP, link_config field was added to
dai_config structure. This one is provided by Host in new IPC4 fields
during interface configuration.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Updated boot priority to PRE_KERNEL_1 for all instances
and removed dependency on PCIe. As shell is not working
in a situation where console is using a UART instance
under PCIe and boot priority set to POST_KERNEL.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Add support for negative temperature coefficient for single calibration
chips in the STM32 temperature driver.
That feature is necessary for STM32F0x0.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The native_tasks definition was directly in the soc_inf soc.h
header. But soc.h pulls a lot of other headers.
Some of those could cause conflicts, say with application
headers, for users who only wanted the be able to register
native tasks in a module.
Let's refactor the native tasks definitions into their own header
and include that header from soc_inf's soc.h.
In this way users who need only need to register a native tasks
can just include posix_native_tasks.h, and all previous users
see no change.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
add support for async call and repeat sample test
1. change the DMA req to 2 byte each
2. increase the buffer pre-dma
3. add protection on invalid buffer
depends on: PR #56104
fixing: issue #56070
Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Rename the nxp,kinetis-flexcan devicetree compatible to nxp,flexcan as it
is not specific to the NXP Kinetis series.
This is preparation for adding a nxp,flexcan-fd binding.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add new compatible to separate production calibrated sensors
with single and dual calibration temperatures. Also update
stm32_temp driver to support single calibration sensors.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
Removes a workaround that was required while there was a bug in
upstream STM32 HAL drivers where the oversampling was not set
correctly in all cases. This has since been fixed, and also
added to the Zephyr STM32 HAL.
The upstream issue:
https://github.com/STMicroelectronics/STM32CubeH7/issues/177
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Use CONFIG_I2C_INIT_PRIORITY instead of
CONFIG_KERNEL_INIT_PRIORITY_DEVICE as introduced in
c8f9f53322.
Looks like the priority was accidentally changed in
f2c42663b4.
Signed-off-by: Martin Jäger <martin@libre.solar>
Adds support for a devicetree property that controls the ClockDiv
value provided to the SDIO during init.
Signed-off-by: Maxmillion McLaughlin <github@maxmclau.com>
Many areas of Zephyr divide and round up without using the DIV_ROUND_UP
macro. Make use of it, so that we make use of a tested system macro and
at the same time we make code more readable.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The init infrastructure, found in `init.h`, is currently used by:
- `SYS_INIT`: to call functions before `main`
- `DEVICE_*`: to initialize devices
They are all sorted according to an initialization level + a priority.
`SYS_INIT` calls are really orthogonal to devices, however, the required
function signature requires a `const struct device *dev` as a first
argument. The only reason for that is because the same init machinery is
used by devices, so we have something like:
```c
struct init_entry {
int (*init)(const struct device *dev);
/* only set by DEVICE_*, otherwise NULL */
const struct device *dev;
}
```
As a result, we end up with such weird/ugly pattern:
```c
static int my_init(const struct device *dev)
{
/* always NULL! add ARG_UNUSED to avoid compiler warning */
ARG_UNUSED(dev);
...
}
```
This is really a result of poor internals isolation. This patch proposes
a to make init entries more flexible so that they can accept sytem
initialization calls like this:
```c
static int my_init(void)
{
...
}
```
This is achieved using a union:
```c
union init_function {
/* for SYS_INIT, used when init_entry.dev == NULL */
int (*sys)(void);
/* for DEVICE*, used when init_entry.dev != NULL */
int (*dev)(const struct device *dev);
};
struct init_entry {
/* stores init function (either for SYS_INIT or DEVICE*)
union init_function init_fn;
/* stores device pointer for DEVICE*, NULL for SYS_INIT. Allows
* to know which union entry to call.
*/
const struct device *dev;
}
```
This solution **does not increase ROM usage**, and allows to offer clean
public APIs for both SYS_INIT and DEVICE*. Note that however, init
machinery keeps a coupling with devices.
**NOTE**: This is a breaking change! All `SYS_INIT` functions will need
to be converted to the new signature. See the script offered in the
following commit.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
init: convert SYS_INIT functions to the new signature
Conversion scripted using scripts/utils/migrate_sys_init.py.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
manifest: update projects for SYS_INIT changes
Update modules with updated SYS_INIT calls:
- hal_ti
- lvgl
- sof
- TraceRecorderSource
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
tests: devicetree: devices: adjust test
Adjust test according to the recently introduced SYS_INIT
infrastructure.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
tests: kernel: threads: adjust SYS_INIT call
Adjust to the new signature: int (*init_fn)(void);
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
It was too strict to require the caller to pass in an accurate odr as a
parameter. This patch is to round the odr up to the nearest one, when odr
does not match.
Signed-off-by: Zhang Lixu <lixu.zhang@intel.com>
rename the function that sets the handler for the nmi.
It should be namespaced and not camel-case:
z_NmiHandlerSet to z_arm_nmi_set_handler
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Fixes a race condition between uart_xmc4xxx_dma_rx_cb() and rx timeout.
Although uart_xmc4xxx_dma_rx_cb() called k_work_cancel_delayable()
to cancel the timeout callback, it would not actually be cancelled if
the callback was already in a running state.
Fix the race condition by checking if dma transaction is already
completed in the timeout callback.
This also fixes unit test tests/drivers/uart/uart_async_api on
xmc45_relax_kit which started to fail after commit
f3afd5a4c9.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Extending tests/drivers/build_all/sensor/ to include missing driver
trigger configurations revealed that some sensor drivers failed to build
with triggers disabled.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Extending tests/drivers/build_all/sensor/ to include missing driver
trigger configurations revealed that some sensor drivers failed to build
with triggers disabled.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Extending tests/drivers/build_all/sensor/ to include missing driver
trigger configurations revealed that some sensor drivers failed to build
with triggers enabled.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Extending tests/drivers/build_all/sensor/ to include missing driver
trigger configurations revealed that some sensor drivers failed to build
with triggers enabled.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Extending tests/drivers/build_all/sensor/ to include missing driver
trigger configurations revealed that some sensor drivers failed to build
with triggers enabled.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Zephyr SPI driver model for full-duplex operation assumes
data will be transmitted and received during each clock period.
The QMSPI driver for the XEC family also supported dual and
quad I/O use cases which are inherently half-duplex. To
support dual/quad the driver incorrectly processed spi buffers
as all transmit buffers first then all receive buffers. This
worked if only the SPI driver was used. It did not work with
the Zephyr flash SPI NOR driver which assumes SPI drivers
follow the SPI driver model. This commit implements a QMSPI
driver that follows the Zephyr SPI driver model resulting in
a slightly smaller driver. Dual/quad SPI transactions are
supported if the experimental SPI extended mode Zephyr
configuration flag is enabled. We also remove the QMSPI full duplex
driver added previously to support the flash SPI NOR driver.
Added board to spi loop-back test and spi_flash sample.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
BDCR could be required for LSE or RTC for instance.
Enable it here as for now, no sophisticated PM handling is available
on F3 series.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The internal socket context struct modem_socket_config
currently has members accessed directly by user. The
modem_socket_init() function has been updated to take all
user configurations as args. Thus removing the need for
the user to directly access the internal context for
initialization.
The user also currently needs to know of internal modem
socket libary behavior to determine if a socket has been
allocated and assigned an id, this is documented, and is
not safe. The functions:
modem_socket_is_allocated()
modem_socket_id_is_assigned()
modem_socket_id_assign()
have been added to the modem socket library API to perform
these checks, and to assign socket ids.
This commit makes use of the modem socket library safer and
adds documentation to the API.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
There is currently not a clear separation between
user configuration and internal context when using the
modem_cmd_handler library. This update adds a clear
separation, placing user configuration in a seperate
struct passed to modem_cmd_handler_init alongside the
internal context modem_cmd_handler_data.
There is also a lack of documentation of the user
configurations, these have been added to the new config
struct.
The new API function modem_cmd_handler_process has been
added to remove the need for the user to directly access
the process member of the internal context. This ensures
that the user is not encouraged to access any internal
context members.
Some whitespace errors exist in the modem_cmd_handler.c
file, these are outside of the scope of this PR. These
can be addressed in a later PR as they are not functional
changes.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
The UART IFACE API currently exposes the context struct
modem_iface_uart_data, expecting the user to fill in some
of the fields, with no documentation specifying which fields
and what they mean.
This API update moves all user configurable values in the context
out into a config struct, modem_iface_uart_config, within which
members are documented.
This prevents the user from interacting directly with the context
making use of the library safer and more readable.
The config structure helps make code readable by using "named args"
in a const struct instead of a long, nameless, parameter list passed
to the modem_iface_uart_init function.
The new API function modem_iface_uart_rx_wait is added to prevent the
user from having to interact with the rx sem in the context directly.
The context can now be safely interated with without direct access to
any of its members.
Pointers to the ring buffer params in the context have been moved to
config struct, as these are only useful during initialization of the
context.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
Arm fvp_baser_aemv8r and fvp_base_revc_2xaemv8a boards are using
SMSC91C111 as their ethernet adapters.
Portions of the codes are based on FreeBSD code from its
'src/sys/dev/smc/if_smc.c' and 'src/sys/dev/smc/if_smcreg.h'.
This driver has two parts, one is the ethernet controller driver, which
is MAC layer driver. The other is the MDIO driver, which is the PHY
layer driver. Both of them are in the same source file due to that they
need to share the same reading and writing register functions and
the smsc object.
The mdio driver is needed by the existing 'phy_mii' driver, which is
a driver for the generic MII-compliant PHY.
This driver was developed under the fvp_base_revc_2xaemv8a target and
has been tested on the fvp_baser_aemv8r target.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
move DT_DRV_COMPAT to bmm150.h. so that can be decide which interface
to use.
define struct bmm150_bus_io interface for bmm150_i2c.c and bmm150_spi.c
in bmm150.h.
redefined bus operation interface in bmm150.c, this allow the driver
to decide which interface to use during construction.
Signed-off-by: Weiwei Guo <guoweiwei@syriusrobotics.com>
Convert the SDL driver to use the input subsystem. This is specifically
meant to emulate touchscreen drivers, so it's setup to send triplet of
x, y, touch for touch-on events and just touch off on touch off events.
Renamed the driver to input-sdl-touch since now we can also develop an
sdl driver for simulating key events.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Fixes the wsen_tids sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the wsen_itds sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the wsen_hids sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the vcnl4040 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the tmp108 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the tmp007 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the sx9500 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the stts751 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the sm351lt sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the sht3xd sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the qdec_nrfx sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the pcnt_esp32 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the mpu9250 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the mpu6050 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the mcux_acmp sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the mcp9808 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
This commit adds support for ANY_MOTION and DATA_READY interrupts for
the BMI270. To implement this, a different config blob than the
"max_fifo" blob has to be used.
Signed-off-by: Benjamin Lindqvist <benjamin@eub.se>
This adds the i2c driver for the Renesas SmartBond(tm) MCU family.
It supports blocking transfers and callback transfers.
Currently only supports controller mode.
Co-authored-by: Stan Geitel <stan@geitel.nl>
Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
Use recently introduced GENMASK64() macro. Although it does not make
difference for the target platform, it makes code clearer.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
This is currently the only end-point where multiple threads can access
the NVMe device (all calls are synchronous).
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Pre-allocating PRP list for such purpose. Which PRP list is relevantly
filled in depending on the data size and data pointer page alignment.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Based on FreeBSD's implementation made by James Harris, Intel Copyright
2012-2016.
Namespace in this context, will be a disk. It's not exposed from DTS, as
an actualy NVMe hardware controller card can bring more than one
namespace (disk).
Thus namespace are not instanciated through the device driver model, but
statically allocated and runtime configured, depending on what the
controller exposes.
By default the amount of namespace supported is one as it is the most
common setup.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Based on FreeBSD's implementation made by James Harris, Intel Copyright
2012-2016.
This is the corner stone of the whole NVMe logic: sending commands and
getting replies, all through memory shared from the host to the
controller.
Then using it to inialize admit/IO queues and identifying the
controller.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Based on FreeBSD's implementation made by James Harris, Intel Copyright
2012-2016.
Since Zephyr does not propose any advanced interfaces as FreeBSD (bus
abstractions, memory and DMA abstraction and many more), this comes with
a much simplified and Zephyr-ish way to instanciate, initialize and use
NVMe controller.
ToDo: IO Queues cannot be more than 1. Macros will need to be improved to
manage the case of 2+ IO queues.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
There is no event reporting WiFi disconnect, create a polling
work for this and report the event.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
It has been observed that sockets can be in bad state after
boot. Be sure to correctly reset local port and any 'server'
mode before configuring client mode.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
- We should wait indefinitely if msecs is -1 (FOREVER).
- We can directly return if data is already available in FIFO.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
There is no listen or accept for UDP, we need to enable the UDP
server mode (P5=1) as soon as bind is complete.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
The implementation of GIC v3 ITS uses k_aligned_malloc(), which will
only work if dynamic memory is available (system heap). Tell the user
that a dynamic memory pool is required.
The amount of memory will depend on registers probed during runtime.
Signed-off-by: Rodrigo Cataldo <rodrigo.cataldo@huawei.com>
Co-authored-by: Henri Xavier <datacomos@huawei.com>
CFG register uses fields that are not defined in Synopsys databook of
Designware AHB DMA Controller.
Since current Zephyr code uses this driver only for the
intel_adsp_gpdma driver I assume that those fields are specific to
this DMA which is not the standard Designware one.
This patch allows to use either the standard Designware register or
the Intel one.
Signed-off-by: Sylvain Chouleur <schouleur@graimatterlabs.ai>
There is no need to use *_cmp_raw() functions here, all they do is cast the
pointers to in(6)_addr* and call the non-raw functions. Additionally, this
fixes a warning for the net_ipv6_addr_cmp_raw() call, which didn't cast the
arguments correctly.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Syntacore RISC-V platforms have dedicated MTIMER_DIVIDER register which
should be configured during the Timer initialization.
The configuration of dedicated MTIMER_DIVIDER register could now
be performed during initialization if its address is provided.
Signed-off-by: Alexander Razinkov <alexander.razinkov@syntacore.com>
This change adds a mutex to protect against simultaneous access to the bus
instead of returning an error during transfers. Since most I2C code doesn't
handle retries (especially with a -EIO code) not blocking on a mutex can
cause a number of problems.
Signed-off-by: Corey Wharton <xodus7@cwharton.com>
move DT_DRV_COMPAT to bmp388.h. so that can be decide which
interface to use.
define struct bmp388_bus_io interface bmp388_i2c.c and bmp388_spi.c.
redefined bus operation interface in bmp388.c, this allow the driver
to decide which interface to use during construction
Signed-off-by: Weiwei Guo <guoweiwei@syriusrobotics.com>
This adds support for the -02 variant, as well as the existing -30.
The sensor type is automatically read from configuration register at
device init, an appropriate compensation func is set up
Signed-off-by: Marc Reilly <marc@cpdesign.com.au>
This adds a driver for the DS2482-800 1-wire multi channel bus driver.
The driver uses a split architecture in order to share a common lock
among all configured channels of a single IC.
Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
ds248x no longer applies to all drivers. Therefore the naming indicates
compatibility with DS2482 and DS2484 drivers.
Also
- Fix some code formatting
Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
With the stm32h5x, hal driver is xspi for octospi
Add a header file to map functions and constants.
The ospi driver of the stm32H5x serie does not support DMA yet.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
1. Move the GPIO mux setting to the soc layer. The GPIO MUX
value may vary based on the SoC Family
2. Enable the digital input buffer if available
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Implement the driver method pin_interrupt_enable and pin_interrupt_disable.
This commit fixes getting the get_pending_int by updating the interrupts
field in the gpio_emul_data filed when interrupt is triggered. Also,
introduces a new filed enabled_interrupts to better simulate the
behavior of the interrupt pending and whether the interrupt is
enabled/disabled.
Signed-off-by: Sung-Chi Li <lschyi@google.com>
Add pin_interrupt_enable and pin_interrupt_disable in gpio_driver_api,
and add corresponding APIs in gpio.h for application to enable/disable
an interrupt without reconfiguring again.
This CL also Create a new Kconfig option for this feature.
Signed-off-by: Sung-Chi Li <lschyi@google.com>
Use the LTDC in combination with the DSI HOST makes the pinctrl obsolete.
DSI HOST has dedicated pins.
Signed-off-by: Rico Ganahl <rico.ganahl@bytesatwork.ch>
Ignore the link clock_source for non-ACE platforms instead of throwing
an error when it is set in the topology.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
We need to ensure that the XEC GIRQs are initialized after the
XEC ECIA device. Right now we depend on the linker ordering
things correctly since everything is at INTC_INIT_PRIORITY
priority
Set the XEC GIRQs to 41 so the init priority is one more than
INTC_INIT_PRIORITY that is used by xec-ecia.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Added support for async APIs for ns16550. This will be
enabled by kconfig CONFIG_UART_ASYNC_API.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
There have an extral TBE interrupt event though we have cleared the
SPI_CTL1_TBEIE bit. To cover this situation, add a on_going check
before enter exchange function.
Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
Add the stm32h5 serie to the stm32 RTC counter driver
EXTI Line is 17 (for stm32h50x or non-secure stm32h56x/h57x).
The drivers must Enable access to the BackUp Domain.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This case takes a float value and passes it to the integer abs function,
storing the result in an integer type variable. That looks like a possible
error to clang, so insert an explicit cast to int to make the compiler
happy.
Signed-off-by: Keith Packard <keithp@keithp.com>
With this patch DMIC device after init will be in OFF state. When power
domain will be powered-up device will switch into suspended state and
change it to active only when is used.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Since the device need to be first powered-up by the power domain, it has
more sense that device is in off state at the beginning.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
The emulated RTC device driver is used to emulate a real
RTC device. Note that it is not a replacement for the
native_rtc module, which is used to control simulated time,
get time from the host system, etc.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
This test suite adds tests for the following:
- Setting and getting time
- Validating time is incrementing correctly
- Validating behavior of alarms with callback disabled
- Validating behavior of alarms with callback enabled
- Validating update callback
The test suite uses the devicetree alias rtc to find
the device to test.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
This commit adds the rtc.h header file which contains
API functions for real-time-clocks, which are low power
devices which track and represent broken-down time.
It also changes one line of doxygen documentation in the
maxim_ds3132.h file to place it in its own group.
The handlers for use of the API from userspace is also
added with this commit.
The API is split into one mandatory section, setting and
getting time, and three optional sections, alarms, update
event callback, and clock calibration.
Signed-off-by: Bjarki Arge Andreasen <baa@trackunit.com>
- Fixes missing poll out events when UART interrupt is enabled
- Fixes blocking USB interface during board start up.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
We get compile warnings of the form:
error: converting the result of
'<<' to a boolean; did you mean
'((__aeabi_ctype_table_ + 1)[(byte)] << 28) != 0'?
[-Werror,-Wint-in-bool-context]
if (!isprint(byte)) {
^
Since isprint (and the other is* functions) return an int, change check
to an explicit test against the return value.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Move CONFIG_PECI_INTERRUPT_DRIVEN inside the CONFIG_PECI if statement to
avoid showing it in menuconfig when PECI drivers are disabled.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
We get compile warnings of the form:
error: converting the result of
'<<' to a boolean; did you mean
'((__aeabi_ctype_table_ + 1)[(byte)] << 28) != 0'?
[-Werror,-Wint-in-bool-context]
if (!isprint(byte)) {
^
Since isprint (and the other is* functions) return an int, change check
to an explicit test against the return value.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
This effectively reverts the following three commits:
- 0f9f18843f
- 6812441099
- 326f7bd450
and also the changes that got copied to the nrf5340_audio_dk_nrf5340
board.
The workaround brings more harm than good. It already required many
tweaks in various tests to make them pass (because it introduced
a significant overhead in processing of the console UART interrupt)
and now it makes the I2S driver tests to fail. It's not reasonable
to add more tweaks in Zephyr tests just to keep this workaround in
the tree. Instead the root cause should be fixed (if the original
problem still occurs).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add optional filter value properties. The filter is disabled by default
but can be enabled by setting the filter-sample-period > 0 in the dts
file. A latency is introduced if the filter is enabled. The latency can
be printed by setting sensor log level to debug.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Fix inconsistency between compile-time and runtime check on
counts_per_revolution. Add macro to simplify compile-time prop value
checks.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Convert the ft5336 to the input subsystem, fix all the config in the
repository and add the Kscan compatibility driver to the current dts
driver instances.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This commit implements the temperature sensor interface for
the Maxim MAX31865 SPI Temperature Sensor.
Signed-off-by: Fin Maaß <fin.maass@haw-hamburg.de>
Co-authored-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Add the term 'SBS' in atRate properties and Battery mode property name,
as they are specific to SBS
Signed-off-by: Madhurima Paruchuri <mparuchuri@google.com>
Setting the same callback with the same data as is already configured
should not cause an error.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Implements the SPI RTIO API. Refactors many of the internal transfer
functions to work on simple types to allow for both the RTIO and existing
SPI API functions to co-exist.
Removes the unneeded shift_master specialization. Either a polling or DMA
transfer flow is used when used with RTIO as all operations are normalized.
When SPI_RTIO is enabled the spi_transceive blocking call translates
the request into an RTIO transaction placed in the queue of transactions
the device is meant to do.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Provides a macro and submit API for SPI drivers to support RTIO.
A copy function enables compatibility with the existing blocking API
and very easily the existing async API as well.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Add the support of the new stm32h5 to the stm32 ADC driver
Note : LL_ADC_CLOCK_ASYNC_DIV6 is the value for getting the
expected results of ADC.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit fixes the word size configuration issue
described in #54746 by considering the data frame size
when trasmitting in case the configuration is applied.
It also fixes an heap corruption problem when using
SPI DMA with a buffer that is not multiple of 32 bits
in lenght and GDMA instance in initialization.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
We get compile warnings of the form:
error: converting the result of
'<<' to a boolean; did you mean
'((__aeabi_ctype_table_ + 1)[(byte)] << 28) != 0'?
[-Werror,-Wint-in-bool-context]
if (!isprint(byte)) {
^
Since isprint (and the other is* functions) return an int, change check
to an explicit test against the return value.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
When a controller is running at full SDR speed at 12.5MHz, there needs
to be enough time for the processor get around to writing more data in
the fifo. Previously at -1 the size, this was enough for 1MHz with a
decent processor, but not enough at a 12.5MHz SCL.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Add a second instance of DMA to the stm32 dma driver from the DTS
That can be found in the stm32H5 serie, where 2 GPDMA with 8 channels
are available. Rebuilding with Macro.
Use the dma_channels property of the dedive tree to count the nb
of dma channels: 16 or 8 (like in stm32h5).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
We get compile warnings of the form:
error: converting the result of
'<<' to a boolean; did you mean
'((__aeabi_ctype_table_ + 1)[(byte)] << 28) != 0'?
[-Werror,-Wint-in-bool-context]
if (!isprint(byte)) {
^
Since isprint (and the other is* functions) return an int, change check
to an explicit test against the return value.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Adds tmd2620 driver and devicetree bindings to work in
trigger and polling mode supporting Power management.
Signed-off-by: Peter Fecher <p.fecher@phytec.de>
Similar to the changes made in #48048, compile in the appropriate lora
modem driver when `CONFIG_LORA=y`. The `LORA_SX12XX` symbol has no
use now so remove. LoRa and LoRaWAN subsystems are still marked as
unstable so no additional deprecation cycle is needed.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add LEDC device for esp32s3
Update PWM LED binding
Remove invalid comment from driver source file
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Add support for device runtime power management. When suspended sampling
is suspended. When active sampling resumes at the configured rate.
When suspended fetch/get will return an errno and 0'ed out samples.
By default the device will start in a suspended state when
PM_DEVICE_RUNTIME is enabled.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
In the intel_adsp_wdt_isr function was an unused dev_config variable.
The variable was removed. This was caught by the sof CI.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
If for any reason the timer counter didn't hold a value close enough to
zero on boot then the cycle delta could overflow and the reported ticks
won't be right. Those who really want the hardware uptime where this
makes sense (as opposed to Zephyr's uptime) can still rely on
sys_clock_cycle_get_64().
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Enabled simultaneous support by adding a DTS variable named “io-mapped”.
There are 3 possibilities through instance in dtsi file.
Under PCIe, PCIe ns16550.
Under soc and has a variable io-mapped, legacy(IO mapped).
Under soc and don’t have a variable io-mapped, MMIO mapped.
Simultaneous access can be enabled by a Kconfig.
For PCIe instances UART initialization should be done post-kernel as it
depends on PCIe initialization.
Co-authored-by: Najumon BA <najumon.ba@intel.com>
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Move smbus_utils.h header from generic includes to the driver's area
in order to have in include/zephyr/drivers only smbus.h header.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
GPT timer driver previously used "restart mode", where the timer would
count to a given value, then rollover. In this mode, "Any write access
to the Compare register of Channel 1 will reset the GPT counter". Since
a write to the compare register takes affect after 1 cycle of the
module's bus clock, and the bus clock is not synchonized with the GPT
module's low frequency counter clock, writing to the compare register
will induce a counter reset, and can cause the GPT to lose time
synchronization. This can induce time drift over time.
To fix this, rework the GPT driver to use "free run" mode. Note that
free run mode is not used directly, rather the GPT is configured to
reset on a tick boundary at boot, and then the second compare register
is used to set capture points. This way, the GPT interrupt will always
fire at a tick boundary, and no calculations are needed to handle
the counter rollover.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Changing function call order. We need to first power-up the power domain
before we turn on the devices.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
It was being included twice. Now it's included once. CI requires a commit
description.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Without this, setting a value of 0 leaves the bits unchanged rather than
zeroing them.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Added a new watchdog driver which can handle a multiple wdt_dw instances
and can control the pause signal.
The mlt platform has three designware watchdogs, one for each core.
I decided to create a separate intel watchdog driver for the following
reasons:
1. All three devices share the same interrupt number. Each watchdog reports
an interrupt to the core to which it has been assigned. The same interrupt
number cannot be used by multiple devices in the device tree. So, it would
be assigned to only one device. The other dw watchdog devices would use
this assignment, even though it would not be described for them in the dt.
The interrupt handler function in dw watchdog checks the interrupt flag.
If the interrupt was connected to the first watchdog, and the second or
third watchdog signal an interrupt, the interrupt handler of the first
device would ignore it because it would not have set the interrupt flag.
The watchdog device don't knows anything about the existence of the others
devices.
2. The designware watchdog only supports a hardware pause signal. It cannot
be paused programmatically. On the mtl platform, there is a separate group
of control registers for all per-core watchdogs. There are GPIO-like
registers that allows control of a hardware pause signal for subordinate
watchdogs. This separate block is shared by all three watchdogs.
3. The base addresses of the subordinate watchdogs are read from the
aforementioned control registers. As a result, in the device tree we have
only one base address for the intel watchdog, which points to the pause
control registers and containing the base addresses of the subordinate
devices.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
The cadence i3c ip requires it's retaining registers to be updated
when a device is detached or attached.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
There are some needs to attach and reattach i3c/i2c devices at runtime
Some I2C devices can have special registers where the address can be
changed at runtime. Also some I3C devices can be powered off at runtime
freeing up the address space they take up. These new APIs allow for these
to be changed at runtime. This also moves some config/data in to a common
i3c config/data structure which would allow the api to operate on to be
common for all I3C drivers.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
This adds the reattach api necessary for writing the i3c retaining
registers within the cdns i3c when the dynamic address changes.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Some I3C controllers have retaining registers which are used to contain
the DA of the i3c device. This needs to be updated every time the DA is
updated with SETNEWDA or SETDASA
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Reading the UID_BASE_ADDRESS requires disabling the icache
of the stm32h5x mcu.
Else a bus fault error occurs reading Address: 0x8fff800-0x8fff808
Enable afterwards.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add a driver that listens for input events and reports them on a kscan
API. This allows porting kscan drivers to the input APIs while
maintaining compatibility with the existing kscan based applications.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This macro just uses an existing cache API and is not widely being used.
Use the API directly which will be changed to use a public cache API in
a later commit.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Replace pointer construction macro with value from config struct.
Fixes what appears to be an oversight from #55522.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
When releasing a paused stream, clearing MIC_MUTE bit is necessary.
Without unmuting there will be no input data after resume.
Signed-off-by: Fred Oh <fred.oh@linux.intel.com>
Clearing SOFT_RESET bit applies to ACE as well. In case of ACE,
this should be done before setting start bits for CIC and FIR.
Signed-off-by: Fred Oh <fred.oh@linux.intel.com>
Introduce flash extended operations that can be used to disable access
to option and control registers until reset. Disabling access to these
registers improves system security, because flash content (or protection
settings) can't be changed even when exploit was found.
On STM32 devices, registers can be locked until reset by writing wrong
key during unlock procedure. It triggers a bus fault, so during the
procedure we need to ignore faults and clear bus fault pending bit.
Please note that option register disabling was implemented for devices
that have OPTCR register (F2, F4, F7 and H7). Implementation on other
devices requires more testing, since documentation is not precise
enough. Disabling control register was implemented for devices that
have CR register.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
This patch makes possible to choose custom byte which should be used
to enable non-permanent readout protection (RDP1). Actually, any byte
except 0xAA and 0xCC (which are used by RDP0 and RDP2 respectively)
can be used to enable RDP1 but in multi-image environment, some other
image could check if RDP1 is enabled by comparing it to some hardcoded
value.
If property is not defined, 0x55 will be used to enable RDP1. The
default value comes from STM32 HAL.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
This patch adds flash readout protection support for STM32F4 devices
family. These devices can enable protection on entire flash content.
Readout protection functionality was exposed as vendor extended
operation. To change readout protection state, caller should provide a
structure which describes desired RDP state.
Enabling readout protection permanently or disabling readout protection
(changing from level 1 to level 0) is guarded by
CONFIG_FLASH_STM32_READOUT_PROTECTION_PERMANENT_ALLOW and
CONFIG_FLASH_STM32_READOUT_PROTECTION_DISABLE_ALLOW respectively.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
This patch adds sector write protection support for STM32F4 devices
family. These devices can protect flash content with sector precision.
Write protection functionality was exposed as vendor extended operation.
To change write protection state, caller should provide mask of enabled
and disabled sectors.
Function responsible for locking/unlocking option bytes was implemented
for all STM32 devices supported by this driver.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Introduce the stm32h5 serie to the the existing flash driver
It is based on the stm32l5 model.
Add a function to check if the flash is in dual
or single bank mode.
Some stm32 devices can map 2 or 1 flash banks.
Adapt the FLASH register names for the stm32h5 mcu.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add the driver for the clock control of the new stm32h5.
See the corresponding Ref Man to get the clock scheme :
HSI, CSI, HSI48, HSE, LSE, and 2 or 3 PLLs
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Unify the drivers/*/Kconfig menuconfig title strings to the format
"<class> [(acronym)] [bus] drivers".
Including both the full name of the driver class and an acronym makes
menuconfig more user friendly as some of the acronyms are less well-known
than others. It also improves Kconfig search, both via menuconfig and via
the generated Kconfig documentation.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
- That MIN_DELAY is a magic arbitrary number that is never going to be
right for all cases. Get rid of it in favor of a smarter solution.
- `sys_clock_set_timeout()` should not base its next match value on the
current time. Tracking the `last_tick` and `last_elapsed` values avoids
the need for all the tick rounding computation.
- Clamp the next timeout to HPET_MAX_TICKS/2. This leaves room for the
added elapsed time and any possible IRQ servicing delay.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Fix port array definition in kinetis pinctrl driver
so that it handles more flexibly the cases where the
number of PORT peripherals is more than 3, rather than only
handling the case where there are 5.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
After enabling the ADC, the peripheral has a certain delay (about 1ms)
to set its ADC Ready flag in the ADC ISR register.
In between, the ADRDY is still 0 and the ADEN is 1 in the CR.
The ADC can be used for conversion, only when the ADRDY bit is set
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add missing guard which prevents use of nrf_rtc_timer on
the same RTC instance (RTC1) as counter driver instance.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Add binding and sensor attribute to allow single phase
mode where only one signal is required from the encoder.
The signal must be connected to Phase A input.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Add config and data structs to the vnd,gpio test driver as these are
required by the GPIO API.
Fixes: #55884
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add documentation for the update_sampling_pnt() function and rename a few
internal variables to improve readability.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Respect the range limits of phase_seg1 when attempting to distribute ts1
between prop_seg and phase_seg1.
Even distribution may not be possible if the allowed ranges of prop_seg and
phase_seg1 are not equal.
Fixes: #55919
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Microchip XEC ADC and ADC V2 driver were merged into one
That PR did not change the ADC API test and ADC shell resulting
in twister build failures. Fixed both ADC API test and ADC shell.
Signed-off-by: scott worley <scott.worley@microchip.com>
Devicetree local-mac-address and zephyr,random-mac-address support added.
Updated w5500_set_config() to support ETHERNET_CONFIG_TYPE_MAC_ADDRESS
and change the MAC address at runtime.
Signed-off-by: Rainer Paat <rapaat@gmail.com>
The number of available EasyDMA MAXCNT bits is now defined per-instance
in Devicetree.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
temporary_table is a trivial copy of virtual_memory_regions, it isn't
clear why it's needed. All the more that it's freely mixed with
virtual_memory_regions itself. Also change a variable name to avoid
confusion and improve indentation.
Signed-off-by: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>
update espi_vwire_signal enum to refer all platform specific
usage virtual wires to ESPI_VWIRE_SIGNAL_SLV_GPIO_x
Virtual wires used for USB-C port over current (OCB)
have been defined as macros mapped to the corresponding
espi_vwire_signal enum
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Change device tree VW routing to a form allowing overrides.
Add two new DT optional properties for specifying the reset
source and reset value of each virtual wire. Only virtual
wires that are enabled using the status property are modified.
NOTE: eSPI virtual wires are controlled in groups of 4 by
hardware. The optional reset signal source properties applies
to all four virtual wires in the group. If this field is
changed from the hardware default, it should be changed for
only one virtual wire in the group. If the property exists
in more than one wire in the group it must be set to the
same value.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Modify Mircrochip MEC172x eSPI driver to get eSPI virtual wire
hardware routing from device tree.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
The clock control driver requires three pieces of information:
PCR register index, bit position, and clock domain. Clock domain
was missing from DT information and MCHP macros.
Signed-off-by: Manimaran A <manimaran.a@microchip.com>
Deleted adc_mchp_xec.c and microchip,xec-adc.yaml file.
DTSI, yaml, CMakeLists.txt and Kconfig.xec files are
updated for compatible.
Signed-off-by: Manimaran A <manimaran.a@microchip.com>
Updated the "adc_mchp_xec_v2.c" adc driver to support both MEC172x and
MEC15xx SOC.
ADC smapling clock configuration updated using DTS.
Signed-off-by: Manimaran A <manimaran.a@microchip.com>
Fixes the lsm9ds0_gyro sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the lsm6dso sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the lsm6dsl sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the lps22hh sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the lis3mdl sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the lis2mdl sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the lis2dw12 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the lis2ds12 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the lis2dh sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the ite_vcmp_it8xxx2 sensor driver to store the user-supplied
sensor trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the ism330dhcx sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the isl29035 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the ina23x sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the iis3dhhc sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Since we have a dedicated function for UDC_EVT_EP_REQUEST type
events, we can now simplify udc_submit_event() and remove
buf parameter.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
This allows us to get the result of synchronous transfer without
any hacks, just from the net_buf structure.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Do not use UDC_EVT_EP_REQUEST event without a valid pointer
to a request buffer. No changes needed in the upper layer because
it requires valid buffer pointer for this type of event anyway.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add helper function to send UDC endpoint event to a higher level
that takes fewer arguments.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Rewrite MCUX LPADC driver, to better utilize hardware.
the following changes have been applied:
- channel numbers now correspond to hardware channel command slots,
use "input_positive" and "input_negative" fields along with channel
definitions in dt-bindings/adc/mcux-lpadc.h to select a channel
- the number of channel command slots available is configurable via
CONFIG_LPADC_CHANNEL_COUNT
- Side A and side B channels are now supported
- differential channel mode is now supported
- ADC channels now are sampled via hardware, without additional
software triggering
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Check the requested CAN timing parameters against the min/max values
supported by the driver and return an error if they are out of range.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
`Kconfig.xec` for the ESPI drivers requires
DT_HAS_MICROCHIP_XEC_ESPI_SAF_ENABLED and
DT_HAS_MICROCHIP_XEC_ESPI_SAF_V2_ENABLED for ESPI_XEC and ESPI_XEC_V2,
respectively, but SAF is not mandatory for using ESPI. This is a bug and
should be dependent on DT_HAS_MICROCHIP_XEC_ESPI_ENABLED and
DT_HAS_MICROCHIP_XEC_ESPI_ENABLED, respectively. Also make these default
to `y` so they can be automatically enabled by the device tree.
Signed-off-by: Tristan Honscheid <honscheid@google.com>
The regulator driver has a configured min/max range that is used
to limit set values, and to initialise the regulator.
A new init value has been added, so that the startup voltage can
be higher than the lowest permitted value.
Signed-off-by: Andy Sinclair <andy.sinclair@nordicsemi.no>
Added initial version of Infineon cyw43xxx BT (
H4 HCI extension drivers/bluetooth/hci/CMakeLists.txt)
Add initial version of binding file for Infineon CYW43xx BT
HCI extension driver.
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
The callbacks API was similar to gpio / espi callbacks API. Refactor
it to use more intuitive names for set / remove callbacks.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Add SMBus shell module for testing. This allows arbitrary boards with
SMBus driver supported exploring the SMBus communication with
peripheral devices.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
This adds a basic Intel TCO watchdog driver. The driver doesn't support
windowed timeouts (a non-zero window.min value) or callbacks. The driver
currently assumes TCO version 6, which can be found e.g. on Elkhart Lake
and Raptor Lake platforms. The driver also expects the TCOBA base
address to be specified through DTS, rather than doing runtime lookup
(using e.g. ACPI or PCIe).
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Remedial rework to handle the enabling of the I2S master clock
output based on the presence of an introduced DT property.
For details see issue/54841.
Signed-off-by: Raul Pando <raul.pando@bytegrity.co.uk>
STM32 ADC DMA support added in #52965 incorrectly assumed
that all ADC devices have a OVR flag. This commit changes
the driver to only account for it if it's found in the
LL drivers.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
This update devicetree entries and Kconfig definition to allow use of
reset cause on all SAM series.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Add initial version of clock control for Atmel SAM SoC series. This add
support to Power Management which allows control peripherals clock.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Because the DMA driver allows multiple start and stop calls for the same
instance and the same channel, we cannot rely on the error codes
returned by these functions to notify the device's power manager that a
device is still in use.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Moved PCIe probe from configure function to init function
because whenever uart_configure api is called MMIO address
is getting updated.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Added pclk parameter to set_baud_rate function in line_ctrl_set api
which was missed during update of set_baud_rate function definition
update.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
Failures are seen with SOF digital mic capture test cases on Intel cAVS2.5
platforms if the SAR/DAR/CTL writes are skipped.
This reverts commit 08d9efb202.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Move the SoC Flash nRF sync ticker implementation into
Bluetooth Controller Subsystem folder, as internal headers
are included.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
remove all #ifdef CONFIG_SOC_SERIES_STM32xx
before to add a st,stm32g0-exti compatible
added to the matching targets:
C0/G0/U5/L5/MP1:
Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com>
Add support for the TI TPS382x series. The IC has an input pin which
should be toggled by the processor and a output pin which should be
connected to the RESET input of the processor. The timeout is not
configurable.
This device can be used by devices which does not have any internal
hardware watchdog device.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Fix IDU mask setup:
* fix GENMASK usage to avoid generating mask to one extra cpu (which
doesn't exist in configuration)
* use arch_num_cpus() instead of CONFIG_MP_NUM_CPUS to allow having
some cpu's disabled (with detection in runtime)
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
In general, RTC and TIMER driver implements counter API but there
are exception when those peripherals are used in a custom way
(e.g. for system timer or bluetooth). In that case, system must
prevent using counter based on a reserved instance. Previously,
it was managed by Kconfig options but that cannot be maintained
when switching to devicetree configuration of the counter driver.
A new approach removes Kconfig options and instead adds static
asserts in the files which are using direct peripherals. Those
asserts check if given node is not enabled in the device tree.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Modifying counter drivers (rtc and timer) to rely completely on
device tree and not on Kconfig of MDK flags.
Adapting dtsi for all SoCs and adapting test configuration.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Add PM_DEVICE_RUNTIME support to nordic QSPI NOR flash driver, putting
the QSPI peripheral and flash ship into DPD if available
Signed-off-by: Zack Cornelius <zcornelius@securityesys.com>
Adds a driver for the Nordic nRF GPREGRET registers and adds
entries to the SoCs for this peripheral.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Adds a new driver interface for retained memory devices which
can be used to store data and have it retained whilst the device is
powered thorugh different application execution states (though this
data may be lost in low power states).
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
The U5-series was missed when adding if-defs around enable / disable
of the backup domain access, this patch makes sure the U5-series
is handled correctly.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
Move esp_wifi_internal_reg_rxcb() after esp_wifi_init(), so that
wifi_connect() is successful.
Fixes: 690f65dbd9 ("drivers: wifi: esp32: fix possible interface null
pointer")
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
clean up redundant static functions
convert `csl_rx_time` to uint32_t and remove redundant `nrf5_schedule_rx`
`nrf5_config_csl_period` and `nrf5_receive_at` static functions.
`csl_rx_time` has been passed as uint32. It is compared to uint64 value
returned by `nrf_802154_sl_timer_current_time_get` in
`nrf_802154_ie_writer.c` which leads to wrong calculation of phase in CSL.
Signed-off-by: Maciej Baczmanski <maciej.baczmanski@nordicsemi.no>
An interrupt is triggered for every edge, but only the desired edges cause
a callback to be called.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Should be the Output LATch register. "IK" is one key away from "OL" on
QWERTY keyboards.
This define wasn't actually used anywhere.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
The xlnx_uartlite_fifo_read function would spin indefinitely if there
was less data available in the RX FIFO than the size of the passed-in
buffer. This call is supposed to be non-blocking.
Fixed to break out of the loop if there are no more bytes left in the RX
FIFO.
Signed-off-by: Robert Hancock <robert.hancock@calian.com>
The STM32C0-series does not have a backup domain, this patch
enables us to extend this driver to the C0-series.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
Adds dummy link layer for offloaded ifaces, allowing
ifaces to directly receive l2_enable calls
Signed-off-by: Georges Oates_Larsen <georges.larsen@nordicsemi.no>
Fixes the iis2mdc sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the iis2iclx sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the iis2dlpc sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the iis2dh sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the icm42605 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the hts221 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the hmc5883l sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the grow_r502a sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the fxos8700 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the fxas21002 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the fdc2x1x sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the ccs811 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the bq274xx sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the bmp388 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the bmi160 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the bmg160 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the bmc150_magn sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the bma280 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the amg88xx sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the adxl372 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the adxl362 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Fixes the adt7420 sensor driver to store the user-supplied sensor
trigger as a pointer rather than a copy. This enables the trigger
handler to use CONTAINER_OF to retrieve a context pointer when the
trigger is embedded in a larger struct.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
We get a compiler warning in this code with arm clang due to using
the wrong enum type for the variable. The enum should be of
type `enum periph_clk32k_src` so replace VBR_CLK32K_SRC_PIN_XTAL
with PERIPH_CLK32K_SRC_PIN_XTAL.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
BMI270 supports bulk register reads, use them to make
trasnfers faster.
See the discussion on
6cbb84c3ee (r104543405)
Tested on an nrf52840 board connected to a bmi270 sensor via SPI.
Signed-off-by: Oleg Ryjkov <oryjkov@gmail.com>
Add support for virtual UART device that uses ARC Hostlink channels
for data transfers. Due to the Hostlink principle, this driver
supports only polling API.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
We get compile warnings of the form:
drivers/console/uart_console.c:508:8: error: converting the result of
'<<' to a boolean; did you mean
'((__aeabi_ctype_table_ + 1)[(byte)] << 28) != 0'?
[-Werror,-Wint-in-bool-context]
if (!isprint(byte)) {
^
Since isprint returns an int, change check to an explicit test against
the return value.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
After disabling the channel, it is recommended to poll with timeout to
ensure that the channel has actually been disabled. Without this,
reconfiguring the DMA again while the channel is active could lead to
unexpected behavior and/or DMA underruns.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
The WAIT_FOR() function returns the value of checked expression. So fix
the return value check to log and return the timeout error when checking
if the FIFO is empty during stop.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
Add a helper function to dump the GPDMA SHIM and channel registers for
debug along with a config option to enable it.
Co-developed-by: Tom Burdick <thomas.burdick@intel.com>
Singed-off-by: Tom Burdick <thomas.burdick@intel.com>
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
This symbol allows users of the driver to disable the
power management feature of just this sensor if they are
not using the int_gpios pin of the BQ274XX.
Signed-off-by: Nick Ward <nix.ward@gmail.com>
In the current implementation, the apds9960 trigger callback function
is called with the pointer of a driver-internal allocated trigger
structure. This structure is not initialized anywhere, so essentially
the trigger callback gets called with junk data.
Besides the missing initialization, it would be better instead to hold
a const pointer to a user allocated sensor_trigger object.
This way user code can establish a context with related user data (for
example a pointer to a C++ object) by storing its sensor_trigger object
within a structure alongside the user data, and then using
CONTAINER_OF() macro to get the pointer of the container struct (and
thus the user data).
Signed-off-by: Michael Kaplan <m.kaplan@evva.com>
Add the loop to wait until the stream is really disable after disabling
and also cleared the TCIF flag.
This is a specifity of the dma of type V1.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
A MACRO argument naming mismatch causes a bug when trying to use DMA.
Fix the MACRO argument and conditional DMA configuration.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Add clock control support for UART controllers found in i.MX SoC family.
This change moves clock gating out of respective `soc.c` files and into
clock controller's `clock_control_on`/`_off` methods, allowing for
dynamic clock state control, and setup via Device Tree bindings.
This is especially important on SoCs, where Zephyr is sharing the bus
with cores running other OSes, such as might be the case for i.MX 8MM.
Unfortunately, Zephyr doesn't possess an ability to represent clock
hierarchy (e.g. via DT's `assigned-clocks` property), so clock source
and frequency still need to be hardcoded in aforementioned `soc.c`
files.
Signed-off-by: Artur Rojek <artur@conclusive.pl>
Use `uintptr_t` to cast a pointer to integer type for `clock_name`.
While at it, also remove an unused variable.
Signed-off-by: Artur Rojek <artur@conclusive.pl>
Add support for setting the Synchronization Jump Width (SJW) for both the
classic/arbitration phase and the CAN-FD data phase.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Uninitialized sam spinlocks were causing an error if the stack
happens to have 'thread_cpu' memory set to something other than 0.
Signed-off-by: Yuval Peress <peress@google.com>
Port the gpio_keys_zephyr driver from the gpio subsystem with a
dedicated API to the input subsystem reporting input events.
Move the test as well, simplify the cases a bit since the API is simpler
now.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The 200ns reset time specified in the datasheet are a minimum time; and the
nanoseconds were being rounded to whole microseconds anyway.
Also make it the same type as `config_delay_us` (`uint16_t`).
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
The 200ns reset time are a minimum value, there is no need to enforce
precise timing (and thus manual per-device calibration) here.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
From FPGA-TN-02001-3.3 "iCE40 Programming and Configuration":
> After driving CRESET_B High or allowing it to float High, the AP must
> wait a minimum of 1200 µs, allowing the iCE40 FPGA to clear its internal
> configuration memory.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Besides of standard flash operations like write or erase, flash
controllers also support additional features like write protection or
readout protection. These features are not available in every flash
controller, what's more controllers can implement it in a different way.
It doesn't make sense to add a separate flash API function for every
flash controller feature, because it could be unique (supported on small
number of flash controllers) or the API won't be able to represent the
same feature on every flash controller.
Extended operation interface provides flexible way for supporting flash
controller features. Code space is divided equally into Zephyr codes
(MSb == 0) and vendor codes (MSb == 1). This way we can easily add
extended operations to the drivers without cluttering the API or
problems with API incompatibility. Extended operation can be promoted
from vendor codes to Zephyr codes if the feature is available in most
flash controllers and can be represented in the same way.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
The current implementation always sets the voltage before enabling,
even if the current voltage is in the allowed range.
This has some side effects, i.e. for PMIC regulators that are
pre-programmed for a specific value but allow voltage changes during
runtime. The side effect being that the regulator will always be reset
to the lower value of the voltage range at init.
Another usecase would be when a bootloader sets a specific voltage then
loads an application that uses the same driver.
The proposed fix is to evaluate the current voltage and try to bring
the actual voltage in range if the current voltage is not valid
according to the min/max constraints.
Tested on custom SAMD20 board with a custom RK816 PMIC driver.
Signed-off-by: Ionut Catalin Pavel <iocapa@iocapa.com>
Currently the driver only support software controlled CS
defined by cs-gpios property.
This commit enables the possibility of using dedicated CS
by setting the pins on pinctrl and omitting the cs-gpios
property.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Change the preprocessor identifier from CONFIG_SOC_ESP32C3 to
SOC_GDMA_SUPPORTED so it can include ESP32S3 in GDMA routines.
Remove hardcoded values from hal calls to use dma_host instead.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
This is a fix for a driver bug that assumes a
user will want a new pwm channel for a new
pwm signal if they decide to change the
period length of the pwm. In some cases,
this creates a noticable change of
duty cycle accuracy.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
i2c_bitbang_init takes a context as void *, so discarding const
qualifier of the driver's config. Explicitely cast to void * to fix the
problem.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Currently the 2.4G radio driver for CC1352 has few implementations which
prevents both the radios to be used in a single build, thus preventing
applications to have different builds to switch the RF bands even though
the hardware supports dual bands simultaneously.
The following updates are made:
* Remove RF patches from stack.
* Implement if_stop() to stop the interface and yield the interface.
* Use RF_runCmd() instead of RF_runImmediateCmd() so that two RF handles
can work simultaneously.
All the updates are similar to the more recent cc13xx subg driver which
implements all these recommended practices already.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
During extended testing, rx_done() callback was seen to be invoked with
zero-length packets.When RAW_MODE is enabled, CRC is being appended to
these packets thus making downstream consumers think the packet is valid.
Root cause of the callback being invoked with zero-length packet is
unknown, but appending CRC to these packets is incorrect, thus fix it.
Also fix a minor error which causes build failure when
CONFIG_NET_L2_IEEE802154_SUB_GHZ is not defined.
Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
This PR fixes MCP7940N initialization failure on Sunday if
external battery is used to keep the RTC running over the
MCU or Zephyr OS restarts.
Signed-off-by: Rainer Paat <rapaat@gmail.com>
System uptime is not getting incremented when TICKLESS_KERNEL is enabled.
This fixes it by changing the clock_annouce and updating
last_count increment accordingly.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Removed struct variables for storing states: sx, plt_rst, espi_rst.
While Sx & espi_rst state variables were totally redundant, plt_rst
variable had a use-case to prevent sending multiple callbacks to app.
Experimentally proven that use-case was not valid, as plt_rst isr
itself gets called only upon rising/falling edge.
Removing the condition to check plt_rst's current and previous state,
also solves the problem where global reset do not update plt_rst state.
Signed-off-by: Aditya Bhutada <aditya.bhutada@intel.com>
The Dead Battery resistors interfere with port partner
detection. So, Dead Battery is disabled after the system
starts and sets the Rd or Rp resistors on the CC lines.
Tested on b_g474e_dpow1 with JP5 set to USBC.
Tested on stm32g081b_eval with JP17 set to D5V.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
Adding an Openthread radio API `otPlatRadioSetMacFrameCounterIfLarger`
implementation and the corresponding call to the IEEEE802154 driver.
Signed-off-by: Przemyslaw Bida <przemyslaw.bida@nordicsemi.no>
In the adc_stm32_init() function, when adc_stm32_calib() is called,
the ADC is not yet enabled but still disabled.
This patch makes sure to Disable the ADC before its calibration.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The STM32H730 series has a variant built with SMPS. It uses
`stm32h730xxq.h` header file instead of `stm32h730xx.h`, which has the
SMPS macro defined.
This commit adds the `SOC_STM32H730XXQ` configuration option to allow
the build system include the proper header file. With this change,
boards can enable `CONFIG_POWER_SUPPLY_DIRECT_SMPS` to set up the power
supply for the CPU.
Signed-off-by: Chen Xingyu <hi@xingrz.me>
Update flexspi driver init priority to be the
memc driver init priority. This fixes a bug where
the flexspi flash drivers on i.MX RT platforms were
being initialized before the flexspi memc driver.
Since those flash drivers depend on the flexspi
spi bus controller being initialized, the flash drivers
would fail to initialize and cause runtime failures.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This change implements the following, necessary for remote wakeup to be
supported:
- implement usb_dc_wakeup_request() call to trigger remote wakeup
- implement interrupts to detect supsended/resumed state
- implement extra logic to simulate resumed state when the resume
is a result of remote wakeup. In this case the rp2040 chip doesn't
send a USB_INTR_DEV_RESUME_FROM_HOST interrupt, or any other
interrupts when the resume condition is detected to be extended
by the upstream port, so we need to simulate this event when we
see activity on the bus.
Signed-off-by: Purdea Andrei <andrei@purdea.ro>
Add driver for Xptek XPT2046 resistive touch controller on SPI.
Only interrupt driven mode supported, does not do polling.
Signed-off-by: Seppo Takalo <seppo.takalo@iki.fi>
esp32_wifi_dev_init() currently starts Wi-Fi stack before
the interface is properly configured, which happens in function
esp32_wifi_init(). This can trigger a ESP32_WIFI_EVENT_STA_START event
before interface initialization, causing a crash.
Moving esp_wifi_start() to esp32_wifi_init() will guarantee that
this won't happen.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Make sure that the interrupt and event routing enable bits have the
reset values in case the Zephyr firmware image is chain-loaded.
When started by MCUboot, these registers values aren't the reset values,
but then Zephyr initializes them in same way. Yet, when the Zephyr
firmware image is chain-loaded by nRF5 bootloader, they may have values
that cause the scheduler to behave in unexpected ways.
Signed-off-by: Giancarlo Stasi <giancarlo.stasi.co@gmail.com>
Fix support for GT911 touchscreen driver when not using interrupt.
The controller still requires that the INT pin be set to input in
order to correctly respond to I2C queries.
Also, the GT911 requires that the INT pin is not configured until the
RESET pin has been low at least 10 ms after reset, so add an additional
delay during initialization to account for this.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add clock rate definitions for MIPI and LCDIF peripherals, to enable
retrival of these peripheral clock rates at runtime.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Introduce driver for NXP DCNANO LCDIF (lcd interface) peripheral,
present on iMX.RT500. Currently this driver only supports updating
the primary framebuffer, and does not implement support for the cursor
buffer present on this IP.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Introduce driver for MCUX MIPI DSI 2L. This IP block differs slightly from
the existing MCUX MIPI peripheral, and uses a different hardware
abstraction layer. For these reasons, a new driver was introduced rather
than extending the existing mcux_dsi implementation.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Allow configuration of AHB RX buffer allocation. This allows sections
of the AHB RX buffer to be reserved for specific masters, which can
enhance performance.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The driver utilizes ST Microelectronics library (which
exists in modules\hal\st\sensor\vl53l1x. Platform specific
headers and source files used by the library are included
and adapted for Zephyr.
The driver can be configured in proj.conf to use a
interrupt/polling methods and the use of the XSHUT pin on
the VL53L1X. All uses were tested successfully.
Signed-off-by: Mark Watson <mwatson@prosaris.ca>
This patch adds watchdog driver for Renesas Smartbond SOCs.
Co-authored-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
This adds driver for SmartBond TRNG peripheral that with separate
ISR an thread data pools.
Co-authored-by: Jerzy Kasenberg <jerzy.kasenberg@codecoup.pl>
Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
Remove modulus feature and return degrees larger than
count_per_revolution.
This makes it possible to detect if a full rotation has occured.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Add support for configuring power on delay when using SPI SDHC. This
allows cards that reliably initialize with a shorter (1ms) delay to
avoid the long initialize delay otherwise imposed.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add I2C bus recovery support to the STM32 v1 and v2 driver. The STM32 i2c
peripheral does not natively support I2C bus recovery so recovery is
performed using GPIO bitbanging. This mirrors the bus recovery
implementation for NXP MCUX LPI2C driver.
Fixes: zephyrproject-rtos#54917
Signed-off-by: Maxmillion McLaughlin <github@maxmclau.com>
Allow the uart_console console_out implementation to integrate with
'Device Runtime Power Management'.
Without using runtime PM, it is impossible for the application to manage
the power state of a UART instance, given that any module in the
application could theoretically LOG_* or printk at any point in time.
This removes the need to manually call `pm_device_state_set` when the
lowest power states must be reached, while still allowing console and
printk messages to be output.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Couple issues:
- `sys_clock_set_timeout()` should not base its `mtime` on the current
time either. Tracking the `last_tick` and `last_elapsed` values avoids
the need for all the tick rounding computation.
- The MIN_DELAY thing is pointless. The hardware performs a signed
comparison. If the delay gets close or even behind current time then
the IRQ will be triggered right away. This is unlikely to happen very
often anyway so the constant overhead is uncalled for.
- Runtime 64-bits divisions on 32-bits hardware are very expensive.
- The timer must be enabled before the count can return a sensible
value during driver init (at least on qemu_cortex_a9).
Discussion in PR #54919 applies here too.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
The sbs gauge emulator intercepts SMBus messages for an sbs gauge
compatible IC. However, it was incorrectly interpreting the byte order of
received register write values based on the endianness of the SoC
architecture instead of SMBus' defined little-endianness. This fault was
not caught earlier because native posix and the majority of qemu
architectures use little-endian.
Explicitly interpret the write values as little-endian.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Change message to make allow distinguishing between error while
getting page info for disk configuration and page layout
verification.
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Description of the bad behaviour before this change:
The arming of the control EP0_OUT endpoint was not kept under
control. It could happen that the EP0_OUT endpoint was left
armed, after the completion of a complete control transfer.
It is clear that the intention was to NOT keep EP0_OUT constantly
armed while idle, because usb_dc_ep_enable() doesn't arm it,
and the intention was for when usb_dc_ep_read() is called to
collect the Setup-Stage 8-byte data, that is when EP0_OUT is armed,
and before this call is performed, the host will keep getting NAKs
for the Data-Stage of the to_device control transfer.
This happens correctly on the first to_device control transfer with
wLength > 0. However, because usb_dc_ep_read_continue() indiscriminately
re-arms all OUT endpoints, in the case of to_device control transfers
with wLength > 0, on the Data-Stage, the endpoint is also re-armed,
which is wrong, because then the endpoint will be left armed after
the control transfer is over.
In this case when a new to_device control transfer starts, the
Data-Stage will be accepted on the first try. This would still
have worked without a failure if the Setup-Stage would have been
processed immediately, but because we process everything in a work
queue at a later time, when the Setup-Stage associated 8-byte data
buffer is read both the Setup-Stage and Data-Stage have arrived.
At the end of handling the Setup-Stage we try to re-arm the EP0_OUT,
which already contains data, thereby corrupting the received length
portion of the buf_ctl register. (Obviously other fields are changed
too, but the length field is the one that first causes chaos, cause
it's written to the maximum, which is 64.) The above mentioned Data-Stage
already has a message in its workqueue for it to be processed, but
it is picked up only after the length field has been corrupted.
Because of this usb_dc_ep_read() thinks there is more data in the buffer
than there really is, and everything becomes de-synchronized, with
later reads accessing uninitialized parts of the buffer.
This sounds like a fundamental failure, that should make it impossible
to operate USB, however the reason this behaviour doesn't make it
impossible to enumerate the device is that this only affects
to_device control transfers with wLength > 0, and during enumeration
there are not many of those happening.
When enumerating a HID keyboard, there is only _one_ of those
happening, and it is the initial setting of the lock light led status.
And that first one succeeds because it's the first one. (However, later
lock light setting control transfers can cause problems, which is how
this problem was encountered.)
The solution in this commit is to keep better control over when EP0_OUT
is armed. This forces the Data-Stage to arrive later (the host will keep
re-trying), and that way the corruption of the buffer control register
is avoided.
Summary of the changes:
- Rework the logic around deciding wether to re-arm the out endpoint
after a read. For non-0 endpoint the previous behaviour is kept,
however for EP0 it is only re-armed if more OUT transactions are
expected for that SETUP transfer (be it data-stage or status-stage)
- Force un-arm the EP0_OUT endpoint in case a stall condition is observed.
- When a setup transfer is received check if EP0_OUT is already armed.
If armed then log a warning message, and force-disarm it.
- When a setup req interrupt fires, don't immediately force the next
read to get it, instead, it will be read only after a setup message
is extracted from the message queue.
- When a setup packet is received abort any unfinished previous control
transfers:
- cancel any data buffers given to the EP0_IN endpoint
- drop any new ep0_in writes that are attempted before this newest
setup packet's associated message is extracted from the message
queue.
- In the ISR, check buffer interrupts before setup req interrupts.
This is to make sure that the final 0-length status message from the
previous setup packet is consumed before the new setup packet.
(this is the only case now when both interrupts could be seen as
having fired by the time the interrupt handler routine executes.
Signed-off-by: Purdea Andrei <andrei@purdea.ro>
Co-authored-by: Johann Fischer
The pwm_mchp_xec driver doesn't clear the divisor or clock select fields
of the config register value before writing it back. If the register
was previously written, the new values were being logically OR'd with
the prior values.
Signed-off-by: Jeff Daly <jeffd@silicom-usa.com>
Voltage comparator driver submits notifications into system work queue,
this change will make driver to use dedicated work queue, and priority
of dedicated work queue are configurable as well.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Extends dmamux driver to support DMAMUX 2,
which supports the BDMA on STM32H7 devices.
Co-authored-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Wrap calls to DMA drivers through fops to allow
different dmamuxes to point to different types of
dma with different function calls.
In preperation to add support for BDMA and DMAMUX2.
Co-authored-by: Jeroen van Dooren <jeroen.van.dooren@nobleo.nl>
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
update MEC172x adc driver to support device PM.
Implement pm resume and suspend actions to put adc
pins in proper state for suspend and resume.
Notify kernel of busy when adc sampling is in progress.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Added initial version of Infineon CAT1 GPIO driver.
Added initial version of binding file for Infineon CAT1 GPIO driver.
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
Added initial version of Infineon CAT1 UART driver.
Added initial version of binding file for Infineon CAT1 UART driver.
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
Add initial version of Infineon CAT1 clock control driver.
- supports clock initialization based on board DT configuration.
Added initial version of system_clocks.dtsi for Infineon PSoC 6 SOC.
Includes: clk_imo, path_mux0..4, fll0, pll0, clk_hf0..4, clk_fast,
clk_slow and clk_peri.
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
Added initial version of Infineon CAT1 Pin controller driver.
Added initial version of binding file for Infineon CAT1 Pinctrl driver.
Added initial version of dt header for Infineon CAT1 pinctrl driver.
Signed-off-by: Nazar Palamar <nazar.palamar@infineon.com>
Add PLLI2S support within clock_control driver.
This implementation is compatible with "st,stm32f412-plli2s-clock"
binding.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add PLLI2S support within clock_control driver.
This implementation is compatible with "st,stm32f4-plli2s-clock"
binding.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Polarity support added to XEC PWM driver. This allows (for example) PWM
controlled LEDs that are active low to actually be turned off when set
to off.
Signed-off-by: Jeff Daly <jeffd@silicom-usa.com>
Generalize the driver for PCAL6408A into a more abstract base
and reuse this abstraction to implement a driver for
PCAL6416A.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Fixed th02_channel_get() code to return -ENOTSUP when the channel is not
supported.
Fixes#55160.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
Since PINCTRL and pinctrl-0 is now required, there's no point in doing
extra validation at driver level. Modify the macro to just check that
sleep state is present when needed, since it was the only remaining
assertion that was not covered. Renamed the macro to make it more clear
what it does: NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This change produces more quickly in the stream valid
audio samples. The start fade-in ramp can be shortened to
100 ms for 48 kHz and 200 ms for 16 kHz. It was before 200 ms
and 400 ms. The updated DMIC hardware in allows to do this
change.
Signed-off-by: Seppo Ingalsuo <seppo.ingalsuo@intel.com>
The Host Commands can be used with different transport layers e.g. SHI
or eSPI. The code that provides the peripheral API and allows sending
and receiving Host Commands via different transport layers is not
actually drivers of a peripheral, so move it to the
subsys/mgmt/ec_host_cmd folder.
Signed-off-by: Dawid Niedzwiecki <dawidn@google.com>
This commit finish to fix the bug describe by 85e2a0679a68f02f7ef.
With the previous correction, the uptime read could be in the past:
if the counter rewinds just after testing ARRM flag, we had lost
some counts.
Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
Move to using 'select SPI' instead of 'depends on SPI'
(see commit df81fef for more details)
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
The interrupt status of the GPIO was not cleared when a new
interrupt configuration was set. This prevents the driver from
passsing all the gpio tests.
Fixes#54833
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Note: RP2040 can support single-ended IO, by setting the GPIO_OUT
register to a constant value, and then changing the GPIO_OE register
instead, when the output has to change. To do this, the output-setting
functions need to know which pins have been configured as single-ended,
and for that reason the data structure has been extended to include
this information.
Another change is the PR, is that setting of the pull-ups/pull-downs
now applies to both inputs and outputs as well. Previous solution was
wrong, because if the user wanted to set up an input with a pull
resistor enabled, and then reconfigure it to an output without any
pulls, then the pulls remained in place for the output. Now pulls
are correctly set based on the gpio flags for outputs too, and this
is especially useful for single-ended outputs too.
Signed-off-by: Purdea Andrei <andrei@purdea.ro>
Populate the `channel` index when constructing configuration structs for
secondary RTT channels. Originally missed in #27704.
Fixes#54955.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add the implementation for the akm09918c magnetometer driver.
Additionally, add the appropriate node to the TDK robokit1 device
tree. In order to prevent regressions, add the sensor to the sensor
build_all tests and specific tests using an emulator.
Signed-off-by: Yuval Peress <peress@google.com>
Add a driver implementation that uses the I2S peripheral.
Based off this blog post:
https://electronut.in/nrf52-i2s-ws2812/
Should help with #33505, #29877 and maybe #47780, as there is no garbage
data at the end of transmissions on nRF52832, and no gaps.
Signed-off-by: Jonathan Rico <jonathan@rico.live>
The icm42688 introduced a safe configure function to make the
configuration more atomic, but the main driver was never updated
to call it so the new config values were discarded.
Signed-off-by: Yuval Peress <peress@google.com>
Avoid implementations in the subsys emul directory to keep the directory
focused on emulator subsystem instead of consumers. Consumers should be
implemented side-by-side to their drivers
Signed-off-by: Yuval Peress <peress@google.com>
Allow the emulator to sit in the same directory as the driver
implementation. This will make working on the emulator much easier and
keep the emulator subsystem directory clean by allowing it to focus on
the actual subsystem and not the use cases of the subsystem.
Signed-off-by: Yuval Peress <peress@google.com>
No need to read back the CR (NOR flash config or control register)
to check if entering the 4-Byte Address Mode is effective.
The action of this command is immediate and the result
(bit field of the CR) is NOR flash vendor-specific.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Drop STM32 pinmux driver in favor of pinctrl. Some definitions located
in pinmux headers were used by the pinctrl driver, so they have been
moved there.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use proper format for size_t type eliminating warnings of type:
...
error: format '%u' expects argument of type 'unsigned int', but
argument 2 has type 'size_t' {aka 'long unsigned int'}
[-Werror=format=]
...
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Commit 00adb2a539 ("drivers: udc: remove no more required pending
state flag") removed state parameter from udc_buf_peek and udc_buf_get.
Adapt udc virtual driver so the code compiles.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
STM32L4plus mcu has SDMMC internal DMA which works without any
configuration and it's handled by SDMMC HAL driver. This commit adds
option to enable it and use it.
Signed-off-by: Petr Hlineny <development@hlineny.cz>
The LoRa modem has been staying in STATE_BUSY
after sx12xx_lora_test_cw() call
because Radio.SetTxContinuousWave() doesn't configure the PHY
to raise 'TX done' event.
It runs TxTimeoutTimer instead,
so we have to handle 'TX timeout' event to correctly release the modem.
This fix has been tested on custom board with STM32L4 and SX1276.
Signed-off-by: Petr Sharshavin <sharshavin@mail.ru>
Move the can_sja1000.h header file to the public
include/zephyr/drivers/can/ include path. This allows writing out-of-tree
SJA1000 based driver front-ends.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename the can_utils_filter_match() utility function to
can_frame_matches_filter(), move it to the public
include/zephyr/drivers/can.h header file, and add a missing mismatch for
standard (11-bit) ID frames passing extended (29-bit) filters.
This allows using the utility function in out-of-tree CAN drivers.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
When checking if any UART TX/RX IRQs are pending, the driver should also
consider whether these IRQs are enabled. Or we still get pending status
set even if the related interrupts are disabled.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
In order to avoid concurrency situation during writing UFTCTL register,
this CL adds critical sections to prevent the unexpected result if the
driver wants to set/clear bits of this register.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
It is advised to stop any ongoing ADC conversion before
disabling the peripheral.
Added some comments so that ADC state isn't left into
intermediate state that would prevent correctly
enabling or disabling the peripheral
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
This is necessary to prevent stack overflows when building with
non-standard configurations (e.g. CONFIG_DEBUG).
Adding them as hidden kconfig options to avoid the stuck kconfig syndrome.
Users are free to redefine them in their app to force a value.
The userchan.c driver is only built for posix, and the help text for
ARCH_POSIX_RECOMMENDED_STACK_SIZE states that the real stack comes from
somewhere else (the pthread stack), hence why it doesn't use the new
kconfig options.
Signed-off-by: Jonathan Rico <jonathan.rico@nordicsemi.no>
There are just list of child files to include, right now there's a hint
of that trying to be alphabetical but then entries have been added with
various logic, so one has to figure where stuff has to be added.
Rewrite these to:
- keep the list alphabetical, for CMakeLists unconditional first,
conditional after so one just has to select and sort
- drop the spaces in the Kconfig
- use a single space between target and directory
- rename from "Sub Systems" to "Subsystems" (single word)
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The fuel gauge API doesn't make use of syscalls with device drivers, which
is not congruent with Zephyr's security model.
Correct the fuel gauge API to only allow access to fuel gauge device
drivers functionality via syscalls to keep with Zephyr's security model.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Fuel gauge API struct type is currently named battery_driver_api, this is
inaccurate as the API struct represents functions for interacting with fuel
gauge drivers in particular.
Rename the API struct type to fuel_gauge_driver_api to clearly signal its
functionality.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
The int config and fifo config register addresses were wrong, fix those.
Adds lots of debug information (when LOG_DBG=y) to the configuration of the
device which is incredibly helpful for diagnosing configuration issues.
Disables the device interrupts while reconfiguring. Adds a safely
reconfigure function which will rollback to previous configuration
on misconfiguration.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Several issues:
- `last_count` should not be updated with current time or this will
cause a time drift and induce jitter due to IRQ servicing latency.
- `sys_clock_set_timeout()` should not base its `mtime` on the current
time either. Tracking the `last_tick` and `last_elapsed` values avoids
the need for all the tick rounding computation.
- The MIN_DELAY thing is pointless. If the delay gets close or even behind
current time then the IRQ will be triggered right away. This is unlikely
to happen very often anyway so the constant overhead is uncalled for.
- Runtime 64-bits divisions on 32-bits hardware are very expensive.
Fix the above, and improve the following:
- Prime the accounting by simply invoking the IRQ handler from the init
code. That will make the "ticks since boot" counter right.
- Remove excessive casts, especially a few wrong ones.
- Simplify the code overall.
Here's the output from the timer_jitter_drift test.
Before this patch:
|timer clock rate 60000000, kernel tick rate 10000
|period duration statistics for 10000 samples (0 rollovers):
| expected: 1000 us, 60000.000000 cycles
| min: 907.600000 us, 54456 cycles
| max: 1099.750000 us, 65985 cycles
| mean: 1008.594633 us, 60515.678000 cycles
| variance: 2.184205 us, 7863.136316 cycles
| stddev: 1.477906 us, 88.674332 cycles
|timer start cycle 995589, end cycle 606152369,
|total time 10085946.333333 us, expected time 10000000.000000 us,
|expected time drift 0.000000 us, difference 85946.333333 us
After this patch:
|timer clock rate 60000000, kernel tick rate 10000
|period duration statistics for 10000 samples (0 rollovers):
| expected: 1000 us, 60000.000000 cycles
| min: 992.116667 us, 59527 cycles
| max: 1030.366667 us, 61822 cycles
| mean: 1000.001902 us, 60000.114100 cycles
| variance: 0.105334 us, 379.201081 cycles
| stddev: 0.324551 us, 19.473087 cycles
|timer start cycle 987431, end cycle 600988572,
|total time 10000019.016667 us, expected time 10000000.000000 us,
|expected time drift 0.000000 us, difference 19.016667 us
The mean, variance and standard deviation number differences speak for
themselves, even in the absence of competing ISRs and/or IRQ-disabled
periods which would have made the comparison even worse.
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Create and use a new `zephyr,i2c-target-eeprom` compatible
within I2C eeprom target driver that allows to use
that driver along with real atmel at24 EEPROM simultaneously.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
This patch is in preparation of uart async support. There are no
functional changes. The patch changes the ordering of functions to
organize shared functions between async/interrupt driven in the same order.
Also move uart_xmc4xxx_init() so that a forward declaration can be
removed.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
In preparation for async support. In async uart, service requests are
forwarded to separate dma lines. This patch splits up tx/rx into
separate service requests to enable this.
Also put service request enable code into a separate function. Before,
the same code was generated for different uart devices.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
This allows to fetch information about currently connected WiFi network,
e.g. with WiFi mgmt shell commands:
uart:~$ wifi status
Status: successful
==================
State: COMPLETED
Interface Mode: STATION
Link Mode: UNKNOWN
SSID: Tp-Link
BSSID: xx:xx:xx:xx:xx:xx
Band: 2.4GHz
Channel: 13
Security: UNKNOWN
MFP: UNKNOWN
RSSI: -39
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
For development and debugging purposes it is good to know what is the
version of ESP-AT firmware used on modem. This can be fetched with AT+GMR
command.
Fetch this information during driver init and log all available version
strings, so they look like that:
wifi_esp_at: AT version: 2.1.0.0(883f7f2 - Jul 24 2020 11:50:07)
wifi_esp_at: SDK version: v4.0.1-193-ge7ac221
wifi_esp_at: compile time: (0ad6331):Jul 28 2020 02:47:21
wifi_esp_at: Bin version: 2.1.0(WROOM-32)
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Use the appropriate kernel function, i.e. `k_cpu_atomic_idle()`,
instead of directly executing the WFE instruction.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This fixes a regression introduced in:
16a0e314ea drivers: net: Move Ethernet device definition for SLIP to
ethernet
Where the module would fail to build with:
log_core.h:153:20: error: '__log_level' undeclared (first use in this
function)
Registering a module fixes the build.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
It is undesirable referencing to cfb.h because it form
reverse dependency from the driver layer to the subsystem layer.
Including drivers/display.h can solves all references in this file,
so replace it with this.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Update machine timer drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on NIOSV devicetree.
Signed-off-by: Khor Swee Aun <swee.aun.khor@intel.com>
C language does not allow declarations after labels, only statements are
allowed. Add {} around the `NRFX_USBD_EVT_SETUP` case to fix build
issues (`error: a label can only be part of a statement and a
declaration is not a statement`)
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
An invalid macro name was used to check whether the watchdog device has
configured interrupts. As a result, the interrupt were never configured.
This issue has been fixed.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
The check_arr used the TEST_ARR_SIZE value for the size, but
has been removed and replaced with CONFIG_FLASH_SHELL_BUFFER_SIZE.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
Fixes spi_nor_erase to return -EINVAL instead of -ENODEV
when erase requested is out of flash range.
This makes the SPI NOR return the same error as all other errors.
Fixes#54897
Signed-off-by: Dominik Ermel <dominik.ermel@nordicsemi.no>
Currently, if CONFIG_SLIP_TAP is enabled (default for QEMU), and no
other Ethernet driver is enabled, the following warning is printed by
CMake:
No SOURCES given to Zephyr library: drivers__ethernet
This happens because SLIP_TAP enabled Ethernet L2, but has no actual
sources in drivers/ethernet. This commit fixes this, by moving the
actual definition of the SLIP TAP Ethernet interface into a separate
file, within drivers/ethernet. Technically, in that configuration SLIP
defines a Ethernet device, implementing Ethernet API, so such a change
is justifiable, and prevents unwanted warning from being generated.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Fix DNS resolver config for IPv6 only setup.
Check validity of the DNS addresses before trying to
configure the resolver.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
These global variables should be under the mutex lock, otherwise they
will be overwritten by other transfers.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Ensure DNS resolver is stopped if modem is turned off.
All IO connected to the HL7800 need to be de-asserted
in order for the HL7800 to power off.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Previously when the repeat argument wasn't supplied to the shell
command it would falsely seem to succeed, even though the
test was never run. Instead of displaying an error message this
rather overrides the repeat to 1, so that the test is run once.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Previously cmd_test could falsely give the indication that the
flash driver is functioning properly, because the written data
isn't validated and could have silently failed.
This commit adds a verify step to ensure the data was written successfully.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Updates the meteor-lake TLB MM driver to use the memory bank module
to track page usage statistics.
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
If the host sends Port80 postcodes frequently while EC is busy handling
other tasks, the Port80 FIFO (16-byte depth) might overflow easily,
especially when the host sends the postcode with the 4-byte format.
This change defers the handling and sending (to the upper layer)
postcodes to the system workqueue thread. It can reduce a lot of
(but not all) the overflow case. Also in practice, we usually care
about the latest postcodes. The older codes are not significant to the
developer. This commit also lowers the printing of the overflow warning
to LOG_DEBUG.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
`#defines` do NOT sepecify a type. They will either adopt a native
system type or type of the value that was passed into the expression.
This can lead to warnings such as, "warning: comparison of integer
expressions of different signedness: 'uint32_t' {aka 'unsigned int'}
and 'int' [-Wsign-compare]".
By casting expressions, such as `MAX_TICKS` to `k_ticks_t`, we can
force the appropriate types and resolve these warnings.
Signed-off-by: Zachary J. Fields <zachary_fields@yahoo.com>
This commit adds the activity/inactivity recognition as well as the
stationary/motion detection as defined in the IIS2DLPC application
note.
For now, there is no possibility to configure this interrupt using
device tree binding, as I would like to keep the configuration updatable
and not set at boot time. This behaviour is fine for prototypes and
samples, but is too restrictive on products that may want to change the
interrupt configuration at run-time.
The interrupt is configured using the attributes SENSOR_ATTR_SLOPE_TH and
SENSOR_ATTR_SLOPE_DUR.
Signed-off-by: Giuliano Franchetto <giuliano.franchetto@intellinium.com>
This commit adds support for BH1750 ambient light sensor.
The driver works using I2C peripheral in one-time mode.
Signed-off-by: Michal morsisko <morsisko@gmail.com>
Intel SSP configuration can have auxiliary data embedded after it in a
variable length tlv array. Enable the parsing of this data and add the
data structs to describe the contents.
For now add support only for new version 1.5 blob. This is because
legacy blob doesn't have size field to describe its variable size.
Auxiliary data parsing has currently only 1 setting for link clock
needed in ACE platforms.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Add support for newer data blob version 1.5. Refactor the code to re-use
the common register setting. Clock setting will be handled differently
with legacy and version 1.5 blob.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Modify dai_config_get function to have the config struct as argument.
This was not a showstopper but a request in the API review.
In the same patch modify all Intel dai drivers using the API to preserve
bisect/compile.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
When enabling trigger mode of bmi160 on i2c bus, I've come across
an issue where the readings register STATUS. The issue comes from
the dummy byte in the beginning of the buf.raw which is not necessary.
In addition, for bmi160 on spi bus, the dummy byte has already been
handled in bmi160_transceive while reading register.
So the dummy byte should be removed.
Signed-off-by: Zhang Lixu <lixu.zhang@intel.com>
The Microchip XEC (MEC172x and MEC152x) have a breathing-blinking
LED (BBLED) block which implements a simple PWM mode. The BBLED
PWM frequencies are 32KHz and 48MHz selectable in device tree.
Frequency divider is 12-bit resolution from 256 to (256 * 4096).
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
The Microchip XEC family of microcontrollers includes a
simple DMA block implementing multiple channels. DMA supports
memory to memory, memory to peripheral, and peripheral to
memory transfers. Peripheral support is limited by each
chip to I2C and SPI controllers. DMA hardware does not support
scatter-gather or linked transactions.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Allow DMA channel to be stopped even if it is in suspended state.
The current code in dw_dma_stop() supports this, but the recently
added early check for dw_dma_is_enabled() results in DMA stop
sequence to be skipped if the channel was in suspended state.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
The conditional definitions are not correct as "chan_data"
is used without any include guards, but defined only if
CONFIG_DMA_DW_HW_LLI or CONFIG_DMA_DW_SUSPEND_DRAIN is defined.
Correct the declaration to match usage.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
This is a follow-up to commits cf871aec64
and 205e684958.
It turns out that the current implementation of the nrf_rtc_timer may
still fail to properly handle a timeout if that timeout is set in very
specific conditions - when a previously set timeout is about to expire.
When that happens, the new timeout is handled 512 seconds later (when
the system timer overflows) than it should be.
A recently added nrf_rtc_timer test case (test_tight_rescheduling)
exposes this problem and this commit fixes it by adding examination
of COMPARE events that appear during setting of the CC register value
for a given timeout.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This function name is misleading as the absolute time values handled
by the driver are 64-bit and this function receives a 32-bit parameter,
which is supposed to be a CC register value, not the target time.
Correct the name of this function and its parameter, and remove a now
unnecessary masking from its body.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
I believe this comment and condition may have found its way into the
rp2040 driver from other drivers where it makes more sense. For
example for the stm32 driver performing a read on the EP0_IN endpoint
turns it silently into a read on the EP0_OUT endpoint. As far as I can
tell, this really was only used to consume 0-length Status-Stages of
to_host control transfer in the other drivers.
Note that usb_dc_ep_start_read() is never called in an IN endpoint
in the rp2040 driver, and furthermore, even if it would have been
called like that, the current implementation would not do the silent
change into actually performing a read on the EP0_OUT endpoint instead,
so the condition and comment is just wrong.
Note that 0-length Status-Stage of to_host control transfers is
currently consumed in this driver by usb_dc_ep_read_continue().
Signed-off-by: Purdea Andrei <andrei@purdea.ro>
Since not all GPIOs support voltage selection, voltage flag
is only set if voltage selection register is present.
fixes: #54366
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
The data stage of Control transfers that are sent from Host to Device, can
be made out of multiple OUT transactions, if the amount of data to be
transmitted is larger than the endpoint size. When this happens, the DATA
pid should be toggling. The USB Device driver of the pico must correctly
prime the EP0_OUT buffer with the correct data PID, otherwise the hardware
will reject the received transaction.
Before this change the driver used to always prime EP0_OUT with a DATA1
pid.
After this change the driver only uses DATA1 pid after a setup transaction,
and then toggles the pid for each transaction.
Signed-off-by: Purdea Andrei <andrei@purdea.ro>
On a repeated dma_start, the stm3u5 dma driver should return
immediately if it is already started.
On a repeated dma_stop, the stm3u5 dma driver should return
immediately if it is already stopped.
This like the dma driver does for other stm32 series.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Correct bit mask for RF2XX_RX_TRAC_BIT_MASK. Current mask produce dead
code warnings when comparing to value:
RF2XX_TRX_PHY_STATE_TRAC_INVALID = 0x07
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
cy8c95xx I2C GPIO support was broken in commit 4b30008 due
to wrong i2c bus and addr were wrote during GPIO_PORT_INIT.
Now fix this issue.
Signed-off-by: Siyuan Cheng <siyuanc@synopsys.com>
Address map used for config item `uart_dev` and `uart_regs` is
currently derived using the rpi hal macros `uart0` and `uart1`
which map to the same register address as given in the `reg` property
of the devicetree.
However, the sdk macro is generated using `uart##idx` which zephyr does
not necessarily map to uart0 or uart1.
This is, for example, the case when disabling uart0 with the devicetree
status "disabled"
and enabling uart1 for which then the idx==0 and not 1 which therefore
maps to the wrong controller address space.
This can simply be fixed by deriving the base address from
`DT_INST_REG_ADDR(idx)` instead
Signed-off-by: Ramon Aerne <ramon.aerne@axelera.ai>
PR #30403 implemented nocache regions for ethernet DMA buffers in sram3 to
fix issue #29915. Unfortunately, some STM32H7 variants do not have any
sram3 so they still suffer from #29915.
All H7 variants have sram2 though, so use that for targets without sram3.
Signed-off-by: Björn Stenberg <bjorn@haxx.se>
ETH MAC config for STM32H7X and STM32_HAL_API_V2
too late and fails #54409
call HAL_ETH_SetMACConfig before HAL_ETH_Start_IT()
check the return of HAL_ETH_SetMACConfig()
Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com>
On the stm32U5, when modifying the DIER register of the LPTIM peripheral,
a new write operation to can only be performed when the previous write
operation is completed and before going-on.
This is done with a function call for better readability.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
When the LOG_WRN is used on stm32 uart driver it could block
execution : when pin state for sleep mode is not defined by the DTS
even if no error is raised, LOG_ msg is crashing when entering sleep mode.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit changes the ability to keep the RTC value between resets, and
turns it off by default.
Though this feature makes sense for an RTC counting the time and date,
here it is used as a counter. As such the registers used for coutning
should be reset after each MCU reset.
This change puts back in place the previous behavior before the Kconfig
CONFIG_COUNTER_RTC_STM32_BACKUP_DOMAIN_RESET was removed.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
With CONFIG_ETH_STM32_MULTICAST_FILTER=n, MACFFR was being set to 0 instead
of ETH_MULTICASTFRAMESFILTER_NONE, blocking all multicast traffic.
Instead, reset all the relevant bits first, then set either
ETH_MULTICASTFRAMESFILTER_HASHTABLE or ETH_MULTICASTFRAMESFILTER_NONE
depending on Kconfig.
This issue was introduced in #53850, `git diff a5f9fc2~2 a5f9fc2` (the
total diff of that PR) shows what happened - the
`tmp |= ETH_MULTICASTFRAMESFILTER_NONE;` line was removed completely
instead of being gated by `!defined(CONFIG_ETH_STM32_MULTICAST_FILTER)`.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Requesting page layout triggers filling bank array
only once, and returns pre-filled array on consequential calls.
But ignores array size.
Remember size of this array as well.
Fixes#54563
Signed-off-by: Maciej Zagrabski <mzi@trackunit.com>
MMC was using SDMMC kconfigs to build disk driver.
This is incorrect, MMC and SDMMC should not be sharing
Kconfigs. Split the drivers/disk/Kconfig.sdmmc into
drivers/disk/Kconfig.mmc and drivers/disk/Kconfig.sdmmc.
Also update disk tests to account for new MMC Kconfigs.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
The fast tx/rx/txrx functions will leave the SPI bus in an
inoperable state if interrupted, potentially spinning forever waiting on
some data. Wrapping these operations in what amounts to a critical section
using spin locks to avoid the issue.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Add support for side B channels in MCUX LPADC driver. Given
that no instances of the IP block have more than 8 a side channels,
use channel numbers over 8 to indicate side B channel is desired.
Fixes#51076
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
PSM hibernate mode would draw excessive current
because the UART would be enabled if CTS went low.
In hibernate mode, do not use CTS to power on the UART.
Fix reading of input pin states for low power by reading
the raw value.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Change event callback lock to a semaphore to avoid
priority issues the mutexes can cause.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
This driver enables a number of interrupts it does not attempt to handle.
This results in "unhandled IRQ: 0x...." messages being printed, and the
interrupt handler retriggers immediately again, and this happens again
and again forver, because nothing ends up clearing the interrupt.
This change implements very limited handling of these interrupts. A custom
warning is logged, and the interrupt is cleared.
This change does not imply that doing this is sufficient. More changes may
need to be implemented to more gracefully re-start transactions or
re-arm some endpoints, but this is one step in the right direction,
and at least the OS doesn't freeze up.
Signed-off-by: Purdea Andrei <andrei@purdea.ro>
Align driver with changes introduced in the hal. `nrf_timer_frequency_set`
was changed to `nrf_timer_prescaler_set`, update driver accordingly.
Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The driver currently stores num_keys in both config and data. Drop the
data copy, save 4 bytes of RAM.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add code that acts accordingly when a transaction does not complete
in the expected time. It makes sure that the transaction is aborted
so that no unexpected interrupt occurs afterwards and it also cleans
up after that abort so that the driver can handle further requests.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
UNUSED_L2_START_ALIGNED is a marker of first page not used by the
linker. Starting from this page, the memory may be re-mapped.
assertion <= is banning remapping of the first unused page
changing to <
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
Update the calculation of the row and column.
Issues were seen when running the LVGL sample.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
The driver is missing the GPIO initialization entirely, meaning that
flags like PULL_UP are not currently being applied. Add the missing
call.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
The introduction of cc2c05a90c caused
CONFIG_MCUX_LPTMR_TIMER to always be enabled for boards where the NXP LPTMR
is enabled in the board devicetree.
Using this low-power timer as system timer only makes sense when using
power management. Otherwise, it just results in a lower tick resolution and
non-tickless operation.
Add dependency on CONFIG_PM for CONFIG_MCUX_LPTMR_TIMER.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
New Zephyr WDT driver for TI CC13xx/CC26xx family.
Supports interrupts & MCU soft reset on timeout.
Signed-off-by: Stancu Florin <niflostancu@gmail.com>
Fix two "unused variable" warnings when compiling with assertions
disabled. The two variables are used only in the __ASSERT() call.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Fix a build error when the driver is built with:
CONFIG_PM=y
CONFIG_PM_DEVICE=n
CONFIG_UART_INTERRUPT_DRIVEN=y
CONFIG_UART_CONSOLE_INPUT_EXPIRED=y
due to uart_xec_pm_policy_state_lock_get() and rx_refresh_timeout_work()
declared under different configuration options.
Fixes: 343d1919f1 "uart: microchip: add low power & wake support"
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
To follow the IWDG configuration sequence, the timeout install is
just preparing the reload and prescaler parameters.
Then during the iwdg setup the watchdog is enabled and configured
at the same time.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
1. Do not copy over the data to the local buffer,
it can be directly sent to the controller. The
cache is flushed before calling the HAL send
function. Also do not allocate a buffer from
the heap pool for the write operation.
2. Remove a length check as this is handled by
the HAL driver.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Add support for automatically configuring GPIO hogs defined in the
devicetree during system initialization.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
It is not guaranteed that a multi-core RISC-V hart numbering scheme
will match Zephyr's sequential cpu numbering scheme. Read the hartid and
use that value in calculation to get mtime_cmp reg, instead of the
current_cpu id.
Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
changes to support low power and wake support in microchip xec uart
driver. Add support for wakerx_gpio config in dts to select the wake gpio.
Configure for wake in PM_DEVICE_ACTION_SUSPEND state and clear
interrupt in wake isr. Also added support for
CONFIG_UART_CONSOLE_INPUT_EXPIRED
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
New capability is to be used by the stack to adjust the corresponding
field in the device descriptor.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
udc_ep_flush() is not implemented by the driver and is not
used by the USB device stack. Remove it for less confusion
when porting drivers.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
The ISR prototype was changed some time ago
(6df8b3995e)
to (const void*) => fix the prototype used when
CONFIG_IEEE802154_NRF5_EXT_IRQ_MGMT is not set
to avoid a compile warning.
Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
Fix the low readability read command which was swapped with high
readability. This should fix an issue which caused a sensor fetch
fail in low repeatability single shot mode (no data ready)
Signed-off-by: Wouter Cappelle <wouter.cappelle@crodeon.com>
Fixes using wrong status bit for ADS1119_STATUS_MASK_ID. Moreover
using BIT(8) does not make much sense for working with uint8_t.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Added new CC1352P1 LaunchXL board supporting 20dBm TX for its
sub-GHz radio.
Note that the board has a multiplexer circuit to switch between
2.4GHz, High-Power TX and Sub1GHz states, for which a custom board
module was implemented, together with board-specific device-tree
bindings and pinctrl definitions for each of the RF states.
Signed-off-by: Stancu Florin <niflostancu@gmail.com>
Enhance IEEE802154 Sub-GHz driver to support CC13x2P's internal power
amplifier (20dBm) for TX.
Note: requires board-specific antenna switching for it to work
properly.
Signed-off-by: Stancu Florin <niflostancu@gmail.com>
When turned on, the existing i2c dump code is use to log every I2C
transaction at debug level.
This can be very useful for detecting problems with I2C peripherals.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
If an i2c message is for just one byte, instead of logging it with a
hexdump after logging the other message info, just added the one byte to
the same log message.
Since most i2c messages are one byte, this significantly reduces the
number of messages and lines needed to log i2c transactions, from three
line per message to just one. It's also a lot easier to read.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
Add an argument to i2c_dump_msgs() to log the data from reads too. And
then rename the function to i2c_dump_msgs_rw() so the API doesn't
change. If the dump is done after a transaction is processed, as
opposed to before, then the read data is valid and can be very useful.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
When estimating the time that a given SPI transfer will take, whole
buffer sets for TX and RX need to be taken into account, not only their
first parts. Correct `spi_context_wait_for_completion()` accordingly.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
spi_nor_sfdp_read is now called from spi_nor_process_sfdp for the
CONFIG_SPI_NOR_SFDP_RUNTIME case and that could be defined without
CONFIG_FLASH_JESD216_API being defined
Signed-off-by: Michael Larson <larson@whisper.ai>
Adjust the size of the stm32_flash_layout[] table depending on the
bank configuration of the stm32u5 or stm32l5 devices.
That will avoid div by zero error in flash_get_page_info()
if the layout_size is not correct.
Assign the *layout_size only once with the correct value : 3 or 1.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Lock I2C device state when used so that Power Manager doesn't
suspend the device.
Initial state is a suspended device.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
Clock and pins used by the I2C device are suspended when power
manager requires it.
Do not compile function i2c_stm32_suspend when PM_DEVICE isn't
enabled as it is left unused and will make the compiler throw
a warning.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
Common STM32_EXTI_LINE_NONE for declaration and setting
of wakeup EXTI line when configured.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
This commit aims at updating the drivers stop function to better
follow the CAN header file which specifiec that stopping the CAN
controller should "abort any pending CAN frame transmissions".
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
Zero data payload size for isochronous endpoints is a
is a valid setting for default interface.
Also do not update MPS of control endpoint since it is
set by the driver.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
The change enables the ethernet driver to save statistics in a
structure in the ethernet driver API structure. In addition, the
change also attempts to update error statistics based on errors
reported in the STM32 ethernet HAL API.
Fixes#53995
Signed-off-by: Chamira Perera <chamira.perera@audinate.com>
The CAAM hardware needs to read RNG values into a non-cache
buffer. Since the contract to Zephyr RNG functions do not
require non-cache buffers, we use an intermediate non-cache
buffer to retrieve results.
Added a Kconfig to control the size of the intermediate buffer.
Fixes#53035
Signed-off-by: David Leach <david.leach@nxp.com>
This commit fixes a bug in the STM32 ospi flash driver when attempting
to erase an area that spans more than one erase sector.
Without this fix, only the first sector is actually erased, the rest
silently fails the erase.
Issue is that the write enable latch command is only sent for the first
erase command.
Signed-off-by: Brian Juel Folkmann <bju@trackunit.com>
This enables the MCO clock output pin to be configured through Kconfig on
stm32l4 devices.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
This enables the MCO clock output pins to be configured through Kconfig on
stm32f7 devices.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Add 2 new sub-commands to the sensor command (attr_get and attr_set).
These commands can be used to access the driver's attr_set and attr_get
functions.
Signed-off-by: Yuval Peress <peress@google.com>
Remove the CAN_HAS_CANFD Kconfig helper symbol in order to allow enabling
CAN-FD support in the API regardless of driver support.
Change default to CAN-FD support being disabled and have samples and tests
that require CAN-FD support turn it on. This aligns the default
configuration across CAN controller drivers regardless of their
capabilities.
The rationale behind this is that we are starting to see MCUs with multiple
CAN controllers, some CAN-FD compatible, some not (e.g. NXP i.MX RT1060 and
FPGAs). Automatically enabling CAN-FD support based on the presence of a
CAN-FD capable CAN controller leads to different application default
settings based on the CAN controller(s) in use.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Remove the CAN_HAS_RX_TIMESTAMP Kconfig helper symbol in order to allow
enabling CAN RX timestamps in the API regardless of driver support.
This simplifies application prj.conf settings across board supporting/not
supporting RX timestamps considerably.
CAN drivers not supporting RX timestamps already initialize the timestamp
to 0 for received frames.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Now that we have the information of internal channel number for STM32
ADCs in the dts, we can use it to remove a lot of specific code and
make it clearer.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Slightly refactor STM32_ADC_INIT macro.
adc_stm32_cfg_##index declaration is now part of ADC_STM32_INIT
and extracted from CONFIG_ADC_STM32_SHARED_IRQS #ifdef.
Aim is to minimize code duplication when adding new adc_stm32_cfg_X
or adc_stm32_data_Y entries
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This is a follow-up to commit 205e684958.
The recently added nrf_rtc_timer test case (test_next_cycle_timeouts)
revealed a problem in the current implementation of this function.
Adjust it to avoid missing COMPARE events in specific circumstances.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
RP2040 requires watchdog load time in us, but Zephyr
watchdog window values are in ms. Make sure that it is
adjusted to hardware requirements.
Signed-off-by: Marcin Jabrzyk <marcin.jabrzyk@gmail.com>
Currently we setup irq trigger type (pulse or level) in IDU
before we Mask (disable) IRQ line.
The IDU is disabled at this moment, however we still may
accidentally generate interrupt by trigger setup.
To avoid that let's mask (disable) IRQ before trigger type setup.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
bugfix for Cyclone V Ethernet Phy error and timeout overflow.
- p->instance was incorrectly assumed to be a reference to
the emac device, this is ammended
- the volatile uint16_t timeout would often overflow
- code cleanup and added more macros for housekeeping
Signed-off-by: Benjamin Kyd <benjamin.kyd@intel.com>
Add a driver for the NXP MCUX Quadrature Decoder. The driver
is simple and only implements the phase a and phase b inputs. The
module has additional features which can be added in future PRs.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Change the name of the custom macro defined for the stm32 devices
to fit the VND_PWM_xxx model
Keeping old deprecated macro, though.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Introduce Ethernet low-level driver for NXP S32 Network Controller
(NETC). Current driver allows to manage from Zephyr a Physical Station
Interface (SI) and/or a Virtual SI. The NETC has an integrated Ethernet
Switch. Currently the Switch is initialized from this driver with a
default configuration, and all ports are enabled and transparent for
the user. A separate Switch driver should be addressed in future patches.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Introduce NXP S32 NETC External MDIO controller driver. Driver supports
a single instance, as current support is based on NXP S32Z/E SoCs.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Advertise Gigabit Ethernet if the PHY supports it. As with the
other speeds, it is assumed the PHY supports both duplex modes.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Introduce NXP S32 Message Receive Unit (MRU) driver based
of Mbox API. The MRU couples with a processor and allows to
receive messages from senders, which are other modules or
processors.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
This change enables the ISR Hard Reset sent bits, so that
an interrupt is generated when a Hard Reset is sent or
the Hard Reset failed.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
The Hard Reset sent signal was tested twice in the same
"if else" structure but only handled in the last test. This
change removes the first detection so that Hard Reset can
be correctly detected.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
Only run the `PM_DEVICE_ACTION_TURN_ON` and `PM_DEVICE_ACTION_TURN_OFF`
actions for child devices that have refered to the domain via the
`power-domain` property.
This prevents multiple actions being run for devices that refer to
several power domains, e.g.
```
test_dev: test_dev {
compatible = "test-device-pm";
status = "okay";
power-domain = <&test_reg_1>;
alternate-domain = <&test_reg_chained>;
};
```
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
The struct sensor_value type does NOT require val2 to be positive. The
removed code is in fact a rather serious bug, probably put in place
because it makes printing sensor_values easier.
Signed-off-by: Benjamin Lindqvist <benjamin@eub.se>
It's not necessary to busy wait 150 µs after changing register banks.
Nothing in the data sheet nor app note suggests this. ST's own HAL,
which is used by this driver, does not delay when changing banks. It
does a bank change around every function that accesses a non-user bank
register (it's quite inefficient).
So if it was necessary it would be broken now, as most of the bank
changes have no delay.
One of the few page changes that did have this delay are the those done
before and after reading a sensor sample. Which is where the speed is
significant and is limiting the update rate the driver is capable of.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
The code in the ST HAL does a read/modify/write to change the bits in
the LSM6DSO_FUNC_CFG_ACCESS register that control which register bank is
active.
All the other bits in the register are defined as zero. It's possible
to simply set the register to the desired value without reading the
contents first.
This bank switch needs to be done twice for every sensor read when the
sensor hub is used. The driver as it is can not keep up with the higher
update rates of the lsm6dso. So any speed increase in this code allows
for a higher update rate as well as reduced latency.
Previously, a read of the lsm6dso's accel and gyro on a 400 kHz I2C bus
with a 3-axis magnetometer on the sensor hub takes 2.69 ms. This drops
that to 2.26 ms. This is enough to support the 417 Hz ODR.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
There is a flaw with I2C communication to peripherals behind the shub
that causes sporadic failures. Especially calls to configure a device
after the lsm6dso initialization is finished, e.g. to set the ODR, can
fail to work correctly.
Access to shub peripheral registers is done by putting the parameters of
the operation into SLV0 and then waiting for the lsm6dso to perform the
xfer on the shub I2C bus. The lsm6dso does this in sync with the
accelerometer update rate. Once the shub is enabled, it peforms the
xfer repeatedly as the accelermeter is sampled.
The wait has a problem: It might detect that a previous shub xfer has
finished, which was done before SLV0 was programmed with new parameters.
The shub status register is read-to-clear. This isn't in the data sheet
or app note, but it is. By reading the status before enabling the
sensor and after programming SLV0, we can be sure when it becomes set it
has finished the current operation and not a previous one.
Also set the write-once flag before shub init. This causes the shub to
only perform I2C writes once instead of continuously. This was set at
the end of init, so any writes done during it would repeat until the
shub was disabled.
Put a timeout in the code that polls for the sensor hub op complete. It
could possibly poll forever. More importantly, if there is no device
connected to the sensor hub, the lsm6dso does not timeout on the
operation for ~13 seconds. Since the shub init does a probe for devices
on startup, this will happen if shub support is enabled but a lsm6dso
has no sensor hub devices. There could be multiple devices, some with
additional sensors and some without. Initialization of the devices
without additional sensors takes tens of seconds without this timeout
being added.
Add a 300 µs wait after disabling the sensor hub. This is necessary
according to the ST app note AN5192 §7.2.1.
Read the shub status from the main bank register instead of the shub
bank register. This avoids an extra bank switch before and after each
status poll. Actually two bank switches on each side, since the lsm6dso
driver switched banks and then the ST HAL function to get the status
register switches again.
The wait for the shub I2C transaction to finish is not needed when the
shub is enabled at the end of init. We aren't starting a new I2C write
or reading the result of a read.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
The lsm6dso initialization will fail if the device is not already set to
the user register bank. All the registers used will be the wrong ones
from whatever bank it is in, e.g. sensor hub bank. This includes the
registers to reset the device!
The bank will default to the user bank on reset, but the chip has no
hardware reset line. On a reboot it will be in whatever bank it was
last in. If the sensor hub is enabled, it will switch banks on every
sample, so it's entirely possible to reset or reboot when it happens
to be set to the sensor hub bank, which will cause the driver to
fail to initialize. It will not work again until the lsm6dso is power
cycled.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
Per an ST app note, the sensor hub I2C controller should be disabled
before doing a software reset. Possibly, this is because the sensor hub
could be in the middle of the an I2C transaction to a sensor when it is
reset. Disabling it and then waiting makes sure it has quiesced before
resetting.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
The initialization code would configure the lsm6dso interrupt, then
configure the rest of the chip. The chip init includes a reset that
would undo the register setting done during interrupt configuration.
It's also not a good idea to enable the interrupt on the SoC when the
lsm6dso has not yet been reset or configured. It might be generating
interrupts.
The lsm6dso has no hardware reset line, so it will not be reset on
reboot unless a power cycle is involved.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
The DMA API contract specifies that start/stop may be called multiple
times. Prior to adding power management this was perfectly fine as it was.
In adding power management, there are additional side effects that can
cause issues. Instead check the state of the channel prior to start/stop
and do nothing if already in the desired state.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
When transceiver is overload on reception a frame can be stored on
the internal buffer without processing a frame start interrupt. The
frame will complete and system will received a interrupt and signal
receiver thread with an isr_status equal to 0x2c.
The current implementation process one flag at time and it may hang
when status is 0x2c. This issue can be reproduced using two nodes
where one perform a regular TX broadcast and tThe other one should
be wait for frames. The receptor should run on debug mode and system
should be started normally. The problem happens when pressing CTRL+C
on the debugger, which will cause system to stop. However, the
transceiver still can receive one last frame. After a few transmission
user can continue application and a isr_status of 0x2c will be visible
if CONFIG_IEEE802154_DRIVER_LOG_DEBUG is enabled.
This fixes the current issue by processing all RF2XX_TRX_END events.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
A call to exit_dpd mode for the nrf QSPI nor flash should always be
made, even if the currently executing image is compiled with
CONFIG_PM_DEVICE=n, because a previously executing image could have set
the device into DPD mode, and a call to exit_dpd is required for proper
functionality. Call `exit_dpd` regardless of the setting of
CONFIG_PM_DEVICE during QSPI nor initialization.
Signed-off-by: Nickolas Lapp <nickolaslapp@gmail.com>
Previously channels could be tore down before a sequence completes,
either when using async, or when ADC_ACTION_REPEAT was specified
The teardown is now moved to after an entire context is complete
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
This optional function allows a driver to do operations
after a complete sampling sequence is completed.
Signed-off-by: Hein Wessels <heinwessels93@gmail.com>
Add dependency on SYS_CLOCK_EXISTS to all timer configurations.
This would avoid a situation where a possible timer configuration would
be wrongfully selected but SYS_CLOCK_EXISTS is disabled.
This simplifies code that wants to check for system clock capabilities
don't have to check if the system clock exists in addition.
Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
Minor rework to perform the PLLI2S VCO computations in floating point as
per the original seemingly intent.
Signed-off-by: Raul Pando <raul.pando@bytegrity.co.uk>
Point to the modified version of hal_stm32 which allow to use
ETH HAL V2 on stm32F7.
Update zephyr driver to allow it.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Similarly to what was done in USB or RNG drivers, configure 48MHz domain
clock using device tree.
By default a freq clock check is enabled.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Fix handling of failed NXP FlexCAN RX mailbox reads. Instead of re-enabling
the RX MB in the ISR, we need to handle a failed RX MB read (e.g. due to a
busy MB bit).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add a locking semaphore so that multiple threads
doing transfers with the same i2c will not produce
unexpected results. The lock will ensure that only one
transfer will happen at a time and it must be completed
before another thread can request a new transfer.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Program the right trim control register for mec150x.
This fixes uart debug console output issue.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
This change takes advantage of line information coming from new properties
to simplify exti_irq_table definition and isr routing related code.
All __stm32_exti_isr_x routing functions are removed and instead,
stm32_exti_isr is now taking a exti_range structure which provides,
for each irq, start line and range length.
This argument is provided by IRQ_CONNECT macro instead of previous
dev info (which is constant and doesn't need to be provided as argument).
line_range_x variables are generated at driver init thanks to a
mix of dt magic and runtime implementation:
DT_FOREACH_PROP_ELEM iterates over each irq line (counted as
interrupt-names property) call a macro which instantiates populated
line_range_x variables, and calls IRQ_CONNECT for each IRQ.
Additionally, at each iteration stm32_fill_irq_table() is called to
fill exti_irq_table.
Since not required anymore, Kconfig symbols EXTI_STM32_EXTIX_Y_IRQ_PRI
are removed. IRQ prio is now supposed to be configured in device tree.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The hda driver uses -EPIPE to signal xrun, as proposed in the alsa lib
https://www.alsa-project.org/alsa-doc/alsa-lib/pcm.html. This commit
changes the xrun error code in dw dma driver from -ENODATA to -EPIPE to
make it consistent across drivers.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
The uart_mux_recv() documentation was wrong, the function parameters
were incorrectly documented.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
There are various call to z_soc_cached_ptr() which returns values
in the cached address space and are stored in temporary variables
that are not marked as in the cached address space. This results
in sparse complaining about discarding the cached address space
attribute. These temporary variables are then passed to other
internal memory management related functions which do not have
the concept of cached address space (as it is currently Xtensa
specific). Because of this, we cannot change the signature of
these functions. Instead, we force a change of address space
when those temporary variables are being assigned to suppress
sparse warnings.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
To support the repeated start/stop, the stm32 dma driver is
returning 0 if the channel is already started/stopped.
This is not done at the dmamux level if any.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
- Applied changes on the most recent version of the driver
- Using CONFIG_ETH_MULTICAST_FILTER to enable/disable the hash filter
- Using read-modify-write the hash table for a single address
when joining
- When leaving rebuild the entire hash table and ensure that multicast
addresses used for the hash calcuation doesn't have the joined flag set
I have tested these conditions:
- IGMP enabled and disabled on my ethernet network
- Observed the network utilisation on a STM32H7 device running these
changes with the hash filter enabled and disabled while the device is
on a ethernet network with high rate multicast traffic
- When the application closes a socket for a multicast receive, ensure
it doesn't affect the receiption of existing sockets as well as IGMP
Fixes#53773
Signed-off-by: Chamira Perera <chamira.perera@audinate.com>
Use the MAC's hash table to filter incoming multicast frames that are
targeted to subscribed multicast groups and discard all others.
Signed-off-by: Markus Fuchs <markus.fuchs@ch.sauter-bc.com>
# Conflicts:
# drivers/ethernet/eth_stm32_hal.c
This reverts commit 271b306.
In rare conditions, this commit causes the uart shell mechanism to
corrupt on Cros ec system. Revert this commit on upstream repo first to
avoid blocking the development. Will dig out why this symptom occurs
later.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
When the PAUSE or STOP command was triggered, the driver was first
requesting the PDM peripheral to stop by calling nrfx_pdm_stop() and
then it was setting a flag that was in turn checked in an interrupt
that was generated when the PDM actually stopped (what happens a moment
after the stop request is made). But that setting of the flag could get
preempted and the interrupt handler could get executed first causing
the stopping to be not handled properly and leaving the driver falsely
considering the peripheral as still active.
This commit reverses the order of these two operations to avoid
the described race condition.
Same sequence is corrected also in event_handler(), but this is
done only for consistency (it is in the interrupt handler itself
so there is no race possible in this case).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The number of HPSRAM memory blocks in use is reported to the
PMC via the sideband channel supported by the communication widget.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
the watchdog is enabled by the wdt_setup()
coming after the wdt_install_timeout.
Due to PR #44972, the code did not follow that.
This PR fixes the correct other in the sequence.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
RNG clock configuration constraints differ between each series.
Rather than providing complex build time code to verify RNG clock
configuration is correct, take advantage of CECS bit (Clock error
current status) to assess clock configuration.
This check is implemented under a specific ENTROPY_STM32_CLK_CHECK
Kconfig option. This allows user to disable this feature in specific
conditions:
- CED bit disabled in application (in which case CECS status is not valid)
- Clock configuration is deemed as correct by user. Note that RNG number
are always generated, whatever the clock status.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
RNG domain source clock is now configured via call to clock_control
driver.
Besides, add static checks to verify domain clock configuration
is correct:
- If HSI48 is used because it is default domain clock config,
it should be enabled
- If no HSI48 is available, a specific domain clock should be set
- In L0 case, PLL could be used as domain clock only at a specific freq.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use STM32_DT_INST_CLOCKS to populate device clock information.
This will allow to add clock source information in next commits.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The interrupt is used to wake up EC from low power mode.
So EC does not defer eSPI bus while transaction is accepted.
Fixes EC host commands slow issue.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
This commit makes the peripheral-id property optional and removes it's
usage from the Gecko SPI driver.
Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
Update usage of zephyr_code_relocate to follow new API. The old method
of relocating a file was the following directive:
zephyr_code_relocate(file location)
The new API for zephyr_code_relocate uses the following directive:
zephyr_code_relocate(FILES file LOCATION location)
update in tree usage to follow this model. Also, update the NXP HAL SHA,
as NXP's HAL uses this macro as well.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
There is no need to disable interrupts while just checking if
a channel needs to be processed in the ISR, as that section
does not contain anything that needs to be protected against
overwriting from some other context. In particular, if a given
timeout is changed or even aborted while its event is being
checked, this will be correctly handled in the code that follows
and that checks the expiration time.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Values to be set to the comparator need to be specified in RTC cycles,
not ticks, so the initial value used in the tickless mode needs to be
MAX_CYCLES, otherwise when CONFIG_SYS_CLOCK_TICKS_PER_SEC is set to
a value less then the RTC frequency, the initially configured timeout
will be unnecessarily shorter.
On the occassion, remove also the call to counter() when setting the
initial timeout value in non-tickless mode. RTC is cleared a few lines
above, so at this point it will most likely be 0, and even if it was
not, compare_set() would properly handle a target time value that had
already passed.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
In non-tickless mode, the timeout handler always announced maximum 1
tick to kernel, but in fact it cannot be guaranteed that the handler
execution is not delayed and that the number of elapsed ticks does not
exceed 1. Use the actual number instead.
Switch also to using a 32-bit value for `dticks` to get a bit simpler
generated code (ticks delta is not supposed to be that huge).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Align the condition checked in compare_set_no_locks() with what
set_absolute_alarm() actually provides (and slightly correct the
latter function so that it provides what it is supposed to).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add missing masking against `BIT(chan)` when handling a forced ISR
to avoid unnecessary processing of multiple channels instead of just
the one that actually requires it.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Remove a piece of code that was supposed to bring an extra update
of the anchor value but which in fact was not able to provide it,
because of the target time checking performed in process_channel(),
and which is anyway unnecessary because the timeout span is limited
to MAX_CYCLES in sys_clock_set_timeout(), so the timeout handler is
guaranteed to be executed at least twice per each RTC overflow.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Eliminate waiting for a potential COMPARE event when setting a CC
value close to the previously set one and rely instead on checking
target time when processing channel events in the ISR.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Remove unnecessary decreasing of the number of ticks by 1 (it was then
increased by 1 when it was converted to the number of cycles) and add
a comment that clarifies the way that ticks < 1 are handled.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This is important for applications which are chain-loaded by a broken
bootloader which doesn't reset the peripheral before handing over control.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Regulator voltage needs to be within allowed range before enabling. It
could happen that regulator default voltage is out of the allowed range,
so the regulator could be enabled at boot time producing a not-allowed
voltage.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The existing linear_range API did not allow values or windows outside of
the linear range (returned -EINVAL). With this change values are allowed
outside of the range, being adjusted to the edge values (min/max)
instead. In the case of windows, it is allowed to have partial
intersection. In both cases, the API assigns a valid index (nearest) and
returns -ERANGE. This change is useful because the main client of the
linear range API, regulators, needs such behavior. For example, If an
application specifies a voltage range from 1.0V to 1.5V and the
regulator supports from 1.2V to 2.7V, the regulator can configure a
voltage that satisfies the condition: 1.2V. With the current API, the
input would be refused because 1.0V lies outside of the 1.2V-2.7V range.
Also, for constant ranges, the minimum index is returned.
Tests have been updated/extended accordingly.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In order to clean up clock related code, replace static build time
clock configuration code by a runtime check.
Since I'm not able to guarantee this check will provide a correct
verdict in 100% of the cases (I'm thinking to ULPI or exotic configurations
like F7 OTG-HS), add a config option to disable it if needed.
It also doesn't apply on F1/F3 series. Keep the build time check for now.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This change doesn't consider STM32F1 series.
There are 5 categories of STM32 regarding USB domain clock:
A] USB domain clocks directly driven by CK48 clocks
B] USB domain clocks which can select either CK48 or an alternative clock
C] USB domain clocks which can select between MSI or PLL
D] USB domain clocks relying statically on a PLL output
E] USB domain clocks which can be set on 2 different PLL ouputs
For case A], there is nothing to be done. Clk48 was already configured
in a previous change (51c7643295b02ba26ddcd0fd915484114db7101c).
For case B] and C] USB domain clocks will need to be configured in
each board.
For case D] and E] relying on existing dts configuration. Though
there is no easy build time chekc that can be done.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use STM32_DT_INST_CLOCKS() to access usb device clock information.
This will help accessing domain clock information from dt nodes.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Remove this code to clean up the driver.
Clock activation is done from device tree configuration in clock_control
driver.
Users are informed by warning about missing configuration.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
On stm32wb, M0 core may enable and disable CLK48 when using RNG.
Lock related hsem to prevent M0 to disable CLK48 when it doesn't need it
anymore.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add kscan pins gpio driver for KSI[7:0], KSO[15:0] pins that
they can be configured to gpio mode. These pins registers address,
bit fields and function are different from GPIO group, so I create
a new compatible driver for these pins.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Add stub code for SDIO support, capable of verifying card responds to CMD5.
This commit also changes the architecture of the SDIO probe step to make
adding new protocol support more streamlined, and enable compiling out
support for undesired protocols.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Since nPM1100 may be configured statically in some circuits, BUCK node
may note be defined, so neither API ops or init call are used in the
code. Add __unused attribute to account for such case.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
While nPM1100 is to be operated in fixed configuration for some
applications, it has some degree of configuration via GPIOs. For
example, mode (auto/PWM) can be configured via MODE pin. VBUS current
can also be adjusted using ISET pin, even though there is no API yet to
limit the PMIC input current.
This patch adds a new regulator class driver for nPM1100 PMIC, so that
it can be used with the standard regulator API when needed.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
It is recommended that choices in Kconfig have names
so this commit adds missing one for the type of
host commands peripheral.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
In some case, we may need to describe a domain clock for a device
while there is no way to configure it (ex: USB clock set on PLL_Q output
on F405 devices > It is not selectable).
Then, configuring a device clock domain in the clock_control driver
will allow to retrieve its subsys rate.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The dai.h interface does not prohibit calling dai_config_get()
with different direction values. The dmic driver should handle
invalid direction value explicitly and not rely on an assert.
Link: https://github.com/thesofproject/sof/issues/6896
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Periodic enqeueu of buffers can cause a attempt to start
a new transfer even though an endpoint is already busy.
Split usbfsotg_xfer_start() into two function, one to start
next transfer and another to continue the transfers, and use
busy state flags to explicitly mark an endpoint busy.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Pending state flag was only used by the UDC nRF USBD driver.
With the introduction of busy state flag it is no longer needed
and can be removed.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Periodic enqeueu of buffers can cause a attempt to start
a new transfer to host even though an IN endpoint is already busy.
Use busy state flags to explicitly mark an endpoint busy.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Provide a Kconfig option to enable HW RX and TX checksum, which
can increase throughput performances.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add missing "default y" to the Kconfig option so that it gets selected
automatically when a matching devicetree node is enabled.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
With ETH_STM32_HAL_API_V2 avoid log error message
if error log report:
we have problems if the traffic is high
Signed-off-by: Marc Desvaux <marc.desvaux-ext@st.com>
For NPCX SMB/I2C SMB modules in FIFO mode, the registers include:
* Common registers, offset 0x00-0x0f, accessible regardless of the value
of BNK_SEL
* Bank 0 registers, offset 0x10-0x1e, accessible if BNK_SEL is set to 0
* Bank 1 registers, offset 0x10-0x1e, accessible if BNK_SEL
is set to 1
In the current driver, it uses two structures, `smb_reg` and
`smb_fifo_reg`, to access `Common + Bank 0` and `Common + Bank 1`
registers. But It might be easy to misunderstand that they are two
different modules.
This CL tries to simplify this by the following steps:
1. Use `union` to combine `Bank 0/1` registers in the same structure.
2. Remove `smb_fifo_reg`. We needn't use two structures to present
SMB registers.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
The find_lsb_set is giving the position of the first '1' found,
starting from 1. "Bits are numbered starting at 1
from the least significant bit."
So that the find_lsb_set(64MBytes) is 27.
The HAL_QSPI_Init() accepts Init.FlashSize where "FlashSize+1
is effectively the number of address bits
required to address the flash memory."
To get 64MBytes = 2^26, the value of the Init.FlashSize must be 25.
and bit written to the DCR = 25.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The find_lsb_set is giving the position of the first '1' found,
starting from 1. "Bits are numbered starting at 1
from the least significant bit."
So that the find_lsb_set(64MBytes) is 27.
To get 64MBytes = 2^26, the value of the Init.DeviceSize must be 26.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Change the stm32_ospi_read_sfdp to have AddressSize
prepared in one single condition.
Add more debug msg.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit adds the support for host commands being transported
by the Serial Host Interface on the IT8xxx2 SoC.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
This commit adds the support for host commands being transported
by the Serial Host Interface on the NPCX SoC.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Adds a driver for TDK InvenSense 42688 six axis IMU. Verified using
the sensor shell sample app via:
- sensor info
- sensor get icm42688p@0
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Signed-off-by: Yuval Peress <peress@google.com>
The stm32 devices shows a x2 factor on the LPTIM1,3,4
clock source but it acts as a prescaler.
The max lptim counter (timebase) is counting 4 sec
In that case, the LPTIM count unit is double.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
During flash operation, you have to disable XiP which force function
to be located in RAM. On top of that, the function `flash_put_cmd_addr`
is time critical so we need to declare as inline. For some reason,
sometimes the function was not really inline. Changed it to
ALWAYS_INLINE fixed the bug.
Signed-off-by: Mathis Raemy <mathis.raemy@gmail.com>
The `fcntl.h` header has never been a part of ISO C so move it to
`include/zephyr/posix`.
To ensure a smooth migration, a header was left in
`lib/libc/minimal/include` that prints a deprecation warning.
Users should either include `<zephyr/posix/fcntl.h>` or switch to
`CONFIG_POSIX_API=y`.
Signed-off-by: Chris Friedt <cfriedt@meta.com>
In case user didn't set mac address in any way (locally defined or
randomly generated), define mac address using device unique id.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Deprecate Kconfig mac address related symbols and replace by existing
device tree properties:
- local-mac-address
- zephyr,random-mac-address
User who wants to keep using deprecating method of defining random
MAC address using Kconfig should set CONFIG_ETH_STM32_HAL_RANDOM_MAC=y.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In order to ease deprecation of these methods (in favor of dt based
configuration), introduce a choice for MAC address configuration method.
Default to random method (no change).
User wanting to still use ETH_STM32_HAL_MACX symbols should define
CONFIG_ETH_STM32_HAL_USER_STATIC_MAC=y
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Setting a detected packet family (ipv4 or ipv6) in net_context level
instead in lower layers for AF_PACKET/SOCK_RAW/IPPROTO_RAW type sockets
when sending data.
Signed-off-by: Jani Hirsimäki <jani.hirsimaki@nordicsemi.no>
BUCK1/2 are defined as "always on" regulators, however, there is a
special override register that allows to turn them on/off.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some regulators are enabled by default, however, such condition cannot
be captured now by the regulator driver API. Refactor
regulator_common_init_enable to regulator_common_init (enable removed,
as it also sets mode) and add a new argument to specify such condition.
With this change, regulator_disable() and regulator_is_enabled() work as
expected without a first call to regulator_enable().
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Vbus detection is required by self-powered, with external non-USB
supply, devices to have an operational USB peripheral. The voltage
sensing, when enabled, is performed via a designated pin (PA9 is
the most common).
For greater details see section 2.6, ST application note AN4879.
Signed-off-by: Raul Pando <raul.pando@bytegrity.co.uk>
When using watchdog which doesn't support callbacks (e.g. STM32 IWDG)
it's very useful to have counter based watchdog with shorter timeout.
This way we can gather useful information before IWDG resets SOC.
In above case it's usually not desired to reset SOC when counter
watchdog is triggerd, because we can lose information about reset cause.
For example, STM32 can determine if the reset was caused by watchdog.
Another use case for counter watchdog without SOC reset is to detect
slow code paths.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Now that both RTC source clock Kconfig symbols are disabled by default,
we invert the ifdef so that in the absence of configuration we still
fall in the LSI configuration.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Following #50104, properly deprecates old Kconfig symbols concerning
RTC source clock and makes them optional to have them disabled by
default.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Now that compatible is directly linked with driver version,
use DT compat based Kconfig flag to build the correct flash driver
version.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Instead of introducing a vX driver version, use series name.
With this commit F0, F1, F3, L0 and L1 series are using F1 flash driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Instead of relying on STM32Cube API, use clock_control framework
for clock configuration inside this driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
In preparation of the introduction of dt configured clock in this
driver, refactor clock related clocks.
- remove start_ble_rf()
- Move IPCC clock activation in c2_reset()
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
As long as LSE clock is set in device tree, configuration will be
done in clock control driver, no need to do it here.
Besides, remove back up domain related code as this is also already
handled in clock_control driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Remove code related to LSI used as clock source for RF wakeup,
it isn't a valid clock source.
Also don't disable LSI when LSE is selected.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update the SBS Gauge driver that implements the fuel_gauge API to implement
a set_property function allowing the writing of an SBS word to the
manufacturer access register per the SBS spec.
Includes an update to the SBS Gauge emulator and SBS fuel gauge tests to
weakly verify the code runs.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Implement and weakly test fetching the manufacturer access word from an SBS
compatible fuel gauge.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Current divisor is 10000000 (should be 1000000).
For example, ESP32_CLK_CPU_240M / 10000000 == 24 MHz (incorrect).
Signed-off-by: Chris Wilson <christopher.david.wilson@gmail.com>
This change for addressing the below symptoms.
Two FW images have different h2ram offset settings.
Jumping to each other will cause offset setting errors.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
At default, IBF (input buffer full) interrupt status will be cleared
after reading keyboard data input register (KBHIDIR) in ISR.
For request to clear OBF (output buffer full), we need to enable clear
mode. In the mode, IBF status cannot be cleared by reading KBHIDIR
register. It means that if AP output data to 60h/64h port during the
mode enable, IBF interrupt will keep triggering until the watchdog is
reset. This patch addresses this issue.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Following updates previously done for other drivers, rename all
occurrences of S32 to NXP S32 to avoid ambiguity.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Following updates previously done for other drivers, rename all
occurrences of S32 to NXP S32 to avoid ambiguity.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Following updates previously done for other drivers, rename all
occurrences of S32 to NXP S32 to avoid ambiguity.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Add support FD frame filter to configure type frame for
each Rx msg to receive corresponding frames (classic, FD frames).
The Bosch M_CAN driver does not support FD frame filter,
so inmplement driver to handle it in software.
Signed-off-by: Cong Nguyen Huu <cong.nguyenhuu@nxp.com>
The number of extended filters can be up to 15 for MCUs like the NXP
LPC55Sxx series, so the flags don't fit into uint8_t.
Fixes#53417
Signed-off-by: Martin Jäger <martin@libre.solar>
hal_espressif systimer HAL calls are based on 1MHz reference.
This changes systimer driver to allow max clocking reference of 16MHz
and increases soc tick resolution by reducing min delay interval.
This also sets all ESP32-C3 socs to 16MHz hardware cycles reference.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
ISO/IEC 9899:1999 (C Standard), §7.4 Character handling <ctype.h>:
In all cases the argument is an int, the value of which shall be
representable as an unsigned char or shall equal the value of the macro
EOF. If the argument has any other value, the behavior is undefined.
So add a cast to unsigned char to make sure we do not trigger UB.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Introduce driver for APS6408L PSRAM, built on top of the MCUX memc
driver for flexSPI. This driver supports operating the PSRAM in high
speed mode (200MHz or more). Note that in order to support this
PSRAM's alignment requirements, either ahb-read-addr-opt or
ahb-prefetch must be set for the FlexSPI instance.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
memc driver was setup to always assume the flexSPI would be in XIP mode,
and skip init. This is only true for the active flexSPI, which is
typically FlexSPI1. Fix this check to only skip init for FlexSPI1
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Rename flexspi-hyperram driver to flexspi-s27ks0641, and update
function names. This driver is only capable of supporting the
s27ks0641 HyperRAM chip, as the lookup table given in this driver
is specific to the s27ks0641.
Rename the flexspi-hyperram binding to reflect this, to
prevent confusion from users.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Printing of NACK messages should be set to LOG_DBG to avoid spamming.
When we scan whether there is a target device through I2C, if we use
LOG_ERR, it will frequently print out NACK messages. So it is set to
LOG_DBG in the case of NACK.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Fix a bug that causes not handling an IDLE line detection interrupt for
some STM chips, e.g. STM32F412. It impacts the async UART
communication - an information that data have been recieved is lost.
The issue occurs when the IDLE flag is set during handling another UART
interrupt, e.g Transmission complete. The ISR calls uart_stm32_err_check
function, which clears the noise error flag with LL_USART_ClearFlag_NE
without any additional checks. Unfortunately, clearing the noise flag
also clears the IDLE flag for some chips(an read to the USART_SR
register followed by a read to the USART_DR register for STM32F412
clears PE, FE, NF, ORE and IDLE flags), hence the ISR is not called
again for the IDLE event. The IDLE flag is no longer set.
Add checking the noise flag before clearing it.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
ESP32 and ESP32-S2 HW clock are tied to DTS clock configuration.
This changes updates the default configuration to retrieve
this information from DTS.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Only relocate memc driver when CONFIG_FLASH=y.
CONFIG_FLASH_MCUX_FLEXSPI_XIP previously was dependent on
CONFIG_FLASH, but the scope of this Kconfig has changed.
Due to this, the memc driver now must have two checks, as it should not
relocated when the driver is being used for a memory controller that does
not expose the flash driver interface.
Since the NXP HAL also relocates the underlying FlexSPI driver
using a similar check, it is updated in this commit as well.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The addresses of the flash and flash controller of the RP2040
SoC were mixed up. There was no clear distinction between the
flash and the flash controller, which was unclear but also
caused a DTC warning.
This commit makes the distinction clearer: The SSI peripheral at
0x18000000 is the flash controller, and the flash itself starts
at 0x10000000. The flash driver and rpi_pico.dts were fixed
accordingly.
Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
It should never be intended to return an uninitialized
variable from a function.
Remove the use of the uninitialized variable to fix the bug.
Signed-off-by: Chao Song <chao.song@linux.intel.com>
The adc1 & 2 of the stm32g4 devices share the same irq
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Since the FLEXCAN_TransferSendNonBlocking() function has
read-modify-write operations on global resources, then
if interrupts are enabled and/or if there is more than
one thread with a different priority, threads with
a lower priority can overwrite global resource changes
made by higher priority threads.
Fixes#52673.
Signed-off-by: Mikhail Siomin <victorovich.01@mail.ru>
pwm_set_wrap() sets the TOP value, not the number of cycles.
Counter will run from 0 to TOP inclusive, generating TOP + 1 cycles.
To get n cycles, we need to set TOP to (n - 1).
The wrong setting made it impossible to achieve 100 % duty cycle, as
there was always one extra cycle.
Fixes: 7e0fff24c7 ("drivers: pwm: add pwm driver for rpi_pico")
Signed-off-by: Oliver Barta <o.barta89@gmail.com>
Change Summary: The TX/RX FIFO was not flush on initialization thus
causing bad transactions. Thus, we need to flush the FIFO, and
according to Synopsys DW I2C spec, we can flush TX/RX FIFO by clearing
the enable bit. This is verified with our own I2C test on the SoC with
Synopsys DW I2C IP.
Signed-off-by: Dennis Wang <dennisjw@fb.com>
Add support for Microchip MEC15xx to the XEC clock control driver.
MEC15xx 32KHz clock support uses the same 32KHz source for both the
PLL and peripherals. MEC152x does not include the PCR clock monitor
present in MEC172x. MEC15xx and MEC172x support internal silicon
oscillator, parallel and single ended crystal inputs, and the
32KHZ_PIN input. MEC152x supports fall back to internal silicon
OSC when VTR and 32KHZ_PIN are turned off. Therefore in MEC152x the
internal silicon oscillator can only be disabled if using an external
32KHz which is always on. For MEC152x the driver will only use the
PLL source clock device tree value.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Fix Microchip XEC clock control driver single-ended XTAL2 pin
initialization. Add support for external 32KHZ_IN pin as a
clock source including PINTRL to switch the GPIO to 32KHZ_IN
function. Add device tree option to disable internal silicon
oscillator if it is not required by the configuration. Add
device tree tuning options based on crystal and board layout.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Some baudrates are not supported in certain SoCs.
Signed-off-by: Marcin Szymczyk <marcin.szymczyk@nordicsemi.no>
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The ADC4 requires particular sequencer configuration.
Clean section that are not used for the configuration.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Depending on the ADC instance, internal channels
temperature sensor or vbat differ.
That must be adapted so that each internal channels
of ADC4 are operational.
ADC4 is using CommonChannel config for the Sampling time.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
- Refactor the regulator shell so that it exposes all regulator APIs
- vset/iset commands allow to specify a single value (equal min/max) or
a range
- Voltage/current input is now more user friendly, e.g. user can specify
units and decimals: 3.3v, 200mv, -4mv, etc.
- Reported values are also printed in a more user friendly way, e.g.
1800000 uV will be printed as 1.800 V.
- Added new command to list supported voltages
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add a new API to query the configured regulator mode. Updated fake
driver and API tests.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Apply initial mode (regulator-initial-mode) as part of the
regulator_common_init_enable call. Update tests to cover this change.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
If present, get the clock value for STM32 I2C from the clock source defined
in the dts.
Otherwise, use pclk.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Add support of STM32_DT_INST_DEV_DOMAIN_CLOCK_SUPPORT to condition the
configuration of an source clock for STM32 I2C.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
This commit modifies the way we define the I2C driver by using device tree
instance macros instead of node label names.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Now that USB clock prescaler is done is clock_control driver.
Remove similar part in USB driver.
Note that behavior is different: it is now up to the user to provide
the proper configuration.
Add a warning during the transition period.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
On STM32F1 series, configure USB(/OTGFS) prescaler based on DT.
When prescaler is set, PLL output clock is not divided.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Use dma_slot for peripheral request instead of linked_channel.
This is a more suitable usage as described in dma_config.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
This Kconfig is moved to the soc level since it determines
the flexspi clock initialization for XIP.
Signed-off-by: Emilio Benavente <emilio.benavente@nxp.com>
Fix handling of gpio-reserved-ranges within MCUX iGPIO driver, to ensure
that the configuration IDX will be correctly calculated for pins where
multiple reserved ranges are present on the GPIO controller
Fixes#52506
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Added information about pin output direction into
Z_PINCTRL_STM32_PINCFG_INIT if output_low or output_high is provided.
GPIO output flag is set in configuration struct and this will end up
being loaded into MODE register. Because of that it is no longer
required for pinctrl_configure_pins() to set MODE register value for
GPIO input/output.
Fixes#53141.
Signed-off-by: Lukasz Mazur <lukasz.mazur@hidglobal.com>
Add uart_configure and uart_config_get functionality to
MCUX flexcomm driver to be able to dynamically configure
flexcomm uart at runtime.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
If the bootloader changes iof_en/iof_sel settings before zephyr launching,
GPIO does not behave correctly.
These values should be 0 initially, Initialize to 0 at GPIO initialize.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
When checking if any UART TX/RX IRQs are pending, the driver should also
consider whether these IRQs are enabled. Or we still get pending status
set even if the related interrupts are disabled.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Add the possibility to use the clock parameter in dts to set the clock
source of I2C devices for all STM32 MCUs.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Fix the driver so that after a call to uart_rx_disable() it does not
allow re-enabling RX until the UART_RX_DISABLED is generated (what
means that the disabling procedure is complete). Otherwise, it is
possible that the RXTO event from the previous RX is handled right
after a new RX is started, and the RX buffer pointer gets corrupted
in the `rx_flush()` function.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
NPCX9 series chips include a SHA hardware accelerator, which supports
SHA256/SHA384/SHA512 hashing and a library (APIs) in the on-chip ROM.
This commit adds the driver support by wrapping the on-chip ROM APIs.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Clean up occurrences of "#if IS_ENABLED(CONFIG_FOO)" an replace
with classical "#if defined(CONFIG_FOO)".
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Bug occurs when polling kernel uptime. Uptime was suddenly
jumping because lptim counter was counted twice
(from CNT and ARR registers) in case reload happens between
values are fetched.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
peripheral-id property should be eventually removed.
For now set it as optional and allow skipping the usage
in UART driver.
Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
peripheral-id property should be eventually removed entirely.
For now set it as optional and allow skipping the usage
in GPIO driver.
Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
Common GPIO driver needs to be initialized before e.g UART driver
to ensure correct GPIO clock configuration when configuring UART pinout
Signed-off-by: Pawel Czarnecki <pczarnecki@antmicro.com>
This commit adds initial support for Silabs Real-Time counter
Co-authored-by: Filip Kokosinski <fkokosinski@antmicro.com>
Signed-off-by: Mateusz Sierszulski <msierszulski@antmicro.com>
This commit adds a series of driver-related changes to
Gecko pinctrl.
Co-authored-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
This commit adds initial support for gecko pinctrl driver
Co-authored-by: Mateusz Sierszulski <msierszulski@antmicro.com>
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
The ADC module has four conversion groups, each one is set up as a zephyr
device. The start-up calibration is initiated globally for all groups
and it is run in each device init function. The ADC module supports post
calibration per group. Post calibration is run automatically after each
group acquires the samples.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Add region calculations and implementation of
sys_mm_drv_query_memory_regions to pass calculated regions down
the line.
Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
Add FFF-based fake regulator driver. This driver can be used as a stub
or mock in testing.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The edge voltages within a range need to be included as part of the
supported comparison.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Fixed the following compile warnings:
../include/zephyr/sys/util.h:108: warning: "ARRAY_SIZE" redefined
hal/nxp/mcux/mcux-sdk/drivers/common/fsl_common.h:236: note:
this is the location of the previous definition
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
When operating as a Source, the driver will wait indefinitely for
a GoodCRC message from a Sink. This PR adds a timer to trigger a
no response when a GoodCRC message isn't received.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
Since all UCPD devices share the same ISR, the interrupt
should be enabled after all UCPD devices are initialized.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
At system startup, the SYSCFG ITLINE registers might not
indicate an interrupt even though a UCPD interrupt is pending.
This cause the ISR to be called repeatedly without being serviced,
resulting in a system lockup. Reading the UCPD Status Reg instead
of the SYSCFG ITLINE register fixes the issue.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
The nRF5340 product specification states that the QSPI peripheral
supports 192 MHz and 96 MHz PCLK192M frequency, thus the default /4
divider for HFCLK192M (from which PCLK192M is derived) can only be
used when the QSPI peripheral is idle. Correct the shim accordingly
and improve related comments.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
On some STM32 series (H7, MP1), iwdg and wwdg have multiple instances.
Due to current driver implementation, these wdg instances were not
checked in the function.
Fixes#53002
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Implement usb_dc_wakeup_request for STM32 USB DC and default to enable
remote wakeup functionality when the drivers is selected.
This allows the device to wake the host up by calling
usb_wakeup_request().
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Add support for virtual USB host controller intended for use
together with virtual bus and virtual device controllers.
This driver is not an emulation of any real host controller.
The driver has initial support for handling control and bulk
transfers.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add support for virtual USB device controller intended for use
by virtual bus and virtual UHC controllers. This driver is not
an emulation of any real host controller.
The driver has initial support for handling control and bulk
transfers.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add support for virtual USB bus (UVB) intended for use
by virtual UDC and UHC controllers. UVB is not an emulation
of the USB bus or protocol but a simplified service to connect
a virtual host controller to one or more virtual device
controllers.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add common layer of UHC API and MAX3421E host controller driver.
This implements the bare minimum necessary to communicate with
one peripheral device.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Enable Zephyr device runtime power management mechanisms in Intel HDA
DMA driver. This allows Zephyr to track usage reference for power domain
gating.
PM action handler is currently empty and will be fill out later.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Switch all imxrt boards to use the systick timer by default, and only
enable the GPT timer when using low power modes. This is desirable
because the systick has a higher resolution, but the GPT can run
while the core clock is gated, making it useful for low power modes.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Enable Zephyr device runtime power management mechanisms in Intel GP DMA
driver. This allows Zephyr to track usage reference for power domain
gating.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
Support for the measuring the CPU die temperature
for the ESP32 targets S2,C3. The ESP32 support
was ommited due to lack of offset calibration.
Signed-off-by: Marek Matej <marek.matej@espressif.com>
In case of errors in the status register and to
unblock Flash, it is advised to clear the errors.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
Add a new API for drivers that can be called to initialize the regulator
at init time if `regulator-boot-on` or `regulator-always-on` are set.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
PCA9420 PMIC offers of multiple operation states, or DVS (Dynamic
Voltage Scaling). Such states may be automatically changed by hardware
using MODESEL0/1 pins. Certain MCUs allow to automatically configure
certain output pins when entering low power modes so that PMIC state is
changed without software intervention. This means that application just
needs to configure the voltages for each state using
`nxp,modeN-microvolt`, set `nxp,enable-modesel-pins` in devicetree and
forget about configuring regulators.
This patch introduces a new _parent_ API to expose such functionality in
a vendor agnostic way. Consider this API as experimental for now, until
we have other usecases.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Most of devicetree properties for regulator, such as:
- regulator-min/max-microvolt
- regulator-min/max-microamp
- regulator-allowed-modes
- etc.
Are meant to specify limits on what consumers may set. They are **NOT**
meant to describe the hardware capabilities. For example, I could have a
BUCK converter that supports 0-5V output voltage, but my circuit may
only allow working on the 2.7-3.3V range.
This patch reworks the API so that the API class layer manages this
information. This is done by drivers collecting all such fields in a
common configuration structure that is later accessed by the class
layer. This simplifies drivers implementation. For example, if A
consumer calls regulator_set_voltage() with a voltage that is supported
but not allowed, driver code won't be called. Similarly, if a regulator
is configured to be `always-on`, enable/disable driver code will never
be called.
Drivers have been adjusted. PCA9420 mode settings have been removed from
devicetree in this commit as they are not actual modes but PMIC states.
This will be refactored in a follow-up commit.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Remove redundant comments
- Remove internal *_mode functions, as they were only used once.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Define regulator mode as an opaque type, same as we do in other
subsystems like GPIO (e.g. gpio_flags_t).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Clarify the API for regulators that have the option to set mode
externally, such as PCA9420. Adjust the PCA9420 driver to comply with
the interface.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Function now returns error, value is obtained by reference. This
allows to propagate potential bus errors.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Mode specific APIs repeat the same functionality offered by non-mode
specific APIs
- The same functionality can be achieved by the non-mode APIs, since
they apply to the active mode which can be set using
regulator_set_mode() first.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The function can be implemented by using regulator_count_voltages() +
regulator_list_voltage(), so there's no need to defer the job to each
driver.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Rename to regulator_list_voltage (it is listing a single voltage)
- Function returns the value via a parameters, so that we can indicate
wether the given index is valid or not. If a driver doesn't implement
this call, function returns -EINVAL (as it should be).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The regulator_count_modes was an API that was not useful. Unlike with
voltages where the interface guarantees they are zero-indexed, modes can
take an arbitrary identifier. So counting supported modes doesn't
provide any useful information such as if a mode is allowed.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Interface guarantees that voltage indices start from zero to
regulator_count_voltages()
- Function always return an unsigned number. If the device doesn't
implement the API returned value is zero, as expected.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In the case that IN endpoint is not busy there will be
no notification from the HAL driver.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Adds an attribute that describes the maximum number of scatter gather
blocks that the DMA will accept. Useful in cases where DMA is used as
the abstraction for moving data around (e.g. SoF audio streams) and
variances of the hardware need to inform decisions about how to use
the DMA API.
Co-authored-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Co-authored-by: Jaska Uimonen <jaska.uimonen@intel.com>
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
The SBS fuel gauge driver did not return a count of the number of
properties that failed.
Fix this and add a test that verifies the sbs_gauge returns the number of
failing properties as well as a test that verifies a negative return code
if all properties failed.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
zephyr kernel header file should be included otherwise gcc will report
the warning: implicit declaration of function 'k_aligned_alloc' and
the return value of 'k_aligned_alloc' will be treated as an int type,
which will cause an error on the 64 bits platform.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
According to section 5.1.9.3.5 and 5.1.9.3.6 of the I3C Specification
v1.1.1. This CCC is may be optionally supported if the target device
has no settable limit.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Rename is_primary to is_secondary. The justification for this is
because it is less likely to have something configured to be
secondary, and the 0 value would be if it is primary.
Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
Previously, a call to set the net_context state was added here to
accommodate a new KConfig scenario that permitted disabling offload
sockets. This code path is used by both local and offloaded sockets.
While it is necessary to update the state of the net_context for a
locally managed socket, setting the net_context for an offloaded socket
is an error, as the net_context is invalid (in fact, it points to a
hard-coded dummy socket), as observed in #52346 and #38544.
A prior commit (a9ac0a88) attempting to remedy the offload socket
scenario removed this line, which resulted in problems for the local
socket scenario. The socket never got updated to the connected state,
and thus was unusable.
Adding this guard allows the eswifi socket to set the socket net_context
only if the socket is NOT offloaded.
Signed-off-by: Brian Dunlay <brian@nubix.io>
In Infineon XMC4XXX SoCs, gpio interrupts are triggered via an
Event Request Unit (ERU) module. A subset of the gpios are
connected to the ERU. The ERU monitors edge triggers and creates
a SR.
This driver configures the ERU for a target port/pin combination
for rising/falling edge events. Note that the ERU module does
not generate SR based on the gpio level. Internally the ERU
tracks the *status* of an event. The status is set on a positive
edge and unset on a negative edge (or vice-versa depending on
the configuration). The value of the status is used to implement
a level triggered interrupt; The ISR checks the status flag and
calls the callback function if the status is set.
The ERU configurations for supported port/pin combinations are
stored in a devicetree file dts/arm/infineon/xmc4xxx_x_x-intc.dtsi.
The configurations are stored in the opaque array
uint16 port_line_mapping[].
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Config NOCACHE_MEMORY depend on ARCH_HAS_NOCACHE_MEMORY_SUPPORT. Enable
ARCH_HAS_NOCACHE_MEMORY_SUPPORT for Cortex-R52 to run NXP S32Z/E with
nocache attibute.
Enable nocache in each driver use it.
Signed-off-by: Duong Vu Nam <duong.vunam@nxp.com>
Adds support for GD32 timer
Note: Currently, it is not supporting RISC-V(GD32V) devices.
It needs some work on the interrupt controller first.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
The timer_ids contain timers that belong to any bus.
So, It should recognize with entire id, not only the CLOCK_ID_BIT part.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
DT_COMPAT_GET_ANY_STATUS_OKAY is not suited for the node's existing check.
(This macro returns the stem of the DTS macro name,
the stem part is not a defined symbol.)
Instead, it should use the DT_HAS_COMPAT_STATUS_OKAY macro.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Change Summary:
Update Base addr to set direction to use Aligned IP base address instead
of Port Base Address. Port Base Address + offset to direction register
will set incorrect value for Port B,C & D. For ex: In cases when more than
1 port is configured on the same IP, the DTS node for port B will start
at offset 0xC. Calculating the port using Port Base will yield offset of
PORTB DIR register which is at offset 0x10 from Aligned Base, and as a
result will result in setting DIR register of PORTC instead.
Signed-off-by: Ravik Hasija <ravikh@fb.com>
Change Summary:
Moving the setting of Pin direction before setting/clearing the pin
configured as output for the change to correctly take place.
Signed-off-by: Ravik Hasija <ravikh@fb.com>
For architectures that rely on a PCIe controller (for example, ARM64),
scanning the PCI space will only succeed after the controller has
initialized. Therefore, in the presence of PCIe controller, the PCIe
initialization is bumped to the next system init level.
In the past, drivers like ivshmem would do a late scan of the PCI space
in case the early scan failed; however, the cited commit removed this
feature and ivshmem fails for ARM64. This commit fix this by making the
early scan succeed.
Fixes: a96016d747 ("drivers: ivshmem: Remove unnecessary BDF lookup ...")
Signed-off-by: Rodrigo Cataldo <rodrigo.cataldo@huawei.com>
Co-authored-by: Henri Xavier <datacomos@huawei.com>
Only include the MSI header when ivshmem-doorbell is employed, as the
ivshmem data structures already use the same protection for msi-related
structures.
Signed-off-by: Rodrigo Cataldo <rodrigo.cataldo@huawei.com>
Co-authored-by: Henri Xavier <datacomos@huawei.com>
The ivshmem code does not use any platform-specific code; therefore,
remove the dependency to the soc interface.
No functional change intended.
Signed-off-by: Rodrigo Cataldo <rodrigo.cataldo@huawei.com>
Co-authored-by: Henri Xavier <datacomos@huawei.com>
Add a Kconfig option allowing users to configure the transfer timeout
value, as the default 500 ms may not be sufficient in specific cases.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
In multi-image environment, after jump to the image we can have UART in
unexpected state. Reset UART to default state to make sure that UART is
initialized properly and won't cause system to crash or hang.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
In multi-image environment, after jump to the image we can have running
timer with interrupts enabled. If interrupt is triggered, the asserts
in the driver can cause a crash.
This patch also adds 'resets' property for all timer nodes.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
To deassert reset in STM32MP1 RCC the driver needs to set the bit in
reset clear register.
This patch extends existing implementation to support this type of
register.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
This driver exposes STM32 RCC reset functionality through reset API.
Information about RCC register offset and bit is encoded just like GD32.
The first 5 least significant bits contains register bit number.
Next 12 bits are used to keep RCC register offset. Remaining bits are
unused.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
This function is responsible for checking if combination of msize,
mburst and FIFO level is allowed. Possible combinations can be found in
ST documentation, eg. Table 36. FIFO threshold configurations, RM0402
9.3.13 FIFO chapter.
Previously there was no 'break' or '__fallthrough' in msize switch which
caused compilation errors. Since we are confirming that combination is
correct, 'break' statements should be used.
Besides of introducing missing 'break' statements, this patch moves
'return false' from switch to the end of the function. This makes code
shorter and easier to understand, because we have only correct
combinations.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
The poll_in function of the NuMicro UART driver was using the UART_Read
function from the Nuvoton HAL, which is blocking. Replace it with a
non-blocking implementation.
Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
Add the resume API function for the dma driver of the stm32U5 serie.
That completes the suspend API function.
Controlling the SUSPF bit of the GPDMA CR register is enough
to suspend/resume the channel.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
There is no need to reset the channel else DMA config is lost and
channel should be enabled again in case of resume.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The USB_DC_STM32 help message started to miss some
STM32 MCU families. Overtime, the message will
get bigger if we continue to list family names.
Removed family names to simplify the message and
avoid periodic modifications.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
STM32 battery-backed RAM is organized in 4 byte registers. Number of
registers can vary between models from 5 to 32 registers.
Usually, the registers are part of RTC. On some variants they are part
of tamper module. On STM32F1 the registers are in separate module. For
now, only backup registers from RTC are supported.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
`spi_is_ready` function is being deprecated in favor of
`spi_is_ready_dt` so let's replace the old usage in the tree.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
STM32 counter driver uses switch statement in which cases don't end
with break or return intentionally.
Affected switches in counter driver check status of all timer channels
(maximum 4 channels), but the number of channels is not determined
during compilation. In switch, we jump to channel with highest number
and then check other channels with lower numbers.
Compiler can warn about it, so this patch adds information that it was
intentional.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
NXP LPUART IP supports rs485 mode when transceiver driver enable
using RTS. Allow setting rs485 mode up via the "nxp,rs485-mode"
dts property. "nxp,rs485-de-active-low" dts property can be used
for set RTS polarity.
Signed-off-by: Grixa Yrev <GrixaYrev@yandex.ru>
The HSI48 is enabled by clock control driver.
It is no more done by each driver that requires this clock
However when using rng or sdmmc or bluetooth/ipm or usb,
the HSI48 clock must be present in the DTS.
Add a warning for this particular check but keep the deprecated
HSI48 clock enable : keeping for legacy but to remove later.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
For the stm32 devices that have a HSI48 clock,
the driver enables it, like any other fixed clock,
if needed and supported by the serie.
For stm32L0, SYSCFG VREFINT is also required.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit adds support for get_config and get_direction functions
for the nct38xx IO expander family.
Also applies the clang-format changes.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
This commit fixes the comment and adds the missing assignment of
return value from i2c read byte command in the nct38xx driver.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
- Similar to what was done for other parts of the driver, remove any
register specification from Devicetree (modesel-reg/mask)
- Keep all the information in the driver, and define modes as "numbers",
e.g. PCA9420_MODE0: 0, PCA9420_MODE1: 1, etc.
- Bindings provide IC defaults now (all modes allowed 0/1/2/3 and
initial mode set to 0).
- When mode is controlled via the MODESEL0/1 pins (ie directly by an iMX
MCU using the dedicated PMIC_MODE0/1 pins), the driver will not allow
to select a mode (it is not possible). This mode is now enabled by
setting `nxp,enable-modesel-pins` in Devicetree. When enabled, all the
allowed modes are configured to be selectable via pins. When disabled,
mode can be set via I2C (using TOP_CNTL3 MODE0/1_I2C fields)
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add support for setting the help description for each entry in a dictionary
command. Currently the syntax string alone may not provide sufficient
description of its entry. This commit also helps keep the help messages
consistent with existing style.
Signed-off-by: Xinyang Tan <xinyang.tan@delve.com>
Now, multiple tx buffers can be used to send packets,
so that the packet size can exceed tx buffer size.
Signed-off-by: Bjarne von Horn <B.von_horn@wzl.rwth-aachen.de>
STM32H7X and STM32F4X ETH HAL Drivers now provide a new api.
This commit only adds a new Kconfig option
Signed-off-by: Bjarne von Horn <B.von_horn@wzl.rwth-aachen.de>
The transmit mutex is not needed while checking the packet size,
so we acquire the lock after checking the size and
return early if it is too big.
Signed-off-by: Bjarne von Horn <B.von_horn@wzl.rwth-aachen.de>
It is possible for nrfx usbd driver to send NRFX_USBBD_EP_ABORTED during
endpoint disable. The event is passed to event handler registered with
nrfx_usbd_init(). The nrfx_usbd_uninit() removes the registered event
handler, replacing it with NULL. If any event is sent after uninit, the
NULL pointer is executed and device crashes.
Do not uninit nrfx usbd driver on detach so it is possible for the
usb_disable() to disable all the endpoints.
Fixes: 460ca86527 ("drivers: usb_dc_nrfx: Always allow endpoint disable")
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Depending on the timing of the edges of the signal to be captured, a timer
overflow interrupt flag may appear in the same ISR as a channel event (1st
or 2nd edge capture complete) flag. Change the timer overflow math to
compensate the timer overflow count based on whether the channel event
happened before or after the overflow flag occured.
For continuous PWM period captures, only the very first edge of the first
period requires an interrupt to be captured. Subsequent "first edges" are
the same edges as the second edge of the previous period. Depending on the
timing of the captured signal, enabling the 1st edge interrupt in this case
can cause the overflow count for subsequent first edges to be captured at
the wrong point in time.
Fixes: #52452
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
AST10x0 series SOCs provide the reset controller through the syscon
hardware block. The current driver supports the reset line assert,
deassert and status for the hardware IPs embedded in the SOC. Each
reset line has an ID that can simply map to a bit in syscon registers
RESET_CTRL0_ASSERT (group 0) or RESET_CTRL1_ASSERT (group 1). Write bits
to RESET_CTRL0_DEASSERT or RESET_CTRL1_DEASSERT will clean the
corresponding bits in RESET_CTRL0_ASSERT or RESET_CTRL1_ASSERT
registers.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Enable the PSA RNG driver by default. This option
will only be enabled when BUILD_WITH_TFM is enabled
and a device with the required compatible field
(zephyr,psa-crypto-rng) is defined in the device tree.
When a vendor includes such a device and enables the
ENTROPY_GENERATOR subsystem it is fair to assume
that wants to use the PSA Crypto RNG driver.
Signed-off-by: Georgios Vasilakis <georgios.vasilakis@nordicsemi.no>
Add support for regulator mode related APIs to regulator shell, so that
the user can select new operation modes for the regulator and configure
target voltages
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Cleanup regulator shell to use strtol() over atoi(), as strtol features
error detection. Remove device_is_ready() checks, and replace them with
NULL checks as device_get_binding() calls device_is_ready() interally
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The I2C API already provides APIs to read/modify registers, so there is
no need to provide custom wrappers.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
HAL events were also used for the shim driver's concerns
during the prototyping of API. Fix it now and use specific
shim driver events. That also allows new transfers to be
triggered from a single point.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Add new USB device controller API and nRF USBD controller driver.
The new UDC API brings support for multiple instances and asynchronous
transfer model, transfers use net_buf and store methadata in the
user data area.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Set the inverted value of pixel format setting in MADCTL register to
current_pixel_format in display capabilities structure
if rgb-is-inverted enabled.
This make enables support for a module that mismatches the RGB setting
in the MADCTL register and the actual display color format.
(Such as Longan Nano built-in LCD module.)
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Implement a LED driver for Microchip XEC using the breathing,
blinking LED controller. The driver supports LED on, off, and
blink API's. The BBLED block uses the 32768 Hz clock domain
allowing the module to operate in light and deep sleep states.
Blink frequency is 32768 divided by 256 * (prescale + 1) where
prescale is a 12-bit value. Duty cycle is specified by an 8-bit
value where 0 = full off, 127 is 50%, and 255 is full on.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
The cache operations must be quick, optimized and possibly inlined. The
current API is clunky, functions are not inlined and passing parameters
around that are basically always known at compile time.
In this patch we rework the cache functions to allow us to get rid of
useless parameters and make inlining easier.
In particular this changeset is doing three things:
1. `CONFIG_HAS_ARCH_CACHE` is now `CONFIG_ARCH_CACHE` and
`CONFIG_HAS_EXTERNAL_CACHE` is now `CONFIG_EXTERNAL_CACHE`
2. The cache API has been reworked.
3. Comments are added.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Re-enable the CAAM for entropy
now that the HAL driver has been fixed
Job descriptors must be accessed coherently
between CAAM DMA and core.
The M4 Cores still do not work
because of mpu/cache/kconfig arch complications,
disable caam for M4 cores in DTS
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
When pwm_it8xxx2_set_cycles() is called, we disable the pwm clock
at the beginning and enable it at the end, so there is a more than
1ms pwm low pulse when every time changing the cycle. The low pulse
would let some fans go to idle mode, so we don't gate the pwm clock.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Enable Zephyr device runtime power management mechanisms in Intel DMIC
driver. This allows Zephyr to track usage reference for power domain
gating.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
This patch contains several small changes to the intel adsp power
domain.
- include missing header,
- replacing sys_write32/sys_read32 with sys_write16/sys_read16 since
DfPWRCTL is a 16 bit register,
- renaming struct to be more representing what it is,
- passing register address, not a value to the sys_read/sys_write
functions,
- pd_intel_adsp_init is now returning actual status.
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
While diagnosing a problem on the STM32U585 in this function in
flash_stm32l5_u5.c, I had difficulty sussing out the flow of the
function and conditional logic.
This refactor seeks to improve clarity through a simplified flow control
using an early return to short circuit logic on subsequent calls to the
function and slightly more thorough comments.
Tested using tests/drivers/flash on the b_u585i_iot02a and in a
proprietary application and board which uses the STM32U585 and littlefs.
Signed-off-by: Peter Maxwell Warasila <madmaxwell@soundcomesout.com>
In flash_stm32_page_layout, the FLASH_PAGE_NB macro is used to set the
page count in the flash layout returned to the caller. On STM32L5
platforms this is defined in stm32l5xx_hal_flash.h to be (FLASH_SIZE /
FLASH_PAGE_SIZE). However, on STM32U5 platforms the macro is defined in
the soc headers (such as stm32u585xx.h) define the macro as
(FLASH_BANK_SIZE / FLASH_PAGE_SIZE). This results in the flash layout
only reflecting the first bank on STM32U5 platforms with the maximum 2
MB of flash.
This commit resolves this discrepancy by directly calculating the number
of pages by dividing FLASH_SIZE by FLASH_PAGE_SIZE.
Tested on a proprietary board using the STM32U585 which mounts a
littlefs partition in the last 256 kB of its 2 MB of flash.
Signed-off-by: Peter Maxwell Warasila <madmaxwell@soundcomesout.com>
Drop the async enable function. This feature is rarely/never used,
complicates driver design, and doesn't really follow the sync/async API
design/naming used in other areas. In the future we can introduce
regulator_enable_async if needed, with support from the driver class (no
onoff). Note that drivers like PCA9420 did not implement any
asynchronous behavior. regulator-fixed implemented in the past
asynchronous behavior using work queues, an overkill for most GPIO
driven regulators. Let's keep things simple for now and extend the API
when needed, based on specific usecases.
In the current implementation, reference counting is managed by the
driver class. \isr-ok attribute is dropped, since calls are potentially
blocking. Note that drivers like PCA9420 already violated such rule.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Remove regulator-fixed-sync specialization, create a single driver that
is always synchronous. The asynchronous part is rarely/never used, so
let's keep things simple for now.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Do not set wifi optimizations by default in order
to free up IRAM room region. In case higher throutput
is necessary, one can enable this flags to optmize it.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
NXP S32 System Timer module includes a 32-bit count-up timer and four
32-bit compare channels with a separate interrupt source for each
channel. The timer is driven by the module clock divided by an 8-bit
prescale value.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Microchip XEC GPIO pins support inverting the output of
alternate pin functions. This feature may be useful for
those peripherals that do not implement output inversion
in the peripheral. GPIO control register pad input and
parallel input register values are not affected by the
function output invert feature. GPIO interrupt detection
of an output is inverted if the invert polarity is enabled.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
When configuring an LPSPI module for a new device with different baud rate,
the module needs to be disabled for the baud rate change to take effect.
This adds the necessary call to LPSPI_Enable before initializing the
module.
Fixes#51177
Signed-off-by: Jonas Otto <jonas@jonasotto.com>
This casts the char * buffers to void * before giving them to the
LOG_DBG function to fix a warning at runtime.
Signed-off-by: Gaël PORTAY <gael.portay@gmail.com>
add Intel HDA DAI driver
Long device list in dtsi needs to be refactored in the future
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Remapping by default can confuse things that dynamically manage RAM,
such as newlib heap - since unused memory will be powered off by
default. So this patch shields this behaviour behind a non-default
Kconfig.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
pca9420_i2c.h has neem remamed to pca9420.h (device only has I2C, so
it's kind of redundant to have i2c in the header name).
pmic_i2c.h was again not generic but designed specifically for PCA9420.
All its macros have been renamed, s/PMIC/PCA9420, and moved to the
pca9420.h header.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Store all common configuration settings in the parent device. This
change should save ROM, since it avoids duplication.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The driver had a conceptual issue regarding current limitation. PCA9420
is able to limit the current flowing through VIN, ie input current. This
is a global setting, not individual to each regulator. This patch
creates a new DT property: nxp,vin-ilim-microamp to specify such limit.
It is applied when the device is initialized.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Voltage ranges were hardcoded in Devicetree, however, things can be
significantly simplified by using the recently introduce linear ranges
API. All values are now computed using information stored in the driver,
so there is no need to store any lookup table in ROM. Code should now
both be faster in average and consume less ROM.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Regulator registers were set for each BUCK/LDO in DT, likely because of
the way the devices were instantiated. When using a generic iterator,
ie, DT_INST_FOREACH_CHILD, there's no way to differentiate the child
being _parsed_. Since instantiation happens now based on child node
names, we are able to know which registers each devices gets assigned at
the driver level. This greatly simplifies Devicetree, and it actually
removes information that is not strictly hardware description from it.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Right now the PCA9420 driver instantiates by iterating over all
children. This is somewhat problematic, for a few reasons:
- Since instantiation is generic code, we're forced to put internal
details on Devicetree, e.g. reg-masks. After this change, this will no
longer be necessary.
- We take all children, regardless of what is defined in DT.
While we have no means to validate Devicetree node names as in Linux
dtschema, this approach allows us to have per-child specific
initialization code. This is somewhat similar to the Linux approach.
Note: nodelabels have been removed, since they were not used.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
DT_PROP() will evaluate to 0 when a boolean property is missing, so
there is no need to use DT_PROP_OR(..., false). Using _OR also has
side-effects, such as no errors when property is not defined in the
bindings.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- voltage/current needs to be stored using int32_t
- reg_val is a 8-bit unsigned register value
- Also removed __packet, it is not required here
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Rename some internal structures/functions to clearly indicate they
belong to the PCA9420 driver.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Constify configuration and curr. limits/voltage range/modes arrays
- Use common argument names: node_id, inst to make code more readable
- Improve macro names to make things clear
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Adaptation of the ospi nor flash driver for stm32l4 plus
where the peripheral is slighty different.
Configure the OSPIM peripheral for mcu embeddingthis peripheral
in front their octospi instances.
Add LOG for read access command like for write access.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Unlocking CR at the end of initialization was added in commit
a9183cd518. It was probably copied
from previous flash driver implementation.
Unlocking and locking CR in write and erase functions was added in
commit 6e4cdb0c99. Since we always unlock
the register before writing or erasing, and lock it after the operation
is finished, there is no need to unlock it after initialization.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
Control shared interrupts enabling/disabling via IDU.
With that we can easily enable and disable them for all cores
in one place.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
This fixes an issue with periodic_start feature that is only
present in newest dmic hw (starting from ACE).
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Though at the moment the driver works with high registers initialized
to zeroes it does make sense to do it right way. The double 16 shifts
are used to suppress warnings with 32 bit shift.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
In npcx ec series, two detection levels, 3.3V (default) and 1.8V are
supported during gpio configuration. But the current implementation
always selects default detection level whether NPCX_GPIO_VOLTAGE_1P8 is
set. This PR is a fix for this issue.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Previously, while writing close to the start of flash (i.e: in the first
row), the write was never committed - due to zero being used as the
"empty buffer" marker.
This patch also incorporates some performance improvements, as well as
observing any errors reported by `flash_sam0_commit()`.
Fixes#52309
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
RT1718S is an i2c-based TCPC chip that supports 3 additional GPIOs.
The pins can be used for USB-C operations e.g. handling FRS, but they
can also work as usual GPIOs.
Add a driver for the RT1718S GPIO and a handler for an alert signal from
the chip. The handler reads the alert register once asserted and calls
the GPIO interrupt handler if needed(Vendor-defined alert).
gpio_rt1718s.c file and "richtek,rt1718s" node collect common properties
and data for all RS1718S functionalities. The file can be extended for
TCPC driver. rt1718s.h file also defines inline functions with i2c
operations common for all drivers. The common header and source files
can be moved to tcpc directories once the tcpc driver is added since it
is the main functionality.
Signed-off-by: Dawid Niedzwiecki <dn@semihalf.com>
This change fixes a regression from commit 1cbc0acd.
Socket offload uses a dummy socket context, and setting
the socket state in this dummy context is invalid.
Fixes#52317
Signed-off-by: Brian Dunlay <brian@nubix.io>
Add drdy_pulsed property in Device Tree in order to select how
data ready irq should behave (either pulsed or latched mode).
Moreover change/fix the API called to set drdy irq mode.
(fix#51944)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The stm32_clock_control_init is needed for implementation of custom
pm_state_exit_post_ops.
Signed-off-by: Artur Lipowski <Artur.Lipowski@hidglobal.com>
There is no point in allowing endpoint disable only when device is
attached and ready. Remove the pointless check as it is actually harmful
and prevents endpoints disable on USB stack disable.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
The `bluetooth/common/log.h` and `bluetooth/common/log.c` files have been
removed. Files that were using them have been updated to use
`zephyr/logging/log.h` instead.
Those replacement have been done consequently:
- `/BT_DBG/LOG_DBG/`
- `/BT_ERR/LOG_ERR/`
- `/BT_WARN/LOG_WRN/`
- `/BT_INFO/LOG_INF/`
- `/BT_HEXDUMP_DBG/LOG_HEXDUMP_DBG/`
- `/BT_DBG_OBJ_ID/LOG_DBG_OBJ_ID/`
Also, some files were relying on the `common/log.h` include to include
`zephyr/bluetooth/hci.h`, in those cases the include of `hci.h` has
been added.
For files that were including `common/log.h` but not using any logs,
the include has been removed and not replaced.
Signed-off-by: Théo Battrel <theo.battrel@nordicsemi.no>
Routines called by users to release (and perhaps stop) the HFCLK
cannot synchronize with only the `hfclk_users` atomic variable,
because a thread can be preempted right after it clears the proper
bit in that variable but before the HFCLK is actually requested to
stop, and another user can then request the HFCLK to start. This can
result in HFCLK being stopped right after it was requested to start
and in `hfclk_users` holding an incorrect value.
Fix this by locking interrupts in those routines until the HFCLK is
stopped.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Take advantage of the new PCIe scanning API for doing the initial lookup
of PCIe devices specified for a given board.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This adds a generic API to be used for scanning for available PCI
endpoints. It takes a more detailed approach than the "brute force"
based scanning that's so far been used in Zephyr, buy inspecting the
host controller node and bridge nodes, and only scanning for busses and
devices that are actually expected to exist.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
PCI(e) host controllers behave in different ways (some more buggy than
others) in what value they use to indicate that an endpoint is not
present. In most cases the VID/DID is all ones (PCIE_ID_NONE) but in
others it's all zeroes, and some may even have the VID all zeroes and
the DID all ones, or vice-versa.
Add a macro to easily test for all these possibilities. The "all ones"
and "all zeroes" cases have been verified to exist on actual HW
supported by Zephyr, however the test for the mixed cases is simply
based on what Linux considers valid values (drivers/pci/probe.c in the
Linux kernel tree).
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Reduce logging verbosity in status call from INF to DBG as the function
can be called any given time i.e. eveything is fine even if the read and
write pointers don't differ.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Added the new intel_adsp_hda_dma_get_attribute function that
returns dma controller attributes.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Add CONFIG_CRC for building CRC related routines.
CRC routines are now being built for each application, whether used or
not and are add in the build system unconditionally.
Keep CONFIG_CRC enabled by default for now and until all users have
converted to use the new option.
Partial fix for #50654
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
When DMA transfer is enabled on the stm32U5,
the UART Tx channel must be suspended before stopping.
This will let the on-going transfer ends properly
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit is optimizing the uart isr execution to avoid starting
the Rx timeout if it is null. In anycase the async_timer_start
function is checking the tiemout value. This will just save some
execution lines.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Gives the stm32u5 dma driver a suspend function to
enhance the dma API.
This is a particular feature of the stm32U5 GPDMA
to suspend a channel.
A delay is required ;1ms is compatible with both stm32u5 platforms.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
With the current LLDP implementation in Zephyr the support for it has to
be enabled in the ethernet driver. This commit adds exactly this
capability to the STM32 HAL based ethernet driver.
Signed-off-by: Jan Krautmacher <jan@krautmacher.org>
The Flash latency depends on the sysclock
In case of the stm32F7 the regulator overdrive mode is set
depending on the sys clock freq.
The overdrive must be set before the first LL_SetFlashLatency.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
When the SFDP table is provided by the DeviceTree with sfdp-bfp property
It is NOT read from the octoFlash.
If no table exists in the DTS and flash read SPDP fails,
the device init fails.
Availability of this sfdp_read API is conditional
on selecting CONFIG_FLASH_JESD216_API.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit adds the jedec216 read JEDEC ID function API.
The ospi commands are issued to the octo flash device or
by the DTS jedec-id property.
Availability of this API is conditional
on selecting CONFIG_FLASH_JESD216_API.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Fixes command configuration to have samples/drivers/spi_flash
passed on stm32l562 and stm32u585 disco kits.
In OctoSPI STR/DTR and SPI/STR modes,
to determine the address_width, checking the jesd216_bfp_addrbytes
on JESD216_SFDP_BFP_DW1_ADDRBYTES_VAL_3B4B or _VAL_4B.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
With the stm32U5, when the sysclock is > 55 MHz, the EPOD booster
must be configured before the PLL1 is enabled (see refMan).
This is the case when sysclock is on PLL1 sourced by MSIS or
HSE higher than 16MHz.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
For the stm32U5 serie, the busy flag is handled as other serie.
When the DMA is overriden by other HAL drivers, the busy flag
is not considered.
Refer to https://github.com/zephyrproject-rtos/zephyr/pull/47645
There is no Mux for this GPDMA and fixed 16 channels.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit set the stm32 octospi drivers for the stm32u5x
when DMA (GPDMA) is transferring.
Valid for octospi1 or octospi2.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Fixes a small typo in the MAX30101 Kconfig file.
The MAX30101_LED3_PA config option mistakenly referd to LED2 in it's
comment.
Signed-off-by: Philipp Schilk <schilk.philipp@gmail.com>
Since the macro references `data->async->hw_rx_counting`, it cannot
be called when `data->async` is NULL, and this could happen when the
PM_DEVICE_ACTION_RESUME action was requested for an instance that uses
the interrupt-driven API while for another instance that uses the
asynchronous API the hardware counting of bytes was configured.
Prevent this by calling the macro from a proper `if` block.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Fixes the double up test of int_gpio.port.
Addition of VCNL4040_ALS_INT_EN macros.
Use of BIT() macro where it makes sense.
MISRA improvements.
Signed-off-by: Nick Ward <nick.ward@ftpsolutions.com.au>
Saves some flash and we get priority inheritance.
Also removes lock from vcnl4040_handle_int() as it
is always called from the same thread.
Signed-off-by: Nick Ward <nick.ward@ftpsolutions.com.au>
The driver has a read register, modify value, write value flow due to
needing to modify nibbles of registers at different times. The issue
this driver previously had was new incoming configurations from the
driver would be corrupted by previous configurations written into the
vcnl4040 (when there's been no power off). This would be in the case
when a device continuously power on and a developer is tweaking the
vcnl4040's configuration or when deploying firmware updates with
a new vcnl4040 configuration.
Signed-off-by: Nick Ward <nick.ward@ftpsolutions.com.au>
The driver was using the i2c_transfer_dt() API incorrectly by not using the
I2C_MSG_STOP flag in the flags field.
The I2C write function can be written more simply with the basic I2C write
API so this commit also switches the code to the basic I2C write API to fix
this bug.
Signed-off-by: Nick Ward <nick.ward@ftpsolutions.com.au>
Add a sample sbs gauge driver with feature parity and basic tests
comparison to its sensor counter-part. Includes a simple stub test that is
extended upon.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
net_pkt_get_frag() and a few other functions did not specify the
allocated fragment length, incorrectly assuming that fixed-sized
buffers are always used.
In order to make the function work properly also with variable-sized
buffers, extend the function argument list with minimum expected
fragment length parameter. This allows to use net_buf_alloc_len()
allocator in variable buffer length configuration, as well as verify if
the fixed-sized buffer is large enough to satisfy the requirements
otherwise.
Update the existing codebase to provide the expected fragment length,
based on the context.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
According to IBECC spec ECC Error log register is only valid when
ECC_ERROR_CERRSTS or ECC_ERROR_MERRSTS bits are set.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
rpi-hal function "uart_set_format" expects data width in the range
of 5..8. So I created a new function “uart_rpi_set_format” which
contains common parts of “uart_rpi_configure”.
Signed-off-by: Jan Hilsdorf <jan.hilsdorf@gmail.com>
There was a bunch of BDF lookup code in the ivshmem driver originating
from issues with not being able to have multiple PCIE_BDF_NONE entries
in DTS. Now that devices are always looked up based on VID/DID this
should not be an issue, and hence the additional code is not needed.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
TLB driver knows the required number of bytes for HPSRAM
storage during power off state.
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
a small cleanup in the code, preaparation for memory context save
Signed-off-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
Signed-off-by: Tomasz Leman <tomasz.m.leman@intel.com>
On ACE RSE bits should be cleared unconditionally
if ssp is no longer in use
This will allow to successfully disable SSP in
dai_ssp_pm_runtime_dis_ssp_power()
and enable it correctly in the next run
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Move the header file to corresponding directory which refers to
submodule name instead of root of drivers directory.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
The functions for ec_host_cmd_periph are only used by statically defined
kernel thread and should never be used from other subsystem, especially
from userspace. This commit removes the syscalls prefixes from these
functions and leaves them as inline call to API implementations from
peripheral.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
RTC is 24 bit width and k_timer is 64 bit. It is hard to test corner
cases but RTC hardware feature can help here. There is a task which
moves counter to 0xfffff0 which is close to overflow. However, there
is an internal driver state that also needs to be aligned to shift
the time properly. Adding optional function which triggers overflow
and updates internal state. This can be used for testing corner cases.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Added support for fxas21002 sensor over SPI and I2C.
Made the fxas driver APIs generic for I2C and SPI.
Tested with fxas21002 sensor on RDDRONE.
Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
Co-authored-by: Sumit Batra <sumit.batra@nxp.com>
Added support for fxos8700 sensor over SPI and I2C.
Made the fxos driver APIs generic for I2C and SPI.
Tested with fxos8700 sensor on RDDRONE.
Signed-off-by: Benjamin Perseghetti <bperseghetti@rudislabs.com>
Co-authored-by: Sumit Batra <sumit.batra@nxp.com>
There is no DSPRA registers (0x71a60) in SOC Intel ACE.
Therefore this space should be not accessed. It is valid only
for some Intel CAVS SOC versions.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
This reverts changes introduced in commit
dd535f611d, as they broke the gsm_ppp
driver integration with PPP L2. Apparently, a more thorough
refactoring is needed to use the new interface management scheme with
PPP.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Return correctly the number of received bytes for a
spi_transceive on a STM32 SPI slave.
Fixes#52216
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Since nRF IEEE 802.15.4 radio driver is now capable of calculating CSL
phase based on provided anchor time and CSL period, the CSL placeholder
window is no longer necessary. This commit removes it and switches to
the new calculation method.
Signed-off-by: Artur Hadasz <artur.hadasz@nordicsemi.no>
Signed-off-by: Jędrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
Use the new PCIe core infrastructure for looking up the BDF at runtime
based on the VID/DID values.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Use the new PCIe core infrastructure for looking up the BDF at runtime
based on the VID/DID values.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The ptm.c driver never defined DT_DRV_COMPAT, so the various DT macros
never expanded to anything useful.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Use the new PCIe core infrastructure for looking up the BDF at runtime
based on the VID/DID values.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Use the new PCIe core infrastructure for looking up the BDF at runtime
based on the VID/DID values.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Use the new PCIe core infrastructure for looking up the BDF at runtime
based on the VID/DID values.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The BDF values can differ on the same platform, based on e.g. BIOS
configuration, and in the case of qemu the command line parameters. It's
therefore more reliable to always look up the BDF value based on the
known Vendor and Device IDs.
This patch introduces such a framework, and allows the incremental
update of PCIe drivers to start taking advantage of it.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
`struct device::config` is a `const void *`, so this struct does not need
to be mutable.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Parts of the macro used `inst`, others `n` for the instance number; only
`n` was actually defined (so `inst` expanded to the empty string, causing
name errors with more than one instance).
Unify everything to `inst`.
Signed-off-by: Armin Brauns <armin.brauns@embedded-solutions.at>
Add property mxicy,mx25r-power-mode to jedec,spi-nor binding for
controlling low power/high performance mode on Macronix MX25R* Ultra Low
Power flash devices.
- "low-power" configures the flash in ultra low power mode.
- "high-performance" configures the flash in high performance mode.
Signed-off-by: Gregers Gram Rygg <gregers.gram.rygg@nordicsemi.no>
Add a driver for the Arm Ethos-U NPU, including a Devicetree entry for
the mps3_an547 platform.
Signed-off-by: Kristofer Jonsson <kristofer.jonsson@arm.com>
Signed-off-by: Fredrik Knutsson <fredrik.knutsson@arm.com>
It was previously written as regular members of a struct, which
allows the C compiler to do things the way it wants. On ARM64, gcc
would typically write field by pairs (`STP`), which
would generate aborts.
By using `sys_write32`, we force it the right way.
Signed-off-by: Henri Xavier <datacomos@huawei.com>
After a firmware update, DNS needs to be reconfigured.
Fix debug log for AT command strings.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
GPDMA should work with disabled interrupts in ctrl_lo
This also helps with stability in SOF scenarios
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
The sensor uses the ALERT terminology (pin can be configured to trigger
on certain events such as conversion ready or overvoltage alerts). The
"IRQ" name is not clear.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Specify the units of the current LSB in microamperes, so that we can
measure low maximum currents. Right now it was specified in
milliamperes, but ignored and always hardcoded to 1mA in the driver.
This makes the driver pretty much useless when the maximum current to be
measured is in a range of e.g. 20-50mA.
This patch also removes some unnecessary ifdeffery: since we write the
calibration register, we can always provice measurements with the right
units. It is also wrong to provide sensor readings that do not match
with the units specified by the channel. After this change voltage is
always reported in V, current in A and power in W.
Note that power measurement had the current LSB hardcoded in the
calculation (assuming 1mA/LSB), this has been fixed as well.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Following dtschema practices, add phyisical units to the shunt resistor
value: milliohms.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
With the recent introduction of DT_HAS* Kconfig helpers, such build
asserts are highly unlikely, so just remove them.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Driver had Doxygen stubs for sensor interface calls. First, most were
incomplete, outdated or just wrong. Second, implementations just need to
make sure to adhere to the error codes documented in the public
interface (sensor API in this case).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
- Add many missing includes so that headers are self-contained
- Sort includes properly (locals first, stdc, zephyr, etc.)
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Right now we had a mix of int (signed) and uint32_t (fixed-width
unsigned integer). Use int32_t for all cases, both values may be either
positive/negative, and we have a defined range when using fixed-width
integers.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The "pmic" driver was in reality a driver for NXP PCA9420 PMIC. There's
no "universal PMIC". While the driver may work for other NXP PMICs, it
is clearly not generic for other vendors PMIC.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The regulator API supports all voltage/current ops, so there's no need
to guard them under "PMIC". If a particular driver doesn't support the
operations it will just return -ENOSYS and the command will fail.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The previous "consumer" API was designed without API ops, meaning only a
single implementation (singleton) was possible. This was inconsistent
with all other APIs, and, a problem in systems where more than a single
PMIC IC is present.
Note that all "consumer" ops are optional, so this won't break any
existing drivers.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In Zephyr all regulator APIs are consumer APIs. There's no point in
adding a separate header file. Our current implementation is also
inconsistent with Linux, where enable/disable are also part of the
consumer.h API.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Fail with error if any of flashdisk partition assumptions are not met:
* uniform page size through the whole partition
* flashdisk starts at page boundary
* flashdisk ends at page boundary
Read-only flashdisks are not subject to above conditions because the
cache buffer is not used for read-only flashdisks.
The checks can be disabled via Kconfig option to save code space.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Force cache-size to 0 and treat flashdisk as read-only when backing
partition has read-only flag set. This allows users to save RAM when the
application does not write to the flashdisk, e.g. when a predefined FAT
filesystem is used.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
In usb_dc_ep_disable() mark an endpoint as unoccupied in addition to
being disabled. This allows the endpoint to get enabled properly
with a subsequent call to usb_dc_ep_enable()
See: zephyrproject-rtos/zephyr#51685
Signed-off-by: Milind Paranjpe <mparanjpe@yahoo.com>
Right now it is possible that some devices define 0 pinctrl states in
devicetree, because pinctrl-N entries may still be optional for backward
compatibility. If the programmer makes a mistake and forgets them,
application could experience runtime crashes because
pinctrl_lookup_states assumes you have at least one state, so it does
not perform any bounds checking. Change the while condition so that it
is skipped if states count is zero.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The can_kvaser_pci_data_##inst type was supposed to be
can_kvaser_pci_data and not can_kvaser_pci_config. This got unnoticed
because there were no struct members to pre-initialize, and a reference
to the struct was stored using a void pointer.
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
The NPCX driver did use deprecated voltage macros. Define vendor
specific flags instead.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The pin get function was using deprecated macros. Note that the set
implementation already uses vendor specific flags.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The buf_status register is 32 bit wide but was saved in a
uint8_t. This caused some buffers never to be handled which
results in the pico getting stuck in the interrupt handler.
Signed-off-by: Lukas Gehreke <lk.gehreke@gmail.com>
Some modems supports multiple access technologies.
The access technology of the serving cell can be extracted from the
+CEREG command, which is already sent to the modem.
The parse function is extended to also parse the access technology value.
Fixes https://github.com/zephyrproject-rtos/zephyr/issues/51153.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
This moves the CMD_SET_DLF command macro to public header
so application can use it without weird include path to
include the "private" header file under drivers/serial.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Ensure that PECI block is enabled in the EC Subsystem by clearing
the PECI_DIS (peci disable) register
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Instead of calling __HAL_RCC_OSPIM_CLK_ENABLE() to enable the OSPI
manager clock, we now use a new clock binding in the dts.
In order to avoid confusion between the different clocks, the driver
is modified to select the clock based on their names instead of indexes.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Remove a set of Kconfig symbols for configuring the RTC on STM32
that are no longer useful
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
After a soft-reset of the host controller the flash device is not reset.
This can cause the flash device to still be busy writing or erasing when
the host controller boots and initializes the flash. The often results
in errors and the flash device not being initialized.
This fix polls the status register until the WIP flag is off before
initializing the flash device.
Fixes#51713
Signed-off-by: Gregers Gram Rygg <gregers.gram.rygg@nordicsemi.no>
In order to configure domain clock, clock_control_configure should be
used instead of clock_control_on which is only useful for bus clock gating.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move functions defined in the Cryptographic toolbox of the Bluetooth
specification inside their own files in the following folder:
`zephyr/subsys/bluetooth/bt_crypto`. The functions were previously
implemented in `zephyr/subsys/bluetooth/host/smp.c`.
The cryptographic toolbox functions can now be accessed from outside of the
host.
In addition to that, tests for each cryptographic toolbox functions have
been added.
Signed-off-by: Théo Battrel <theo.battrel@nordicsemi.no>
Fixed how data is read in mcp23sxx_read_port_regs
The data is now stored in an array to get the
actual data from spi
Signed-off-by: Daniel Skatt <daniel.skatt@gmail.com>
Channel SENSOR_CHAN_GAUGE_FULL_CHARGE_CAPACITY was returned in place of
SENSOR_CHAN_GAUGE_FULL_AVAIL_CAPACITY, due to their matching names.
Ensuring that the channel names are unique fixes the issue.
Signed-off-by: Marco Argiolas <marco.argiolas@ftpsolutions.com.au>
CC setting algorithm is handling a case when CC is too soon (next
tick from now). It was setting CC to one tick further in the future
if that was detected. Step was repeated if counter incremented during
setting CC and CC was behind the counter because of risk of setting
CC too late. In certain scenarios we might spend a lot of time in
that loop, especially if optimization is turned off. Test shown that
loop was executed dozens of time (up. to 700us). To prevent
prolonged execution whenever CC setting fails we set CC to one more
tick further in future.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The reference count, dp->sref, is never incremented for the SSP DAI as
we use the runtime PM API's to probe/remove the DAI during
resume/suspend. Therefore, use the DAI state to check if the DAI is
active in any direction before proceesing to set the config. This fixes
the IO errors seen during simultaenous playback and capture on the same
SSP.
Signed-off-by: Ranjani Sridharan <ranjani.sridharan@linux.intel.com>
A regression was introduced in ef804d8408
when the M_CAN driver was swapped to use the generic dcache API, but
cache management was not enabled on SAM devices.
Enable cache management on SAM devices when CAN_SAM is selected.
Signed-off-by: Perry Hung <perry@genrad.com>
The SAF XEC driver for eSPI was not enabled by default so sample
code for espi was failing. This commit changes the behavior to match
current scheme of enabling the drivers based on the status of required
device tree nodes.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
The ADS1x13 does not have a PGA, and will have a fixed
internal reference voltage of 2048mV. This sets the internal
referece voltage for the ads1x1x to 2048 and adjust the gain
configuration to scale.
Signed-off-by: Ryan McClelland <ryanmcclelland@fb.com>
Call lis2dw12_data_ready_mode_set() API in order to properly
set CLTR7.drdy_pulsed bit.
(Fix#51488)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The USB device subsystem driver's set_interface() function calls
usb_dc_ep_configure() followed by usb_dc_ep_enable(). When
switching between alternate settings of a configuration's
interface, set_endpoint() can be followed by reset_endpoint() on
an endpoint. Some time later, set_endpoint() can be called again
on the same endpoint. This results in the HAL's
kUSB_DeviceControlEndpointInit function being called twice in a
row, which causes a memory allocation error. A simple solution is
to call the HAL's kUSB_DeviceControlEndpointDeinit function
before calling kUSB_DeviceControlEndpointInit. This overcomes the
memory allocation error.
Signed-off-by: Milind Paranjpe <mparanjpe@yahoo.com>
For larger transfers DMA can be used enabling other tasks
to continue running. A threshold of 32 byte transfers
is about right and is defined threshold value for using DMA.
This does not currently support multiple SPI transactions changing
chip select with DMA (though the hardware supports this) currently.
Instead opting for the simpler first change of enabling one shot
DMA SPI transfers for those where the size warrants it.
Adds the loopback binding option to enable the spi_loopback test.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
By Starting the timer when period was set to 0, the SCTimer was giving
control of the pin back to the timer and over-riding the value written
to base->OUTPUT register. Consequently, the PWM timer was never
stopped and still using the previously configured period.
The PWM now correctly stops when setting the period to 0.
Signed-off-by: Guy Morand <guy.morand@bytesatwork.ch>
Add runtime physical memory discovery. This allows platforms with
different physical memory sizes to use the same driver for memory
management.
Signed-off-by: Jakub Dabek <jakub.dabek@intel.com>
The PLTRST# virtual wire signal's reset signal is eSPI Reset#.
But it8xxx2 didn't enable the feature by default. This change
will enable the feature at default.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Add support input interrupts for GPIO pins on NXP S32Z27
SoC. The driver will convert GPIO pin to respective
interrupt line that will be processed by External
Interrupt Controller.
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Add initial support for the NXP S32Z27 SIUL2 External
Interrupt Controller. Each SIUL2 node has a child node
will act as an interrupt-controller that processes external
interrupt signals.
This driver is required to manage GPIO interrupts.
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
New ADC driver for the TI CC13xx/CC26xx family.
ADC channel configurations are translated from Zephyr constants to
simplelink driverlib ones (e.g., sample times use a lookup table).
Async mode was also implemented & tested.
Signed-off-by: Stancu Florin <niflostancu@gmail.com>
Adds Atmel SAMC20 and SAMC21 soc. C series is based on Cortex-M0+.
C21 contains CAN interface.
The init routines are same for SAMC20 and SAMC21. They use one
clock OSC48M without configuration.
The code is inspirated from atmel_sam0/samd21.
Signed-off-by: Kamil Serwus <kserwus@gmail.com>
Add the support of the stm32MP1 family for DMA peripheral.
This dma driver is similar to the stm32H7.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
struct dai_intel_dmic never had a "created" member, so this assert seems
to be accidentally left in the code. Remove it to allow building builds
with dmic driver with asserts enabled.
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Trigger network dropped based on socket error notifications.
This debounces the network state and only triggers
the network interface to go down if the network
really drops or causes socket problems.
This will ensure upper networking stack layers can
cleanup broken sockets properly.
Debounce DNS resolver refresh.
Only trigger DNS resolver refresh if the DNS address changes.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
For PCI Ethernet driver it makes sense to use lookup(id) instead of
probe(bdf, id). Even when using different Qemu parameters we may get
different BDF for e1000 device.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Since moving to Qemu Q35 machine the drivers with hardcoded BDF stop
working. Correct e1000 BDF.
Fixes#51829
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
In order to allow proper softAP mode, wifi
libraries and wpa supplicant requires this kconfig
to be enable.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Functions related to string manipulation that were defined in
`common/log.h` has been moved to the `common/bt_str.h` file and their
implementation in `common/bt_str.c`.
Files that were using those functions has been updated consequently.
Signed-off-by: Théo Battrel <theo.battrel@nordicsemi.no>
Zephyr implementation is limited to 4 IRQ per GPIO bank when up to 8 is
theoritically possible.
It is now possible to use until 8 IRQ per GPIO bank. This can be
achieved with minimal effort in a device tree overlay:
&gpio0 {
interrupts = <4 2>,<5 2>,<6 2>,<7 2>,<32 2>,<33 2>;
};
&gpio1 {
interrupts = <34 2>,<35 2>;
};
Signed-off-by: Guy Morand <guy.morand@bytesatwork.ch>
The PWM definitions for Atmel SAM SoCs can differ slightly.
This commit adds support for the PWM defines used by SAM4S.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Cache written data to avoid rewriting same flash page multiple times
when writing subsequent flash pages. The cache is used for reads to
account for reading not yet committed (i.e. dirty) page data. Speeding
up reads is not intention of this patch and therefore the read path
does not modify cache state.
Fixes: #30212
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Rename the CAN loopback driver receive function to make the code easier to
understand. Add proper check against NULL for RX callback function
pointers.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Set default of DISK_DRIVER_SDMMC Kconfig based on the devicetree.
This should avoid having to set the kconfig at the board level
in order to use sdmmc.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Update power_domain drivers to use DT_HAS_<compat>_ENABLED Kconfig
symbol to expose the driver and enable it by default based on
devicetree.
We remove one reference in prj.conf that is no longer needed.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Brackets were originally used in the sensor info shell command output to
make it obvious when a field is a null string, however they incorrectly
suggest that a field is an array. Remove the brackets and conditionally
print "(null)" instead.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Add support for configuring CAN emulation support in QEMU. For now, the
only supported CAN controller is the single-channel Kvaser PCIcan PCI card.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This seems to have caused CI failures and its unclear why just yet
so revert instead.
This reverts commit cbee9e9fdd8060d0ca4e91037b3f99f631e4b1a5.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Fix the enabling of the independant IO supply.
Function LL_PWR_EnableVddIO2 is called LL_PWR_EnableVDDIO2 on U5.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
Update Intel ADSP timer driver to use DT_HAS_<compat>_ENABLED Kconfig
symbol to expose the driver and enable it by default based on
devicetree.
We remove setting 'default y' for the timer driver in
Kconfig.defconfig.series as that is now handled in the driver Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Mark the timer as having a lock free read of the cycle count
so that spin lock debugging can include lock time asserts.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Update IPM drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Support multiple DTS instances in the C code, also
just initialize devices that are not disabled.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Expanded the enc28j60 driver to update its carrier status
whenever the Ethernet cable is plugged in or out. I used the
enc424j600 driver as reference, as this driver already
included this functionality. The driver will now take
the interface offline whenever the cable is not plugged in
and stop sending packets. The respective events are also
generated for use in the application. I tested it locally
on my nRF52840 based gateway board using the enc28j60 network
chip. Everything worked as expected.
Signed-off-by: Paul Jans <paul.jans.1999@hotmail.com>
Fixes#51214
Adds a new conditional shell command to the sensor shell to get data
from the sensor info iterable section, such as vendor and model name,
for all sensors.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Adds an iterable section in ROM to hold constant information, such as
vendor and model name, for all enabled sensor driver instances. This
will be used by the future sensor subsystem to enumerate all available
sensors in the system.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
The ESP32 series MCUs allow to set a timeout which triggers an error
if the SCL line is unchanged for the specified amount of time.
By default, the ESP-IDF HAL sets the timeout to an arbitrary value of
10 times the bus cycle.
This is not sufficient for chips like the TI bq76952, which pulls the
SCL line low (clock stretching) for several 100 µs.
The timeout should also not be dependent on the chosen bitrate, as it
is defined by the time a chip needs for internal calculation before it
can provide requested data or continue communication.
This commit adds a property to devicetree to allow configuration of
the scl timeout. This value is set via direct register access, as the
ESP-IDF HAL does not provide access to the enable bit and does not
give any information about the maximum size of the timeout (defined
in I2C clock cycles in the register).
Fixes#51351
Signed-off-by: Martin Jäger <martin@libre.solar>
Microchip MEC172x has a modified eSPI SAF hardware implementation.
Hardware changes include multiple clock dividers for each SPI
flash device and data transfer using QMSPI local DMA.
espi reset interrupt is made a higer priority in MEC172x devicetree
because espi reset event resets all espi hardware and we don't
to want to service any other espi interrupt blocks when espi reset
occurs.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Microchip MEC172x QMSPI expanded its clock divider register
field from 8 to 16 bits. QMSPI source clock is on the fast
peripheral domain therefore get the frequency from the clock
control driver.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Microchip MEC172x CPU and fast peripheral (QMSPI and PK) are
clock source is based upon an OTP setting. Add logic to adjust
clock source based on OTP value. If the OTP value is ever changed
this fix will allow calcluation of correct clock rate.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Remove all obsolete DISK_FLASH* Kconfig options.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Use devicetree to obtain information for all zephyr flash disks.
Co-authored-by: Johann Fischer <johann.fischer@nordicsemi.no>
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
In order to avoid using multiple sources of truth for the platfom's
endianness, convert the in-tree code to use the (BIG|LITTLE)_ENDIAN
Kconfig variables exclusively, instead of the compiler's
__BYTE_ORDER__.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
GICR_TYPER is a 64 bit register. On AArch32 when one uses sys_read64(),
this results in ldrd instruction. When Zephyr runs as a VM, 'LDRD'
instruction on an emulated MMIO region gets trapped to the hypervisor as
data abort.
Refer the following paragraph from ARM DDI 0487G.b ID072021 :-
Section - "ISS encoding for an exception from a Data Abort",
"For other faults reported in ESR_EL2, ISV is 0 except for the following
stage 2 aborts:
AArch32 instructions where the instruction:
— Is an LDR, LDA, LDRT, LDRSH, LDRSHT, LDRH, LDAH, LDRHT, LDRSB, LDRSBT,
LDRB, LDAB, LDRBT, STR, STL, STRT, STRH, STLH, STRHT, STRB, STLB, or STRBT
instruction."
As 'LDRD' is not in the list, so ISV==0. This implies that Arm could not
decode the instruction for the hypervisor (in EL2) to execute it.
Thus, we have abstracted this read into arm_gic_get_typer().
For AArch64, we use sys_read64() as before.
For AArch32, we use sys_read32() twice to read the lower and upper 32 bits
of GICR_TYPER.
Thus, we ensure that when the access is trapped for AArch32, Arm generates
a valid ISS so that hypervisor can execute it.
Signed-off-by: Ayan Kumar Halder <ayankuma@amd.com>
To avoid legacy extended adv repots blocking important
events or work, mark them as discaradble.
Signed-off-by: Martin Tverdal <martin.tverdal@nordicsemi.no>
Print the error messages about the state of the host register
when the I2C transfers fail. This is useful for debugging.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
DMIC does not need to use SOFT_RESET bit to start collecting data if
periodic_start bit is enabled.
Signed-off-by: Damian Nikodem <damian.nikodem@intel.com>
If cfg_hi and cfg_lo are not set to zero in config setting, different
dma slot value is bitwise ORred to the previous set value. Thus fix it.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
This adds an entropy driver calling the PSA Crypto psa_generate_random()
API to get random bytes.
Currently this only uses the TFM provided psa_generate_random().
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Valerio Setti <vsetti@baylibre.com>
Refactors all sensor drivers to use SENSOR_DEVICE_DT_INST_DEFINE, which
is a sensor-specific variant of DEVICE_DT_INST_DEFINE that provides a
common place to instantiate additional data structures for the future
sensor subsystem and/or sensor driver stats.
This approach was inspired by I2C_DEVICE_DT_INST_DEFINE to streamline
adding I2C stats support across all I2C drivers.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Without this define, the structure iis2dh_device_config
is defined incorrectly.
The structure is defined in iis2dh.h file as follows:
struct iis2dh_device_config {
struct spi_dt_spec spi;
struct i2c_dt_spec i2c;
uint8_t pm;
struct gpio_dt_spec int_gpio;
};
without the macro
the structure is defined as
struct iis2dh_device_config {
uint8_t pm;
struct gpio_dt_spec int_gpio;
};
which results in accessing the wrong data when
calling iis2dh_init_interrupt
function (or any other functions in this file)
Signed-off-by: Mehdi Zemzem <mehdi.zemzem2@gmail.com>
Move runtime checks to use arch_num_cpus() and build checks
to use CONFIG_MP_MAX_NUM_CPUS. This is to allow runtime
determination of the number of CPUs in the future.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
While the 'count' value "should" never be larger than two digits,
increase the size of the snprintk buffer to be large enough to hold
the longest possible value.
Signed-off-by: Keith Packard <keithp@keithp.com>
The can_frame and can_filter structs support a number of different flags
(standard/extended CAN ID type, Remote Transmission Request, CAN-FD format,
Bit Rate Switch, ...). Each of these flags is represented as a discrete bit
in the given structure.
This design pattern requires every user of these structs to initialize all
of these flags to either 0 or 1, which does not scale well for future flag
additions.
Some of these flags have associated enumerations to be used for assignment,
some do not. CAN drivers and protocols tend to rely on the logical value of
the flag instead of using the enumeration, leading to a very fragile
API. The enumerations are used inconsistently between the can_frame and
can_filter structures, which further complicates the API.
Instead, convert these flags to bitfields with separate flag definitions
for the can_frame and can_filter structures. This API allows for future
extensions without having to revisit existing users of the two
structures. Furthermore, this allows driver to easily check for unsupported
flags in the respective API calls.
As this change leads to the "id_mask" field of the can_filter to be the
only mask present in that structure, rename it to "mask" for simplicity.
Fixes: #50776
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Replace usage of CONFIG_MP_NUM_CPUS with CONFIG_MP_MAX_NUM_CPUS for
init and declaration as we phase out CONFIG_MP_NUM_CPUS usage.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Replace unnecessary `BT_HEXDUMP_DBG` with `LOG_HEXDUMP_DBG`.
`BT_HEXDUMP_DBG` did an extra cast to `const uint8_t *` on its first
argument. This was probably the reason it was introduced. But the
current definition of `LOG_HEXDUMP_DBG` does this cast for us.
Signed-off-by: Théo Battrel <theo.battrel@nordicsemi.no>
It looks like this platform is using soc.h to declare some display APIs,
imxrt_pre/post_init_display_interface(). This likely deserves a better
design, but for now let's fix compiler warnings.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Update TCPC driver to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
The "@return" command should be used for the arbitrary return
description, and "@retval <return value>" for the description
of named return value
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
Use DT_NUM_INST_STATUS_OKAY(DT_DRV_COMPAT) to determine
number of potential interrupt sources. This mitigates
the wasting of memory on devices with mutliple UCPD ports
but only one UCPD port is used.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
Assign the pins for the STM32G071b and STM32G081b STM32
UCPD peripherals so the UCPD driver can properly
configure the device.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
When there is a timeout for an i2c transaction, the i2c driver should do
the recovery logic to make the bus and driver state machine go back to
idle. Otherwise, it will cause the following transaction to fail because
the state machine keeps in an inappropriate state.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Executing code out of RAM on IT8xxx2 requires that the relevant
addresses be mapped onto the CPU's instruction memory bus, referred to
by ITE documentation as Instruction Local Memory (ILM). ILM mappings
configure blocks of RAM to be used for accesses to chosen addresses when
performing instruction fetch, instead of the memory that would normally
be accessed at that address.
ILM must be used for some chip features (particularly Flash
self-programming, to execute from RAM while writing to Flash), and has
historically been configured in the Flash driver. The RAM for that was
hard-coded as a single 4k block in the linker script. Configuring ILM
in the flash driver is confusing because it is used by other SoC code as
well, currently in code that cannot depend on the Flash being functional
or in hand-selected functions that seem performance-critical.
This change moves ILM configuration to a new driver and dynamically
allocates RAM to ILM in the linker script, allowing software use of the
entire 64k RAM depending on configuration. This makes ILM configuration
more discoverable and makes it much easier to correctly support the
CODE_DATA_RELOCATION feature on this SoC.
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
ADC comparator driver submits notifications into system work queue, this
change will make driver to use dedicated work queue instead by using
`CONFIG_ADC_CMP_NPCX_WORKQUEUE`.
Dedicated work queue and priority are configurable as well.
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
If we are dropping packets, then drop then early without the clone, this
improves zperf performance.
Signed-off-by: Krishna T <krishna.t@nordicsemi.no>
Change for loops of the form:
for (i = 0; i < CONFIG_MP_NUM_CPUS; i++)
...
to
unsigned int num_cpus = arch_num_cpus();
for (i = 0; i < num_cpus; i++)
...
We do the call outside of the for loop so that it only happens once,
rather than on every iteration.
Signed-off-by: Kumar Gala <kumar.gala@intel.com>
Possibility to configure i2c speed through I2C_SHELL
command `i2c speed`.
Signed-off-by: Andrzej Kuros <andrzej.kuros@nordicsemi.no>
Signed-off-by: Jędrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
Some files were using definitions from sys_clock.h, e.g. MSEC_PER_SEC
without including the header.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Currently, uart_npcx_pm_policy_state_lock* functions are guarded by
CONFIG_UART_INTERRUPT_DRIVEN && CONFIG_PM. However, it is unnecessary to
guard them with CONFIG_UART_INTERRUPT_DRIVEN as the polling mode UART
driver also uses these functions.
This commit removes it and leaves those functions guarded by CONFIG_PM
only.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Fixes build of flash_shell sample after commit
a6a4400b86.
west build -p -b xmc45_relax_kit samples/drivers/flash_shell
Also include stdint.h.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
eSPI PUT_IOWR_SHORT protocol can send 1/2/4 bytes of data in a single
transaction. This allows the host to send max 32-bits Port80 code
at one time. This CL sets bits OFS0_SEL~OFS3_SEL in the DPAR1 register
to let the EC hardware put the full Port80 code to DP80BUF FIFO.
It also groups the N-byte code into a single 32-bits variable when
necessary by analyzing the offset field in the DP80BUF register.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
First pads are being configured for use by the FPGA.
Then CPU loads usbserial bitstream.
Finally it reenables clocks, sets up USB PID and waits for device to
enumerate.
Also disable software resets in used clocks.
Signed-off-by: Michal Sieron <msieron@antmicro.com>
USB interface that may be used to send messages from a USB host to
the M4 processor in the S3B, and vice-versa.
Signed-off-by: Michal Sieron <msieron@antmicro.com>
Align PPP drivers/L2 with interface state handling update. Use the
carrier on/off notification instead of bringing the interface up/down to
update the interface state.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Align Ethernet/Wi-Fi drivers/L2 with interface state handling update.
For drivers, that did not support carrier detection, no changes are
needed.
Driver that did support carrier detection, are updated to set the
carrier state to OFF by default, instead of setting the
NET_IF_NO_AUTO_START flag. This allows to postopne the actual
NET_EVENT_IF_UP notification until driver detects that carrier is ready.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
This fixes a random crash caused by race condition in the eswifi
driver used by the disco L475 iot1 board.
Signed-off-by: Michał Zając <m.zajac@avsystem.com>
Adds open drain support to atmel,sam-gpio drivers, by writing to the
PIO_MDER or PIO_MDDR registers during gpio configure.
Signed-off-by: Nick Kraus <nick@nckraus.com>
clock_stm32_ll_common.h was missing <stdint.h> and <zephyr/device.h>. It
turns out things worked because <zephyr/init.h> has a forward
declaration of struct device.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Selects the hidden Kconfig to note that the APIC timer's cycle count
accessor is a lock free path and may use the spin lock time limit check.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Select the Kconfig option noting that the cavs (intel adsp)
timer driver provides a lock free cycle count accessor and
therefore can be used with a spin lock time limit assert.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Spin locks held for any lengthy duration prevent interrupts and
in a real time system where interrupts drive tasks this can be
problematic. Add an option to assert if a spin lock is held for
a duration longer than the configurable number of microseconds.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
The TXF interrupt mask is not properly set. In this case the
interrupt line is not cleaned, leading to the re-entrance
in the interrupt handler.
the issue is linked to the management of the IPCC_CxTOCySR value.
The TXF interrupt is triggered when the IPCC_CyMR is channel bit is
set to 0 and the IPCC_CxTOCySR associated bit move from 1 to 0.
The fix is to check if the IPCC_CxTOCySR channel bit is 0 instead of 1.
Signed-off-by: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
For Intel ACE1.x the GPDMA link list structure should be aligned
to 64 bytes to avoid the link list entry fetch crossing the 64 bytes
address alignment.
Signed-off-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
Add support for regulator-boot-on to PMIC driver. Many PMIC devices will
be enabled at boot, so this property allows the regulator framework
to correctly track their state.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add mode specific PMIC configuration functions, to allow consumers to
configure target voltages of each regulator mode. This will allow users
to enable or disable, as well as set target voltages for regulator modes
without actually entering that mode.
This feature can be useful for power managment applications where the
consumer may want to switch the regulator to low power mode at a later
time.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Remove mode awareness from PMIC voltage setting, current setting, and
enable/disable functions. Concepts such as regulator consumers do not
work well with multiple modes, so support for changing voltages or
disabling regulators in each mode has been removed.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The inactivity time registers identified by `ADXL362_REG_TIME_INACT_L`
and `ADXL362_REG_TIME_INACT_H` accepts a 16-bit value. (8 in each).
Without this change the last 5 bits of the register value
will be cleared.
Clearing the last bits of the register value greatly reduces the maximum
inactivity time that can be set.
Signed-off-by: Simen S. Røstad <simen.rostad@nordicsemi.no>
Linux kernels before v5.14 do not define the CANFD_FDF flag. The flag is
disregarded within the Linux kernel. It is just there for being able to
reuse the canfd_frame struct for classic CAN frames in Linux user-space
applications.
Define the CANFD_FDF flag locally if not already defined to allow compiling
against older Linux kernel headers.
See the following Linux kernel commit for further details:
02546884221279da2725e87e35348290470363d7
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This change implements part two of the program laid out in the TSCH RFC,
see #50336#issuecomment-1250250154 :
> Consolidate IEEE 802.15.4 options in net_pkt
This change improves decoupling of generic net core code from
IEEE 802.15.4 internals. It also simplifies IEEE 802.15.4
attribute cloning and thereby makes it easier to maintain and less
error prone (and probably even faster as individual bits are no longer
copied over separately).
This enables us to extend and design IEEE 802.15.4 L2 attributes inside
the package in isolation from the net core code which will no longer
have to be changed when introducing changes or additions to the flags.
This flexibility will be built upon in later change sets to model the
IEEE 802.15.4 attributes closer to the spec.
The solution is inspired by Linux's sk_buff->cb attribute which addresses
the same concern as the attribute introduced in this change set:
https://elixir.bootlin.com/linux/v6.0.1/source/include/linux/skbuff.h#L871
As the inline comment says: The cb attribute can be made a union or even a
uint8[something] in the future, if further L2s need a control block, too.
Right now such full indirection would make the code overly abstract, so
I chose to compromise with maintainability in mind.
Care has been taken to ensure that this changes does not introduce
additional padding into the net package. To maintain zero-padding, future
changes to the net packet struct will have to ensure that the
IEEE 802.15.4 struct is 4-byte aligned (iff the IEEE 802.15.4 struct
continues with max uint32_t scalar members) which is no deviation from
the previous implementation.
Signed-off-by: Florian Grandel <jerico.dev@gmail.com>
Nordic's IEEE 802.15.4 radio driver adapter layer had a few raw accesses
to net packet attributes.
Packet attributes should never be accessed directly, though, but only
through the dedicated accessor methods provided by the net core.
This change replaces raw accesses to packet attributes by their
respective wrapper functions.
This also is a necessary precondition to the isolation and
encapsulation of IEEE 802.15.4 specific packet attributes which will be
introduced in a later commit of this change set.
Fixes: #51264
Signed-off-by: Florian Grandel <jerico.dev@gmail.com>
Several IEEE 802154 drivers allocated RX packets from the TX pool.
This may seem like a minor problem at first sight but it may become
problematic if the pool is used to distinguish package types as is the
case in some code paths, e.g. for packet priority or determination of
the packet buffer pool.
This bug also has the potential of starving the TX pool capacity which
even may make devices vulnerable to DoS attacks as sending may be
prohibited by addressing enough RX packets to a device to let it run out
of TX capacity.
Fixes: #51261
Signed-off-by: Florian Grandel <jerico.dev@gmail.com>
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Adding multidomain support by introducing log_link module which
acts as a receiver of log messages created by another domain.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
On stm32g0, stm32g4, stm32l4, stm32l5, stm32u5,
and stm32wbx, it is allowed to write a zeroed dword
on unerased flash.
Signed-off-by: Cyril Fougeray <cyril.fougeray@worldcoin.org>
Add MEC172x full duplex qmspi driver version to support full
duplex transfers as expected by the Zephyr spi driver model.
On every spi clock we transmit one bit and receive one bit.
This driver will work with Zephyr SPI NOR driver.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
The include <zephyr/kernel.h> is missing from eeprom driver,
causing build error. This is fixing it like PR # 51246 or #51220.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The phys property was not considered during initialization of the
driver config, so that the transceiver was not enabled properly
in case it has an enable/standby pin.
Signed-off-by: Martin Jäger <martin@libre.solar>
Newer ESP32 series MCUs like the ESP32-C3 contain some register changes
incompatible to the original ESP32 and the SJA1000.
The additions in this commit consider these changes and fix the
incompatibilities in the TWAI front-end for the SJA1000 driver.
Signed-off-by: Martin Jäger <martin@libre.solar>
This is a preparation to use the custom implementation in ESP32 TWAI
frontend for newer ESP32 series chips like the ESP32-C3, which have
timing registers incompatible with the SJA1000.
Signed-off-by: Martin Jäger <martin@libre.solar>
Implement GPIO driver minimal API's for NXP S32 devices, based on SIUL2
peripheral. SIUL2 allows to control the pins electrical characteristics
such as internal pull resistors, pin direction and more.
GPIO driver API's for interrupts will be implemented in a future patch.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
This patch introduces support for NXP S32 LINFlexD peripheral operating
in UART mode. Polling and interrupt-based serial API's are supported.
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
Introduce Pinctrl driver for SIUL2 module present on NXP S32 devices,
which provides control over all pins, such as function selection and
electrical characteristics that appear on external chip pins.
Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
PMIC regulator disable function was unconditionally disabling the PMIC
regulator when the disable API was called, which does not match the
expected behavior when using the onoff service. Fix this error.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
If the read function returns value of zero, there is no more data
in the file and the function should return value of -1.
Signed-off-by: Marek Pieta <Marek.Pieta@nordicsemi.no>
We have been encountering timeout issues when erasing large flash
sections (before receiving an image via mcuboot) from this semaphore
take:
5af0fbc2e3/drivers/flash/soc_flash_nrf_ticker.c (L225-L233)
I think this is because this constant is based on the time taken to erase
the chip but doesn't take account of the fact it is being done by a
ticker. If I understand correctly the ticker is a timeshare mechanism
so the actual max erase time is some factor based on how much time is
given to the task by the ticker.
This multiplies the max timeout by 1.5
Signed-off-by: Kyle Cooke <cookekyle97@gmail.com>
Add limits.h and irq.h to fix build errors for boards/tests that include
the zephyr,nativer-_posix-counter driver.
Signed-off-by: Keith Short <keithshort@google.com>
Fix the scope of some variables in various STM32 drivers including:
- SDMMC
- DMA
- OSPI/QSPI Flash
- Interrupt controller
The variables are set static instead of global and const if appropriate.
Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
The IEEE 802.15.4 radio driver encodes attributes in:
* little endian for everything that is close to the protocol as
IEEE 802.15.4 frames are little endian encoded.
* mixed big and little endian in its configuration where extended
addresses are being represented. These inconsistencies are unfortunate
but cannot be easily fixed in a backwards compatible way so will be
left untouched in this change.
Endianness was almost nowhere documented which explains these
inconsistencies and led to several bugs where assignments of different
byte order are not converted (or sometimes converted, sometimes not).
This change documents intended endianness within the realm of the
IEEE 802.15.4 radio driver code. Conversion bugs are fixed in a separate
commit.
Signed-off-by: Florian Grandel <jerico.dev@gmail.com>
STM32F107 has an Ethernet MAC but no PTP clock, so remove hard requirement
on PTP clock definition in preparation for STM32F107 Ethernet MAC support.
Signed-off-by: Pierre-Emmanuel Novac <piernov@piernov.org>
Add support for setting the target mode for a PMIC regulator. Some
regulators support multiple modes, each with distinctive voltage and
current configuration data. This function allows the consumer to switch
the PMIC into a new mode. The PMIC can then be configured to use a new
set of voltages.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Move I2C register reads to regulator_read_register in regulator driver,
to enable better abstraction of regulator I2C reads
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Refactor binding to use root PMIC IC, so that properties can be shared
between regulator devices. Each individual regulator output is still
created as an individual device, since the regulator API aligns with
these devices better than the PMIC IC itself.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The code was missing #include <zephyr/kernel.h> which
caused a compilation error. Missing header has been added.
Signed-off-by: Adrian Warecki <adrian.warecki@intel.com>
Propagate vendor specific events that are not handled by the SPI driver
up the host stack, so that `bt_hci_register_vnd_evt_cb` can work
correctly.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
For 32 bit processor to read the 64 bits hpet counter, the HPET spec
2.4.7 suggest to read HPET counter high and low then checking the
high bits to decide if it rollovers or not.
But this logic seems to cause problem for 64 bits processor under SMP,
there is a possible one tick earier under tickless mode. It is likely
to be the cache coherence issue, because a mfence instruction before
reading the timer works.
So we change to read the 64 bits counter by sys_read64 on 64bit
processor to prevent this issue.
Fixes#49611
Signed-off-by: Enjia Mai <enjia.mai@intel.com>
The `ARCH` init level was added to solve a specific problem, call init
code (SYS_INIT/devices) before `z_cstart` in the `intel_adsp` platform.
The documentation claims it runs before `z_cstart`, but this is only
true if the SoC/arch takes care of calling:
```c
z_sys_init_run_level(_SYS_INIT_LEVEL_ARCH);
```
Which is only true for `intel_adsp` nowadays. So in practice, we now
have a platform specific init level. This patch proposes to do things in
a slightly different way. First, level name is renamed to `EARLY`, to
emphasize it runs in the early stage of the boot process. Then, it is
handled by the Kernel (inside `z_cstart()` before calling
`arch_kernel_init()`). This means that any platform can now use this
level. For `intel_adsp`, there should be no changes, other than
`gcov_static_init()` will be called before (I assume this will allow to
obtain coverage for code called in EARLY?).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Previously, the build was failing due to implicit declaration
of `IRQ_CONNECT`. Simply include `<zephyr/irq.h>` to fix.
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
MTL is just one platform and this code is going to be used in multiple
platforms currently under development, so reduce the confusion and move
to a common namespace.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
File still not being removed due to out-of-tree usage. We will drop it
once the external code has stopped referencing it.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Convert timer driver to use a light weight syscon and DTS and convert
register information to use offsets and sys_read/sys_write instead of
structs.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Cleanup soc.h and move interrupt defines into own headers. Rename some
of the defines for ACE to have a unified namespace.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The DW register block was duplicated into the ACE header while we had
the same thing in the driver. Move everything to the driver as the first
step with further improvements planned on top of this.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
mcux HAL pollutes namespace with stuff like ARRAY_SIZE, MIN, MAX, etc.
Luckily it only defines them if not already defined, so we can play with
include order to "fix" the problem. Move the infamous soc.h (which
includes HAL) after other Zephyr includes.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Register definition header was missing, SoC common header as well (for
ite_intc_get_irq_num).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some headers made use of types defined in sys_clock.h (e.g. k_timeout_t)
without including it.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some files using time_units.h API did not include it, e.g. for
sys_clock_hw_cycles_per_sec.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some files were using arch interfaces (e.g. arch_curr_cpu) without
including necessary headers.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some SoCs define stuff in soc.h, used in drivers or SoC code. Note that
soc.h is not introduced here as a catch-all header. soc.h optimizations
or removal is out of the scope of this patch.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
With the incoming removal of kernel.h/types.h from init.h, lots of files
start to show compile errors because they relied on indirect
definitions, including errno.h.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The sys* ops like sys_clear_bit are indirectly included via arch CPU
header. Other stuff like find_msb_set end up included via this header as
well.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Previous commit removed pinmux from the platform but neglected to
remove the dependency in this Kconfig resulting in build failures
when target application configures GPIO support.
Fixes#51144
Signed-off-by: David Leach <david.leach@nxp.com>
This was all done as part of the soc and called from the soc. Define
this type of console under drivers/console and use it in the SoCs
supporting that via SYS_INIT instead of calling the console code
directly.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Fixes a compiler error in eth_xlnx_gem_stats() caused by the
automated replacement of device run-time data pointer accesses
by #41918. The device run-time data access in eth_xlnx_gem_stats()
was likely missed as this function is not usually compiled - its
existance depends on CONFIG_NET_STATISTICS_ETHERNET being set.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
If the flash is used in 4-byte addressing, reading SFDP will fail after
a system reset if the flash isn't power cycled or hardware reset, since
Zephyr will try to use 3-byte addressing while the flash (still) expects
4-byte addressing.
This commit adds the ability to send a reset command to the flash as part
of initialization, which complements the existing reset-gpio
functionality, and is useful on low-pincount flashes which do not have a
hardware reset.
Signed-off-by: Ole Morten Haaland <omh@icsys.no>
The build of this driver fails when `CONFIG_NO_OPTIMIZATIONS=y` is set:
error: expression in static assertion is not constant
98 | BUILD_ASSERT(steps > 0, "only positive number valid");
error: expression in static assertion is not constant
99 | BUILD_ASSERT(steps <= 2048, "overflow possible");
Fix this by using a simple macro to avoid the compiler from getting
confused.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Change reduces time consumed when a block needs to be erased.
The change was tested on a mimxrt1060_evk board.
Signed-off-by: Dipak Shetty <dipak.shetty@zeiss.com>
Add shell for interacting with regulator devices, to enable
users to test power management settings quickly and verify that their
regulator is functioning as expected. Also allows users to interact with
regulator PMIC devices
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The #48905 introduce a regression on gmac ethernet driver. The GMAC
driver matches two compatibles. This add missing compatible for SAM0
variant.
Fixes: #50970.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
Clean up and refactor x86 SoC headers in preparation of adding
new platforms in the future.
Signed-off-by: Anisetti Avinash Krishna <anisetti.avinash.krishna@intel.com>
add common mec_gpio.h to allow access to common gpio_regs
structure for both mec15xx and mec17xx, used in pinctrl driver
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
It is better to use 64-bit variable types for calculating the number
of elapsed ticks than 32-bit variable types. This guards against the
propagation of calculation errors should the lower 32-bits of the timer
counter roll over multiple times before the timer ISR is serviced.
(Such a scenario can easily occur when pausing the system for an
extended period of time with a debugging device such as a Lauterbach.)
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
Instead of using "select" on certain EC configurations, which is
considered unsafe for various reasons, use a "depends on" and rely on
the user to set a proper configuration in the config file.
Update the respective project configurations to comply with the new
configuration scheme.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Added support for the AMS AS621x series of temperature sensors as a
variant of the TI TMP108 temperature sensor.
Signed-off-by: Jared Baumann <jared.baumann8@t-mobile.com>
Signed-off-by: James Johnson <james.johnson672@t-mobile.com>
Host interface interrupts should be enabled explicitly via eSPI API
after the eSPI configuration and callbacks are set.
If we enable them during driver initialization and the host sends a eSPI
transaction before the eSPI configuration and callbacks are set, we may
encounter unexpected behavior.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Implements dynamic configuration for the atmet,sam-usart driver and
enables the new API calls if CONFIG_UART_USE_RUNTIME_CONFIGURE is set.
Signed-off-by: Nick Kraus <nick@nckraus.com>
Implements dynamic configuration for the atmet,sam-uart driver and
enables the new API calls if CONFIG_UART_USE_RUNTIME_CONFIGURE is set.
Signed-off-by: Nick Kraus <nick@nckraus.com>
This commit adds two new commands to flash shell tools: flash load and
flash page_info.
Signed-off-by: Franciszek Zdobylak <fzdobylak@internships.antmicro.com>
Some files still manage to get into the tree without the zephyr/ include
prefix (likely because they lack CI coverage).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use fifo address from device tree to create the device structs.
Also modify shim initialization as it was changed from array to
int. Fix cosmetic tab in device init macro.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Previously, the I2C bus would have an extended idle period on write
operations, and a spurious trailing byte on read operations (after a
final NACK).
This patch relocates the issuance of the stop condition from the driving
thread's context, into the ISR.
Thanks to @benediktibk for discovery and initial patch.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
espi_manage_callback() returns -EINVAL if it could not remove
callback. However if the list is empty success is returned when trying
to remove callback.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
gpio_manage_callback() returns -EINVAL if it could not remove
callback. However if the list is empty success is returned when trying
to remove callback.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
pwm_set_chan_level uses slice channels A(=0) or B(=1) and not Zephyr
channel (0..15). So PWM doesn't work for channels > 1. There is already
a function (pwm_rpi_channel_to_pico_channel) which does the right thing,
but it isn't used for pwm_set_chan_level.
Signed-off-by: Jan Hilsdorf <jan.hilsdorf@gmail.com>
Rename Z_DEVICE_DT_DEV_NAME to Z_DEVICE_DT_DEV_ID to make it more clear,
as the macro is generating a token that identifies the created struct
device.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Replace the hardcoded kPWM_Prescale_Divide_128
driver prescaler with the ones defined in the dtsi file
that allow overriding them by the user.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
Add a new Kconfig and build this code conditionally, so we do not end up
with this file being built for each zephyr app.
Partial fix for #50654
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit adds a driver to simulate GPIO state and interrupts
using the keyboard when using SDL.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Add 2 properties to configure the "any movement" event.
* Ability to disable the interrupt latch
* Select movement mode
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
It's useful for RAMABLE_REGION to have a uniform name when
CODE_DATA_RELOCATION is supported, because otherwise the build system
needs to be aware of how the region name differs between architectures.
Since architectures tend to prefer one of 'SRAM' or 'RAM' for that
region, prefer to use 'RAM' as the more general term.
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Some systems may need to query the available memory regions in runtime.
For those, this patch adds a simple API that memory management drivers
can implement to provide such discovery.
A small test also added to exercise the default, empty implementation.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
This will use DW_CFGH_DST instead of DW_CFGH_DST_PER
to correctly setup cfg_hi. This is critical for ALH transfer.
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
This will trigger link commit immediately after start
to fix hda start flow.
Applies to link out only.
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
For HDA link suspend is exactly the same as stop
but the same api is used also to control gpdma with unique suspend
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Zephyr encodes multi-level interrupts in a certain way, and
the driver is not utilizing the encoding correctly. So fix
it.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Input pins in ESP32 (34 to 39) have no pull-up / pull-down internally.
Current behavior is that gpio driver fails when "disabling it", which
should not happen. It need to fail only when enabling this feature.
Fixes#50615
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Remove modem_cmd_handler_tx_lock lock when CONFIG_GSM_MUX
is disabled, as modem_cmd_handler_tx_unlock is under the same
conditions.
Signed-off-by: GUITTER Pierrick <pguitter@silicom.fr>
Those Kconfig options are no longer used after ESP32 WiFi driver was
converted to Zephyr WiFi mgmt and the removal of platform specific
`samples/boards/esp32/wifi`.
Fixes: d524015f82 ("samples: boards: remove esp32 wifi sample code")
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Driver is not ready to handle NET_REQUEST_WIFI_CONNECT wifi_mgmt events
before ESP32_WIFI_EVENT_STA_START event is received. Revert back to setting
NET_IF_NO_AUTO_START flag for interface and call net_eth_carrier_on() after
ESP32_WIFI_EVENT_STA_START event is received. This makes it possible for an
application to wait for network interface to be ready, e.g. with:
while (!net_if_is_up(iface)) {
k_sleep(K_MSEC(100));
}
before making a connect request with:
net_mgmt(NET_REQUEST_WIFI_CONNECT, iface ...).
Fixes: 7d9edc8bf0 ("wifi: esp32: add support to wifi api mgmt")
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Abort any pending transmissions before entering configuration mode and
notify the senders.
Poll for mode change completion instead of assuming mode changes take
immediate effect. This is needed for successfully entering configuration
mode with recently aborted transmissions.
Fixes: #50545
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Abort any pending transmissions before entering freeze mode and notify the
senders.
Fixes: #50545
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Given the recent change to the CAN controller can_send() API wrapper,
assume that a callback is always provided at the driver level.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Given the recent change to the CAN controller can_send() API wrapper,
assume that a callback is always provided at the driver level.
This saves approximately 500 bytes of SRAM on the lpcxpressso55s16 board
when running in default configuration.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Given the recent change to the CAN controller can_send() API wrapper,
assume that a callback is always provided at the driver level.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Given the recent change to the CAN controller can_send() API wrapper,
assume that a callback is always provided at the driver level.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Given the recent change to the CAN controller can_send() API wrapper,
assume that a callback is always provided at the driver level.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Given the recent change to the CAN controller can_send() API wrapper,
assume that a callback is always provided at the driver level.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Given the recent change to the CAN controller can_send() API wrapper,
assume that a callback is always provided at the driver level.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Given the recent change to the CAN controller can_send() API wrapper,
assume that a callback is always provided at the driver level.
This saves approximately 500 bytes of SRAM on the frdm_k64f board, while on
the mimxrt1024_evk board the saving is approximately 2.5 kbytes of SRAM,
both when running in default configuration.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Provide a default, internal callback to CAN controller drivers
implementation of can_send() if no callback was provided by the caller.
This allows for simplifying the CAN driver implementations of can_send() as
these no longer need special handling for callback/no callback operation.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Set the synchronous clock mode to HCLK/1 (DIV1) or HCLK/2 (DIV2)
Both are valid common clock setting values.
The HCLK/1 (DIV1) is possible only if the ahb-prescaler = <1>
in the RCC_CFGR (see DTS).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
On power on reset, after disable advanced power safe mode,
you need to wait a delay before write again in the device.
The missing wait produce random initialization failure.
See §4.4 of the datasheet "bst-bmi270-ds000.pdf"
Signed-off-by: William MARTIN <william.martin@power-lan.com>
SAM V71 Xplained Ultra failed to re-enumerate on the bus after device
detach-attach sequence. The device was recognized by the host, but it
was not responding to control transfers, i.e. it was not acknowledging
SETUP data. Make device acknowledge SETUP data by reconfiguring EP0
when necessary.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
Device physically detaches when the DETACH bit is set. Fix the
assignment to actually set the bit instead of clearing it.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
If the thread that submits data over spi is interrupted by a higher
priority thread while pushing data to the tx fifo the hardware pushes
data to spi and frees up space in the fifo. In this case more than
8 Bytes are written to the tx fifo and bytes in the rx fifo get lost
before they are collected in the rx while loop.
To avoid this, the tx loop is exited after a maximum of 8 bytes and the
rx loop will run until it collected all bytes from the rx fifo.
Signed-off-by: Gerhard Jörges <joerges@metratec.com>
This Commit makes the adc configuration correct
for using the adc with 12b conversion on the stm32wl.
TriggerSource must be set to SW.
The ADC clock must be disabled by clock gating during CPU1 sleep/stop.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
1. To explicitly set the MSG_START flag on the first message.
2. Remove redundant declare.
3. Using data->msgs->flags is the correct address instead of
msgs->flags.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
The note refers to the wrong API, that has been replaced by a pinctrl
call, update the comment.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add code to handle parsing the gpio-reserved-ranges property present on
iMX GPIO controllers, so that gpio controllers with gaps in their pin
indexing can still have pinmux settings applied correctly.
Fixes#50142
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
A specific check is implemented lptim driver in order to ensure global
platform clock/tick configuration is in line with recommendations.
To respect portability principles, don't error out when a config
conflict is detected but generates a warning instead.
Also, since these are only recommendations, provide an option to override
the check. Besides automatically override when ZTEST is enabled, as some
kernel tests specifically configure tick freq to 100.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Remove pinmux calls and add pinctrl support for mec15xx
and mec1501 qmspi. Update board dts, pinmux and driver files.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Remove pinmux calls and add pinctrl support for mec15xx
and mec1501 adc. Update board dts, pinmux and driver files.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Remove pinmux calls and add pinctrl support for mec15xx
and mec1501 pwm. Update board dts, pinmux and driver files.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Remove pinmux calls and add pinctrl support for mec15xx
and mec1501 espi. Update board dts, pinmux and espi driver
files.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Introduce a function to do the matching job. Add the config for some
platforms to match the mpdir with aff0 only.
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
Some platforms only use aff0 to match mpdir and GICR.aff. Introduce
GIC_V3_RDIST_MATCHING_AFF0_ONLY to set the matching method only using
aff0. With this config enabled, the matching function will find the
target redistributor by comparing the aff0 only.
Signed-off-by: Jaxson Han <jaxson.han@arm.com>
Sometimes it is desired for the USB device to detach and reattach itself
to the host. USB device controller driver interface supports detach with
usb_dc_detach() function. Subsequently the device can be reattached to
the bus by calling usb_dc_attach().
USB device stack sets the control transfer callbacks in usb_enable().
Nordic usb_dc_detach() implementation inadvertedly overwrote registered
callbacks with zeroes by clearing endpoint configuration structure. This
lead to a NULL pointer dereference during enumeration after device has
reattached inself to the host.
Preserve the callbacks by removing the eps_ctx_uninit() function.
Endpoints runtime data is initialized in usb_dc_attach() so this should
pose no problems.
Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
The cast for the offset variable will make incorrect register
access when it is over 0x80. Change the char cast to unsigned
char to fix it.
Fixes#49803.
Signed-off-by: Enjia Mai <enjia.mai@intel.com>
The ADC of the stm32U5 should also waits for the ready Flag
before enabling the peripheral, then wait for the ready Flag
set.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The receive path for the Renesas R-Car CAN controller supports two RX
FIFOs, which are currently configured for standard 11-bit CAN ID data
frames in FIFO0, and extended 29-bit CAN ID data frames in FIFO1.
As this leaves no room for matching remote transmission request (RTR)
frames, have the driver return -ENOTSUP instead of silently accepting RTR
filters.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
In STM32U5 as well it is required to enable VDD before use.
Difference is that U5 enables this under PWR_SVMCR_IO2SV flag.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The usb_dc_sam0 driver is leaking memory when the usb device is detached
using usb_disable().
When a device is detached, the driver does not reliably deallocate the
descriptor bank memory. Therefore, upon the next attach and configure,
another block of memory is allocated. After several connect /
disconnect sequences, the usb interface becomes unresponsive.
This commit adds a static function to release all memory allocated
to the ep descriptors when usb_dc_detach() is called. Since detach is
called from usb_disable(), this releases the memory when the
interface is disabled.
Avoid calling k_free() if buffer pointer is already
set to NULL.
Fixes#49177
Signed-off-by: Steven Slupsky <sslupsky@gmail.com>
... so that the pin keeps the inactive state of the CSN line when it is
not controlled by the QSPI peripheral and the driver is not suspended.
Currently, the nrf_qspi_nor shim deinitializes the nrfx_qspi driver
after each operation, what leaves the pin uncontrolled until a new
operation is requested (and the nrfx_qspi driver is initialized again)
or the driver is suspended (and the pin is put into low-power state).
This can cause the flash chip to needlessly consume current when there
is no pull-up resistor on its CSN line and the line appears active.
Prevent this by keeping the pin in a defined (inactive) state.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This is a follow-up to commits 9974bb043f
and 00ecc66677.
Add one missing `#ifdef CONFIG_PINCTRL` and remove a no longer needed
one to restore the possibility to use this driver without PINCTRL.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Use the FSL_FEATURE_MCG_FFCLK_DIV define to decide if we should
call the api to get Fixed Frequency Clock.
This fixes Issue #49924
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Missing include to compile correctly when the
CONFIG_PM && IS_UART_WAKEUP_FROMSTOP_INSTANCE are defined
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add BUILD_ASSERT to check max val of ngpios. If someone sets ngpios to
more than 32, and acts on pin 32 or higher, memory corruption will
result. This is only a problem with the emulator, real hardware
will have limits that are probably much smaller.
Signed-off-by: Jeremy Bettis <jbettis@google.com>
The return values of esp_wifi_set_mode(), and esp_wifi_set_config() were
overwritten once esp_wifi_start() is executed.
This commit fixes that by ORing the return value to the others.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
PR #49550 missed adding proper RTCIO pin mapping
in a few rtcio functions calls, which causes board
to crash. This fixes it.
Closes#50238
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
With the move to start/stop functions the transceiver is not expected
to be enabled after driver initialization.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The USART or LPUART, especially on stm32wl, must set the EXTI
lines corresponding to the wakeUp source.
This LL_EXTI_LINE_xx is given by the Device Tree property.
This makes the system exiting lowpower stop mode on EXTI irq.
The LL_EXTI_LINE_x is exactly the bit(X) set.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Fix the issue that the initialization will fail when both
CONFIG_SPI_NOR_SFDP_RUNTIME and CONFIG_SPI_NOR_IDLE_IN_DPD are enabled.
The cause of this problem is simply calling the wrong function.
Fixes#33015
Signed-off-by: Xinyang Tan <xinyang.tan@delve.com>
Previously, the lora_send() function would have returned zero regardless
of any error encountered while waiting for the transmit to complete.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
Up until now, the Zephyr CAN controller drivers set a default bitrate (or
timing) specified via devicetree and start the CAN controller in their
respective driver initialization functions.
This is fine for CAN nodes using only one fixed bitrate, but if the bitrate
is set by the user (e.g. via a DIP-switch or other HMI which is very
common), the CAN driver will still initialise with the default
bitrate/timing at boot and use this until the application has determined
the requested bitrate/timing and set it using
can_set_bitrate()/can_set_timing().
During this period, the CAN node will potentially destroy valid CAN frames
on the CAN bus (which is using the soon-to-be-set-by-the-application
bitrate) by sending error frames. This causes interruptions to the ongoing
CAN bus traffic when a Zephyr-based CAN node connected to the bus is
(re-)booted.
Instead, require all configuration (setting bitrate, timing, or mode) to
take place when the CAN controller is stopped. This maps nicely to entering
"reset mode" (called "configuration mode" or "freeze mode" for some CAN
controller implementations) when stopping and exiting this mode when
starting the CAN controller.
Fixes: #45304
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This adds a very basic driver to utilize the I3C IP block
on MCUX (e.g. RT685). Note that, for now, this only supports
being the active controller on the bus.
Origin: NXP MCUXpresso SDK
License: BSD 3-Clause
URL: https://github.com/zephyrproject-rtos/hal_nxp
Commit: 2302a1e94f5bc00ce59db4e249b688ad2e959f58
Purpose: Enabling the I3C controller on RT685.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Adds support for a global workqueue so drivers can defer
IBI callbacks instead of doing it in interrupt context.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This introduces the I3C API for I3C controllers. Currently,
this supports one controller per bus under Zephyr.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Currently, the sdhc_card_busy function is unimplemented in the
SDHC SPI-driver. This causes some functions which rely on f_sync(),
such as fs_close(), to fail as it will timeout the busy-check. This PR
implements sdhc_card_busy by checking if the MISO-line is kept high to
check if the SD-card is idle (not busy).
Solves https://github.com/zephyrproject-rtos/zephyr/issues/49982
Signed-off-by: Ivan Herrera Olivares <ivan.herreraolivares@uantwerpen.be>
1. enable timer5 on dts
2. Replace all BTMR_Type with struct btmr_regs, to make it compatiable
on both mec 15 and 17
3. As MEC15 and MEC17 have different ways to access the register, use
"#if defined" to access counter_cfg->girq_id on different board.
Signed-off-by: Hu Zhenyu <zhenyu.hu@intel.com>
Ensure that the FIFO of each endpoint is initialized during endpoint
configuration, to prevent a NULL FIFO from being encountered during the
first call to usb_dc_ep_write() for a given endpoint.
Signed-off-by: Nick Kraus <nick@nckraus.com>
Add the flash channel support by implementing the controller attached
flash sharing APIs, including flash_read, flash_write, and flash_erase.
For flash_read, the max data payload the module can support is 64 bytes
in one transaction.
For flash_write, the max data payload the module can support is 16
bytes in one transaction.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
DT node "st,stm32f105-pll2-clock" already exists but was not actually used
and PLL2 was not being configured.
PLL2 is available on STM32F105/F107 and should be turned off after turning
off PLL and turned on before turning on PLL again since PLL2 can be
used as a source for PLL. Source for PLL2 is always HSE.
Signed-off-by: Pierre-Emmanuel Novac <piernov@piernov.org>
Fixes an issue with outgoing mcumgr frames that are larger than the
transport MTU size whereby they would wrongly be split up into multiple
frames with multiple start frame headers, which affected SMP over
console transports.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
Add support to at86rf212[b] sub-giga devices. This work enables use of
pages 0, 2 and 5 in accordance with IEEE-802.15.4/2003/2006/2011. The
proprietary speeds can be object of future work.
Note: It is recommended that user define a power table for better
performance, low emissions and to save power. A reference power table
can be found in the datasheet and should be used for tests only and
not on a final product.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
The current version of power table is hardcoded in the driver which is a
problem when use devices in production. This change remove all hardcode
from driver and reimplement the feature to allow people create a table
which is defined in devicetree. The big advantage is that each board can
define their own table based on lab tests and allows use of FEM devices
inclusive.
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
In old way, gic_rdists[cpu] is calculated via MPIDR_TO_CORE(), but in
real hardware, MPIDR_TO_CORE() isn't a value increment from 0 one by
one, and that will lead gic_rdists[cpu] to point to a wrong address.
GICv3 provides the register GICR_TYPER[1] and it has a field named
Affinity_Value. This field can help to determine where gic_rdists[cpu]
should point.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
1. Move the defines from usb_dc_mcux.h to usb_device_config.h
and fsl_os_abstraction.h. These headers are used by
the SDK USB driver. usb_dc_mcux.h header file is not longer
needed and hence deleted.
2. Delete the Zephyr implementation of the usb_device_struct
driver and use the one implemented inside the SDK USB
driver. This requires updating the references to
usb_device_struct inside the USB driver
3. Move defines and structures used by the driver
out of the header file that is included by the SDK and
into the MCUX USB driver.
4. Use end point defines provided by Zephyr instead of adding
them locally.
5. Add a Kconfig to set the thread stack size
6. Move code to enable interrupts back to usb_attach function.
Interrupts should be enabled after the init is successful,
else we see errors of the ISR getting called before the
init is complete causing Faults
6. Update west.yml to update the NXP HAL to get the updated
SDK USB driver.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
This commit introduces the 1-wire master driver for maxim ds2485.
The ds2485 master has nearly the same (1-wire) feature set and
i2c-interface as the ds2477.
Therefore the common parts are extracted, but to avoid
any nda troubles only the ds2485 specific part is included.
Compared to older 1-wire masters, the ds2485 supports higher level
commands, supporting multi byte operations, search next, automatic crc
calculation.
In this driver only basic read and write operations are supported,
further hardware features are not yet utilized by the driver.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
In some configurations, a udf instruction may be generated
when compiling code where static global variable lptim_clock_freq is
used as a divisor.
To avoid this, initialize variable on declaration so that compiler
could see that it can't be used uninitialized in this division.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update timer drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
* Enable hardware flow control on Kconfig
* Enable HSI48 clock on sdmmc_stm32 driver
Signed-off-by: Gerson Fernando Budke <gerson.budke@ossystems.com.br>
On some stm32 mcus, the LSE is enabled as system clock (LSESYS)
only when the LSEON and LSERDY are both set.
The bit LSESYSEN is set in the RCC BDCR register
and the driver is waiting for the LSESYSRDY to be set.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The baudrate register (BRR) of a stm32 USART cannot be lower than 16.
The baudrate register (BRR) of a stm32 LPUART cannot be lower than 0x300
and greater than 0xFFFFF.
Add assertion to check the range.
This could be the case when configuring a baudrate of 9600 on usart
clocked by LSE (32768Hz).
Signed-off-by: Francois Ramu <francois.ramu@st.com>
USBC port (Port 0/1/2/3) OCP (Over Current Protection) status
should be sent to PCH over eSPI VW index 0x50h. But there is
no dedicated VW register mapped to VW index 0x50h.
In this patch, configuring spare VW register SMVW06 to OCP VW
index 50h.
Signed-off-by: Diwakar C <diwakar.c@intel.com>
This driver provides an interface to SocketCAN interfaces of the Linux
system running a Zephyr application with the native_posix board. These
interfaces may be virtual or actual CAN buses.
Signed-off-by: Martin Jäger <martin@libre.solar>
An `ifdef CONFIG_SOC_SERIES_INTEL_ACE1X` currently always evaluates to
true, as `drivers/mm/mm_drv_intel_adsp_mtl_tlb.c` is only built when
`CONFIG_MM_DRV_INTEL_ADSP_MTL_TLB=y`, which depends on
`CONFIG_SOC_SERIES_INTEL_ACE1X`. So remove the ifdef.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Migrate information to DTS and get it from there on the code. Note that
for CAVS 15, the information is not migrated as there's no DTS entry for
it. It can be brought back (in the DTS) if TLB support is enabled for
it.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Instead of using SoC versions, define the information about base and
extended ports on Kconfig, and use this information from there.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Instead of using version of the SoC, declare on Kconfig the need for it,
and use this information to decide upon enabling the code or not.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
Update the GPIO-controlled CAN transceiver driver to use the
DT_HAS_CAN_TRANSCEIVER_GPIO_ENABLED Kconfig symbol to expose the driver and
enable it by default based on devicetree.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add emulator functionality to the serial_test driver, so that it can be
used to simulate a device on the other end of the uart.
If you don't set the buffer-size property in the dts node, there should
be effectively no change from the previous behavior.
Signed-off-by: Jeremy Bettis <jbettis@google.com>
Introducing the dma transfer (also through dmamux)
to transfer data to/from the NOR octo-flash
With a DMAMUX, the DMA channel is given by the DTS.
Note that STM32U5X does not support DMA here.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This supports three types GD32 FMC flash memory. GD32 FMC v1,
GD32 FMC v2 and GD32 FMC v3.
GD32 FMC v1 for small flash memory, flash size can be up to 512KB.
GD32 FMC v2 for large flash memory, flash size can be up to 3072KB.
GD32 FMC v3 not use page but sector as minimum block, flash size can
be up to 3072KB.
Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
According to i.MX RT1060 Reference Manual:
While the OR flag is set, no additional data is stored in the data
buffer even if sufficient room exists. To clear OR, write logic 1 to
the OR flag.
Clear OR (Overrun) flag whenever it is set, so that data continues to be
received after potential data overrun.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Add R-Car Gen3 PWM driver.
Clock diviser is automatically adjusted according to requested period
and duty-cycle in order to obtain as much accuracy as possible.
Indeed, in order to improve PWM accurancy, the PWM clock has to fit
the requested period. So use the given period_cycle to define if the
clock as to be adapted. In such case, increase/decrease the clock
diviser to adapt the period_cycle and be sure that it fits into the
10 bits counter of the PWM controller.
Tested on H3ULCB on pwm0 and pwm4.
Signed-off-by: Pierre Marzin <pierre.marzin@iot.bzh>
For some stm32 devices, the SDMMC clock selection is HSI 48MHz
by default (reset value). It must be enabled before acccessing
the peripheral.
The ErrorCode is reported when Init fails.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit is the adaptation of the stm32 SPI driver with DMA
transfer for the stm32u5 soc.
Use the DT_HAS_COMPAT_STATUS_OKAY(st_stm32h7_spi)
also valid for the stm32U5 serie.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This commit implements shell support for 1-Wire.
Commands for bus-reset, bit-, byte-, and block- communication,
as well as search and configuration are implemented.
- write_byte, and write_block perform a reset before,
in case the option "-r" is passed.
- using read_io_options() function to parse the reset option,
as this allows to easily add further options in the future.
- configuration type can be specified either as number or as name.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Introducing RaspberryPi Pico ADC driver.
This driver was created with reference to the adc_emul implementation.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
MCO1 is also available on STM32F1 series (on top of STM32F4), allow
selection of MCO1 source with CLOCK_STM32_MCO1_SRC_* Kconfig parameters.
Available MCO1 sources are slightly different between STM32F4
(LSE, HSE, HSI, PLLCLK) and STM32F103 (HSE, HSI, PLLCLK/2, SYSCLK), and
STM32F105/F107 have a few more (EXT_HSE, PLL2CLK, PLLI2SCLK, PLLI2SCLK/2).
MCO1 on STM32F1 does not have a configurable divider (unlike STM32F4),
HAL call only configures source.
STM32F1 do not have MCO2.
Signed-off-by: Pierre-Emmanuel Novac <piernov@piernov.org>
Use the clock control API to enable peripheral clocks. Note that both
GPIO and pinctrl drivers are updated at once since they share some IP
blocks.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Use the clock control API to turn on ADC clocks. Note that clock
selection is not yet implemented, so we still rely on custom rcu
properties for that.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This patch adds a clock control driver for GD32 platforms. It is
important to note that the driver is only able to handle peripheral
clocks, but not "system clocks" (e.g. PLL settings, SYS_CK, etc.). On
some similar platforms (STM32) this task is embedded in the same clock
driver, performed at init time but with no options to do any
manipulation at runtime via the API calls. The clock control API as-is
is really orthogonal to "system clocks", and it is arguably a bad idea
to embed system clock init code in a clock control driver. It can be
done at SoC level still using Devicetree as a source of hardware
description/initial configuration.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Ticker stop callback are executing in ULL_HIGH priority,
correct the value to 1U instead of 0U which is for LLL
execution context of the Bluetooth Controller.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Fix usage fault due to spurious ticker timeout expiry post
enqueuing of ticker stop operation.
Use ticker operation callback to handle completion of ticker
stop operation and then give the semaphore to thread to
notifying the completion of flash operation.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Due to Zephyr's WiFi updates, common private
enums used in `hal_espressif` are now being used.
This updates private internal values to meet hal_espressif
changes.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
ESP32 wifi connection uses Zephyr's net stack. Once WiFi connects
in station mode, is requires the application to handle DHCPv4
negotiation. This PR adds support to automatic negotiation by
handling the dhcpv4 calls in driver layer.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Moved all MBEDTLS dependencies from prj.conf
to Kconfig as WiFi depends on it.
Update esp32 wifi driver to enable `samples/net/wifi`
to work. Commands as such as `wifi connect` and `wifi scan` are now
available.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Remove the CAN_STM32FD_CLOCK_DIVISOR configuration option,
and add configuration via dts property clk-divider instead.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The configurable CAN clock divider CAN_STM32FD_CLOCK_DIVISOR
was not applied during initialization, because write protection
was not disabled.
While the clock divider was not applied, it was still used in clock rate
calculation, therefore resulting in incorrect bus speed setup.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Use domain clocks if they are defined in dts.
Until now domain clock sources could be selected via kconfig.
STM32 platform now can configure domain clock sources via
clock control driver, therefore this commit makes use of it.
The configuration is shared between canfd instances, so a domain clock
has to be defined for only one instance. Otherwise, only the
configuration from the latest initialized instance will remain.
The dependency on clock source PCLK1 for CAN_STM32FD_CLOCK_DIVISOR
was removed, because the divider also divides other clocks.
Note that setting that divider does not work at all at the moment,
because the write protection is not disabled.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
* reduced cyclomatic complexity
* group validation by family to make the validation easier to understand
and extend
* change preprocessor markup where possible to allow for complete code
elimination when features (esp. IP) are disabled
* renamed net_context_get/set_ip_proto() to net_context_get_proto()
While the latter is formally part of the public API and might therefore
have to be deprecated rather than renamed, it is considered internal API
by the net developers, see
https://github.com/zephyrproject-rtos/zephyr/pull/48751#discussion_r942402612
Signed-off-by: Florian Grandel <jerico.dev@gmail.com>
As of today <zephyr/zephyr.h> is 100% equivalent to <zephyr/kernel.h>.
This patch proposes to then include <zephyr/kernel.h> instead of
<zephyr/zephyr.h> since it is more clear that you are including the
Kernel APIs and (probably) nothing else. <zephyr/zephyr.h> sounds like a
catch-all header that may be confusing. Most applications need to
include a bunch of other things to compile, e.g. driver headers or
subsystem headers like BT, logging, etc.
The idea of a catch-all header in Zephyr is probably not feasible
anyway. Reason is that Zephyr is not a library, like it could be for
example `libpython`. Zephyr provides many utilities nowadays: a kernel,
drivers, subsystems, etc and things will likely grow. A catch-all header
would be massive, difficult to keep up-to-date. It is also likely that
an application will only build a small subset. Note that subsystem-level
headers may use a catch-all approach to make things easier, though.
NOTE: This patch is **NOT** removing the header, just removing its usage
in-tree. I'd advocate for its deprecation (add a #warning on it), but I
understand many people will have concerns.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In case SFDP table is provided via device tree, take care not reading
more than expected by the function caller as the result is written
in a structure which size is predefined by one specific byte in the
table, and could be smaller than the table size.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
soc.h has been removed for ARM64 SoC platforms and it is also needed by
ARM32, so remove it from related drivers.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
soc.h has been removed for ARM64 SoC platforms and it is also needed by
ARM32, so remove it from related drivers.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
soc.h has been removed for ARM64 SoC platforms and it is also needed by
ARM32, so remove it from related drivers.
Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
Changes to code:
1. Renamed CAVS_IPC API from common/include/cavs_ipc.h to
common/include/intel_adsp_ipc.h. Renamed all API functions and structs -
added "intel_adsp_" prefix.
2. Moved definitions from intel-ipc-regs.h and ace-ipc-regs.g to SOC
specific headers include/<soc_name>/adsp_ipc_regs.h.
3. Added new common intel_adsp_ipc_devtree.h header with new
macros to retrieve IPC and IDC nodes and register addresses.
Put those new macros in code replacing hardcoded values outside of
devicetree.
4. Changed documentation of IDC and renamed IDC register struct
to have common name between all intel adsp socs.
5. Removed excessive docs description on cAVS IPC protocol.
Changes to Devicetree:
1. Renamed in all CAVS boards .dtsi files content in IPC nodes:
- "cavs_host_ipc" node labels to "adsp_ipc" labels.
- compatible "intel,cavs-host-ipc" renamed to
"intel,adsp-host-ipc".
2. Added (previously missing) yaml file for "intel,adsp-host-ipc"
compatible.
3. Renamed in all CAVS boards .dtsi files content in IDC nodes:
- "idc" node labels to "adsp_idc" labels.
- compatible "intel,cavs-idc" renamed to "intel-adsp-idc"
4. Renamed intel,cavs_idc.yaml file to intel,adsp_idc.yaml
so it is suitable for both CAVS and ACE SoC family.
Moved it from ipm bindings to ipc bindings where it belongs.
Changes to Kconfig:
1. Renamed existing Kconfig option CONFIG_CAVS_IPC to
INTEL_ADSP_IPC.
2. For renamed INTEL_ADSP_IPC addded default value based on
status of the "adsp-ipc" and "adsp-ipc" node.
Signed-off-by: Andrey Borisovich <andrey.borisovich@intel.com>
Convert the device to be Devicetree based. Adjusted tests and other
areas that were using old Kconfig properties.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
config/data accessors have been removed from all (or most) in-tree
drivers, do the same here.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The "framebuf" driver was an incomplete driver expecting _clients_ to
implement missing functionality (i.e. init and device definition)
outside of the driver. This pattern of scattering driver code throughout
the tree is not common (if used at all). If certain drivers share
functionality, one can create a common module within the subsystem (see
e.g. ILI9XXX drivers).
The _generic_ framebuffer code was only used to implement the Intel
Multiboot framebuffer driver. This patch centralizes all the scattered
code in the subsystem and adjusts the driver name to "intel_multibootfb"
to make things clear. If there's ever another framebuffer driver that
shares code, it can be split into multiple modules.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
So far thread was created as part of usb_dc_attach() by k_thread_create().
This means that if following function were executed:
* usb_enable()
* usb_disable()
* usb_enable()
then k_thread_create() was called second time. This results in undefined
behavior.
Fix above issue by moving k_thread_create() invocation to function called
during system initialization.
While at it, move IRQ_CONNECT() and irq_enable() invocations to init as
well.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
So far thread was created as part of usb_dc_attach() by k_thread_create().
This means that if following function were executed:
* usb_enable()
* usb_disable()
* usb_enable()
then k_thread_create() was called second time. This results in undefined
behavior.
Fix above issue by moving k_thread_create() invocation to function called
during system initialization.
While at it, move IRQ_CONNECT() and irq_enable() invocations to init as
well.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
So far thread was created as part of usb_dc_attach() by k_thread_create().
This means that if following function were executed:
* usb_enable()
* usb_disable()
* usb_enable()
then k_thread_create() was called second time. This results in undefined
behavior.
Fix above issue by moving k_thread_create() invocation to function called
during system initialization.
While at it, move IRQ_CONNECT() and irq_enable() invocations to init as
well.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
On L0 series, LSI runs at 37KHz while LPTIM driver only supports speeds
up to 32768Hz (to avoid counter overflow). Consequence is a time running
faster than reality (x1.13)
Solution to this is the implementation of the LPTIM prescaler support.
While moving driver configuration from Kconfig to DT, this case was
not taken into account and the effect was LPTIM counter overflow which
consequence is worse than the slightly faster timer.
Reproduce the initial behavior with this piece of code that will be
removed once prescaler support is available.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
When using LPTIM as tick source, tick freq (SYS_CLOCK_TICKS_PER_SEC)
needs to be adapted to get a precise tick to LPTIM freq ratio.
This adaptation was done easily using Kconfig up to now (under
soc/st_stm32/common/Kconfig.defconfig.series).
Since driver is configured using device tree, this method should
be adapted. For the LSI case (default Kconfig case), rely on the
existing mecanism, which is also still used by OOT users.
For the LSE case, force the value manually in boards forlder.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following transition of lptim timer configuration from Kconfig to DT,
a warning message was set to inform users about this deprecation.
Due to errors in CI this message had to be removed while fixing the related
issues.
Now these issues are fixed, set the deprecation message again.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Similarly to other drivers, use auto generated DT_HAS_<COMPAT> Kconfig
symbol to control use of STM32 lptim driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Last HAL udpdates came with a fix on two ethernet flags:
- ETH_PTPTS*S*R_TSSARFE > ETH_PTPTS*C*R_TSSARFE
- ETH_PTPTS*S*R_TSSSR > ETH_PTPTS*C*R_TSSSR
Update driver to be aligned with these changes.
Fixes#49763
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Added code to enable platform specific Virtual Wire GPIOs. With this
change, able to send the USB-C overcurrent Virtual Wire event to
Meterolake SOC.
Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
The UC8176 doesn't automatically copy writes to the buffer containing
the old SRAM contents. In this case, we need to manually copy data to
the back buffer.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Some custom refresh profiles need to set the PLL and VDCS
registers. Add them as optional DT properties.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Add support for overriding display LUTs in the UC81xx driver. This
makes it possible to use different LUTs for the full and partial
refresh profiles.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Add a separate profile for partial refreshes. This makes it possible
to specify a separate refresh configuration for partial and full
refreshes.
The driver now transitions to full refresh mode when blanking is
turned on. It transitions back to partial refresh mode when there is a
write while blanking is off.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Introduce the concept of refresh profiles which are specified as a
child node in the device tree. This makes it possible to use different
overrides for different types of refreshes (full/partial).
The only profile that is currently supported is the "full" profile.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Some commands need to signal that the chip is busy using the busy
pin. We generally need to wait for the chip to exit the busy state
before issuing a new command. Call uc81xx_busy_wait() from
uc81xx_write_cmd() just before issuing a new command instead to avoid
sprinkling wait calls everywhere.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The UC81xx driver prints a debug message on every iteration of its
busy wait loop. This makes debug output almost useless. Modify this
code to print a debug message on entry and exit instead.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
west.yml: update hal_espressif to use latest v4.4.1 updates.
This change needs to be insync with esp32c3 timer changes, otherwise it
breaks it.
drivers: timer: update esp32c3 systimer to meet API changes.
Systimer API was refactored in hal v4.4.1, which
requires updates in esp32C3 systimer. Timer behavior is maintained
as is.
mcpwm: add v4.4.1 include reference, which was refactored as well.
driver: spi: esp32: update internal structs to meet API changes.
cmake: updated esp32 board to use HAL_ prefix as from west blobs
requirement.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Supplicant start call is part of esp_wifi_init, which
would become duplicated if kept in here.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Updates ESP32 to use hal interrupt funcions provided by 4.4.1
release. Removed redefinition of interrupt FLAGS.
This also includes interrupt definitions for ESP32C3
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add device specific clock initialization, which uses
reset reason cause information to proper define
peripherals clock state.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
NSEC_PER_MSEC should be defined along with the rest of the
per-sec macros in sys_clock.h. Currently, it's defined
multiply in a few separate locations.
Signed-off-by: Christopher Friedt <cfriedt@fb.com>
To reduce energy consumption for accel and gyro frequencies 52 Hz and
lower, disable high performance mode by default.
It doesn't affect for higher frequencies.
Signed-off-by: Adrian Wojak <adrian.wojak@grinn-global.com>
1. Use #ifdef around CONFIG_HTS221_TRIGGER instead of #if
2. According to binding (which is in line with datasheet), name of the pin
used for trigger mode should be drdy, not irq.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Internal channel should be torn after ADC read, this is
especially the case for VBAT, where the connection of internal
channel will introduce current drainage.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Add I2C driver for Andes atciic100. Driver supports I2C target mode and
tested on adp_xc7k_ae350 in runtime.
Signed-off-by: Wei-Tai Lee <wtlee@andestech.com>
Update dai drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update lora drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update intc drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update Wifi drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
Signed-off-by: Kumar Gala <galak@kernel.org>
This change applies the newly introduced consistent MTU definition to
all IEEE 802.15.4 radio drivers.
Signed-off-by: Florian Grandel <jerico.dev@gmail.com>
Adjust the names of the operating modes to match them
with the datasheet and INA230 pattern. While at it add
the missing INA237_OPER_MODE_TEMP_TRIG mode.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
This adds flash driver for Renesas SmartBond(tm) family.
This technically uses QSPI controller but since default and most
commonly used configuration is to boot from external QSPI flash (DA1469x
do not have built-in flash) and that flash is mapped into memory space,
it can be represented as internal flash.
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
This adds serial driver for Renesas SmartBond(tm) family. Both polling
and interrupt APIs are supported.
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
This adds GPIO driver for Renesas SmartBond(tm) family.
Driver supports pin configuration (input/output) and interrupts on edge.
Interrupts on level are not supported by hardware.
Signed-off-by: Andrzej Kaczmarek <andrzej.kaczmarek@codecoup.pl>
Signed-off-by: Ben Lauret <ben.lauret.wm@renesas.com>
The commit 4c20403629 updated the
`spi_psoc6_transceive` function signature but forgot to update its
usages.
This commit updates the `spi_psoc6_transceive` function invocations
to properly provide the callback and user data parameters.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit updates the SiFive SPI driver to reflect the
`spi_context_complete` and `spi_context_lock` function signature
changes introduced in the commit
4c20403629.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit updates the Microchip MSS QSPI SPI driver to reflect the
`spi_context_complete` and `spi_context_lock` function signature
changes introduced in the commit
4c20403629.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit updates the LiteSPI SPI driver to reflect the
`spi_context_complete` function signature change introduced in the
commit 4c20403629.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit updates the Gecko SPI driver to reflect the
`spi_context_complete` function signature change introduced in the
commit 4c20403629.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
This commit updates the GD32 SPI driver to reflect the
`spi_context_complete` and `spi_context_lock` function signature
changes introduced in the commit
4c20403629.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
prev_temperature was only used if USE_TEMP_SENSOR is true. Make its
definition conditional.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The temperature sensor was only needed when
CONFIG_CLOCK_CONTROL_NRF_CALIBRATION_MAX_SKIP > 0. Implementation did
not reflect this dependency correctly, and sensor sampling code was
always compiled. Also removed CONFIG_MULTITHREADING checks, since this
driver is only compiled if CONFIG_MULTITHREADING=y.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
This commit replaces API that became deprecated with the release
of nrfx2.9 - see CHANGELOG in zephyrproject-rtos:hal_nordic repository
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
Simplify driver by using DT_INST_FOREACH_CHILD_STATUS_OKAY_SEP (avoids
DT_DRV_INST and auxiliary macro).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Simplify driver by using DT_INST_FOREACH_CHILD_STATUS_OKAY_SEP (avoids
both DT_DRV_INST and auxiliary macro).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add I2C bus recovery support by emitting 9 SCL clock pulses.
It implements the equivalent logic of the i2c_unwedge function in the
ChromiumOS legacy-EC.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
hts221_trigger.c is pulled in by the CMakeLists.txt file when
CONFIG_HTS221_TRIGGER is defined. Therefore make the source in hts221.c use
the some define.
This removes also the (wrong) warning
<inf> HTS221: Cannot enable trigger without drdy-gpios
even when "drdy-gpios" is defined in the device-tree.
Signed-off-by: Holger Schurig <holgerschurig@gmail.com>
wifi drivers that depends on native ethernet stack cannot perform
wifi API calls missing availability. This changes adds the ethernet_api
interface in wifi_mgmt so that it becomes possible.
Naming "offload" in "struct net_wifi_mgmt_offload" is kept because
Zephyr still has no supplicant to handle a full non-offloaded driver.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add a new reset driver for GD32 platforms. This driver controls the
reset registers from the RCU peripheral. It can be used to restore
peripherals to their initial state when initializing a device.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Current implementation misses disabling input/output mux
once GPIO has already been configured. It means that after 1st
configuration, if GPIO is reconfigured, it won't disable previous
definitions, causing unexpected behavior.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Update DMA drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Adds a new spi_transcieve_cb API which enables asynchronous
SPI transactions with callback notification.
The exist spi_transcieve_async API remains and uses the new
spi_transcieve_cb API to provide a k_poll_signal notifier.
The driver API changes to provide a callback and userdata
parameter to async transcieve. All drivers in the tree
have been updated to the change.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
It was not possible to disconnect a pin using the nRF pinctrl driver.
That is, it was not possible to set PSEL to 0xFFFFFFFF (indicating pin
is not connected). This can be useful in certain scenarios, e.g. a
bootloader configures all signals of a certain peripheral but
application then needs to disconnect certain signals.
A new DT macro has been introduced to accomplish this:
NRF_PSEL_DISCONNECT. It can be used like this to explicitely disconnect
a peripheral signal:
```
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 1)>,
<NRF_PSEL_DISCONNECTED(UART_RX)>;
};
};
};
```
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use SHELL_CMD_ARG() for argument check and add help, looking like:
...
$ pcie -h
pcie - PCI(e) device information
Subcommands:
ls :List PCIE devices
Usage: ls [bus:device:function] [dump]
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
The command uses 1 optional parameter and this parameter can be at
maximum MAX_I2C_BYTES.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
When configuring the octo-flash in SPI/STR mode, the address size
must be on 24bits (and not on 32bits).
Despite the dev_data->address_width which is always seen as 4, the
erase command must reduce the AddressSize for this transfer mode.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Update I2S drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
This commit enables the SoC's flash memory controller.
- added lpc55s36 specific code in the NXP MCUX driver
to take advantage of the SoC's check-before-read
capability
- enabled the FMC node in the SoC's dtsi (iap)
- added the flash controller chosen node to the board's dts
Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
Add support for LPC54xxx IAP flash driver to soc_flash_lpc.c
Driver is tested on M4 core only, and is therefore disabled on the M0 core.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Use correct printf format specifier for LOG_DBG calls using offsets, as
these offsets are long int and thus require the %lx format specifier rather
than %x.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Update usb device drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Following 4806e1087e ,
the following warning appears for some boards (e.g. `qemu_cortex_a53`)
```
CMake Warning at /zephyr/CMakeLists.txt:798 (message):
No SOURCES given to Zephyr library: drivers__cache
Excluding target from build.
```
Allow this driver to have no sources.
Signed-off-by: Henri Xavier <datacomos@huawei.com>
Commit d556a0c8a6
("drivers: entropy: Add entropy driver for MCUX CAAM")
added a shim entropy driver whose initialization function
always returns 0, even when the underlying HAL API fails.
This is wrong; if the device initialization function fails, it must
return nonzero by contract. Papering this over with an assert is not
enough. Fix it by returning -ENODEV on error.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The sleep pin is optional and the driver checks for availability during
runtime. Currently the logic is inverted and therefore the driver exits
early if the pin is actually available. This pr fixes this behavior.
Also: Add `fallthrough` flags to switch/case
Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
This commit is converting the DMA kconfig for the stm32 dma driver
with new macro DT_HAS_<COMPAT>_ENABLED.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
It includes the definition for the DMA peripheral of this type,
present on stm32U5 devices.
A particular DMA_STM32U5 config is selected for that purpose.
The driver is derived from the existing dma_stm32.c
The GPDMA is counting channels (0-15) ; stream offset is 0.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Pull more function into ram code section to effectively improve
access speed and performance.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Adding I2C FIFO mode can reduce the time between each byte to
improve the I2C bus clock stretching during I2C transaction.
The I2C master supports two 32-bytes FIFOs, channel A and C
are supported now.
I2C FIFO mode of it8xxx2 can support I2C APIs including:
i2c_write(), i2c_read(), i2c_burst_read.
Test:
1. tests\drivers\i2c\i2c_api --> pass
2. Reading 16 bytes of data through i2c_burst_read() can reduce
0.52ms(2.4ms->1.88ms) compared to the original pio mode when the
frequency is 100KHz.
3. It is normal to read sensor data through I2C on Nereid's platform.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
When a cache API function is called from userspace, this results on
ARM64 in an OOPS (bad syscall error). This is due to at least two
different factors:
- the location of the cache handlers is preventing the linker to
actually find the handlers
- specifically for ARM64 and ARC some cache handling functions are not
implemented (when userspace is not used the compiler simply optimizes
out these calls)
Fix the problem by:
- moving the userspace cache handlers to a their logical and proper
location (in the drivers directory)
- adding the missing handlers for ARM64 and ARC
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
Change Summary:
- Updating GPIO_CFG_IRQ define to enable multiple interrupts to
accomodate for IP configuration where each pin when interrupted
can trigger CPU interrupt.
- Removing gpio_dw_unmask_int define as it is NO OP
Signed-off-by: Ravik Hasija <ravikh@fb.com>
Add missing support for the triggered mode using GPIO
interrupt alert pin. It uses mode detection at runtime
which allows working multiple sensors with different
modes simultaneously.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
I2C CQ mode cannot enter power policy during transfer.
test: tests\driver\i2c\i2c_api--> pass
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Many device pointers are initialized at compile and never changed. This
means that the device pointer can be constified (immutable).
Automated using:
```
perl -i -pe 's/const struct device \*(?!const)(.*)= DEVICE/const struct
device *const $1= DEVICE/g' **/*.c
```
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Change the error code for can_send() when the CAN controller is in bus off
state from -ENETDOWN to -ENETUNREACH.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This is a follow-up to commit fd07675574.
The above commit was supposed to introduce overriding of the S0S1
drive setting with S0D1 for TWI/TWIM peripherals, but since it did
not properly update the `nrf_pin_configure()` function (the `drive`
parameter was only added in the function signature, but then it was
not used...), the drive setting was in fact not overridden.
This commit corrects this embarrassing oversight.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The stm32U5 LL function name differs from stm32H7 serie but must
still be enabled in the PCSEL.
This is done with the LL_ADC_SetChannelPreselection function
until the LL changes its name.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The driver is writing the DTS nist-config to the RNG periph.
following the validation sequence described by the RefMan.
It depends on the he RNG IP version and is present on some
mcu devices : all with CONDRST bit.
Depends on the RNG CR Autoreset.
Takes the Health test control Register if property is given.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
For the stm32 mcu with a CONDRST bit in its RNG_CR
for conditioning Soft Reset, the driver must wait for
the bit to be 0 after disabling. This could take
about 2 AHB clock cycles + 2RNG clock cycles.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Recent change to constify struct devices pointers introduced a
compile warning in gpio_xlnx_ps driver. Update driver to fix a
case that got missed in the constification that fixes the warning.
Signed-off-by: Kumar Gala <galak@kernel.org>
Switch the Xilinx PS UART device driver over to the use of the
DEVICE_MMIO_... macros instead of just using the physical base
address from the device tree.
Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>
Toward deprecated DT_LABEL() macro, replace the handful of cases
that use DT_LABEL(node) with DT_PROP(node, label).
Signed-off-by: Kumar Gala <galak@kernel.org>
Dai index should be added to config as it can be queried by the
application like sof. Also check for dynamically allocated params
when returning the config.
Signed-off-by: Jaska Uimonen <jaska.uimonen@linux.intel.com>
Increase the default user-allocable number of RTC channels to meet
the nrf_802154 driver requirements.
Signed-off-by: Adam Zelik <adam.zelik@nordicsemi.no>
It is frequent to find variable definitions like this:
```c
static const struct device *dev = DEVICE_DT_GET(...)
```
That is, module level variables that are statically initialized with a
device reference. Such value is, in most cases, never changed meaning
the variable can also be declared as const (immutable). This patch
constifies all such cases.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Initialize UART pipe device at compile time, allowing to constify the
device pointer. Also fix device ready check (was checking for NULL, an
always true condition when using DEVICE_DT_GET).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Remove redundant definitions by defining at the top before variable is
used. Also constify device array.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Initialize the vtd device at compile time. Also removed unnecessary
macro hackery. As a result, vtd pointer can be constified.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Remove redundant declarations by definining and initializing before
variables are used.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Initialize timer devices at compile time. This allows to constify the
array of timer devices.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
A few drivers could initialize chosen UART at compile time, allowing to
constify device pointer.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The UART device can be initialized at compile time, allowing to constify
the device pointer. Also fix return value to -ENODEV if device is not
ready.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Rename the can_state enumerations to contain the word STATE to make their
meaning more clear:
- CAN_ERROR_ACTIVE => CAN_STATE_ERROR_ACTIVE
- CAN_ERROR_WARNING => CAN_STATE_ERROR_WARNING
- CAN_ERROR_PASSIVE => CAN_STATE_ERROR_PASSIVE
- CAN_BUS_OFF => CAN_STATE_BUS_OFF
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Expand the error return values reported by the CAN timing calculation
functions to be able to distinguish between an an out of range
bitrate/sample point, an unsupported bitrate, and a resulting sample point
outside the guard limit.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Move the check for the maximum allowed CAN bitrate to the corresponding
can_calc_timing()/can_calc_timing_data() function.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This is a follow-up to commit e1c0a494b3.
The `tca954x_transfer()` function cannot call `i2c_transfer_dt()`,
because the I2C device address used in the transaction must be the one
passed as the `addr` parameter, not the address of the TCA954xA switch
itself. Hence, this commit restores the call to `i2c_transfer()`.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Previous versions were using, incorrectly, the host in/out regblock size
of 40 bytes for all peripherals when in fact the link in/out regblock size
is 20 bytes in size.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Fix a call that writes Register 29 - Accelerometer Configuration 2.
Due to an obvious copy-paste mistake in the code, this register was
written with a DLPF setting from devicetree intended for gyroscope,
not for accelerometer (and the latter was effectively ignored).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Move gpio_cmsdk_ahb.h out of drivers/gpio and into include/drivers/gpio.
This is used by few board files so it should be in include.
This allows to remove few odd
"zephyr_library_include_directories(${ZEPHYR_BASE}/drivers)".
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
There's no actual pinmux subsystem driver for v2m_beetle, and
CONFIG_PINMUX is only used as a proxy to build pinmux.c.
Drop the config and change the file to be built unconditionally (same as
mps2_an521 and mps2_an385.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
According to the BME680 datasheet, only the spi_mem_page bit can be
changed in its 8-bit register. Therefore we shouldn't just write 0s
to the remaining bits, but update the register content in read-modify-write
fashion instead.
Rework the bme680_set_mem_page(), bme680_init() and register-access
macros.
Signed-off-by: Jan Kuliga <jtkuliga@gmail.com>
Add support for reading the VFOCV register, which contains the model
estimated open circuit voltage for the cell.
Link: https://pdfserv.maximintegrated.com/en/an/AN6358.pdf
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
ASSERT was failing when `r8a7795_cpg_mssr_start_stop` was
called for a "core" clock.
This ASSERT statement and "mstpcr" table of registers are
only meant to be used when starting or stopping a "module" clock.
Moved ASSERT statement to `rcar_cpg_mstp_clock_endisable`
as well as "reg" & "bit" calculation.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Add argument dump for dumping first 16 PCI configuration space
registers same way lspci -x is doing. Also parse bdf string as
argument. pcie can be called following way:
uart:~$ pcie 0:1f.4
...
uart:~$ pcie 0:1f.4 dump
...
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Rename the SocketCAN header from socket_can.h to socketcan.h to better
match the naming of the functionality.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename the NXP FlexCAN driver internal functions and macros to not use
"zcan", "zframe", and "zfilter" to avoid confusion after "struct can_frame"
and "struct can_filter" renaming.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename the mcp2515 driver internal functions to not use "zcan" to avoid
confusion after "struct can_frame" renaming.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Remove the "z" prefix from the public CAN controller API types as this
makes them appear as internal APIs.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add fundamental feature support for PL022 SPI peripheral.
This commit implements synchronous transfer with 8bit-MSB format.
Optional functions are not currently implemented yet.
- interrupt based transfer is not implemented yet.
- DMA transfer is not implemented yet.
- Slave mode is not implemented yet.
- Currently support only 8-bit data transfer.
Hardware limitation:
- LSB-first format is not supported by hardware.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Remove flash driver dependency on CONFIG_HAS_MCUX_IAP for determining
if the SOC uses an NXP IAP flash controller, and instead use the
devicetree compatible to determine this.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This change reverts a portion of a prior change that results
in an uninitialized eswifi_spi_data struct to be passed to
the `is_spi_ready` function.
See commit 48c87f2bf8
Signed-off-by: Brian Dunlay <brian.dunlay@gmail.com>
gpio_utils.h header relied on other files including its dependencies.
This patch adds all necessary includes to make it self-contained.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The binding 'nxp,lpc-iap' is no longer used, which is confirmed
by running:
$ find ${ZEPHYR_BASE}/dts/arm/nxp -type f | egrep -e '\.dts(i)*$' | \
xargs grep -nH nxp,lpc-iap
Changes in this commit:
- remove DT_HAS_NXP_LPC... in drivers/flash/Kconfig.mcux
- remove schema file for nxp,lpc-iap
Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
The lpc and mcux drivers' DRV_COMPAT is updated for the new bindings
introduced in the previous commit. The drivers' Kconfig files also
reflect this change (DT_HAS_ENABLED_NXP_...).
The SoC device trees are updated with the new bindings
Signed-off-by: Yves Vandervennet <yves.vandervennet@nxp.com>
Add support for setting sync-word and iq-inverted in lora_modem_config. By
being able to set the sync-word it's possible to send "raw" public-network
packets using lora_send and using iq-inverted both uplink and downlink
messages can be sent.
Signed-off-by: Tim Cooijmans <timcooijmans@gmail.com>
Fixes a bus fault observed in samples/boards/reel_board/mesh_badge
caused by dereferencing an uninitialized device pointer in the apds9960
sensor driver. The device pointer needs to be initialized regardless of
how CONFIG_APDS9960_TRIGGER is configured.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
The SSD16xx driver currently hard-codes a couple of register overrides
that aren't relevant or even correct for many devices. Make them
optional device tree properties instead.
Note that this changes the behavior for panels that expect
SSD16XX_CMD_DUMMY_LINE and SSD16XX_CMD_GATE_LINE_WIDTH to be set by
the driver. This fixes a bug where the incorrect value
was written to all SSD16xx panels except for GDEH0213B1 and GDEH029A1.
The overlay files for devices that need dummy line and gate line width
to be specified have been updated as a part of this commit.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The OTP in most SSD16xx-based displays normally contain default
VCOM/GDV/SDV values. Make all of these optional in the device tree.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Many register writes only use 8 bits of data. A common pattern in the
driver is to assign a constant to a temporary variable and write that
to the device. Simplify this pattern by adding a helper function that
writes an uint8 to a device.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Device activation always follows the same sequence, we first write the
SSD16XX_CMD_UPDATE_CTRL_2 register followed by
SSD16XX_CMD_MASTER_ACTIVATION. Create a helper function that performs
both of these actions.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
This changes the return value of uart_mux_send() to return
how many bytes sent instead of simply zero for any bytes sent.
This would make it consistent with other UART send commands where
they return number of bytes sent.
Fixes#48470
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Add the option to specify the minimum duration that the `reset-gpios`
pin is held low on boot. This lets devices with additional capacitance
on the reset line still reboot the Bluetooth controller.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
* Utilize DT_HAS_<COMPAT>_ENABLED for devicetree based drivers
* Move to using 'select SPI' instead of 'depends on'
(see commit df81fef944 for
more details)
Signed-off-by: Kumar Gala <galak@kernel.org>
This fixes underrun issues when hardware flow control can't be used.
Only tested on STM32F4.
Signed-off-by: John Kjellberg <kjellberg.john@gmail.com>
...
DMA controller ownership can be done in the driver
initialization, it does not need to be part of the SoC. It simplify
the code and remove duplicated definitions.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Use 'select SERIAL', as a serial driver is supported by practically
all boards, and avoids using extra overlays in samples and tests.
The pattern of using select was introduced for SENSORS in df81fef944,
and the only 1-wire I2C sensor was converted in 465b7615a9.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
* Utilize DT_HAS_<COMPAT>_ENABLED for devicetree based drivers
* Move to using 'select I2C'/'select I2S' instead of 'depends on'
(see commit df81fef944 for
more details)
Signed-off-by: Kumar Gala <galak@kernel.org>
The hwinfo_mcux_syscon driver isn't relavant for LPC51U68 SoC
series. Add a Kconfig exclusion so the driver isn't available
on LPC51U68 SoC.
Signed-off-by: Navin Sankar Velliangiri <navin@linumiz.com>
It appears that some in tree boards still enable lptim w/o configured
domain clocks.
Remove this deprecation message the time a clean up is done fully.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
LL_USART_EnableInStopMode may not be available on some series.
Since PM is not enabled on those series and might never be, use a
shortcut for this case.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The adxl372 device does not select the correct bus that it is on, which
causes undefined operation (usually a fault). This driver should not be
using Kconfig to determine which bus to use, that should be done by
dts, however this works as a quick fix in the interim until the driver
can be fixed properly.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
mdm_hl7800_log_filter_set uses LOG_MODULE_NAME which
is undefined.
log_source_id_get() will fail to get the correct source id.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
All the of the ITE it8xxx2 devicetree compatiables are of the form
ite,it8xxx2-<DEV>. However the PECI device was ite,peci-it8xxx2,
rename the compatiable to match the pattern used everywhere else.
Signed-off-by: Kumar Gala <galak@kernel.org>
Remove the Kconfig option for configuring the maximum value of the CAN-FD
Data Length Code in order to ensure standard compliance.
Allowing users to configure the max DLC allows the user to save a number of
bytes per CAN frame in RAM, but it also renders the Zephyr CAN-FD
implementation non-compliant with the CAN-FD standard.
There are no guarantees that a Zephyr CAN-FD node will not receive a CAN
frame with a DLC higher than the Kconfig limit, which opens up for all
sorts of bugs when trying to handle received CAN-FD frames.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The stm32F1x serie does not provide the pin_get_config function,
Even if the CONFIG_GPIO_GET_CONFIG is set, the -ENOSYS error code
is returned by the z_impl_gpio_pin_get_config().
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Define a pin structure to carry the pin configuration elements
such as push/pull, opendrain, input/output, high/low.
This structure will give the gpio_flags_t to the gpio_stm32_get_config.
Only the stm32F1x serie does not provide the pin config get function.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
In the stm32 gpio driver, the gpio_stm32_get_config function
also returns the pin state HIGH or LOW) to match gpio_pin_get_config
This is valid with CONFIG_GPIO_GET_CONFIG.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Do simple conversion of driver to have driver enabled by devicetree
in Kconfig and struct device created based on basic devicetree
data.
Signed-off-by: Kumar Gala <galak@kernel.org>
* Utilize DT_HAS_<COMPAT>_ENABLED for devicetree based drivers
* Move to using 'select SPI' instead of 'depends on'
(see commit df81fef944 for
more details)
Signed-off-by: Kumar Gala <galak@kernel.org>
There are several test cases that create fake ethernet devices and
expect the fake device to be the only ethernet device enabled. Some
tests handle this be explicitly disabling actual ethernet drivers,
but this doesn't scale well.
Change drivers/ethernet/Kconfig to utilze a menuconfig option that
wraps all the drivers. This allows us for those test cases that
don't want any actual ethernet drivers to disable them with a
simple CONFIG_ETH_DRIVER=n.
Note, the fake ethernet devices utilize CONFIG_ETH_INIT_PRIORITY so
we have it outside of the 'if ETH_DRIVER' block.
Signed-off-by: Kumar Gala <galak@kernel.org>
When dealing with pm action 'suspend', driver applies device pinctrl sleep
state.
Using PM_DEVICE modes should allow to save more current consumption, and
applying pinctrl sleep state is one of the gains, but sleep state not being
available on a device is not a sufficient reason to block PM transition
to lower power mode.
If this pin state is not provided for the device, warn but don't block
pm transition. This will save some time to users setting up this feature
for the first time. Warning will give the opportunity to users to fine
tune their setup in a later step.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Instead of relying on Kconfig, use dt inputs to configure LPTIM domain
clck (LSI/lSE).
Clock control dedicated APIs are used for configuration and get the
frequency of domain clock in use.
Constants macros used previously to store frequency and time base are
converted to static global variables.
Some code was set up specifically to keep compatibility with targets
that still use Kconfig to configure domain clock. This will be removed
after a deprecation period.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Continue conversion of LPTIM driver to device tree based configuration.
Get clock configuration from device tree and use clock_control API for
bus clock configuration
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Start converting LPTIM driver to device tree based configuration and
support of other instances.
First: get base address and IRQ using dt instance
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
i2c_transfer_async is the asynchronous version of i2c_transfer where
the completion of the transfer is notified to the caller using a callback.
This can be used in conjuction with the common callbacks and datatypes
in async.h for directly doing an async transfer with an IPC object
to notify a thread.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
* Utilize DT_HAS_<COMPAT>_ENABLED for devicetree based drivers
* Move to using select I2C' instead of 'depends on'
(see commit df81fef944 for
more details)
Signed-off-by: Kumar Gala <galak@kernel.org>
STM32h7 pllout frequency calculation overflows. In the
worst case pllsrc_freq can be 50Mhz and plln_mul 512 which will cause
an overflow of the intermediate result which leads to wrong frequency
returned. As no intermediate result can be bigger than 960MHz only the
order of operations is changed.
Signed-off-by: Benjamin Bigler <benjamin.bigler@securiton.ch>
The current atmel sam flash driver was develop based on the cortex-m7
version of smart arm microcontroller. The driver support write
protection and cache functions which is not supported by other cortex-m
variants. This fixes current driver implementation and devicetree
entries for all sam variants.
Notes:
* The cortex-m3 doesn't have support erase pages flash command and
because of that the driver still not not compatible. Keep it disabled
until a patch be send. The hwinfo driver is not affected by this
restriction.
* The sam4l variation requires a specific driver because uses another
flash controller (flashcalw). Added another compatible to
differentiate and keeped node disabled until a driver be available.
Fixes#48516
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
cleaned up some code in 3 mcux entropy drivers,
removing unnecessary void casts and function declarations
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
This is a bug fix. A pointer to the spi configuration is not saved when
the spi driver is configured for slave operation and it can lead to
runtime errors.
Signed-off-by: Bryce Wilkins <bryce.wilkins@gmail.com>
Sensor value unit is [m/s^2].
Currently calcs as [g/1000] unit.
Correcting calculation to convert [m/s^2].
Store the integer part to val1, and the fractional part to val2.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@fujitsu.com>
Header file generation from device tree was failing in pulling mode.
Restrict the interrupt node usage to interrupt mode only.
Signed-off-by: Romain Mahoux <romain@mahoux.fr>
The regulator voltage should be set before the clocks are enabled.
This is especially the case when the MSIS at 48MHz is selected as
SYSCLK.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
IRQ7 is placed on the second element of interrupt definition.
Select it by DT_INST_IRQ_BY_IDX() explicitly.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Enable Zephyr device runtime power management mechanisms in Intel SSP
driver. This allows Zephyr to track usage reference for power
domain gating.
Signed-off-by: Krzysztof Frydryk <krzysztofx.frydryk@intel.com>
* Utilize DT_HAS_<COMPAT>_ENABLED for devicetree based drivers
* Move to using select I2C' instead of 'depends on'
(see commit df81fef944 for
more details)
Signed-off-by: Kumar Gala <galak@kernel.org>
Now that entropy drivers are enabled based on devicetree
we need to remove any cases of them getting enabled by
Kconfig.defconfig* files as this can lead to errors.
Signed-off-by: Kumar Gala <galak@kernel.org>
Fixes command configuration to have samples/drivers/spi_flash
passed on stm32l562 and stm32u585 disco kits.
In OctoSPI STR/DTR and SPI/STR modes
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The waiting of the flag ARROK could be quite long (100µs-200µs in my
test). During this time, the interrupts are locked that is not
recommended. To avoid this, we manage the update of the autoreload value
in interruption
Signed-off-by: Julien D'Ascenzio <julien.dascenzio@paratronic.fr>
In order to work on a clock speed higher than 20 MHz, IO MUX is required.
Co-authored-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
Signed-off-by: XiNGRZ Chan <hi@xingrz.me>
HCI message sending in this hci driver as these actions require hci_host
to be available and could be performed by the remote host if required.
Explicit this dependency using CONFIG_BT_HCI_HOST.
This is is required to be able to compile BT_HCI_RAW mode.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The def command Indicates that a comment block contains documentation
for a #define macro. This is useful if the comment block documents a
macro not adjacent to it, e.g.
```c
/**
* @def MAX(x,y)
* @brief Computes the maximum of @a x and @a y.
*/
#ifdef XXX
#define MAX(x,y) ...
#endif
```
However, it is not necessary if the comment is adjacent to the
definition, e.g.
```c
/**
* @brief Computes the maximum of @a x and @a y.
*/
#define MAX(x,y) ...
```
This patch removes all unnecessary def entries in-tree.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Remove code that clears spurious interrupt flags, as this step is
not required.
Performance change (as tested with iperf on RT1050)
TCP RX: 50.8Mbps->50.6Mbps
TCP TX: 46.2Mbps->49.5Mbps
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
remove the TX thread, as this thread can become starved and unable to
reclaim TX buffers from the hardware. Instead reclaim buffers in ISR.
Change eth_tx function to first take from the tx_buf_sem, so that multiple
TX buffer descriptors can be used effectively.
Performance change (as tested with iperf on RT1050)
TCP RX: 44.6Mbps->48.6Mbps
TCP TX: 38.1Mbps->40.7Mbps
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Move dma buffers and buffer descriptors to DTCM, to improve hardware
and software access speed during network TX/RX
Performance change (as tested with iperf on RT1050)
TCP RX: 40.6Mbps->44.6Mbps
TCP TX: 36.8Mbps->38.1Mbps
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Do not force network buffers into noncacheable memory, as these buffers
are internal to the driver and not used by the hardware.
Performance change (as tested with iperf on RT1050):
TCP RX: 23.7Mbps->40.6Mbps
TCP TX: 22.3Mbps->36.8Mbps
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The I2C bus lock did not previously enclose the referencing of the
transfers to conduct. If two attempts are made to use the bus at a
similar time, then one set of messages may have been transferred twice.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
Have the display enabled in devicetree will now get the driver
enabled by default when CONFIG_DISPLAY=y is set. So we can remove
setting driver enabling Kconfig values in various .conf and
defconfig files.
Signed-off-by: Kumar Gala <galak@kernel.org>
* Utilize DT_HAS_<COMPAT>_ENABLED for devicetree based drivers
* Move to using 'select SPI' instead of 'depends on'
(see commit df81fef944 for
more details)
Signed-off-by: Kumar Gala <galak@kernel.org>
Add a missing `PINCTRL_STM32` dependency
for `PINCTRL_STM32_REMAP_INIT_PRIORITY` option to use
that option only when STM32 pinctrl driver is being used.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
In the continuation of the previous commit, replace _OPT_ by _DOMAIN_
in macros relating to this feature.
hen, adapt drivers and tests to this new wording.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The I2C shell would filter the list of devices it knows about to
ones that have a device name that starts with "I2C_". It was the
case that the majority of I2C bus controller devices happened
to be named with the "I2C_" prefix, however there is no guarantee
that is the case. With the remove of label properties from the
devicetree this is even more true.
For now remove the prefix filter and just return the full list
of devices.
Signed-off-by: Kumar Gala <galak@kernel.org>
This change in pattern is meant to address a misconfiguration issue
that can occur for sensors that support being on multiple busses
like I2C & SPI.
For example, you can have a configuration in which such a sensor is
on the I2C bus in the devicetree and the sensor is enabled. However
the application configuration enables CONFIG_SPI=y and CONFIG_I2C=n
and this will cause the sensor driver to be built by default, however
since we don't have the I2C bus enabled the driver will not compile
correctly.
Previously we had been adding to board Kconfig.defconfig something
like:
config I2C
default y if SENSOR
This pattern doesn't scale well and may differ from what an application
specific need/use is.
So instead move to a pattern in which we leave the default enablement
up to the devicetree "status" property for the sensor. We then have
the Kconfig move from 'depends on <BUS>' to 'select <BUS>' and in
the case of drivers that support multiple busses we have the Kconfig
be: 'select <BUS> if $(dt_compat_on_bus,$(<DT_COMPAT>),<BUS>) for
each bus type the sensor supports.
This removes the need to add Kconfig logic to each board and enables
the bus subsystem and bus controller driver if the sensor requires
it by default in the build system.
Fixes: #48518
Signed-off-by: Kumar Gala <galak@kernel.org>
When the uart is configured in non interrupt mode, then the mmio address
should be provided via DEVICE_MMIO_ROM_INIT.
Signed-off-by: Ayan Kumar Halder <ayankuma@amd.com>
Building for native_posix_64 exposes faulty format strings.
Changes in this commit also ensure that the shell code gets built in CI,
thus this kind of problem can not be introduced again later on.
Signed-off-by: Reto Schneider <reto.schneider@husqvarnagroup.com>
Adds optional device tree property to specify a default character
to clock out when the TX buffer pointer is NULL. If the property is
not set the existing behavior (default char of 0x00) is used.
I verified the expected behavior using an i.MX RT685 board and
logic analyzer that the def-char character is transmitted when
TX buffer pointer is NULL.
Signed-off-by: Bryce Wilkins <bryce.wilkins@gmail.com>
This commit fixes the incomplete assert conditions for the `chan`
argument passed to the nRF RTC timer functions.
Note that the `chan` argument for this driver is of a **signed**
integer type, so it is necessary to check that its value is
non-negative.
This fixes the warnings generated by the GCC 12 such as:
error: array subscript -1 is below array bounds of '...'
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Activating both, the IEEE 802.15.4 raw mode /and/ the L2 mode is not
possible and in fact leads to a build error.
It should therefore not be possible to activate both options at the same
time. This is achieved by only offering the (rather exotic) raw mode
once the L2-support for the IEEE 802.15.4 has been switched off.
Fixes: #48715
Signed-off-by: Florian Grandel <jerico.dev@gmail.com>
Previous to this change, each individual driver option depended on
NETWORKING. Instead, move dependency one level up.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Make all drivers default to 'y' and dependent on being enabled in DT.
This will allow simplifying many samples/tests.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some counter devices depend on buses (e.g. I2C for Maxim DS3231). Bus
devices are tipically initialized with KERNEL_INIT_PRIORITY_DEVICE as
well, so there's no guarantee counter will be initialized be initialized
before without manually tweaking priorities.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Let's switch to the LOG_DBG for +CREG, +CESQ and +CSQ
AT commands responses because they flood the console so much.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
Updates build references of the Counter API
implementation based on Espressif's General
Purpose Timers to differentiate from the one
based on RTC.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
This PR fixes the instances indexing in the driver's
initialization macros.
The use of DT_INST macros along with other node identifiers
was preventing the driver from initialize correctly in some
cases.
The driver requires the signal mux number value. Hence the need
to use the SoC's peripheral number information and DT_NODELABEL
macro for node id.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
Patches the driver such that if the iface errors after init, the
driver will enter FSM error state.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Compare these variables properly so that the condition in an if
statement will be boolean.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Update gsm_ppp.c
For Arm Cortex-family processors that only support single
sercurity state, (GICD_CTRL.ARE is set to '1'), so need to
set SPI's affinity for the PE which it is enabled.
Signed-off-by: Dat Nguyen Duy <dat.nguyenduy@nxp.com>
Use Devicetree to describe the UART UPIPE IEEE 802.15.4 driver. This
allows to remove usage of IEEE802154_UPIPE_DRV_NAME in preparation for
the removal of NET_CONFIG_IEEE802154_DEV_NAME.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use Devicetree to describe the radio and IEEE 802.15.4. This allows to
remove usage of IEEE802154_NRF5_DRV_NAME in preparation for the
removal of NET_CONFIG_IEEE802154_DEV_NAME.
All SoC files have been updated with the addition of an ieee802154 node
(disabled and only on those SoCs that define ieee802154-supported. The
peripheral has been enabled in the nRF52840DK board (used for testing
ieee802154).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use Devicetree to describe the radio and IEEE 802.15.4. This allows to
remove usage of IEEE802154_KW41Z_DRV_NAME in preparation for the removal
of NET_CONFIG_IEEE802154_DEV_NAME.
KW41Z files have been updated with the addition of radio and an
ieee802154 nodes The peripheral has been enabled in the frdm_k41z board
(used for testing ieee802154).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The crypto driver is used internally, so there's no real need to expose
its name as a Kconfig option. Just drop it in favor of a plain string
with the same previous value.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use Devicetree to describe the radio and IEEE 802.15.4. This allows to
remove usage of IEEE802154_CC13XX_CC26XX_SUBG_DRV_NAME in preparation
for the removal of NET_CONFIG_IEEE802154_DEV_NAME.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use Devicetree to describe the radio and IEEE 802.15.4. This allows to
remove usage of IEEE802154_CC13XX_CC26XX_DRV_NAME in preparation for the
removal of NET_CONFIG_IEEE802154_DEV_NAME. All boards used in testing
have been updated to enable the peripheral in DT as well.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use Devicetree to describe the radio and IEEE 802.15.4. This allows to
remove usage of IEEE802154_CC1200_DRV_NAME in preparation for the removal
of NET_CONFIG_IEEE802154_DEV_NAME.
In this case, the driver already had bindings, however, it was still
using NET_DEVICE_INIT.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
According to the reference manual, the ADC should not be
converting when setting the common path, we disable the adc
directly in this driver for the sake of simplicity.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Remove unnecessary VREFINT path connection during the init.
Internal paths should be setup before reading the channel.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Move the `adc_stm32_setup_channels` function to `start_read`
so that we can guarantee that the internel path is connecte
before reading.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Use Devicetree to describe secure timer0 instead of hardcoding values in
<soc.h>.
DT files have been structured to match the following requirements: In
case of sectimer0 - it's should be only enabled for:
- emsdp_em7d_esp.dts
- em_starterkit_em7d.dts
- nsim_sem_mpu_stack_guard.dts
- nsim_sem.dts
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This PR fixes up a race condition which could cause GPIO writes to be
dropped when one thread was toggling a gpio on a port, and a different
thread was also modifying a (different) gpio on the same port.
Signed-off-by: Nickolas Lapp <nickolaslapp@gmail.com>
I2C has its own set of device define macro wrappers to provide
automatic stats tracking when enabled for the device class. This
particular driver happened ot be missed in the transition.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
The previous driver implementation aimed to maximize the amount of
filters, which resulted in a fairly complex implementation.
Background: The bxCAN assigns a number to the filters in the order they
appear in the filter banks. This number is used to match messages in
the FIFO with their filter. If the scale or mode of a filter bank is
changed, all following filter numbers get an offset and the assigned
callbacks have to be shifted accordingly.
The required additional space for the shifting operations resulted in
non-deterministic behaviour and the maximum number of filters could not
be determined at compile-time, which made several tests like
tests/drivers/can/api fail.
This implementation uses a more simple but reliable approach for
filtering and and reserves fixed space for extended and standard ID
filters in the available banks (configurable via Kconfig).
The list mode is not used, which may reduce the total number of usable
filters depending on the application.
The maximum amount of filters is 14 if all filters use ext. IDs,
28 if all use std IDs and something in between if mixed IDs are used.
Also see issue #47986 for more detailed background information.
Signed-off-by: Martin Jäger <martin@libre.solar>
Namespace local functions, enums, structs and defines with stm32/STM32
to distinguish them from global CAN API.
Also rename some internal conversion functions to make their meaning
more clear and delete unused defines.
Signed-off-by: Martin Jäger <martin@libre.solar>
This fixes an issue where the unique device identifier is incorrectly
copied from an address on the AHB bus to memory using memcpy.
I verified corrected behavior by comparing `hwinfo devid` command
output to memory view of the SoC using the debugger.
Signed-off-by: Bryce Wilkins <bryce.wilkins@gmail.com>
Add the "zephyr/" prefix to various #include statements that are
preventing the CI form running with LEGACY_INCLUDE_PATH=n.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
With addition of DAI_TRIGGER_COPY, the trigger callback may
be called at a very high rate.
Reduce the logging level from INF to DBG for the logs in
dai_ssp_trigger().
Signed-off-by: Kai Vehmanen <kai.vehmanen@linux.intel.com>
Zephyr kernel is dependent on trace.
Trace is dependent on segger rtt.
Segger rtt MUST NOT be dependent on zephyr kernel.
Move lock functions from header into c file to avoid circular
dependency. This fix needs an update of the segger repository.
Fixes#43887.
Signed-off-by: Christoph Coenen <ccoenen@baumer.com>
Introduce a simple binding for atmel,24mac402 EEPROM that the SAM
GMAC ethernet driver can utilize to get MAC address out of. We
introduce a 'mac-eeprom' phandle into GMAC ethernet devicetree
node that will provide a pointer to the MAC eeprom to utilize.
Signed-off-by: Kumar Gala <galak@kernel.org>
Add explicit selection of the BT_HAS_HCI_VS for
the BT_RPMSG HCI driver. When the HCI over RPMSG
is used this dependency will not be solved automatically.
It is required to handle correctly Bluetooth identity
initialization.
Signed-off-by: Kamil Gawor <Kamil.Gawor@nordicsemi.no>
This platform does not use RISC-V machine timer, however, the interrupt
controller had references to its IRQ. Remove them.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Obtain machine timer addresses and IRQ from Devicetree. Note that driver
supports multiple compatibles because mtime/mtimecmp registers are
implemented in different ways depending on the vendor. That means
Devicetree representations can be slightly different and so code to
collect the information needs to treat each compatible differently.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The unit for SENSOR_CHAN_GAUGE_TIME_TO_EMPTY and
SENSOR_CHAN_GAUGE_TIME_TO_FULL are defined in
zephyr/drivers/sensor.h as being in minutes.
Change the max17055 implementation to match the API spec, fix the
annotation for time register units.
Link: https://datasheets.maximintegrated.com/en/ds/MAX17055.pdf
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Add workaround for development kits on which interface chip (segger chip)
is dropping bytes when they are sent in bursts. Issue has been seen on
DK which have multiple virtual com ports on the USB.
A workaround is adding periodic busy waits to introduce gaps in the
transmission.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Soft resetting a STM32 device currently does not reset the USB
connection, which causes a few problems: The endpoints do not respond
anymore, and within zephyr any kind of status information like
CDC_SET_CONTROL_LINE_STATE is also missing as they are not
re-negotiated.
This is fixed by stopping the USB device from zephyr side, right after
initialising the USB device.
Signed-off-by: David Jablonski <dayjaby@gmail.com>
This commit fixes an issue introduced in 5ee9392 where FlexSPI
pinctrl states where applied based on the SoC type.
However multiple FlexSPI instances can be active, some of which
are not pre-configured from ROM.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
The HAS_I2C_DW was to limit Kconfig visibility to only platforms
that utilize the I2C DW IP. The Kconfig for I2C_DW depends on
DT_HAS_SNPS_DESIGNWARE_I2C_ENABLED which will cause the same
visbility limitation to only platforms that have I2C DW devicetree
nodes. Thus we can remove HAS_I2C_DW and its references.
Signed-off-by: Kumar Gala <galak@kernel.org>
This adds a driver for Maxims DS2484 Single-Channel 1-Wire master
driver. The DS2484 features an extra pin to enable sleep modes which
is available if the pin is configured in the device tree.
Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
Add ESP32 TWAI CAN controller driver. The TWAI is register-compatible with
the NXP SJA1000 CAN controller.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Update flash drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
MSIS frequency at boot time can be different from the one we intent to
set from device tree configuration.
In order to avoid issues, read MSIS configuration from registers to get
the actual freq rather than the devicetree one which may be not yet
configured (which is the case at startup).
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
When configuring PLL, we should first make sure we're not running on PLL,
and if running on PLL, first switch to a fixed clock before proceeding
with PLL configuration.
Current code is doing the switch systematically which is not useful as
default startup case is to use MSI as sysclk source.
So add a test before doing this switch.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Unlike stated in 57df225b396e43358aac4cc998ed2e99fdb57780, RM0456.pdf
reference manual mentions about PLL1R that "Only division by 1 and even
division factors are allowed."
Though, in reference manual, there is one issue on PLL1R values
description, which should actually be:
0000000: pll1_r_ck = vco1_ck
0000001: pll1_r_ck = vco1_ck / 2 (default after reset)
0000010: Not allowed
0000011: pll1_r_ck = vco1_ck / 4
...
This description will be fixed.
Reflect this in binding and driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update w1 drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update dac drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Martin Jäger <martin@libre.solar>
This PR adds a KConfig option that allows moving
all .noinit content related to wifi a net stack into external
ram. This free dram space to application.
Linker script files are also modified so that the content
are mapped into external ram.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Update i2c drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
This power down bit of eSPI module is loacted in the bit 7 of PWDWN_CTL6
register rather than the bit 4. This commit fixs the incorrect setting.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
This is a follow-up to commit 63d6cfd654.
Use a bit mask to store information about channels that need to be
driven by the PWM peripheral instead of inspecting the `seq_values`
array each time.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
As we phase out label properties from devicetree the devicetree
node may not have a label so utilize DEVICE_DT_NAME instead
which will use a label if it exists and the node name if not.
Signed-off-by: Kumar Gala <galak@kernel.org>
AST10x0 series SOCs provide the clock controller through the syscon
hardware block. The current driver supports the clock gating capability
for the hardware IPs embedded in the SOC. Each clock source has a
clock ID that can simply map to a bit in syscon registers CLK_STOP_CTRL0
(group 0) or CLK_STOP_CTRL1 (group 1). There are some clock sources
that don't have associated clock gating control, which are always on,
are grouped to into group 2.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
This is a follow-up to commit 63d6cfd654.
Revert unwanted PWM_NRFX_CH_POLARITY_MASK to PWM_NRFX_CH_COMPARE_MASK
replacement that was accidentally done in the above commit.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
With the introduction of the OSPI NOR flash controller
the stm32H7 serie requires the HAL MDMA in anycase.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add the ssd16xx_read_ram() function that can be used to read the raw
contents of the two display RAM in the controller. This function is
similar to display_read(), but lets the caller specify the RAM to
operate on. The intention is that this can be used to read out the
contents of the old frame buffer after a partial refresh that
automatically swaps the black/red buffers.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Read operations only work on SPI controllers that support half
duplex. To enable read operations, set the device mode to half duplex
by adding the following to the device's DTB node:
duplex = <SPI_HALF_DUPLEX>;
If read requests will fail with -ENOTSUP if the device isn't in half
duplex mode.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The UC8179 supports automatic power management where the DC-DC is
enabled automatically. This is not supported on the UC8176. Explicitly
call PON/DRF/POF from uc81xx_update_display instead. This ensures that
the DC-DC is only enabled while actually updating the display for all
supported chips.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The CDI register in UC8176 and UC8179 have different layouts. Add a
helper function to the quirks structure to handle CDI updates.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The UC8176 and UC8179 chips that exist in tree have subtly different
register layouts. Use separate compatible strings for these chips and
a quirks structure that describe device-specific behavior.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The GD7965 driver is really just a vendor name for the UltraChip
UC8179. Rename the driver to UC81xx since there are other chips in the
family (e.g., the UC8176) with an almost identical register interface.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Some Series were calculating the pll output frequency from an
clock source index instead of the clock source frequency.
This commit resolves this issue for l0, l1.
get_pllout_frequency() is only used for PLLCLK, therefore remove it.
F2, F4, and F7 have several pll dividers and might decide to implement
these as clock sources won't need PLLCLK.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Update clock_control drivers to use DT_HAS_<compat>_ENABLED Kconfig
symbol to expose the driver and enable it by default based on
devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
The KW40Z/KW41Z don't have a Fixed Freq MCG clock so the code
associated with that in get_rate fails to build. ifdef around
the code with enum kCLOCK_McgFixedFreqClk so things work
correctly.
Signed-off-by: Kumar Gala <galak@kernel.org>
The ESP32 clock control for ESP32C3 was unified into a single
driver a while back. However the files associated with the
ESP32C3 didn't get removed than. Remove them now.
Signed-off-by: Kumar Gala <galak@kernel.org>
MISRA C:2012 Rule 14.4 (The controlling expression of an if statement
and the controlling expression of an iteration-statement shall have
essentially Boolean type.)
Use `do { ... } while (false)' instead of `do { ... } while (0)'.
Use comparisons with zero instead of implicitly testing integers.
The commit is a subset of the original auditable-branch commit:
5d02614e34a86b549c7707d3d9f0984bc3a5f22a
Signed-off-by: Simon Hein <SHein@baumer.com>
For the !SOC_I2C_SUPPORT_HW_CLR_BUS in which we implement bus
reset via GPIOs, change the devicetree properties to be actual
gpio properties and update the code to reflect this.
Signed-off-by: Kumar Gala <galak@kernel.org>
This commits refactors implementation of the pwm_set_cycles function
to fix the following issues:
- when a channel was already set with a non-zero pulse width, setting
cycles for another one required specifying a matching period value,
even if that value was to be ignored anyway when the channel was to
be set to constant inactive or active level; due to this limitation,
it was not possible to e.g. use the LED driver API and turn off a LED
while another one (within the same PWM instance) was blinking
- the above limitation also applied when a channel was set with a pulse
width equal to period (duty 100%); even though such channel was not
in fact using the PWM peripheral, other channels within the same PWM
instance were forced to use the same period
- after a PWM generation was started for a channel, it was not possible
to change its pulse width before two PWM periods passed (while it
should be possible to change it after every period); this was caused
by a looping mechanism that was unnecessarily activated in the PWM
peripheral
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
In update the Kconfig to depend on devicetree, the SAM4L
driver was missing a 'default y'.
Also remove unnecessary 'depends on GPIO'.
Signed-off-by: Kumar Gala <galak@kernel.org>
This commit adds required code to setup pll2 and pll3 as defined
in dts. Also these plls can now be used as alternate clock sources.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit changes the range for stm32u5 pll divider values
to allow divider value of 1.
- DIVQ is allowed to beconfigured 1 for all PLL instances
- DIVR can be 1 for PLL2 and PLL3, but is not valid for PLl1.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit controls the stream busy flag of the dma channnel
Set as true : stream is busy each time the channel is
started or reloaded.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
When the channel is overriden by the HAL,
the dma irq must always be handled (even if not busy).
Only when the dma channel is not overriden by the HAL
the irq is exiting when the channel is no more busy.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Intel ADSP CAVS is now a proper series with all CAVS SoCs running under
it. This will give us to Intel ADSP series:
- CAVS
- ACE v1.x
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The uart_pipe_isr() double-checks whether rx interrupt occured by
calling uart_irq_is_pending() first. Get rid of that function call since
it is redundant (i.e. nothing more is done or checked inside that
conditional).
Signed-off-by: Jan Kuliga <jtkuliga@gmail.com>
The VREFINT and TEMPSENSOR internal channels have a stabilization time
after they are enabled. Right now this just causes the first measure to
be a bit off, however with PR #47691 which stops the internal channels
after each readout, this is something important to respect. Fortunately
the stabilization time is available as constants in the HAL, so just
wait the time specified by the constants.
Note that the VBAT internal channel does not have any stabilization
time.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Replace Kconfig (IVSHMEM_DEV_NAME) based named device_get_binding
with DEVICE_DT_GET_ONE. Since there is only one driver for ivshmem
use the qemu,ivshmem for that.
Signed-off-by: Kumar Gala <galak@kernel.org>
The LPUART driver activates the "noise" error interrupt but
neglects to clear the error bit when the interrupt occurs. This
causes the device to freeze. Clear the "noise" status to avoid
the lockup and track instances of this as a UART_ERROR_PARITY.
fixes#47568
Signed-off-by: David Leach <david.leach@nxp.com>
This split the repeated START condition to STOP + START conditions.
The old implement may cause undefined behavior for gd32 i2c, like
enter STOP condition accidentally.
Signed-off-by: HaiLong Yang <hailong.yang@brainco.cn>
Update memc drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update pinctrl drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Inside gpio_nrfx_pin_interrupt_configure, the "ch" variable is allocated
inside the "if", but then it gets dereferenced and the pointer saved in
trigger_config, which is used in the outer context.
This works fine right now, but that memory location could possibly be
reused by another automatic variable if the code gets changed.
Moving it in the function context to avoid any potential problem.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
Update entropy drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update counter drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update spi drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update gpio drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
The regulator-pmic node is a child of the I2C device. When this
was converted to i2c_dt_spec that was missed.
Also fixed a few minor formatting issues.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update watchdog drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update serial drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update adc drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update pwm drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
This CL configures low-voltage (1.8V) detection via GPIO driver with
GPIO_VOLTAGE_1P8 flag. It also adds support for this flag in
pin_get_config() function.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Cleanup npcx low-voltage (1.8V) detection configuration. It removes
unused soc utilities, macros, and DT node. We will configure this
feature by GPIO driver with GPIO_VOLTAGE_1P8 flag later.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Update sensor drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
Signed-off-by: Kumar Gala <galak@kernel.org>
Declare clock control in the shim header per SoC and remove ifdeffry
from the driver simplifiying it and making it ready for the next
platform.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
using once single header to support multiple socs and product
generations is error prone and not easily maintained.
Over time we have been adding conditional code in headers and extending
structs to support new HW features which becomes a problem.
Goal is to keep platform headers in sync with hardware specification and
allow of introduction of new platforms and hardware features by just
introducing a new SoC with its own set of headers.
This is now just a copy of existing cavs-shim.h with slight changes,
goal is to clean this up long term and sync with hardware datasheets and
align on naming as well.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The driver has be DT_INST based for a while so the Kconfig
symbols CONFIG_UART_PL011_PORT0<n> aren't used. So lets
remove them.
Signed-off-by: Kumar Gala <galak@kernel.org>
The driver has be DT_INST based for a while so the Kconfig
symbols CONFIG_UART_RV32M1_LPUART_<n> aren't used. So lets
remove them.
Signed-off-by: Kumar Gala <galak@kernel.org>
Update EEPROM drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Update CAN drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol to expose
the driver and enable it by default based on devicetree.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
This patch fix issue with unmapping of virtual addresses mapped
to non-existing physical memory. MTL TLB table is initialised with
1:1 mapping, however virtual space is much wider than available
physical space. We should not try to free and manage of power for
non-existing physical pages.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Update serial drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
We remove 'depend on' Kconfig for symbols that would be implied by
the devicetree node existing.
Signed-off-by: Kumar Gala <galak@kernel.org>
If TCP server closed notification is received it
could interrupt the TCP socket RX or TX data sequence.
Remove the SOCK_SERVER_CLOSED state and instead
use a unique error code to know if the socket
has been closed by the server.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Correct issue where transmission complete interrupt was not disabled when
using interrupt driven serial API with power management enabled,
resulting in continuous spurious interrupts that effectively locked
the system.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
If the transaction of write or read is divided into two transfers
(not two messages), the command queue mode does not support.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Rework the <BUS>_emul_register calls to not pass the name param. The
name param is only used for logging and we can get it from the
struct <BUS>_emul instead.
Signed-off-by: Kumar Gala <galak@kernel.org>
Having a per-instance init function makes code cluttered and hard to
read. Just create a per-instance IRQ connect function (required to
resolve IRQ_CONNECT parameters at compile time).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Stop using NRFX_SPI(S|M)_INSTANCE helper so that peripheral address from
Devicetree is used. We should not rely on HAL for hardware description
but Devicetree.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Move the RX (MISO) delaying capability information to Devicetree. It is
done using 2 properties:
- rx-delay-supported: enabled on SPI nodes that support delaying RX.
This property can be used by the driver to determine if this
capability is supported or not on a given instance.
- rx-delay: the actual RX delay value
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The maximum transfer buffer length is SoC specific, not instance
specific. This patch defines MAX_BUF_LEN at driver level in a SoC
specific manner instead of using HAL values that are instance specific
but that always take the same value depending on the SoC.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The maximum transfer chunk length is SoC specific, not instance
specific. This patch defines MAX_CHUNK_LEN at driver level in a SoC
specific manner instead of using HAL values that are instance specific
but that always take the same value depending on the SoC.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Specify the overrun character in Devicetree. Since 0xFF is the most
common value, DT property contains such default.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Devicetree is the natural place to describe hardware, so move the
maximum frequency the SPI can work with to Devicetree instead of relying
on values from HAL.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
There are a few registers that map nicely onto structs. Switch from
using index constants and byte arrays in those cases.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Some panels using this driver don't provide tcon/cdi/pwr/softstart
values in their reference code. It is normally expected that the right
values will be loaded from OTP in such cases. Make these values
optional to support such panels.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The GD7965 driver uses malloc to allocate a single line buffer when
clearing the display. This buffer is used to clear the display line by
line. This as two problems. First, it means that the driver introduces
an unnecessary requirement to support heap allocations. Second, it
causes a lot of weird and unnecessary SPI transactions that look like
partial updates without the actual refresh. This is very inefficient
since the same action can be performed in a single SPI transaction.
Add a gd7965_write_cmd_pattern() helper function that writes a pattern
of a specified length to a register in the device.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The protocol used by the GD7965 driver requires that SPI transactions
are split into two phases, a command phase and a data phase, to change
the state of a GPIO signaling commands/data.
We currently don't lock the bus which means that other drivers could
potentially take over the bus and introduce unpredictable delays
between the command and data phase.
Add the necessary locking.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
DT nodes aren't guaranteed to define a label property. But emulated bus
controllers currently make use of this property to dispatch to the
associated emulator.
Have emulated bus controllers use DEVICE_DT_GET(node_id) to dispatch to
right target peripheral emulator. This also change makes emul_get_binding
and device_get_binding synonymous in behavior with respect to their
parameters.
This also strictly enforces a 1:1 correspondence between invocations of
DEVICE_DT_DEFINE and EMUL_DEFINE.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
In several locations of the emulator code there are unused function
arguments that were never caught.
Declare these as unused or remove the unused function parameters entirely.
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Allow emulator creators to write an init function that can be used
across multiple busses so as to reduce the boilerplate and cognitive
load in creating an emulator.
Part of this change includes allowing access to the emul struct from a
field in a {bus}_struct api (e.g. i2c_struct), which removes the need for
sporadic usages of CONTAINER_OF to access the emul struct.
Overall, this change simplifies and reduces the amount of boilerplate
code to get a device emulator up and running, thus reducing excise work
to writing tests.
TEST=twister on accel,espi, and eeprom drivers tests
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Run clang-format on all files touched by improved emulator API pull-request
that allowed access to the target device emulator from its bus api without
CONTAINER_OF usage.
drivers/i2c/i2c_emul.c
drivers/spi/spi_emul.c
include/zephyr/drivers/emul.h
include/zephyr/drivers/espi_emul.h
include/zephyr/drivers/i2c_emul.h
include/zephyr/drivers/spi_emul.h
subsys/emul/emul.c
subsys/emul/emul_bmi160.c
subsys/emul/espi/emul_espi_host.c
subsys/emul/i2c/emul_atmel_at24.c
TEST=twister on accel,espi, and eeprom drivers tests
Signed-off-by: Aaron Massey <aaronmassey@google.com>
Update video drivers to use DT_HAS_<compat>_ENABLED Kconfig symbol
to expose the driver and enable it by default based on devicetree.
Signed-off-by: Kumar Gala <galak@kernel.org>
Fix building this sample on bl5340_dvk_cpuapp_ns and
pinnacle_100_dvk. On these boards the NORDIC_QSPI_NOR
driver needs to be enabled for the sample to build.
Signed-off-by: Kumar Gala <galak@kernel.org>
The twim_config structure is no longer modified at runtime, so it can be
placed in driver's config (const).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
TWIM peripheral needs to be disabled for bus recovery, otherwise SCL/SDA
lines will not be released. This patch makes sure to disable peripheral
if active, and, restore its state afterwards (including pin
configuration).
It is worth to note that a better solution would be to:
1. Define scl/sda pins as `-gpios` in DT
2. Use GPIO API in the driver to perform recovery (as some other drivers
do)
3. Potentially use a "gpio" pinctrl state for this case
Unfortunately HAL is doing everything under the hood, so we have little
options to improve this unless we don't use it for such case. GPIO based
recovery should likely be generalized as many drivers seem to replicate
such _algorithm_.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Enable device runtime PM on the I2C driver. Note that this mechanism
replaces the old nrfx_twim_enable/disable calls with
pm_device_runtime_get/put, which means that driver will not save power
unless CONFIG_PM_DEVICE_RUNTIME=y.
Some quick measurements on thingy_52 running the samples/sensor/hts221
show a decrease of ~2-3uA in average when enabling device runtime PM.
Note that the driver already had implicit PM before, so the change for
users will be ~none, except that they now must enable the PM subsystem
features. While this case is not the best example, the PM subsystem will
turn to be beneficial as a whole when all devices in the board implement
it.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The device definition macro defined per-device init function, resulting
in a cluttered and hard to extend init function. Create a per-instance
IRQ connect function instead, which is called at init time by a common
function.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The driver already implemented some sort of runtime PM by
unconditionally calling nrfx_twim_disable/enable. Perform the same
operations in the PM callback instead of doing a full init/deinit every
time.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The driver re-initialized itself on the twim_transfer call if it wasn't.
This condition was likely added because of some manual/custom PM
schemes. Drop it in preparation for runtime PM.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
nrfx HAL does not support updating frequency at runtime, which means we
need to do a full init/deinit to update it when it is a matter of a
simple register write. Fix this by using the lower level HAL.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Move driver to use {NET_}DEVICE_DT_INST_DEFINE. This lets us
remove the IEEE802154_CC2520_DRV_NAME Kconfig symobl.
We also update the ieee802154 build_all test to actually enable
the CC2520 driver.
Signed-off-by: Kumar Gala <galak@kernel.org>
Move driver to use {NET_}DEVICE_DT_INST_DEFINE. This lets us
remove the IEEE802154_B91_DRV_NAME Kconfig symobl.
Signed-off-by: Kumar Gala <galak@kernel.org>
Any project with Kconfig option CONFIG_LEGACY_INCLUDE_PATH set to n
couldn't be built because some files were missing zephyr/ prefix in
includes
Re-run the migrate_includes.py script to fix all legacy include paths
Signed-off-by: Tomislav Milkovic <milkovic@byte-lab.com>
A LOG_DBG already exists for the underflow check,
and given that reading 0 edges is a valid case, remove
the noisy underflow log.
Signed-off-by: Andrew McRae <amcrae@google.com>
Check the frame ID type and RTR bit when comparing loopback CAN frames
against installed RX filters.
Fixes: #47904
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
When installing a RX filter, the driver uses "filter->rtr &
filter->rtr_mask" for setting the filter mask. It should just be using
filter->rtr_mask, otherwise filters for non-RTR frames will match RTR
frames as well.
When transmitting a RTR frame, the hardware automatically switches the
mailbox used for TX to RX in order to receive the reply. This, however,
does not match the Zephyr CAN driver model, where mailboxes are dedicated
to either RX or TX. Attempting to reuse the TX mailbox (which was
automatically switched to an RX mailbox by the hardware) fails on the first
call, after which the mailbox is reset and can be reused for TX. To
overcome this, the driver must abort the RX mailbox operation when the
hardware performs the TX to RX switch.
Fixes: #47902
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
The Bosch M_CAN IP does not support RX filtering of the RTR bit, so the
driver handles this bit in software.
If a recevied frame matches a filter with RTR enabled, the RTR bit of the
frame must match that of the filter in order to be passed to the RX
callback function. If the RTR bits do not match the frame must be dropped.
Improve the readability of the the logic for determining if a frame should
be dropped and add a missing FIFO acknowledge write for dropped frames.
Fixes: #47204
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
For SAML21-based parts, the REFCTRL register is locked while the ADC is
enabled. Permit some parts to declare that they need the ADC to be
disabled before modifying REFCTRL.
Signed-off-by: Attie Grande <attie.grande@argentum-systems.co.uk>
The built-in USB serial peripheral is a virtual serial and does not
allow to be configured like a normal UART.
Removing the unused UART config parameters.
Also reducing initialization to single-instance only.
Signed-off-by: Martin Jäger <martin@libre.solar>
This include is only required if typeof() macro is used, which
is not the case for the serial / uart driver.
Signed-off-by: Martin Jäger <martin@libre.solar>
Since this DAC is connected via I2C bus the init priority
value must be higher than the default 50 so it can be initialized
later than the bus itself so add a dedicated init config
symbol for that.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
Since this DAC is connected via I2C bus the init priority
value must be higher than the default 50 so it can be initialized
later than the bus itself so add a dedicated init config
symbol for that.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
Since this DAC is connected via I2C bus the init priority
value must be higher than the default 50 so it can be initialized
later than the bus itself so add a dedicated init config
symbol for that.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
Since this DAC is connected via SPI bus the init priority
value must be higher than the default 50 so it can be initialized
later than the bus itself so add a dedicated init config
symbol for that.
Signed-off-by: Bartosz Bilas <b.bilas@grinn-global.com>
irq_lock() returns an unsigned integer key.
Generated by spatch using semantic patch
scripts/coccinelle/irq_lock.cocci
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
HDA is a common IP used across the entire ADSP line and deserves
a name respecting that alongside similiar IP drivers such as the
ADSP GPDMA driver.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
There is is an error in the way that the sock id is
determined. A unique fd is reserved and assigned appropriatly, but
the id, which should correspond to a socket number within the modem,
is set to an invalid, and identical for all sockets, value, and then
not used appropriatly in the drivers, instead, the sock_fd is used,
which can be any value really, it is not related to the socket number
in any way.
This results in the drivers only working if the reserved fd happens
to be between base_socket_num and (socket_len - 1)
This patch assignes the id to the index of the socket + the
base_socket_num, the socket at index 0 will get the id 1 if the
base_socket_num is 1, and the modem_socket_from_id should then
be used to get a pointer to the socket, since the id is not
neccesarily equal to the index.
The FIXME has been solved by adding a note both at the start
of the modem_socket_get function and inside the Kconfig file
for the MODEM_SOCKET option description. It is not an error,
but the user must be aware that it uses the POSIX file
descriptors, for which only 4 are allocated by default.
This patch fixes the bug, without breaking the brittle modem
drivers which currently are built around this bug.
The modem drivers should be updated to use the id as the
socket num instead of the sock_fd after this fix has been merged.
The "socket # needs assigning" has been removed, as that is what
this patch is doing
I also added comments to the id and sock_fd in the modem_socket
structure to help developers use the id and fd appropriately.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
Convert driver to use DEVICE_DT_INST_DEFINE. Its already devicetree
based so trivial change over to use DEVICE_DT_INST_DEFINE.
Signed-off-by: Kumar Gala <galak@kernel.org>
Add simple clock control node in devicetree for beetle to handle
relationship between drivers (uart, timers, gpio) and clock controller
device.
Signed-off-by: Kumar Gala <galak@kernel.org>
Use DT_INST_FOREACH_STATUS_OKAY to reduce duplicated code for each
instance.
We make interrupts optional since they aren't always available.
Signed-off-by: Kumar Gala <galak@kernel.org>
Remove Kconfig symbols that determine which instances and just use
the number of enabled instance in the devicetree to determine which
instances to build.
Signed-off-by: Kumar Gala <galak@kernel.org>
Remove dead clock gate code and associated PM code as the platforms
that used the clock gate code are no longer supported in Zephyr.
Signed-off-by: Kumar Gala <galak@kernel.org>
The shared IRQ code has been broken for several releases and no one
seems to have noticed. The platforms that this was used on are not
supported in Zephyr anymore so remove the code.
Signed-off-by: Kumar Gala <galak@kernel.org>
Replace sensor_label property in devicetree with just a sensor phandle
property. This is more generic and allows driver to use DEVICE_DT_GET
instead of device_get_binding.
Signed-off-by: Kumar Gala <galak@kernel.org>
Fixes configured DMA direction for HDA link in/out drivers.
Adjusts the number of channels for link in/link out to safe value
that seems to work on all tested parts.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
This patch corrects the initial unmapping of unused l2 memory
to unmap until the end of virtual address space instead
of unmapping until the end of l2 physical memory.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
This patch introduces sys_mm_drv_move_region implementation
which stops usage of the sys_mm_drv_simple_move_region.
The sys_mm_drv_simple_move_region is unsuitable becuase
it iterates through physical pages in linear fashion.
The new implementation queries the tlb for each virtual
page of the requested region to find the physical page
to be remapped.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
The SSD16xx driver needs to wait for the chip to complete commands
before issuing new commands. The datasheet doesn't specify which
commands cause the chip to raise the busy pin. The current driver has
ssd16xx_busy_wait() calls after commands that are known to take a long
time. This is very fragile and scatters a lot of boiler plate around
the driver.
Include an ssd16xx_busy_wait() call in ssd16xx_write_cmd() instead of
after commands that are suspected to take a long time. This makes the
driver more robust and is more in line with the expectations set out
in the data sheet.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
There are cases when attributes of mapped virtual memory need
to be updated. E.g. in case there is loadable library/module
code loaded to the l2 memory then memory needs to be read-write.
After the code is loaded and is ready to be executed then
attributes of mapped memory should be updated to
read-only/executable without loosing memory contents.
Signed-off-by: Jaroslaw Stelter <Jaroslaw.Stelter@intel.com>
Refactors counter driver code, bringing:
- more readability through the removal of abused macros
- better use of the devicetree, by moving peripheral node's
info defined on macros and Kconfigs to dts bindings
- less dependence from dynamic allocations, making counter
instances fully statically-allocated
- better use of DT_INST_* macros
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
Move the CAN bus network driver from drivers/can to drivers/net as it
implements a network driver, not a CAN controller driver.
Use a separate Kconfig for enabling the CAN bus network driver instead of
piggybacking on the SocketCAN Kconfig. This allows for other
(e.g. out-of-tree) SocketCAN transports.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Implement support for display blanking by inhibiting display refresh
while blanking is on. Writes to the display are still sent to the
internal RAM in the display controller. Once blanking is turned off,
the contents of the RAM are written to the display. This behavior is
makes it possible to compose a frame buffer in the display controller
without flickering.
Other e-paper drivers such as the GD7965 already implement this
behavior.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Adding command queue mode can reduce the time between each byte to
improve the I2C bus clock stretching during I2C transaction.
I2C command queue mode of it8xxx2 can support I2C APIs including:
i2c_write(), i2c_read(), i2c_burst_read.
Test:
1. tests\drivers\i2c\i2c_api --> pass
2. Reading 16 bytes of data through i2c_burst_read() can reduce
0.72ms(2.54ms->1.82ms) compared to the original pio mode when the
frequency is 100KHz.
3. krabby platform can boot normally.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Simplify the implementation by using gpio_dt_spec.
As part of this use logical values of 0/1 for gpio_pin_set_dt
and handle any inversions as GPIO flags that might be required
at a board level (in dts config).
Signed-off-by: Kumar Gala <galak@kernel.org>
Implement support for half duplex communication in the bit bang SPI
driver. The SPI driver will use the MOSI pin is for both TX and RX
operations when using half duplex mode.
In half-duplex mode, the driver configures the MOSI pin as an input
pin for input only transactions. Transactions that are bidirectional
are forbidden. After an SPI transaction, the MOSI pin is left as an
input if it was an RX transaction or an output after a TX
transaction. Like before, the MOSI pin is initialized as an
(inactive) output pin when the bus is initialized.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Add API function for getting the supported capabilities of a CAN
controller. This allows for writing portable CAN applications.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Switch from using a driver-specific, compile-time devicetree one-shot
property to supporting the newly added CAN_MODE_ONE_SHOT flag for
enabling/disabling one-shot mode at run-time.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Remove the support for enabling passthrough mode support for MPU9150
on the AK8975. We don't have a proper MPU9150 driver and the MPU9150
has been EOL. So its highly unlikely this code is being used.
Additonally we remove the device tree binding for the MPU9150 since
we don't have a proper driver for it.
Signed-off-by: Kumar Gala <galak@kernel.org>
Add gpio_pin_get_config function to gpio_driver_api.
This function is used to read current configuration of pin.
The gpio_pin_get_config checks if driver implements this function and
returns -ENOSYS if it isn't implemented.
Signed-off-by: Michał Barnaś <mb@semihalf.com>
Custom accessors like HAL_INSTANCE() have been gradually removed
in-tree. Instead, store a pointer with the right type (struct pwm_reg
*).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Register was wrongly casted to (void *) in one case, and unnecessarily
casted in another case.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The base variable type stored in config already has the right type. Such
kind of accessors have been removed in many other places.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In some case the structure enclosing the adc context
can be quite big, making static initialization quite
resource consuming
Signed-off-by: Guillaume Lager <g.lager@innoseis.com>
Enabling the FlexSPI HyperRAM results in a build error, due to a logging
module re-definition. Fixed by changing the log module name.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
increase available RX buffers to MCUX ethernet driver.
improves measured performance on RT1050 EVK zperf download
from 500Kbps to 22Mbps.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This patch extends the adxl362 driver by adding an option
to change the inactivity detection timeout at runtime.
Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
Building lwm2m_client with CONFIG_NET_L2_OPENTHREAD=y leads to
following warning during build:
west build -s samples/net/lwm2m_client -b nrf52840dk_nrf52840 -- \
-DCONFIG_NET_L2_OPENTHREAD=y
zephyr/drivers/sensor/nrf5/temp_nrf5.c:115:10:
warning: zero-length gnu_printf format string [-Wformat-zero-length]
115 | LOG_DBG("");
Signed-off-by: Kiril Petrov <retfie@gmail.com>
CONFIG_SIFIVE_SPI_0_ROM (default y) was an option to disable spi0 if
used to access SPI Flash ROM. However, its design had a problem: it
relied on instance numbers. You had to set status okay for spi0 to make
it work (incongruent with the purpose of the option itself). This patch
makes things simpler: if such SPI0 is not available, simply keep it
disabled in DT. Bindings have been updated to mention this case.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Use logical values of 0/1 for gpio_pin_set_dt and handle any
inversions as GPIO flags that might be required at a board level.
Signed-off-by: Kumar Gala <galak@kernel.org>
Introduce a new RISCV_HAS_CLIC symbol for platforms using CLIC,
reorganize the Kconfigs and make the Nuclei ECLIC depending on the new
symbol.
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
When using the settings subsystem, the data argument argument passed to
flash_stm32_write_range() might not be 8-bytes aligned, causing an
unaligned memory access fault.
Fix that the same way as it was done for the STM32L4 in commit
652efa530f.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Now that we have 8 bits reserved for vendor specific GPIO flags,
introduce a new set of flags for nRF platforms to configure pins drive
mode. These new flags are equivalent to the previous existing ones, but
use a naming scheme the fits better with vendor hardware capabilities.
The table below shows the equivalence between old and new flag
| Old flags | New flags |
|---------------------------|-----------------------|
| `NRF_GPIO_DS_DFLT_LOW` | `NRF_GPIO_DRIVE_S0` |
| `NRF_GPIO_DS_DFLT_HIGH` | `NRF_GPIO_DRIVE_S1` |
| `NRF_GPIO_DS_ALT_LOW` | `NRF_GPIO_DRIVE_H0` |
| `NRF_GPIO_DS_ALT_HIGH` | `NRF_GPIO_DRIVE_H1` |
| `NRF_GPIO_DS_DFLT` | `NRF_GPIO_DRIVE_S0S1` |
| `NRF_GPIO_DS_ALT` | `NRF_GPIO_DRIVE_H0H1` |
| `NRF_GPIO_DS_DFLT_LOW \|` | `NRF_GPIO_DRIVE_S0H1` |
| `NRF_GPIO_DS_ALT_HIGH` | |
| `NRF_GPIO_DS_ALT_LOW \|` | `NRF_GPIO_DRIVE_H0S1` |
| `NRF_GPIO_DS_DFLT_HIGH` | |
Documentation has been written to explain in more detail the meaning of
the flags and how they can be used.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The naming of the custom DS flags is not clear for nRF platforms. This
patch removes all the NRF_GPIO_DS* flags. New flags will be
re-introduced in a follow-up commit.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This commit avoid re-enabling the ADC,
because this starts conversion.
According to the RefMan (RM0008) of the stm32F10x mcu,
enabling the ADC will start the conversion
if the ADC is already enabled. "Conversion starts when
this bit holds a value of 1 and a 1 is written to it."
That's not what we want.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
cAVS and ACE gpdma driver have several similarities. This commit merge
this two drivers into a single one for Intel ADSP devices.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
When using the APIC imer in TSC deadline mode, also enable reading the
full 64-bit cycle counter value (via the k_cycle_get_64() call).
Signed-off-by: Bruno Achauer <bruno.achauer@intel.com>
When PINCTRL is enabled, the SCL and SDA pin numbers are not available
in configuration structures used for nrfx drivers initialization.
In this case, these pin numbers need to be obtained from peripheral
registers.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Uses the dt_compat_enabled Kconfig preprocessor to set defaults
for each HDA driver.
Each direction is uniquely selectable which can be useful when building
with SOF where only some directions may wish to be enabled at any given
time.
By default, given the device tree (intel_cavs.dtsi) only the host
directions are enabled but an overlay may adjust that as needed.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Not all platforms support setting the LSE driving capability, causing
the build to fail for platform such as the STM32L072 if compiled with
CONFIG_STM32_LPTIM_CLOCK_LSE=y.
Adding an #ifdef guard around the call to skip it if not defined in the
HAL.
Signed-off-by: Fabio Baltieri <fabio.baltieri@gmail.com>
In npcx series, not all GPIO pads support Multi-Input Wake-Up Unit
(MIWU) functionality. Hence, this CL adds checking whether GPIO's pad
configuration is valid first before using it.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Simplify the implementation by using gpio_dt_spec. Mostly
gpio_dt_spec is used as a common struct and lets us move
away from DT_INST_GPIO_LABEL.
Signed-off-by: Kumar Gala <galak@kernel.org>
Some stm32 devices, like stm32F4, do not have
a PLL Enable bit on the PLLP nor PLLQ divider
in their PLL config register (PLLCFGR).
The result is a empty function.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The function get_pllsrc_frequency is added
with possible source HSI or HSE.
With STM32_PLL_P_ENABLED or STM32_PLL_Q_ENABLED,
this function is used by the clock control driver.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The TI SimpleLink SDK got updated to version '4.40.04.04' in 'hal_ti'.
This introduced renames of some functions in HAL and has to be reflected
in Zephyr drivers which make use of them.
This renames 'PRCMPowerDomainStatus' to 'PRCMPowerDomainsAllOn' in all
affected 'cc13xx_cc26xx' drivers.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
The hwinfo shell commands was missing human readable names for
* RESET_HARDWARE
* RESET_USER
* RESET_TEMPERATURE
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
This CL introduces how to configure PSL (Power Switch Logic) pads
properties such as input detection mode/polarity, pin-muxing and so
on via pinctrl mechanism. It includes:
1. Add two pinctrl properties and their enums for PSL input
detection configuration.
psl-in-mode:
- "level"
- "mode"
psl-in-pole:
- "low-falling"
- "high-rising"
2. Add macro functions to get PSL input detection and pin-muxing
configurations from 'pinmux', 'psl-offset' abd 'psl-polarity'
properties.
Here is an example to configure PSL_IN2 as the PSL detection input and
its mode and polarity.
/* A falling edge detection type for PSL_IN2 */
&psl_in2_gp00 {
psl-in-mode = "edge";
psl-in-pol = "low-falling";
};
A device will be introduced later which uses this pinctrl node to
configure PSL input detection settings and how to turn off VCC1 power
rail by PSL_OUT.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This peripheral combines a hardware-based USB CDC ACM serial interface
and a JTAG interface.
It is present in the ESP32-C3.
Signed-off-by: Martin Jäger <martin@libre.solar>
The uart_pipe driver is not dependent on any console driver,
however a serial driver is required.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
These two timers were sharing pretty much the same code. Actually
mtl timer was a "superset" of cavs timer. Just merge them into a
single one called intel audio dsp timer (intel_adsp_timer).
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
Meteorlake support as part of the Intel ADSP family.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Co-authored-by: Michal Wasko <michal.wasko@intel.com>
Co-authored-by: Konrad Leszczynski <konrad.leszczynski@intel.com>
Co-authored-by: Rafal Redzimski <rafal.f.redzimski@intel.com>
Co-authored-by: Enjia Mai <enjia.mai@intel.com>
Co-authored-by: Flavio Ceolin <flavio.ceolin@intel.com>
Co-authored-by: Tomasz Leman <tomasz.m.leman@intel.com>
Co-authored-by: Bonislawski Adrian <adrian.bonislawski@intel.com>
Co-authored-by: Serhiy Katsyuba <serhiy.katsyuba@intel.com>
Co-authored-by: Andrey Borisovich <andrey.borisovich@intel.com>
Add timer driver based on CAVS driver and adapted for Meteor Lake.
Co-authored-by: Michal Wasko <michal.wasko@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add TLB driver specific for Meteorlake.
Add missing kconfig resource and fix include path
add hpsram power up and ref counter
Use memblock to track physical page usage in mtl tlb driver. The
applications that will be using the tlb memory driver should not
track the physical page mapping to virtual address space:
- adds an option to use the phys argument value of 0 to tell the
driver to autonomously assign physical pages upon map request
- makes the tlb driver use memblock to track mapped physical pages
Co-authored-by: Rafal Redzimski <rafal.f.redzimski@intel.com>
Co-authored-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
Co-authored-by: Marcin Szkudlinski <marcin.szkudlinski@intel.com>
Co-authored-by: Michal Wasko <michal.wasko@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Following zephyr's style guideline, all if statements, including single
line statements shall have braces.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Replace eswifi_gpio with gpio_dt_spec. We can replace devicetree
label based access with this change as we try and phase out the
usage of the 'label' property.
Signed-off-by: Kumar Gala <galak@kernel.org>
when the dma channel is stopped, the irq is no more
relevant ; clear any irq but do not process it.
Fix Typo on comments and add LOG_DBG on channel increment.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
The SSD16xx uses a separate pin to indicate if an SPI transfer is a
command or data. This means that driver needs to split most SPI
transactions into two distinct transactions, one for commands and one
for data. The driver currently doesn't request SPI_HOLD_ON_CS which
means that the chip select will be released momentarily between the
command and data phase.
Update the driver to request SPI_HOLD_ON_CS and SPI_LOCK_ON to lock
the bus and complete both phases of a command in one atomic operation.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
spi_context_cs_configure_all() is currently called from
spi_bitbang_transceive(). This causes a glitch when combined with
SPI_HOLD_ON_CS is used.
Move the initialization to spi_bitbang_init which is what the other
SPI drivers seem to do.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
The SPI bitbang driver doesn't correctly initialize the list of CS
GPIOs. As a consequence, SPI buses using the bitbang driver won't
drive CS low. Add the missing initialization.
Signed-off-by: Andreas Sandberg <andreas@sandberg.uk>
Get the vref-mv through the ADC API instead of the device tree. This
saves 8 bytes of SRAM and will be future proof in case, one day, support
for a variable vref is added.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The value is unused in this structure is unused and can be accessed
through the adc_ref_internal() function.
This saves 4 bytes of SRAM.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Allow the battery voltage to be read through the ADC even if the
CONFIG_STM32_VBAT driver is not enabled.
I guessed this part of code is conditionally compiled depending on
CONFIG_STM32_VBAT because this feature, and hence the
LL_ADC_CHANNEL_VBAT constant is not available on all families. As the
feature is already checked at runtime (as the same driver supports
multiple instances), we can conditionally compile it depending on
LL_ADC_CHANNEL_VBAT instead.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This adds basic support for the watchdog timer on the RP2040 MCU and
Raspberry Pi Pico development board
Signed-off-by: Jamie McCrae <spam@helper3000.net>
When we moved to gpio_dt_spec forgot to remove the older
fields used for gpio related access. Remove them as they
are used by the driver anymore.
Signed-off-by: Kumar Gala <galak@kernel.org>
When an I2C transaction completes, the driver should clear all the FIFO
status. Otherwise, it has the chance to break the operation of the next
transaction. This commit sets the CLR_FIFO bit in the SMBFIF_CTS
register to clear all the FIFO status at the beginning of an I2C
transaction.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Invert the physical address given to pcie_ctrl_region_translate() to
match the PCI BAR layout. Previously, physical addresses for memory
space BAR were exposed to bit 3 (prefetchable bit) and 2 (1 type bit) of
the header.
Signed-off-by: Rodrigo Cataldo <rodrigo.cataldo@huawei.com>
Move driver to use spi_dt_spec and i2c_dt_spec for SPI and I2C bus
access, respectively.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
As we work to phase out devicetree 'label' properties, convert
driver to just use ETH_0/ETH_1 instead of DT_INST_LABEL for
logging purposes.
Signed-off-by: Kumar Gala <galak@kernel.org>
This commit adds support for the ds18b20 1-wire temperature sensor.
The sampling resolution of the sensor can be set in DT.
In case only a single device is on the bus, the driver issues
skip_rom commands. However, in case DT defines several devices,
the driver will use match_rom commands and therefore it is necessary
to set the rom_id of the device via the sensor attribute interface before
being able to sample sensor values.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The zephyr-serial w1 driver introduced in this commit implements
all routines for the w1 api on top of the zephyr serial driver.
W1 bit read, write, and reset operations are executed by issuing
polling zephyr serial byte read and write operations.
The driver should be usable on most platforms in zephyr that have
implemented support for the polling procedures of the serial driver.
As not all serial drivers are implemented exactly the same minor
additional quirks may be needed on some platforms.
The most notable difference of polling serial driver implementations
seems to be that some return immediately from poll_out after the
transmission was started(e.g. STM32) and others wait until
the transmission was completed before returning from poll_out
(e.g. NRF). While this has influence on the timeout, both types
are supported by this driver because the driver waits for a
configurable time period until it terminates the read.
The driver needs an appropriate open drain interface to be able
to communicate with slaves.
In the simpliest case this might be achived by configuring the mcu pins
in open-drain configuration with a (sufficiently small) pull-up to 3V3/5V.
Otherwise an external circuit needs to provide this interface.
Overdrive and Standard Speed modes are supported by this driver.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit introduces a new api for the net layer of Dallas
1-wire protocol.
For single drop configurations w1_read_rom, and w1_skip_rom commands are
provided.
For multidrop configurations w1_match_rom, w1_resume_command,
w1_search_rom, and w1_search_alarm routines are provided as well.
Additionally, the reset_select routine, conditionally depending on the
bus configuration, either executes a match_rom, or a skip rom command.
A w1_write_read command simplifies the typical scenario of addressing
a device, writing a few bytes to the device and reading back the answer.
Additionally w1_crc8, and w1_crc16 are added as wrappers around the
zephyr in-tree crc8 and crc16_reflect implementations.
The former may be used to verify the validity of the rom id, while the
latter is used for integrity checking of many eeprom, and authenticator
commands.
The general search command does not support filtering on
the family code.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit introduces a new api for the Dallas 1-wire protocol.
The api includes link functions for read and write operations on
bit, byte, and block level, as well as functions to reset and
lock the bus.
The bus configuration is derived from the device tree and can be
queried using w1_slave_count routine.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Add a minimal EFI console driver to support printf, this console driver
only supports console output. Otherwise the printf will not work.
Signed-off-by: Enjia Mai <enjia.mai@intel.com>
This patch is to enhance the uart ns16550 driver to get clock frequency
from clock manager or devicetree if clock_frequency is defined.
Signed-off-by: Teik Heng Chong <teik.heng.chong@intel.com>
The default S0S1 drive setting is not suitable for TWI/TWIM pins.
Override it with S0D1 as for some SoCs (e.g. nRF52833) without
this the peripheral will not work properly.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Fix indentations of `adc_stm32_oversampling` function comments
to have everything aligned properly.
Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
According to the ES0418 about the ADC of the stm32G071
or other stm32g0x devices:
for sampling time set to 1.5 or 3.5 cycles,
the sampling in a single ADC conversion or in the first
conversion of a sequence takes one extra cycle.
Minimizing to 7.5 is fine.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
- If the HAL headers expose the USBPRE flag, then we're probably
dealing with a F103 - using the same fundamental logic as the
code for the OTG models, set-up the USB Prescaler correctly.
- Fixes#47146
Signed-off-by: Chris Collins <chris@realsimgear.com>
TCA954X driver was not enabled since introduction of
new compatibility fields.
We now set I2C_TCA954X depending on related "okay"
compat fields in DT.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
After replacing STM32_SRC_PLLCLK by the STM32_SRC_PLL_x sources
this function is no longer needed and are therefore removed.
Also, those functions returned a wrong frequency.
They should have used get_pllsrc_frequency() instead of get_pll_source()
to get the input frequency.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The SOC specific implementations of the clock_stm32_ll_common driver
included the PLL specific functions only when PLL was selected as sysclock.
This commit changes the condition from "STM32_SYSCLK_SRC_PLL"
to "defined(STM32_PLL_ENABLED)".
As a result the pll could also be used as peripheral clock source
in case it is not the sysclock.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit adds support to select pll outputs as peripheral clock
sources to the stm32 common driver.
With this commit they are only available on
STM32G0, STM32G4, STM32L4, STM32L5, STM32WB, and STM32WL.
Support for STM32F2, and STM32F4, which also have p,q,r dividers,
is not enabled in this commit.
Also, stm32_clock_control_get_subsys_rate is extended to return
the configured frequency in case they are enabled, otherwise 0.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit configures the PLL_P divider for SOCs compatible to the
stm32_ll_common driver in case a value was defined via a dts property.
Additionally, in case the divider value is defined in the device
tree, the respective pll output is enabled during initialization
in set_up_plls().
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
In the stm32_ll_common driver the PLL_Q divider should not
be directly written to RCC->PLLCFGR->PLLQ, but should be
translated to the matching register value.
i.e. shifting the value to the correct position of the register
is not enough.
This commit makes sure the divider value taken from device tree, is
correctly translated ot the matching register register value by
converting it to a STM32CUBE LL definition LL_RCC_PLLQ_DIV_xx.
Typcial divider to register value mapping:
G0, WB, WL:
Dividers 2-8 mapped to register values 1-7(0 reserved).
G4, L4, L5:
Dividers 2,4,6,8 mapped to reg values 0,1,2,3.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
All these series share the same defines, and while they are not used
by all socs of the common-driver, this is not exptectd to lead to
any conflict.
By moving the defines they can also be used in clock_stm32_ll_common.c
Additionally, the stm32g0 pll_div define was renamed to pllm
in order to match the other series.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The STM32_SRC_CLOCK_MIN and STM32_SRC_CLOCK_MAX defines
are not really needed because non valid clock sources are already
filtered out by the precompiler.
Only STM32_SRC_CLOCK_MIN was used once in code and can be replaced.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
This commit fixes a bug where an already received Rx frame could not be
processed by the IEEE 802.15.4 driver.
In the current implementation, buffer is marked as free and released to
the buffer pool after `nrf_802154_buffer_free_raw` finishes executing.
However, delays caused by thread scheduling might result in a new frame
being already received and provided to the driver before
`nrf_802154_buffer_free_raw` returns. Such a situation ends in an
assertion now.
This commit changes that behavior by marking the buffer as free before
calling `nrf_802154_buffer_free_raw`.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
This commit increases verbosity of serialization error handler for
nRF5340 application core. The handler prints the error code now.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
As we work to phase out devicetree 'label properties, convert
driver to just use dev->name instead of DT_INST_LABEL.
Signed-off-by: Kumar Gala <galak@kernel.org>
Instead of using or'ed list of Kconfig options listing the compatible
series with what can be called "stm32h7 variant", use the matching
compatible information.
This will prevent to update the driver next time that a compatible series
is ported into zephyr.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
If the preprocessor constant ESP_MAX_DNS is defined as 0,
Coverity reports a condition that can never be true, and some
dead code as well. This also violates MISRA rules on dead code.
This is caused by this segment in drivers/wifi/esp_at/esp.h:
#if defined(CONFIG_WIFI_ESP_AT_DNS_USE)
#define ESP_MAX_DNS MIN(3, CONFIG_DNS_RESOLVER_MAX_SERVERS)
#else
#define ESP_MAX_DNS 0
#endif
Fix this by never setting ESP_MAX_DNS to 0, as is the currently
case. Define ESP_MAX_DNS only if it is configured through
CONFIG_WIFI_ESP_AT_DNS_USE and CONFIG_DNS_RESOLVER_MAX_SERVERS:
#if defined(CONFIG_WIFI_ESP_AT_DNS_USE)
#define ESP_MAX_DNS MIN(3, CONFIG_DNS_RESOLVER_MAX_SERVERS)
#endif
Since CONFIG_DNS_RESOLVER_MAX_SERVERS is 1 or greater, ESP_MAX_DNS
will always be greater than 0.
If, on the other hand, ESP_MAX_DNS is not defined, relevant
functions will be reduced to empty stubs, since in that case
they do not make sense.
There could be a cleaner solution to this, but this one is the
least intrusive (involves less code changes).
Coverity-CID: 219490
Coverity-CID: 219513
Coverity-CID: 219520
Coverity-CID: 219524
Signed-off-by: Aleksandar Markovic <aleksandar.markovic.sa@gmail.com>
Some EFR32 SoCs use a secure element subsystem to manage
security features (i.e., TRNG, secure bootloader or cryptographic
functions).
This driver relies on the SE Manager high-level API provided by Silicon
Labs. The API interacts with the SE subsystem, provides helper functions
to achieve cryptographic operations and ensures that only one operation
is running at a time by using mutexes and semaphores.
Instead of relying on the SE Manager from Silicon Labs, one could
recreate the behaviour of the Manager and put the code in the crypto
driver folder and create a dependency for other drivers using the crypto
manager (e.g., keys, entropy).
I went for the SE Manager API as it is already there and supported by
Silicon Labs.
Tested using the random subsystem.
Signed-off-by: Steven Lemaire <steven.lemaire@zii.aero>
The clock of the octospi peripheral is directly defined
by the DTS and configured by the clock_control_on function.
No specific stm32cube function is required then.
The clock control is taking this clock source to calculate
the clock rate.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Move from using Kconfig NET_PPP_UART_NAME to a devicetree chosen
property ("zephyr,ppp-uart"). This is similar to a number of other
functions like "zephyr,shell-uart" or "zephyr,bt-uart".
As part of this we rework the init code a little to use
DEVICE_DT_GET for the modem gsm-ppp case.
Signed-off-by: Kumar Gala <galak@kernel.org>
Rather than using a devicetree node label, utilize the driver
compat and thus DT_INST which is standard means for most drivers.
Signed-off-by: Kumar Gala <galak@kernel.org>
There is a build warning of unused `adc_stm32_oversampling_ratioshift`
function: [-Werror=unused-function]. This makes twister fail, as all
warnings are treated as errors.
Fix that by ifndef'ing adc_stm32_oversampling_ratioshift().
Fixes: c57a41c5d2 ("drivers/adc: stm32: do not disable the ADC if
resolution is unchanged")
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
As we work to phase out devicetree 'label' properties, convert
driver to just use sx126x instead of DT_INST_LABEL for logging
purposes.
Signed-off-by: Kumar Gala <galak@kernel.org>
Move the `REQUIRES_FULL_LIBC` dependency from `config LORA` to
`config LORAWAN`. The commit that added the `select` (f590d4fa) mentions
that this is required by `loramac-node`, which is only used by LoRaWAN,
not the base LoRa code.
This results in small FLASH savings when compiling the samples, but can
result in larger savings in more complex applications:
```
// With REQUIRES_FULL_LIBC
west build -b 96b_wistrio zephyr/samples/drivers/lora/send/
[162/162] Linking C executable zephyr/zephyr.elf
Memory region Used Size Region Size %age Used
FLASH: 37708 B 128 KB 28.77%
SRAM: 8832 B 32 KB 26.95%
IDT_LIST: 0 GB 2 KB 0.00%
// Without REQUIRES_FULL_LIBC
[181/181] Linking C executable zephyr/zephyr.elf
Memory region Used Size Region Size %age Used
FLASH: 37444 B 128 KB 28.57%
SRAM: 8832 B 32 KB 26.95%
IDT_LIST: 0 GB 2 KB 0.00%
```
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Change logic in `modem_cmd_handler_setup_cmds` and
`modem_cmd_handler_setup_cmds_nolock` to always sleep
after each sent AT command.
The issue was found using a logic analyzer while debugging 'NO CARRIER'
from a BG95 modem while being in data mode.
The reason 'NO CARRIER' occured was due to crosstalk to DTR which
terminated data mode.
The logic analyzer also revealed that without the delay the next AT
command is sent before the whole 'OK\r\n' is received. This is not
addressed in this commit.
Fixes https://github.com/zephyrproject-rtos/zephyr/issues/47082
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
In prepration for configuring I2C/SPI defaults at the board level,
change the DesignWare GPIO driver's clock gate option to depend on clock
control instead of selecting clock control. This breaks a Kconfig
dependency loop when adding the following to a board's
Kconfig.defconfig:
config SPI
default y if SENSOR
There aren't any in-tree users that enable the clock gate option, so
there aren't any places in-tree that now need to enable the clock
control driver. Out-of-tree users that set CONFIG_GPIO_DW_CLOCK_GATE=y
will now also need to set CONFIG_CLOCK_CONTROL=y.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
In preparation for extending samples/sensor/magn_polling to support
additional magnetometer drivers, enable these drivers by default when
the sensor driver class is enabled (CONFIG_SENSOR=y) and a compatible
devicetree node is enabled.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
The fxos8700 device supports 3 modes: accelerometer-only,
magnetometer-only, or hybrid (accelerometer and magnetometer) modes. The
accelerometer-only mode is register compatible with mma8451q, mma8652fc,
and mma8653fc, which allows the fxos8700 driver to be used with these
devices as well.
Most in-tree boards can use hybrid mode because they have the fxos8700
device, therefore we change the driver default to match the common case.
For the handful of boards that have an mma86xx or mma84xx device, we
override the driver default to accelerometer-only mode. As a result, we
can enable the magn_polling sample application for the fxos8700 driver
without having to add a bunch of board-specific configuration overlays
for hybrid mode.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
The I2C API recently updated terminology to replace "master" with
"controller", but this instance in the mcux lpi2c driver was missed.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
If hw-flow-control is set in the uart section of the device tree source,
it is read by gsm_ppp.c and AT+IFC=2,2 is sent to the modem.
Fixes https://github.com/zephyrproject-rtos/zephyr/issues/46928.
Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
Fix issue #45168.
When setting high bit timing, the controller is timing
out when trying to switch from an internal mode to another.
To fix this issue, we add some delay when switching modes.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Fix issue #45169.
With this CAN controller, changing bit timing has to be done in controller
reset mode, resetting some registers to their default values.
TCR register, that is enabling loopback mode is one of these.
Because of this reset, the controller switch back from loopback
to normal mode without the test suite being notified, preventing
receiving sent frames afterwards.
To fix this issue, we are now storing useful registers values before
switching to reset mode and restoring these values in halt mode
before going back in operation mode.
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Default mode must be debug or it can't ever be enabled.
Allow debug log messages to be printed when using
mdm_hl7800_send_at_cmd API.
Add logging to active bands and network coverage commands.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
According to the formulas found in the reference manuals of the SoC
families using the "st,stm32-temp-cal" version of the temperature sensor
(i.e. G0, G4, H7, L0, L1, L4, L5, U5, WB, WL), the temperature is
computed with the following formula:
T = ((TS_CAL2_TEMP - TS_CAL1_TEMP) / (TS_CAL2 - TS_CAL1))
* (TS_DATA - TS_CAL1) + TS_CAL1_TEMP
What is called ts-cal-offset in the stm32_temp driver is therefore the
same value as TS_CAL1_TEMP1. Use it directly instead of defining another
property.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The stm32_temp driver defines the ts-voltage-mv property to determine
the reference voltage of the ADC in the temperature computation. However
this information is already available in the device tree at the ADC
level (even with the same default value). Use it through the ADC API
instead of duplicating the information.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The AIVECT (All Interrupt Vector Register) register provides us a quick
way to determine SOC interrupt number. But sometimes we get interrupt
number 0 from the register and caused assertion of unhandled interrupt.
To avoid the assertion, we look for all ISRs (Interrupt Status Register)
and IERs (Interrupt Enable Register) to find the highest priority pending
interrupt and return it to caller.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Using a global error flag could lead to an error on one
socket appearing as an error with a separate socket instance.
Socket errors moved into the socket context.
Continue to use global error flag for commands not
related to sockets.
For TCP sockets closed by the server, don't try and close
the socket again when offload_put is called.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
The Zephyr API supports multiple I2C targets addresses, and the STM32
I2C v2 implementation allows to define up to 2 targets addresses.
This patch adds support for a second I2C target address. It adds a new
config entry in the i2c_stm32_data structure, and uses the fact that
both addresses can be enabled and disabled independently. In the
interrupt, the target being addressed is determined using the address
match code from the interrupt status register.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
It allows the path for VBATEN on stm32 series
to monitor the Vbat voltage, in case of CONFIG_STM32_VBAT
Add the common Vref value as a property of the ADC.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Similar to the internal temperature sensor of the stm32
this driver controls the Vbat monitoring in Volts,
using an ADC internal input and the stm32-vbat node of the DTS.
The ref voltage is given by the ADC.
Note that stm32F1x does not propose the feature.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
if ISR is called for an event on pin X but
another event occurs on pin Y in between the call
to GetStatus() and ClrStatus(), pin Y event wil get
cleared without being processed
Signed-off-by: Maxim Adelman <imax@fb.com>
The driver returns -EIO when a pin to be disconnected was not earlier
configured as input or output, what is not in line with the GPIO API.
This commit changes the driver to return 0 in such case.
Also -EIO is incorrectly returned when an interrupt trigger cannot be
configured in the nrfx_gpiote driver. This commit corrects this value
to -EINVAL.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The gpio_dev field of struct spi_cs_control is deprecated. The
driver was already using SPI_CONFIG_DT_INST, so we should be
using the associated gpio member of spi_cs_control.
Signed-off-by: Kumar Gala <galak@kernel.org>
Updates the API and types to match updated I2C terminology. Replaces master
with controller and slave with target.
Updates all drivers to match the changed macros, types, and API signatures.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Move to using SPI_CONFIG_DT_INST macro to initialization the
struct spi_config cfg_a. This fixes an issue with how the old
code was initializing the deprecated fields of spi_cs_control.
Signed-off-by: Kumar Gala <galak@kernel.org>
Use hal function for low level access.
Use device tree for hardware configuration.
Support for esp32s2.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
This commit moves the hardware configuration for ledc
peripheral to the device-tree instead of Kconfig.
Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
In case the resolution is already correct (probably the common use
case), do nothing instead of disabling the ADC.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The ADC is currently disabled and re-enabled multiple time during each
read. Enabling the ADC is not a free operation on some series and some
internal channels like VREFINT take even longer. This patch improve the
situation by removing the calls to adc_stm32_enable(), replacing it by a
single call just before triggering the conversion.
This also open the possibility to not reconfigure the ADC if it is
already configured, implemented in the following patches.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This fixes a bug in the sm351lt driver whereby global triggering will
cause an MPU fault due to an unset pointer.
Signed-off-by: Jamie McCrae <jamie.mccrae@lairdconnect.com>
Since the driver uses spi_dt_spec there is no need for an explicit
spi_cs_control variable. The variable is unused.
Signed-off-by: Kumar Gala <galak@kernel.org>
As with previous commit, make the timer irq a simple integer variable
exported by the timer driver for the benefit of this one test
(tests/kernel/context).
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This test has gotten out of control. It has a giant #if cascade
enumerating every timer driver in the Zephyr tree and extracting its
interrupt number. Which means that every driver needs to somehow
expose that interrupt in its platform headers or some other API.
Make it a simple integer variable exported by the timer driver for the
benefit of this one test.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This commit introduces driver for granting access for own grant
table and for mapping/unmapping foreign gref. Grant tables are used
for data exchange between Xen domains via shared memory page(s) (e.g.
for sharing ring buffer with driver data) This functionality is
widely used and needed for implementing PV backend/frontend drivers.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
Change the Kconfig prompt for the Xilinx Zynq-7000/ZynqMP PS UART driver to
indicate whichs SoCs it supports.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Do not lock/unlock the System Level Control Registers (SLCRs) in the Xilinx
GEM ethernet driver. The SLRCs are unlocked once at boot time.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
We get type mismatch errors because of use of K_MSEC. As the timeout
is defined in terms of milliseconds and k_uptime_get() returns
milliseconds we can just remove K_MSEC usage.
Signed-off-by: Kumar Gala <galak@kernel.org>
This commit rewrite renesas R-Car clock driver in order
to be able to support any new SoC easier.
This work is so creating a clock driver per soc alongside a
common driver for all reneasas r-car boars.
- drivers: create a driver per soc
- create a common driver
- create a common header used by soc & common driver
- create a soc specific driver calling for common driver
- dts: use new compatible
- use old yaml as common yaml
- create a new "child" yaml to define the new compatible field
- change compatible in device tree
As in Linux, the driver can support both r8a77951 and r8a77950
SoC's so we decided to name the new driver as in Linux with Zephyr
prefix : "clock_control_r8a7795_cpg_mssr.c".
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
This commit is reworking clock definition in
order to match linux filetree and definition
as much as possible.
- dt-bindings: rework renesas clocks dt-bindings
- regroup renesas related dt-bindings in a folder
- rename renesas rcar common dt-binding to match linux name
- add soc specific dt-binding matching linux name
- soc dt-bindings are defining clocks matching linux names
- dts: use new clocks names
- move clocks definitions in SoC layer for each core clock entry
- driver: use new clocks names
As seen in this commit, we are declaring clocks for "R8A7795" SoC
to match linux names.
Linux is not declaring "R8A77951" SoC specific files because
its also supporting the first H3 SoC version numbered "R8A77950".
Signed-off-by: Aymeric Aillet <aymeric.aillet@iot.bzh>
Driver was in a weird state: it made use of
DT_INST_FOREACH_STATUS_OKAY, however, it had an assertion to support a
single instance and used instance 0 properties.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Move driver to use gpio_dt_spec for GPIO interrupt handling.
Added check to vcnl4040_trigger_set to handle case of trigger
mode enabled but the devicetree doesn't have an int_gpios property.
Also, moved up the checking/handling of gpio port device in
vcnl4040_trigger_init so that if we error out its before we
setup any threads and such.
Signed-off-by: Kumar Gala <galak@kernel.org>
Fix wrong control register address used in uart_altera_jtag_init
function which caused memory corruption.
Signed-off-by: Khor Swee Aun <swee.aun.khor@intel.com>
STM32_DT_CLOCKS was designed to take a device tree node label name as
argument: STM32_DT_CLOCKS(uart1)
Change its implementation to take a node identifier instead:
STM32_DT_CLOCKS(DT_NODELABEL(uart1)).
This make its usage more flexible since the argument can now be extracted
from other DT macros such as DT_PARENT. Then, the following can be done:
STM32_DT_CLOCKS(DT_PARENT(child_node_label)).
Since it is now possible implement STM32_DT_INST_CLOCKS using
STM32_DT_CLOCKS.
Finally, update existing STM32_DT_CLOCKS users and convert
STM32_INST_CLOCK_INFO users to STM32_CLOCK_INFO.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
On FVP platform, when parameter 'bp.refcounter.use_real_time' is set
to 1, cntvct_el0 isn't count from 0 and may cause overflow issue in
first timer compare interrupt.
'bp.refcounter.use_real_time' is 0 by default.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
Fast hardware with slow timer hardware can trigger and enter an
interrupt and reach 'sys_clock_set_timeout' before the counter has
advanced.
That defeats the "round up" logic such that we end up scheduling
timeouts a tick too soon (e.g. if the kernel requests an interrupt
at the "X" tick, we would end up computing a comparator value
representing the "X-1" tick!).
Choose the bigger one between 1 and "curr_cycle - last_cycle" to
correct.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
The magnetometer data read from AK9863 is assumed to be big endian
(like the accelerometer & gyroscope data).
However it is in little endian, which means the appropriate byteorder
function is sys_le16_to_cpu().
See the MPU925 register map:
https://3cfeqx1hf82y3xcoull08ihx-wpengine.netdna-ssl.com/wp-content/uploads/2017/11/RM-MPU-9250A-00-v1.6.pdf
At 5.6 HXL to HZH: Measurement Data
Signed-off-by: Loris Schmit <loris.schmit@inovex.de>
Some text in help section was documenting the compatibility of driver
variants with stm32 series.
This is duplicate of information versus device tree which should be
used as single source of information for hardware description.
Remove these lines, so we don't have to touch this driver each time
a series is added.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move variable declaration inside if-def to remove compiler
warning when building the driver without trigger.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
Remove wrapper functions for getting i2c bus and i2c bus
address. This is done here to make it easier to move this
driver to i2c_dt_spec while still having clear separation
between commits.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
Move driver to use gpio_dt_spec for GPIO interrupt handling. Since
the driver can support multiple instances its possible that some
have irq's in dts and some don't. So we add a check in
itds_trigger_set to make sure we have a GPIO device if we are
trying to set a trigger.
Signed-off-by: Kumar Gala <galak@kernel.org>
Simple driver that allows one to choose the clock speed of xtensa cores.
It's basically a shim layer on top of SOC level driver.
Also, a really simple test case was added, mainly to ensure things are
build and are sane.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
On SoCs with two USB controller, Zephyr selects the FS one, and in that
case the ULPI clock needs to be disabled in sleep mode for the
controller to work.
On SoCs with a single USB HS controller, this operation is not needed.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The ULPI clock uses slightly different names on STM32H7X as those
SoC can have more than one USB controller.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
On STM32H7X SoCs, both USB controllers are HS capable, however it is not
possible to connect an ULPI PHY to the USB2 one, which limit it to FS.
Therefore the ULPI clock in sleep mode has to be disabled for USB2 in
all cases. The ULPI clock for USB1 is already disabled when needed in
the usb_dc_stm32_clock_enable() function like for other SoCs.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Do not manually enable the USB clock on STM32H7, as it is already done
in usb_dc_stm32_clock_enable() using the values in the device tree.
This partially fixes the build for STM32H7 devices with a single USB
controller.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The ULPI clock is disabled by default in run mode, there is no need to
disable it again. It is however enabled by default in sleep/low power
mode, so it needs to be disabled.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
mcuboot may use a uart as logger. After application boot from mcuboot,
uart remains in some unknown state. It could leads to some unpredictable
uart behaviour. This commit fixes the issue by resetting of uart state
at the beginning of uart init.
Signed-off-by: Alex Kolosov <rikorsev@gmail.com>
Some services require the ability to query whether a GPIO pin
is configured as an input, output, both, or neither prior to
performing any operations at the service level. This is done
in order to reduce state tracking within the service.
To that end, this change adds
* `gpio_port_get_direction()`
* `gpio_pin_is_input()`, and
* `gpio_pin_is_output()`
Signed-off-by: Christopher Friedt <cfriedt@fb.com>
This commit fixes issue with undefined value during position calculations.
Shift for positions may be >32, so we need to explicitly use unsigned long
casting to prevent unexpected behavior during event handling.
Thanks @jgrall for suggestion.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
This commit fixes barrier usage in Xen event channel driver. Previously
compiler_barrier() was used and it did not prevent processor from
re-ordering of the write operations, that is needed for correct event
handling. It is now changed to data memory barrier (dmb()), which will
work as expected in this situation.
Thanks @jgrall for suggestion.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
This patch modifies the ADXL362 driver to use the new
SENSOR_TRIG_MOTION trigger for activity detection
and SENSOR_TRIG_STATIONARY for inactivity detection.
Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
Logging v1 has been removed and log_strdup wrapper function is no
longer needed. Removing the function and its use in the tree.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
This adds a table to set the dma channel priority from the DTS
The config bits are converted through the table_priority
to match the DMA_Priority_level of the stm32cube HAL.
Fixes#46725
Signed-off-by: Francois Ramu <francois.ramu@st.com>
MISRA C:2012 Rule 8.2 (Function types shall be in prototype form with
named parameters.)
Added missing parameter names.
Signed-off-by: Abramo Bagnara <abramo.bagnara@bugseng.com>
This commit adds new functions, which can be used for Xen event channel
management (allocation, interdomain binding etc.). Such functionality
is needed for Xen PV driver development in Zephyr.
Signed-off-by: Dmytro Firsov <dmytro_firsov@epam.com>
CAN1 and CAN2 share the memory for the filter banks.
This commit adds an offset for filters installed for CAN2, allowing to
use both CAN instances simultaneously.
The hardware allows to freely split the avalable 28 filters between
CAN1 and CAN2. In order to simplify the driver implementation, it only
supports an equal split of 14 filters per instance. This is the same
amount of filters as available in MCUs with only a single CAN.
Signed-off-by: Martin Jäger <martin@libre.solar>
Remove two functions which were only called from one place and did
not improve readibility of the code.
Signed-off-by: Martin Jäger <martin@libre.solar>
This commit unifies the driver initialization for can1 and can2
instances so that a single macro can be used.
Enabling the master clock for can2 as introduced in 8ab81b02 had to
be moved to devicetree in order to have the same CAN_STM32_CONFIG_INST
macro for all instances.
Signed-off-by: Martin Jäger <martin@libre.solar>
Add I2C bus recovery support to the NXP MCUX LPI2C driver. Since the LPI2C
peripheral block does not natively support I2C bus recovery, recovery is
performed using GPIO bitbanging.
Fixes: #42574
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Stop relying on <soc.h> to access HAL APIs. Use generic, per-API headers
instead. Note that <soc.h> has been left as is for now, since ARM MPU
relies on a fragile chain of includes/type definitions.
This change should improve compilation efficiency, as we no longer pull
APIs that are not needed. A similar approach is followed by STM32
drivers.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Update edac shell comments reflecting devmem move from edac to a
special shell module.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
This patch removes a superfluous write to the INTMAP1 register
that happens because the byte count was previously wrong.
Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
This commit adds a check for the validity of the "sub_system" param in
clock_control_on.
While for clock_control_off there was a check if the clock_subsytem
parameter is in range of STM32_PERIPH_BUS_MIN and STM32_PERIPH_BUS_MAX
this check was missing for clock_control_on.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
Entering deep sleep mode stops the source clock of the ADC module and
could corrupt the ongoing ADC conversion. This commit lets ADC driver
acquire the PM lock during the ADC operation (either single conversion
or repetitive scan) and release it when the ADC conversion stops.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
the return is missing at the end of function which causes compilation
warning and block the build on github.
"warning: control reaches end of non-void function [-Wreturn-type]
92 | }| ^"
Signed-off-by: TLIG Dhaou <dhaou.tlig-ext@st.com>
wait_write_queue() get passed a device and an offset to compute the
sector number and verify it is valid. However both operations are
already done by the caller, so let's pass directly the
flash_stm32_sector_t value instead.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The STM32H7 flash driver read-back a register after writing it to ensure
it is flushed. This is very fragile and might break if a new compiler
version slightly reorder the instructions. Instead use a __DSB()
barrier like done on other STM32 SoC, which ensures that the registers
and the data writes are flushed at the compiler level, but also at the
Cortex-M7 level.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
As the erase time for a sector differs by a few order of magnitude for the
various SoCs of the STM32H7 family, use the just added max-erase-time
property from the device tree instead of the hard-coded 4 seconds value.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
This commit drops the `IRAM_ATTR` macro from the function declarations
because:
1. `IRAM_ATTR` macro makes use of the `__COUNTER__` preprocessor macro,
which increments for every macro invocation and causes the section
specified in the forward declaration to not match that of the
function definition.
2. Section attributes need not be specified for forward declarations.
Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Fix the flow of I2C enable interrupt. We should enable the interrupt
after I2C configuration is completed to avoid pending interrupts and
cause errors irq.
Test port:
i2c_ite_it8xxx2: i2c0
i2c_ite_enhance: i2c4
Test:
tests\drivers\i2c\i2c_api --> pass
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
-Kept getting an error on STM32g0xx chips that didn't have q-divisor.
-Changed to set prescaler only if it's being used.
Signed-off-by: Dan Higginbotham <daniel@dedesignworks.com>
The FDCAN clock was being enabled using HAL APIs instead of the generic
clock control API.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Support writing to NOR-Flash over OSPI using
the following modes:
* 1-1-1
* 1-1-4
* 1-4-4
Supports 4-Byte opcodes conversion for write opcodes.
Allows users to set what write/program opcode is used
in the DTS (not for OPI mode).
Will use some default PP opcodes based on the mode.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Adds support to read and erase NOR-Flash over OSPI using
the following modes:
* 1-1-2
* 1-2-2
* 1-1-4
* 1-4-4
Supports 4-Byte opcodes conversion and gets address width
from the SFDP:BFP.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Adds:
* PP and Read 4-Byte command defines
* PP 1-1-2 define
* Missing 1-2-2 (0xBB) and Read Fast (0x0B) command defines
Re-arranges the commands so that they stay in order.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Move to using NET_DEVICE_DT_DEFINE_INSTANCE instead of
NET_DEVICE_INIT_INSTANCE as the driver is devicetree based and it
lets us remove DT_LABEL usage in the driver itself.
Signed-off-by: Kumar Gala <galak@kernel.org>
The measurement time in normal mode was too short.
With this commit the maximum value of the datasheet is applied.
Signed-off-by: Thomas Stranger <thomas.stranger@outlook.com>
The driver supported getting register shift from Devicetree, from a
custom definition in SoC headers (fragile) or, it took a default value.
This change simplifies things by making reg-shift property required in
all instances.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
For devices with more than one CAN peripherals, CAN1 is the master and
its clock has to be enabled also if only CAN2 is used.
Signed-off-by: Martin Jäger <martin@libre.solar>
Files including <zephyr/kernel.h> do not have to include
<zephyr/zephyr.h>, a shim to <zephyr/kernel.h>.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
MISRA C:2012 Rule 7.2 (A `u' or `U' suffix shall be applied to all
integer constants that are represented in an unsigned type)
Added missing `U' suffixes in constants that are involved in the
analyzed build, plus a few more not to introduce inconsistencies
with respect to nearby constants that are either unused in the
build (but implicitly unsigned) or are used and are immediately
converted to unsigned.
Signed-off-by: Abramo Bagnara <abramo.bagnara@bugseng.com>
The current implementation for events channel is using an empty
callback for every unbind channel and the interrupt is clearing
every event and calling the callback.
However in a scenario where a domain fires a notification when
another has not yet bind the channel, the event will be missed.
To address this limitation, this commit is keeping track of
missed event channel notification when the empty callback is
used, a function to retrieve and clear the missed event is
introduced.
Signed-off-by: Luca Fancellu <luca.fancellu@arm.com>
This commit extends Nordic's ieee802154 driver with the possibility to
set Tx power for every transmission separately.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
This commit extends the `struct net_pkt` structure with
`ieee802154_txpwr` field that contains signed value of the desired
transmission power of a IEEE 802.15.4 frame in dBm.
Signed-off-by: Jedrzej Ciupis <jedrzej.ciupis@nordicsemi.no>
Remove intel_s1000_crb pinmux driver. The board is no longer available
or supported in the zephyr tree.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
When defined as 'char', the compiler notices that the memcpy targeting that
address will write more than one byte which generates a warning. Use an
array instead so that the compiler doesn't assume a specific size.
Signed-off-by: Keith Packard <keithp@keithp.com>
Sensor value computation was creating a 64-bit integer value, passing
that to 'abs' and assigning that to an int32_t result and then sanity
checking the result. If the computation goes badly wrong, then the range
reduction of 64-bit to 32-bit values could generate a falsely in-range
value.
Instead, perform the computation in 64-bits, range check that value and
then assign to a 32-bit variable.
Signed-off-by: Keith Packard <keithp@keithp.com>
This driver carefully saved the errno value from the failing call and
then didn't use it in the ERROR report, using the potentially invalid
current errno value (which may have been set by the close call).
Signed-off-by: Keith Packard <keithp@keithp.com>
Remove unused WS2812_GPIO_CLK macro that references DT_LABEL. The
WS2812_GPIO_CLK macro isn't used anywhere so remove it since we
want to minimal DT_LABEL references in drivers.
Signed-off-by: Kumar Gala <galak@kernel.org>
Added bus locking mechanism, this patch resolves deadlocks
for more than one device on i2c bus, it is based on i2c_sam0 code.
Signed-off-by: Wojciech Slenska <wsl@trackunit.com>
This patch adds driver for the Microchip Polarfire SOC MSS QSPI
controller.
The interrupts of the MSS QSPI are routed through PLIC(Platform level
interrupt controller).
Tested with generic spi-nor flash driver(spi_flash) with both Fixed
flash configuration and Read flash parameters at runtime(using SFDP).
Signed-off-by: Naga Sureshkumar Relli <nagasuresh.relli@microchip.com>
- The MX25UM51345G flash is connected to FLEXSPI PortA for
mimxrt595_evk.
- Updated flexspi_mx25um51345g driver to support DTR OPI mode.
- Tested with tests/drivers/flash.
Signed-off-by: Chay Guo <changyi.guo@nxp.com>
Add watchdog support to the mimxrt595 platform.
The mimxrt595 platform is excluded from the watchdog
test case because the test case uses variables in the
noinit section that need to be retained through a reset
but the rt595 does not retain this memory through a
reset.
Signed-off-by: Chay Guo <changyi.guo@nxp.com>
This PR introduces a fix for DRX window being triggered to early during
CSL. Fixes were also introduced in the nrf 802154 radio
driver, so removed the unneeded DRX_ADJUST constant.
Signed-off-by: Artur Hadasz <artur.hadasz@nordicsemi.no>
All the gpio drivers are based on devicetree and thus we always set
HAS_DTS_GPIO, thus we don't need this Kconfig option anymore. Remove
uses as its safe to assume DTS is supported for GPIO.
Signed-off-by: Kumar Gala <galak@kernel.org>
This driver uses stack buffers to hold AT command strings which are
generated at runtime using sprintk. The buffers are only sized for the
expected range of values, not the full possible range given the datatypes
involved. Values outside this expected range could cause a buffer overflow.
To mitigate this, increase the size of each buffer to hold the full range
of each parameter type.
Signed-off-by: Keith Packard <keithp@keithp.com>
These drivers use stack buffers to hold AT command strings which are
generated at runtime using sprintk. The buffers are only sized for the
expected range of values, not the full possible range given the datatypes
involved. Values outside this expected range could cause a buffer overflow.
To mitigate this, increase the size of each buffef to hold the full range
of each parameter type.
Signed-off-by: Keith Packard <keithp@keithp.com>
The Kconfig encodes a dependency on SOC_FAMILY_ARM
even though there is no actual dependency.
This is generic ARM IP and can be used in any SoC.
Signed-off-by: Moritz Fischer <moritzf@google.com>
All the watchdog drivers are based on devicetree and we dont utilize
HAS_DTS_WDT anywhere so we can remove it.
Signed-off-by: Kumar Gala <galak@kernel.org>
Log message references gsm->context.data_rssi which is NULL
when CONFIG_MODEM_SHELL=n. Use gsm->minfo.mdm_rssi which is
internally used when accessing RSSI value.
Signed-off-by: Marek Metelski <marek@metelski.dev>
Check if ppp iface was actually up before taking it down and waiting
for NET_EVENT_IF_DOWN. This allows to call gsm_ppp_stop() even if
the PPP was never started, which previously caused the call to lock
forever. This case is useful, for example, if the modem didn't attach
to network in desirable time and user wants to abort PPP setup.
Signed-off-by: Marek Metelski <marek@metelski.dev>
add changes for command read-back and change from k_sleep to k_busy_wait
which will allow other threads to wakeup
Signed-off-by: Hari Haran Babu <hariharan@linumiz.com>
Signed-off-by: Marcel Graber <marcel@clever.design>
Do not truncate outgoing datagrams if they do not fit in maximum handled
packet size. Set EMSGSIZE errno and return -1 instead.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
This includes a basic driver for built-in flash on the Texas Intruments
SimpleLink CC13xx/CC26xx SoC series.
The driver makes use of driverlib HAL from TI's SDK and was tested on
two LaunchXL development boards with CC1352R and CC2652R SoCs:
- CC1352R1 LaunchXL
- CC26x2R1 LaunchXL
Tests were done using:
- flash shell sample (samples/drivers/flash_shell)
- littlefs filesystem sample (samples/subsys/fs/littlefs)*
- MCUboot (bootloader/mcuboot/boot/zephyr)*
* additional changes in DTS for the boards were required (partitions
table) and are not part of this changeset (will be introduced later)
Some additional information about the implementation:
1. TI's Technical Reference Manual for CC13x2 and CC26x2 points out that
"An individual 64-bit word can be programmed to change bits 1 to 0"
but it seems this 'alignment' requirement is handled internally by
the ROM function and thus 'write-block-size' is set to 1.
2. Interrupts, VIMS and line buffers are disabled during flash content
update (write or erase) and restored afterwards as recommended by TI.
3. Only RAM to flash write is supported (source of data to be written to
flash can't point to flash).
4. The driver doesn't take care of flash sector protection disable as
that functionality is handled by CCFG. Write or erase requests which
refer to a protected area will fail.
Signed-off-by: Piotr Dymacz <pepe2k@gmail.com>
Coverity reported unused value for a variable "ret" in the function
send_socket_data(). Indeed there were two subsequent assignments
to "ret", meaning that the first one was unused.
The root cause of the problem is not checking the value of "ret"
after correctly invoking a function within send_socket_data(). Fix
this by adding appropriate checks.
Coverity-CID: 215249
Signed-off-by: Aleksandar Markovic <aleksandar.markovic.sa@gmail.com>
Check if there are multiple non-empty data fragments passed to sendmsg()
function. If positive, then set EMSGSIZE errno and return -1, as that case
is not handled properly with current implementation.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
If one data fragment was not sent successfully in sendmsg(), then
attempting to send the rest does not make any sense, as it would introduce
hole in data stream.
Currently if one fragment was not sent successfully, then there is a
'break' in inner loop, but that moves the execution to sending the
following data fragments.
Return early in case of fragment sending failure, so that there are no more
send attempts.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
added user_data field to modem_cmd_handler_data
this allows for multiple instances of modem drivers which use
the modem cmd handler. currently, the only identifiable
parameter passed to the modem command handlers is the
modem_cmd_handler_data struct.
The added user_data variable allows for the a modem driver to
pass its dev or data pointer to the modem_cmd_handler_data
struct to be retrieved from within the modem command callbacks.
Signed-off-by: Bjarki AA <baa@trackunit.com>
All drivers using 'modem_pin' abstraction were converted already, so remove
its implementation now.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Move away from 'modem_pin' abstraction as it has not obvious value compared
to generic 'gpio_dt_spec'.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Move away from 'modem_pin' abstraction as it has not obvious value compared
to generic 'gpio_dt_spec'.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Move away from 'modem_pin' abstraction as it has not obvious value compared
to generic 'gpio_dt_spec'.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Move away from 'modem_pin' abstraction as it has not obvious value compared
to generic 'gpio_dt_spec'.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
UART device pointer is already used directly when configuring modem
interface. Convert the case when UART is reconfigured when 'target-speed'
DT property is specified.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
<soc.h> has been traditionally been used as a proxy to HAL headers,
register definitions, etc. Nowadays, <soc.h> is anarchy. It serves a
different purpose depending on the SoC. In some cases it includes HALs,
in some others it works as a header sink/proxy (for no good reason), as
a register definition when there's no HAL... To make things worse, it is
being included in code that is, in theory, non-SoC specific.
This patch is part of a series intended to improve the situation by
removing <soc.h> usage when not needed, and by eventually removing it.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
<soc.h> was included because some CMSIS helpers (__DMB/__ISB) were
needed. In ARM SoCs, inclusion of CMSIS headers depends mainly on how
HALs decide to do it, being usually an inefficient and fragile include
chain. Note that on ARM64 we're in a better position, as those are
defined in-tree.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
<soc.h> has been traditionally been used as a proxy to HAL headers,
register definitions, etc. Nowadays, <soc.h> is anarchy. It serves a
different purpose depending on the SoC. In some cases it includes HALs,
in some others it works as a header sink/proxy (for no good reason), as
a register definition when there's no HAL... To make things worse, it is
being included in code that is, in theory, non-SoC specific.
This patch is part of a series intended to improve the situation by
removing <soc.h> usage when not needed, and by eventually removing it.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Add a new selectable Kconfig option to decide wether the device driver
is a MMIO device or not. Previous to this patch, the decision was maded
based on the existence of a definition in <soc.h>. The design was
fragile, as code compiled anyway if the definition was not present.
All platforms/boards that had the definition in <soc.h> select the
Kconfig option in their respective defconfig files.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Deep Sleep mode stops SMB module clocks which could interrupt ongoing
I2C transactions, so have the I2C driver acquire a PM lock at the
beginning of a transaction and release it at the end in order to ensure
the module remains active.
Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
Remove unconditional write to PCA95xx output registers in setup_pin_dir,
and only write to output registers if selected pin is configured as
an output.
Fixes#45774
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This patch adds DTS properties for using wake-up mode
and the autosleep function to the ADXL362 driver.
Signed-off-by: Maximilian Deubel <maximilian.deubel@nordicsemi.no>
As per XMCLib documentation we need to check that data has been received
before reading the buffers.
Fixes test_uart_poll_in test in tests/drivers/uart/uart_basic_api.
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
Casting to uint16_t* can cause an unaligned usage fault when c is not
aligned to 2 bytes and can unintentionally overwrite data when c has a 1
byte memory size. Also there's no need to cast to uint16_t* because
returned words are 8-bit characaters as setup in the configuration.
Fixes the following usage fault error in tests/drivers/uart/uart_basic_api:
START - test_uart_poll_in
Please send characters to serial console
E: ***** USAGE FAULT *****
E: Unaligned memory access
E: r0/a1: 0x00000000 r1/a2: 0x2000078f r2/a3: 0x0c00453c
E: r3/a4: 0x00000000 r12/ip: 0x00000000 r14/lr: 0x0c003de5
E: xpsr: 0x41000000
E: Faulting instruction address (r15/pc): 0x0c003de4
E: >>> ZEPHYR FATAL ERROR 0: CPU exception on CPU 0
E: Current thread: 0x20000118 (unknown)
E: Halting system
Signed-off-by: Andriy Gelman <andriy.gelman@gmail.com>
The CPU in Aspeed AST10x0 SOC is a ARM Cortex-M4 which doesn't internal
cache memory. Aspeed implements an integrated system level cache to
accelerate instruction and data memory accesses.
Signed-off-by: Dylan Hung <dylan_hung@aspeedtech.com>
Add a pseudo device diver with device tree bindings for coredump.
The device tree bindings exposes memory address/size values to be
included in any dump. And the driver exposes an API to add/remove
dump memory regions at runtime.
Signed-off-by: Mark Holden <mholden@fb.com>
This commit aligns SPIM shim to utilize memory-region property from
nordic,nrf-uarte compatible. The memory-region is not required
property that enables user to specify placement of dma buffers
in memory region. It is done by assigning to memory-region property,
phandle to node with zephyr,memory-region and mimo-sram compatible.
When memory-region property is not specified for given
instance, buffer is placed in default RAM region with other data.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
This commit aligns UARTE shim to utilize memory-region property from
nordic,nrf-uarte compatible. The memory-region is not required
property that enables user to specify placement of dma buffers
in memory region. It is done by assigning to memory-region property,
phandle to node with zephyr,memory-region and mimo-sram compatible.
When memory-region property is not specified for given
instance, buffer is placed in default RAM region with other data.
Signed-off-by: Adam Wojasinski <adam.wojasinski@nordicsemi.no>
The ALH is an intermediary device, which acts as a hub and provides an
abstracted support for numerous sound interfaces (e.g. SoundWire).
Signed-off-by: Adrian Bonislawski <adrian.bonislawski@intel.com>
The SPI peripheral on SiFive parts uses FIFOs for Rx and Tx (FIFO size
undocumented, but empirically found to be 8 bytes on FE310, likely
identical on FU540 / FU740). Make use of these FIFOs in order to
continuiously feed Tx data as available.
Verified to transmit 1 MHz SPI @ 200 MHz coreclk / tlclk on FE310
continuously without downtime between frames.
Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>
spi_context uses uint8_t buffers, and HW rxdata / txdata registers only
contain 8 bits of data (along with b31 full / empty flag), so uint8_t is
appropriate.
Suggested-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>
mux_enabled check in the gsm_configure is unnecessary since it
is init and scheduled by gsm_ppp_start which means that the
mux must be disabled. The IS_ENABLED(CONFIG_GSM_MUX) check
should be good enough to determine whether or not the
mux_enable function should be ran.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
After the introduction of start/stop & rssi query work, these
additional functions can be invoked from different threads.
Things can quickly become hard to analyze when an interrupt
fires during one of these functions and upon return the
scheduler schedules another thread and run another function.
This PR introduces a simple mutex lock that guarantees thread
safety. Similar implementation can be found in hl7800 driver,
which has lots of public APIs that can be invoked from different
threads.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Update gsm_ppp.c
Move the rssi query part out from the rssi_handler work item as
an individual function, so that it can be used directly without
referencing the work.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Fix#46112 introduced a regression regarding rx fifo length.
This fixes it so that the last byte is not placed in
wrong buffer index.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
To support both 8-bit and 32-bit Control/Status register variants, register
offsets need to be calculated from device tree.
Updated register data in device tree to the 32-bit CSR variant.
Renamed defines to be similar to other LiteX drivers.
Changed frequencies in clock-outputs nodes, so i2s/litex sample works.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Correct width when accessing LITEETH_RX_LENGTH register.
Also update register data in device tree to the 32-bit CSR variant.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
LiteX HAL should be used when accessing Control/Status registers to provide
compatibility between different data widths of CSRs.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Make driver take register info from device tree so it can work with both
8-bit and 32-bit CSRs.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
anomaly_122_init() and anomaly_122_uninit() procedures implement
proper activate and deactivate procedures which are required for
achieve low power consumption.
The real workaround for the anomaly is buried inside hal function
nrf_qspi_disable() is called indirectly by the anomaly_122_uninit().
Therefore anomaly_122_init/uninit should be called for any
nrf QSPI device.
This patch renames functions and make call to them mandatory.
This fixes increased power consumtion issue on nRF53 device when
qspi was used.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Adds few missing zephyr/ prefixes to leftover #include statements that
either got added recently or were using double quote format.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This add UART_NS16550_VARIANT_16550 configuration inside the choice
of UART_NS16550_VARIANT_NS16750 and UART_NS16550_VARIANT_NS16950.
The configuration is enabled by default to make NS16550 device to get
correct FIFO size configuration (16 bytes).
fixes#45783
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
The current sam0 adc driver not implement correctly the adc_reference
enum values. This try homonize adc input referece by tracking VDDANA
at ADC_REF_VDD_1. The ADC_REF_VDD_1_2 were fixed with correct INTVCCx
channel selection.
Fixes#45443
Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This sensor is virtually identical to the lsm6dso. The only difference
is the accelerometer ranges are double those of the lsm6dso.
Use the same driver. The difference is detected by using "st,lsm6dso32"
as the first compatible entry, followed by "st,lsm6dso".
An bit flag in the existing accel_range config field is used to check if
the chip is the doubled range or not.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
Move common settings out of the SPI and I2C instantiation macros and
into a common macro, which the aforementioned two macros can then use.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
In ST HAL v2.00, the functions to get the raw sensors values, e.g.
lsm6dso_acceleration_raw_get(), convert from little-endian to CPU.
Previous versions of ST HAL didn't do this.
The conversion here in the driver is converting a second time. It's not
an issue on a LE system, the conversion is a no-op, but on a BE system
it would be broken.
Signed-off-by: Trent Piepho <trent.piepho@igorinstitute.com>
Check if W5500 int pin is still active after processing the interrupt.
If not doing correctly, the W5500 driver can deadlock because it is not
receiving any more interrupts.
Signed-off-by: Janco Kock <jancokock@gmail.com>
Unifying the method signature introduced a redeclaration of variables,
fixes redeclaration of variables by renaming the inner ones
Signed-off-by: Michael Schmitz <michaelschmitz@live.de>
This commit introduces changes in three places in order to fix the
problem with timer-related tests on FE310-based boards:
* tests/kernel/sleep/kernel.common.timing
* tests/kernel/tickless/tickless_concept/kernel.tickless.concept
* tests/kernel/workq/work_queue/kernel.workqueue
The first change is the modification of the SYS_CLOCK_HW_CYCLES_PER_SEC
value back to 32768 Hz to match FE310's datasheet description.
The second change is CLINT frequency reduction in Renode simulation
model to 16 MHz to correspond with the oscillator frequency given by the
FE310's datasheet and the HiFive1 board schematic. This fixes the first
two tests.
The last change is reducing the MIN_DELAY define to 100. This causes the
RISC-V machine timer driver to update the mtimecmp register more often,
which in turn addresses the `work_queue/kernel.workqueue` problem with
work items finishing prematurely, causing the above-mentioned test to
fail.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
Checking that provided pclken->bus fits bus range in
clock_control_get_rate() is wrong as it could actually be a source
clock and hence not belong to this range.
Also, this kind of check is just not needed since this function should
not be used before call to clock_control_on() or clock_control_configure()
which do the required verification.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Assertions in can_mcan failed because the driver expects values
strictly greater than 0
Signed-off-by: Tomislav Milkovic <tomislav.milkovic95@gmail.com>
Current poll_in function implementation blocks when there is
no data available. The Zephyr documentation for poll_in
expects the function to return -1 when no data is available.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
1. Make sure the relative alarm value is set correctly
2. Add a Kconfig to give user the option of reserving
a CTimer channel for implementing the set_top_value
function
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Fix the instance config structure name so that it's coherent with the
data one (missing underscore after the instance idx).
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Config pwm open-drain mode without enabling STORE_REG. This CL
collects all active PWM's base address and related index in an
array. Then, pinctrl driver configs its open-drain mode by
finding the corresponding 'channel' index.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
For some reason, rather than testing for the presence of
disconnect-gpios in the devicetree, the STM32 USB Device driver was
relying on a hidden Kconfig flag to be set.
This patch removes the Kconfig option completely and simply tests for
the DT property - if it's set, you obviously know what you're doing and
obviously need the pull-up GPIO behaviour.
Signed-off-by: Chris Collins <chris@realsimgear.com>
This PR Fixes the Audio PLL Rate Calculation (there was an additional
divide / 8 which is not necessary and does not appear in similar
calculations in example code from the SDK).
Additionally, it adjusts the SAI .dtsi to more correctly configure the
mclk rate, and adds comments specifying what the regististers mean.
Signed-off-by: Nickolas Lapp <nickolaslapp@gmail.com>
Pinmux is depricated (see #39740) and shouldn't be used anymore
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
some iMX RT SOCs have non contiguous sets of gpio pins available, which
caused issues when selecting appropriate pinmux for these parts. Add
workaround code to adjust offset of pinmux settings when configuring
these pins.
Fixes#44391
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The flash_stm32_write_range() function of the STM32H7x flash
driver partially uses a wrong flash program word size for certain
SOC types when calculating the flash write offset. If the used
SOC is not having a flash program word size of 256 bits / 32 bytes
the written data might get corrupted, as the flash write offset
value does not match the number of bytes that were actually
written.
Fixes#45568
Signed-off-by: Christoph Heller <chris@metanetics.de>
PHY TX power configuration must be added into soc level.
It was previously hardcoded in hal_espressif, which was removed.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
When the loopback drops driver packets, the number of dropped
packets is counted and can be requested externally.
Signed-off-by: Sjors Hettinga <s.a.hettinga@gmail.com>
Incorrect GPIOTE channel was being freed because the pin number
being used is not the absolute pin but the pin within the port.
Signed-off-by: Wael Barakat <waelsbarakat@gmail.com>
Add inclusions of header files with devicetree related ADC definitions
to the nRF SoC dtsi files so that those definitions can be used also
for nRF SoC based boards.
Provide definitions of nRF ADC and SAADC analog inputs suitable
for use in devicetree.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add 'inversion-on' property to st7735r.
Issue INVON(21h) command on initializing if inversion-on was enabled.
As a result of this command, the display color is inverted.
Otherwise, INVOFF(20h) will be issued.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
There is no need in the `flag_quad_io_en` field.
When QE enabling failed, then the driver `init` fails as well.
There is no way to use qspi in quad mode if qe is not enabled.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Adds support for 1-4-4 and 1-1-4 read modes.
SFDP is used to query for available read instructions, then the
fastest one is used.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
* Renames 4PP define to PP_1_4_4
* Adds PP_1_1_4 define
That matches linux kernel defines a bit more.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
On STM32WB and dual-core STM32H7 MCUs, the RNG peripheral is shared
between the cores and its access is protected by a hardware semaphore.
Locking was not performed in the current entropy driver, leading to a
race condition when multiple cores concurrently used the RNG. This
commit implements the necessary logic for locking the HSEM during entropy
generation on multi-core STM32 MCUs. It also reconfigures the RNG in case
the configuration was changed by the other core, as this can happen e.g
on STM32WB MCUs.
Signed-off-by: Thomas Altenbach <taltenbach@witekio.com>
Some sockets (UDP sockets at least) do not generate "<N>,CLOSED"
messages when the WiFi network drops. As a result the networking stack
thinks these sockets are still open after the network has dropped, and
after any subsequent reconnections.
This affects the DNS resolver library in particular, which leaves UDP
sockets open permanently by default.
Manually close these sockets when the network drops to ensure a clean
state the next time the network connects.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
`esp_close_work` can be queued from the `on_cmd_closed`, which clears
`ESP_SOCK_CONNECTED` and sets `ESP_SOCK_CLOSE_PENDING`, but does no
further work. The receive callback should still be run with no data when
the socket is closed through this mechanism.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Use the dedicated `DT_INST_STRING_TOKEN` macro instead of manually
retrieving `DT_DRV_INST`.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Xilinx AXI UART Lite v2.0[1] has the following clause for both RX and TX
FIFO respectively:
When a read request is issued to an empty FIFO, a bus error (SLVERR) is
generated and the result is undefined.
When a write request is issued while the FIFO is full, a bus
error (SLVERR) is generated and the data is not written into the FIFO.
To protect this, we have:
xlnx_uartlite_read_status(dev) & STAT_REG_RX_FIFO_VALID_DATA, and
xlnx_uartlite_read_status(dev) & STAT_REG_TX_FIFO_FULL
but these are not enough for multi-threaded apps. Consider two threads
calling poll_out(), it is always possible for a thread to be swapped out
right after reading the status register, the other thread fill the TX FIFO,
and the original thread is swapped back to write more data to the FIFO
because previously read status doesn't indicate the FIFO is full.
To close this race condition, this commit uses a spinlock for each FIFO.
This ensures that only one thread accesses the FIFO even for SMP cases.
This closes#45302.
[1] https://docs.xilinx.com/v/u/en-US/pg142-axi-uartlite
Signed-off-by: Yasushi SHOJI <yashi@spacecubics.com>
Add pin control support to gpio_imx driver, so that GPIO pin muxes will
be selected when the use configures a pin as GPIO.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add additional pin controller settings for iMX application core SOCs, as
well as a "fallback" pin control setting.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Refactor iMX RT pin control support to use more generic names, as the
IOMUXC peripheral is present on non RT iMX application cores.
Additionally, make selection of the pin control driver occur at the SOC
level.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Simplifies the driver and Gives a generic function to prepare the Regular
commands for each instruction.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
This is the stm32 octospi driver based on the exisitng quadspi
for stm32 devices and source code from the STM32Cube.
This drivers initialized the peripheral and the NOR memory
in SPI or OctoSPI mode with STR or DTR data Transfer rates.
The NOR-flash can provide the SDFP table directly (if supported)
or through the DeviceTree.
Limitation: no DMA transfer.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
With the introduction of the OSPI NOR flash controller
more octal commands and parameters are defined.
It completes the existing SPI commands
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Whenever EC bootloader already configured a pin as output and
high, any further reconfiguration via pinctrl driver causes a
glitch in said pin with current sequence.
Defer pin direction configuration to be last operation over
gpio control register to avoid the glitch.
Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
Log a message when the modem asynchronously closes a link. This is
useful information to the user as it can explain the root cause of later
failures.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in npcx eSPI and host_subs driver.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in npcx adc driver. Please notice users need to
configure the corresponding pinctrl nodes in 'pinctrl-0' property in the
adc0 DT node. For example, if ADC0 and ADC2 channels are selected for
the application, please add the follwoings in your board DT layout file.
&adc0 {
status = "okay";
/* Use adc0 channel 0 and 2 for 'adc_api' driver tests */
pinctrl-0 = <&adc0_chan0_gp45
&adc0_chan2_gp43>;
pinctrl-names = "default";
};
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in npcx tachometer driver.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in ps2 driver.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in pwm driver.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in i2c driver.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in uart driver.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
This CL is the initial version for npcx pinctrl driver and introduces
pinctrl nodes for both IO-pads and peripheral devices for each npcx
series. Users can set pin configuration via these nodes in the board
layout DT file. It also wraps all configurations related to pin-muxing
in pinctrl_soc.h. Regarding the other pin properties, we will implement
them later.
Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Update the MCUX ELCDIF driver to use CONFIG_MCUX_ELCDIF_POOL_BLOCK_NUM
for the number for frame buffers to allocate.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
This is a follow-up to commits e15bdaa1bd
and 07bf22cc94.
The above two commits added some enumerated gain values and those
are not currently handled by the inverting function. Add the missing
entries to the conversion array in the function.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Enabling an eSPI channel (r.g. Peripheral Channel, Virtual Wire Channel,
etc.) during an eSPI transaction might (with low probability) cause the
eSPI_SIF module to transition to a wrong state and therefore response
with FATAL_ERROR on an incoming transaction.
This CL workarounds this issue by clearing the bit 4 of NPCX eSPI
specific register#2.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
A missing semicolon caused compiler errors when more than one emulated
gpio device was defined in the device tree.
Signed-off-by: Jan Peters <peters@kt-elektronik.de>
Add support for an alternate clock. If available,
alternate clock is enabled and used to get the
device clock rate.
Based on: #45053.
Signed-off-by: Artur Lipowski <Artur.Lipowski@hidglobal.com>
Previously, the uart_stm32 driver was extended in #44487 to support
swapping the tx and rx pins of supported STM32 UART peripherals.
However, the original change applied this configuration during the
call to the uart_stm32_configure() function. This has now been added to
the uart_stm32_init() function to ensure this behavior on startup for
ports like the virtual com port.
Signed-off-by: Peter Maxwell Warasila <madmaxwell@soundcomesout.com>
Refactors invalid switch into if statement.
Fixes orientation set return value for normal
display orientation.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
Make sure cxcprs isn't zero, or we will have
divide-by-zero on calculating actual_freq.
Test:
1.tests/drivers/pwm/pwm_api pattern
2.GPA0(pwm0) output 79201Hz, 324Hz, 100Hz, 1Hz waveform
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Add support for enabling/disabling CAN-FD frame transmission/reception at
run-time.
Fixes: #45303
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Convert the can_mode enum to a bit field to prepare for future extensions
(CAN-FD mode, transmitter delay compensation, one-shot mode, 3-samples
mode, ...).
Rename the existing modes:
- CAN_NORMAL_MODE -> CAN_MODE_NORMAL
- CAN_SILENT_MODE -> CAN_MODE_LISTENONLY
- CAN_LOOPBACK_MODE -> CAN_MODE_LOOPBACK
These mode names align with the Linux naming for CAN control modes.
The old CAN_SILENT_LOOPBACK_MODE can be set with the bitmask
(CAN_MODE_LISTENONLY | CAN_MODE_LOOPBACK).
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename the CAN data phase API functions to timing_data_* for consistency:
- can_get_timing_min_data() -> can_get_timing_data_min()
- can_get_timing_max_data() -> can_get_timing_data_max()
- .timing_min_data -> timing_data_min
- .timing_max_data -> timing_data_max
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Enable pin control for lpc11u6x i2c driver, and remove pinmux usage from
board level DTS files.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
convert lpc11u6x syscon clock driver to pin control, and remove all
pinmux usage from driver and syscon dts node.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Update pin control driver for lpc11u6x. This SOC does not have a HAL,
so fsl_clock is not available. It also lacks a slew-rate field in the
IOCON register, so this property must be optional.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
switch gpio driver to use pio nodes to configure pin control settings,
and stop using pinmux driver within gpio driver.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Improve the power domain logging by making the log level configurable
and boosting the log level of the messages printed when the domain turns
on and off.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Adding support for the GIC_V1 to the dc_dw USB driver
to be used by Cyclone V SoC FPGA Development Kit
Signed-off-by: Esteban Valverde <esteban.valverde.vega@intel.com>
Cyclone V SoC FPGA supports 128Byte FIFO for UART communication,
this modification adds a feature to use 128byte FIFO serial UART
Signed-off-by: Esteban Valverde <esteban.valverde.vega@intel.com>
Similarly to what was done on U5 and H7 clock_control drivers, enable
device clock source selection.
This is done by:
-providing implementation for clock_control_configure().
-updating clock_control_get_rate() to support various possible clock
sources (SYSCLK, PLLCLK, LSE, LSI, HSI, HSE).
-providing enable_clock() to verify requested clock source exists and
is enabled.
-adding LSI and LSE device tree based initialization to
set_up_fixed_clock_sources().
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Rename and factorize clock source bindings accessors by moving them
in common header file stm32_clock_control and remove them from
include/dt-bindings/clock/stm32XY_clock.h files
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add support for an alternate clock. If available,
alternate clock is enabled and used to get the
device clock rate.
Fixes#41650
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
e8e88dea incorrectly changed registers
used in `sys_clock_cycle_get(32|64)` functions.
This commit fixes that.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
ADC threshold control register offset is provided by devicetree, this
change will add this property into `adc_npcx_config` structure and
update macro to access register accordingly. Driver behavior is not
meant to be impacted.
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Number of supported ADC thresholds is provided by devicetree, this
change will add this property into `adc_npcx_config` structure and
replace macro usage. Driver behavior is not meant to be impacted.
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Adds a communications backend based on the asynchronous UART API,
instead of the interrupt-driven UART API. The primary advantage of this
backend is an improved robustness to dropping bytes under high interrupt
or critical section loads.
Under all loads system efficiency is improved by:
* Reducing the time spent writing out individual bytes.
* Reducing the number of UART interrupts fired.
* Waking up the RX thread much less often.
When utilising this backend over `nordic,nrf-uarte` on a nRF52840, the
baudrate of an esp-at modem could be pushed to at least 921600 without
dropping bytes, compared to a maximum of 230400 with the interrupt API.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add a choice symbol that is used to select which UART backend to use.
This allows backends that don't use the interrupt API to be implemented.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Use the proper `%p` printf specifier when printing memory addresses,
instead of casting to an integer, which may not be the same size as a
pointer.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Pretend that the serial test driver supports the interrupt and async
API's, as these can be required for various drivers. Also select
`SERIAL_HAS_DRIVER` so that the serial library will be included.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Depending on `!SERIAL_SUPPORT_INTERRUPT` to enable the driver does not
make any sense, as this is a symbol selected by drivers to signify that
they support interrupts. Simply not selecting this symbol is enough to
convey the desired intention.
This fixes Kconfig problems when the driver is compiled together with
a dummy serial driver which does select `SERIAL_SUPPORT_INTERRUPT`.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Assembler files were not migrated with the new <zephyr/...> prefix.
Note that the conversion has been scripted, refer to #45388 for more
details.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Some SOCs, such as the RT1064 and RT1024, use internal flash and don't
define pinmux settings for the flexspi. Don't check the return code of
pinctrl_apply_state, because the flexspi driver will fail to initialize
when the pin mux settings are simply not required.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add SD response type masks, to allow drivers to mask out the
SPI or SD native mode response type based on the SD host controller
mode they use.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Use the UPLLCK clock for the CAN controller as recommended by the Atmel SAM
E70 data sheet.
Move the configuration of the clock prescaler from Kconfig to devicetree
and limit it to the values recommended by the SAM E70 datasheet.
Fixes: #45012
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This is a follow-up to commit fd7633126e.
For some reason the above commit added several switch cases without
required break statements. In effect, the same pin could get assigned
to multiple signal lines in QDEC or QSPI peripherals if not all pins
were defined for them in devicetree, and consequently these peripherals
could not work properly.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Allow CTS line to determine UART shutdown for any sleep mode.
This allows lower average current consumption for LITE
HIBERNATE mode.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
In order to bring consistency in-tree, migrate all drivers to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Added chosen syntax in Device Tree to abstract the IPC device that is
used with the IPC service module in the Bluetooth HCI RPMsg driver.
Ported affected boards to declare this alias.
Signed-off-by: Kamil Piszczek <Kamil.Piszczek@nordicsemi.no>
Update the Zephyr include paths to be compatible with removing
`CONFIG_LEGACY_INCLUDE_PATH` in the future.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Respect the configured values for how long the domain takes to turn on,
and how long the domain needs to be off for before it can be repowered.
As these actions can block, guard the transition function with
pm_device_action_can_block. To avoid system PM being able to turn the
domain off but not back on again, guard the entire implementation.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Enables the Intel SSP driver by default when the DAI driver class is
enabled (CONFIG_DAI=y) and a compatible devicetree node
("intel,ssp-dai") is enabled.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Use `DT_REG_ADDR_BY_NAME` and `DT_REG_SIZE_BY_NAME` to access register
properties from dts.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Adds addresses and names for individual CSR registers to device tree.
This way liteuart driver no longer depends on CSR data width being 8
bits.
Also when register names or their number changes, then overlay generated
by LiteX will be incompatible with one defined here.
This should make finding breaking changes easier.
I also appended `_ADDR` suffix to defines, to distinguish them from
normal values like `LITEETH_EV_RX`.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Adds addresses and names for individual CSR registers to device tree.
This way liteuart driver no longer depends on CSR data width being 8
bits.
Also when register names or their number changes, then overlay generated
by LiteX will be incompatible with one defined here.
This should make finding breaking changes easier.
I also appended `_ADDR` suffix to defines, to distinguish them from
normal values like `UART_EX_TX`.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Adds addresses and names for individual CSR registers to device tree.
This way timer driver no longer depends on CSR data width being 8 bits.
Also when register names their number changes, then overlay generated by
LiteX will be incompatible with one defined here.
This should make finding breaking changes easier.
I also updated register names to those used in current LiteX and
appended `_ADDR` suffix to defines which lacked them.
Because register `total` was renamed to `value` and `update_total` to
`update_value` I updated variables accordingly as well.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Host might send command or data immediately after EC read the
KBC input buffer (IBF gets cleared).
This change make sure EC won't get wrong event type in IBF ISR.
Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
Move period and pulse computation to right before
the channel enable code.
That fixes the inability to disable the channel by
providing the period of 0.
Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
The STM32u% series of processors has a unique set of clock sources for
the FDCAN peripheral. This brings the selection in line with the
existing can_stm32fd clock selection Kconfigs.
This change was tested on a proprietary board using the STM32U5 series
which exposes the CAN pins of the SOC using a transciever on a live CAN
bus as well as on the nucleo_g474re board from ST in loopback mode.
HSE and PLL1Q tests run and all passed.
PLL2P is not currently supported by the clock drivers for STM32U5, and
as such is currently untested. When this support is added, the driver
should be able to use this clock without issue.
When changes from #42097 are merged this fix should be deprecated in
favor of using the methods outlined there.
Signed-off-by: Peter Maxwell Warasila <madmaxwell@soundcomesout.com>
Set the PCR[MUX] field to kPORT_MuxAsGpio as part of configuring a GPIO
pin. This removes the need to explicitly call pinmux_pin_set() in board
code.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Adds a log backend that maintains a ringbuffer in coordination
with cAVS HDA.
The DMA channel is expected to be given some time after the logger
starts so a seperate step to initialize the dma channel is required.
Signed-off-by: Tom Burdick <thomas.burdick@intel.com>
Do not default FLASH_MCUX_FLEXSPI_XIP to enabled when code is not
located in flash, this will cause issues if code is executing from ITCM,
as the zephyr_code_relocate macro will relocate the flash driver code
into itcm, and overwrite the zephyr image.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Do not query SIM card parameters if the SIM
card is not present.
This shortens the driver initialization time
significantly if a SIM card is not present.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
Store sensor trigger structure reference provided on `trigger_set`, and
pass reference back to client when trigger callback is invoked.
This will enable client to use `CONTAINER_OF()` inside its trigger
callback code.
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Add support for missing EHL SKUs. The information about SKUs is
already public and available in Linux kernel:
https://github.com/torvalds/linux/blob/
38f80f42147ff658aff218edb0a88c37e58bf44f/drivers/edac/
igen6_edac.c#L197-L208
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Add optional PINCTRL support to the Microchip XEC PS2 driver
shared between MEC15xx and MEC172x families.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
Update the Microchip XEC PS2 driver to support MEC172x.
NOTE: MEC15xx has two PS2 controllers and
MEC172x has one.
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
since the flexspi driver interacts with the flash device, storing
device data in flash can cause RWW hazards when running in XIP mode.
Move all device data to RAM to limit these RWW hazards.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
since the flexspi driver interacts with the flash device, storing
device data in flash can cause RWW hazards when running in XIP mode.
Move all device data to RAM to limit these RWW hazards.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Move all device data to RAM. Since the flexspi driver accesses the
flash device that is being used for XIP, various RWW hazards can occur
if the flexspi driver is interacting with the flash device, while
running in XIP mode.
Fixes#45182
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Comparator will monitor signal though ADC channel, based on
user configuration, callback will be triggered.
This will enable comparator functionality for nuvoton MCU utilizing its
ADC threshold detection feature. Implementation is exported through
sensor trigger API. Use of CONFIG_ADC_CMP_NPCX is required.
Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego@intel.com>
Refactor code so that an unused variable 'adc' warning
is not generated when building for CONFIG_SOC_SERIES_STM32G4X
and not using adc1 or adc5.
Signed-off-by: Sam Hurst <sbh1187@gmail.com>
Refactor the Bosch M_CAN shared driver functions to get rid of the
front-end driver wrapper functions.
This requires flipping the relationship between shared config/data
structs and front-end config/data structs. Front-end drivers can now
store a pointer to their custom config/data structs in the .custom
fields of the can_mcan_config and can_mcan_data data structures.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename the private header file for the Bosch M_CAN shared driver code
from can_mcan_int.h to can_mcan_priv.h to follow the common naming
scheme.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
update help text for mcux rt pinctrl peripheral driver, to clarify it
does not support RT600/RT500 parts and only RT1xxx series parts.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
add support for setting pinmux when using IOPCTL peripheral, as well as
setting pin configuration properties.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
add pincontrol headers for IOCON peripheral present on NXP iMX RT600
and RT500 SOCs, and update LPC pin control driver for iMX RT family
differences.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
This modification is required to enable flash encryption.
Using hal implementation of spi_flash calls maintains
compability amongs different socs while offering
latest esp-idf enhancements.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Includes the definition of the STM32_DMA_STREAM_OFFSET
depending on the peripheral to adjust the first DMA channel
in the list of streams.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
In the EC application, the system may jump between two built Zephyr
images when necessary. If we gate the eSPI clock at initialzation, it
will make the eSPI configuration which established by previous image
break and lost the communication between EC and host.
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
remove existing SDMMC SPI driver, since it is replaced by the SPI mode
SD host controller driver.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
with the legacy USDHC driver fully removed from the tree, the
nxp,imx-usdhc binding can now be used for the new SD host controller
driver.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
all in tree SOCs with the USDHC peripheral have now been converted to
use the new SD host controller USDHC driver, so remove legacy NXP disk
USDHC driver.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add SDHC driver implementing spi mode support for SD cards. This driver
implements the standard SD host controller APIs, and sets the host
property "is_spi" to indicate to the SD subsystem the card will be
running in SPI mode.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Implement SDHC driver for NXP USDHC peripheral, supporting all api calls
available in the sdhc driver. This implementation leverages NXP's HAL,
and simply implements a shim layer over the HAL itself.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
LiteX CSRs can only be accessed on addresses aligned to 4 bytes.
That's why in 32-bit CSRs case there is bit shifting needed.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Removed register sizes from config struct, as they are known.
This allowed to remove driver specific function reading from CSR and use
`litex_write*` functions from LiteX HAL.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Use LiteX HAL functions instead of `sys_read*` or `sys_write*`
functions.
They use them inside, but choose which one to use according to
configured CSR data width.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
With universal LiteX HAL working, there is no need to perform multibyte
reads and writes using bitwise operations.
Just use appropriate `litex_read*` or `litex_write*` function.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Use LiteX HAL functions instead of `sys_read*` or `sys_write*`
functions.
They use them inside, but choose which one to use according to
configured CSR data width.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Use LiteX HAL functions instead of `sys_read*` or `sys_write*`
functions.
They use them inside, but choose which one to use according to
configured CSR data width.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Changes signature so it takes uint32_t instead of pointer to a
register.
Later `sys_read*` and `sys_write*` functions are used, which cast
given address to volatile pointer anyway.
This required changing types of some fields in LiteX GPIO driver and
removal of two casts in clock control driver.
There was a weird assert from LiteX GPIO driver, which checked whether
size of first register in dts was a multiple of 4.
It didn't make much sense, so I removed it.
Previous dts was describing size of a register in terms of subregisters
used. New one uses size of register, so right now it is almost always
4 bytes.
Most drivers don't read register size from dts anyway, so only changes
had to be made in GPIO and clock control drivers.
Both use `litex_read` and `litex_write` to operate on `n`bytes.
Now GPIO driver calculates this `n` value in compile time from given
number of pins and stores it in `reg_size` field of config struct like
before.
Registe sizes in clock control driver are hardcoded, because they are
tied to LiteX wrapper anyway.
This makes it possible to have code, independent of CSR data width.
Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>
Make the LSE driving capability configurable for the STM32 series.
Fixes#44737.
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Currently the driver only setup the ADC to read from the
internal temperature channel on init. However, it is possible
that some other application that uses the ADC can setup the
ADC to read from some other channel and therefore subsequent
stm32_temp_sample_fetch will fail to read the targeted channel.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
The ADC should be calibrated on init, there is no requirement
to calibrate ADC again on stm32_temp_init, remove it.
Signed-off-by: Yong Cong Sin <yongcong.sin@gmail.com>
Change the default initialization priority for CAN transceiver from 70 to
45 to initialize them before the CAN controllers (with default a
initialization priority of 50).
Fixes: #45219
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
This change is controlling of function parameters before
configuring the STM32_DMA_HAL_OVERRIDE mode.
Then, in case the DMA channel is not valid (wrong ID) or busy,
an error occurs before overriding the DMA channel.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Fixing a bug where get_regs() was being executed before MMIO mapping
moving the declaration of reg_base after DEVICE_MMIO_MAP
Signed-off-by: Esteban Valverde <esteban.valverde.vega@intel.com>
Consolidate the initialization routines and change the include guard to
conform with the coding guidelines as a preparation for the following
commits which add support for the SPI interface.
Signed-off-by: Leonard Pollak <leonardp@tr-host.de>
This fixes the constant for the mem page and replaces a
magic number with the already defined `BME680_LEN_COEFF2` constant.
Signed-off-by: Leonard Pollak <leonardp@tr-host.de>
PWM has a single set function now, macros like PWM_USEC() can be used to
specify other units than nanoseconds. This conversion was missed during
API updates.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The pwm field in struct args_index was missed when pwm was renamed to
channel in all drivers. As a result, the PWM shell could no longer be
built.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The it8xxx2 watchdog Kconfig options are always shown, for every type
of device, they should only be shown when an it8xxx2 device is being
targeted.
Signed-off-by: Jamie McCrae <spam@helper3000.net>
Includes several driver fixes and improvement to leverage
scatter/gather mode of DMA. Loads multiple DMA blocks into TCDs.
Signed-off-by: Derek Snell <derek.snell@nxp.com>
RX FIFO watermark setting causing issue where last 16 words received
were stuck in FIFO, and not requesting DMA to move to buffer. Fixed by
setting watermark to 0.
Signed-off-by: Derek Snell <derek.snell@nxp.com>
driver config settings were getting overwritten by APIs that set
default settings, like SAI_GetClassicI2SConfig(). Moved config code
after those APIs.
Signed-off-by: Derek Snell <derek.snell@nxp.com>
stream_disable()'s should not always purge buffers.
And i2s_rx_stream_disable() needs separate control for
purging in_queue and out_queue since app owns buffers
after placed in out_queue for i2s_read()
Signed-off-by: Derek Snell <derek.snell@nxp.com>
MCP4728 is a 12-bit, Quad Digital-to-Analog Converter with EEPROM Memory.
Controlled via I2C interface.
Signed-off-by: Marek Janus <marek.janus@grinn-global.com>
In order to be consistent with what is possible in Devicetree, always
take a period in nanoseconds. Other scales or units may be specified by
using, e.g., the PWM_MSEC() macros (all of them converting down to
nanoseconds). This change then deletes the "_nsec" and "_usec" versions
of the pwm_set call.
Note that this change limits the period to UINT32_MAX nanoseconds,
~4.3s. PWM is, in generali, used with periods below the second so it
should not be a problem.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Simplify the driver by using pwm_dt_spec.
TODO: decide if pwm_dt_spec should also store period.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
In a first place, the PWM API operates on "channels", not "pins". While
the API calls could have been changed by _channel, this patch takes the
approach of just dropping _pin. The main reason is that all API calls
operate by definition on a channel basis, so it is a bit redundant to
make this part of the name. Because the `_dt` variants of the calls are
going to be introduced soon, the change to `_channels` + `_dt` would
make API function names quite long.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The variable indicating the PWM channel is now names "channel" instead
of "pwm", adjust all drivers.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The timer registers are accessible via the device config field, driver
code was wrong in one case (pwm is the variable indicating PWM channel).
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Multiple if/else blocks had missing braces, add them as this violates
Zephyr coding guidelines.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Implement the set_top_value. This reserves one of the Match channels
to set the top value and to reset the counter.
Therefore the number of channels available to the user is reduced by 1.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
After change in RD into 64-bit time, target time must be express in
absolute 64-bit time. Upper layer e.g. OpenThread still utilizes only
LSB of the RD time therefore the conversion is required.
Make sure that target time is absolute 64-bit target time.
Signed-off-by: Lukasz Maciejonczyk <lukasz.maciejonczyk@nordicsemi.no>
Add DT option to configure the data ready interrupt mode.
Latched is the default; pulsed can be enabled through
the drdy-pulsed DT, if desired.
Signed-off-by: Maxime Vincent <maxime@veemax.be>
Add optional threshold interrupt support.
Implemented using SENSOR_TRIG_THRESHOLD sensor trigger type.
The features can be optionally enabled through Kconfig,
or disabled for smaller code size.
Signed-off-by: Maxime Vincent <maxime@veemax.be>
Add FDS (Filtered Data Type Selection) + High-Pass reference mode support
(FDS in CTRL6, HP_REF_MODE in CTRL7)
Values are configurable through DT per instance.
Signed-off-by: Maxime Vincent <maxime@veemax.be>
Old code only create one pl011 device instance though there are two or
more pl011 device defined in devicetree. This patch can fix this issue.
Signed-off-by: Huifeng Zhang <Huifeng.Zhang@arm.com>
sensor_channel_get() API should return -ENOTSUP when requested channel
is not supported. This behavior allows to use `sensor get DEVNAME` shell
command easily, as all unsupported channels are filtered out.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
An application with the following config fails to link on nrf53 app
core:
```
CONFIG_BT=y
CONFIG_BT_HCI_RAW=y
CONFIG_ENTROPY_GENERATOR=y
```
This happens because `entropy_bt_hci.c` uses functions from
`hci_core.c`, which is only compiled if `BT_HCI_HOST` is selected.
Signed-off-by: Herman Berget <herman.berget@nordicsemi.no>
Enables the Intel TLB driver by default when the MM driver class is
enabled (CONFIG_MM_DRV=y) and a compatible devicetree node
("intel,adsp-tlb") is enabled.
Signed-off-by: Maureen Helm <maureen.helm@intel.com>
Introduce has-interrupt-mask-reg DTS property for nxp,pca95xx driver.
This additionnal property allow to specify that the gpio expander has an
interrupt mask register that must be configured by the driver.
This allow to use this driver with PCAL95xx.
This fixes issue #44834.
Signed-off-by: Xavier Chapron <xavier.chapron@stimio.fr>
NXP LPUART IP supports loopback mode, where TX is internally connected
to RX input. Allow setting loopback mode up via the "nxp,loopback" dts
property.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
SOCs using the EDMA IP that supported caching must locate EDMA transfer
control descriptors (TCDs) in non cacheable memory. For M7 cores, this
can simply use the "nocache" section. For M4 cores, where the nocache
section does not exist, the chosen SRAM section must be a tightly
coupled memory block which cannot be cached. Add a note to all boards
with M4 SOCs that support caching explaining this issue, and enable EDMA
driver to locate TCDs in SRAM.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
LPUART driver should use shared ISR for all possible use cases,
including ASYNC API, so that multiple features requiring ISR can be
enabled simultaneously.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add support for inverting of PWM channel outputs in the pwm_nrf5_sw
driver by properly handling the `PWM_POLARITY_INVERTED` flag.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Align with other PWM drivers and treat the `pwm` parameter (described
ambiguously as "PWM pin") of the `pwm_pin_set_cycles` function as a PWM
channel, not an SoC pin. This will also make the driver consistent with
the `pwm-cells` property definition in the "nordic,nrf-sw-pwm" binding
and with related `DT_PWMS_*` macros.
The change described above requires also providing a way to specify
SoC pins that are to be assigned to the PWM channels. Hence, the commit
introduces in the "nordic,nrf-sw-pwm" binding the `channel-gpios`
property that replaces the `channel-count` one.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for inverting of PWM channel outputs in the pwm_nrfx driver
by properly handling the `PWM_POLARITY_INVERTED` flag.
The dts properties that were used so far for inverting of the outputs
("nordic,invert" and "chX-inverted") are kept as they are needed for
setting of the initial polarity, i.e. for setting the inactive state
of the outputs before any PWM signal generation is requested for them.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Align with other PWM drivers and treat the `pwm` parameter (described
ambiguously as "PWM pin") of the `pwm_pin_set_cycles` function as a PWM
channel, not an SoC pin. This will also make the driver consistent with
the `pwm-cells` property definition in the "nordic,nrf-pwm" binding
and with related `DT_PWMS_*` macros.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Handle PECI command PING properly, also get Write FCS Byte as a check.
Now it is possible to perform a PECI Ping without crashing the bus or
blocking it for subsequent PECI transactions.
It is also possible to check whether the Ping was sucessful
or not with the Write FCS Byte.
Signed-off-by: Johannes Meister <johannes.meister@kontron.com>
STM32H7 series offer alias addresses to access some registers that could
be accessed by the M4 core on dual core variants.
For instance RCC_AHB3ENR could be accessed at following offsets:
- 0x0D4: Accessible from both cores
- 0x134: Accessible from C1 (M7) core
- 0x194: Accessible from C2 (M4) core (if any)
For most single core H7 variants, the two first addresses were accessible,
but for some others (stm32h7ax/stm32h7bx), only the 'C1 accessible'
was available.
This fact used to be hidden by the use of LL API to access these registers,
providing the required abstraction (an mainly using the first alias
when possible to simplify implementation).
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Instead of computing hclk freq use for flash latency setting after
setting the PLLs, do it right at the beginning of the function.
Indeed, first step of PLL configuration is to switch back sysclock
to HSI source (in case it was initially PLL).
In that case, flash latency is theoretically set in consistency with PLL
driver hclk. So we should "measure" hclk freq at that step rather than
once sysclock is back on HSI.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC is the actual hclk freq (ie core clock);
Remove use of intermediate new_hclk_freq to fix and simplify code.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Some specific F1 variants don't handle flash latency.
Put flash latency dealing code under dedicated switch.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Review code style in set_up_fixed_clock_sources() for better
readability.
Use of 'if (IS_ENABLED(STM32_MSI_ENABLED))' inside '#if STM32_MSI_ENABLED'
is redundant but intentional as it is in line with remaining part of the
function (HSE/HSI cases).
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
On some parts, it could be required to use steps before applying
highest frequencies.
This was previously done as part of LL_PLL_ConfigSystemClock_FOO
utility functions which are no more used.
Use device tree to mention when this is required and implement it
in stm32_clock_control_init().
Additionally, fix the calls tp LL_RCC_SetAHBPrescaler, which require
use of ahb_prescaler helper.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Introduce a set_up_pll configuration function and make PLL configuration
an elementary step of the whole system clock configuration.
To implement this new, function make use of the existing series specific
files which allows series specific configuration when required.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Group fixed clocks inits in a unique set_up function.
Each clock is initialized depending on its dts status.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Simplify and clean up driver code using STM32 clocks DT based macros.
Added STM32_FLASH_PRESCALER macro for this purpose.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Factorize setting of frequency for busses.
Additionally, factorize SysCoreClock update.
The operations are now done twice in case of PLL since they are part
of LL utils PLL configuration function, but they are removed in next
commits.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Take advantage of previous work to configure PLL and remove
usage of LL_PLL1_ConfigSystemClock_FOO utils functions.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Now that fixed clocks are enabled in a single function, a
bunch of functions could now be removed.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move fixed clocks initialization to a single function.
Benefit is they could now be enabled independently of the
main clock configuration based on dts status and then be
used by peripherals even is not part of the main clock tree.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Flash latency setting could be factorized in a single location,
rather than split in each clock setting function.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move prescaler settings to the clock_control_init function.
At this step they will be set up twice in PLL case, this will
be fixed in a next step.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Set bus binding values using registers offset values.
As a consequence update driver to take this into account
in clock_on and clock_off functions.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add a check to avoid invalidating the cache when the latter is disabled.
Indeed, doing so can lead to a bus fault.
Signed-off-by: Thomas Altenbach <taltenbach@witekio.com>
Update the semihost_console implementation to use the semihost API
instead of manually constructing the supervisor calls.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Control the usage of semihosting with a dedicated symbol, instead of
implying semihosting from the usage of `SEMIHOST_CONSOLE`. This allows
semihosting to be used without the semihost console.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Do not soft-reset device when changing timing parameters as the
soft-reset will discard the configured CAN controller mode.
Fixes: #44837
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Rename CONFIG_CAN_STM32_CLOCK_DIVISOR to
CONFIG_CAN_STM32FD_CLOCK_DIVISOR to match driver Kconfig name.
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Add support for selecting the CAN clock source. Change previously
hardcoded value of PCLK1 to HSE.
Fixes: #44985
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
Clean up of pin signals definitions previously used
by the pinmux driver, now deprecated by the use of
the pinctrl API.
Refactor device tree macros usage to make usage of
SPI instances more general.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
Differently from ESP32, the ESP32-S2 SoC has native
hal support to reset its own I2C FSM in case of failure.
This commit removes warnings related to unused reset
logic, which does not really apply to ESP32-S2.
It also removes code and data structures related to pin
information from the build when the target SoC supports
hardware mechanisms to reset the I2C FSM.
Finally, it checks at compile time if the preconditions
for correct bus recovery are being met.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
Clean up of pin signals definitions previously used
by the pinmux driver, now deprecated by the use of
the pinctrl API.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
though using pinctrl's subsystem, the I2C driver
keeps pin information in case of communication
failure. This information is needed in case of
FSM failure.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
Add a separate macro for registering offloaded sockets implementation,
along with information in the structure whether the implementation is
offloaded or not. This allows to differentiate between native and
offloaded socket implementations, which is critical for binding socket
API with an interface.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
Instead of keeping a boolean informing whether a network interface is
offloaded at socket layer or not, keep a pointer to a function which
allows to create an offloaded socket. Native interfaces keep this as
NULL, while for offloaded interfaces it allows to connect an offloaded
socket implementation with an interface.
Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
update pin control implementation to use offsets for pin registers
instead of pin/port combination, to permit additional flexibility for
lpc devices with non contiguous register layouts. Update LPC55s69 pin
control names to align with newly generated pin control header.
This change also requires an update to the NXP HAL to use the new pin
control headers with offsets.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Do not silently ignore attempts to set an unsupported mode. Return
-ENOTSUP instead.
Fixes: #44706
Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>