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25,525 commits

Author SHA1 Message Date
Mathieu Choplain
7288223a28 drivers: entropy: stm32: clear data available IRQ flag on WB09
The STM32WB09 TRNG does not clear FIFO_FULL IRQ flag in hardware once the
FIFO is no longer full, a behavior which differs from all other series.
This results in spurious IRQs, as the TRNG IRQ line effectively remains
high forever once a single interrupt has been generated.

Clear the flag in software after reading from the FIFO on STM32WB09 SoC.

N.B.: the error IRQ flag is already handled properly, as this flag must
also be cleared by software on other series.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
2025-03-24 19:22:30 +01:00
Mathieu Choplain
6cdc3ada3c drivers: entropy: stm32: simplify WB0-related #ifdef in LL wrappers
CONFIG_SOC_STM32WB09XX implies CONFIG_SOC_SERIES_STM32WB0X, making it
pointless to assert the latter is defined before checking the former.

Simplify #ifdef checks in the entropy driver's LL wrappers thanks to
this observation, by removing unnecessary nesting.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
2025-03-24 19:22:30 +01:00
Khoa Tran
d0c0f1d036 drivers: i2c: initial support for i2c sci-b driver on Renesas RA family
First commit to add support for Renesas RA i2c sci-b driver

Signed-off-by: Khoa Tran <khoa.tran.yj@bp.renesas.com>
Signed-off-by: Thao Luong <thao.luong.uw@renesas.com>
2025-03-24 19:22:18 +01:00
David Lim
459a078d22 drivers: spi: cc13xx_cc26xx: Allow clocks below 2 MHz
Remove unnecessary check that the SPI clock is being set to a frequency
above 2 MHz to allow devices running at common lower frequencies (i.e.
1.2 MHz and 400 kHz).

Replace with check that the frequency is not below the minimum frequency
supported by the chipset to prevent overflow error which can occur if
the HAL sets a frequency too low resulting in a SPI clock much larger
than expected.

Fixes #69986

Signed-off-by: David Lim <dlim04@qub.ac.uk>
2025-03-24 15:11:01 +01:00
Tomasz Moń
2aa26ad261 drivers: udc_dwc2: Optimize endpoint event clear
There is no point in calling k_event_test() to determine what events are
posted and then passing that value to k_event_clear(). Simply pass
UINT32_MAX to k_event_clear() and use the return value to slightly
reduce overhead.

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
2025-03-24 15:10:25 +01:00
Tomasz Moń
2395452656 drivers: udc_dwc2: Reset core on shutdown
OUT endpoint 0 cannot be disabled and therefore the only way to forcibly
reclaim the buffer is to reset the core. The reset does not finish if
PHY clock is not running, but just triggering the reset seems to be
enough to be able to reclaim the buffer.

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
2025-03-24 15:10:13 +01:00
Tomasz Moń
437983e2c9 drivers: udc_dwc2: Ensure overlapping USBHS reset
Wait for PHY clock before triggering START task to ensure overlapped
reset for PHY and DWC2 core.

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
2025-03-24 15:10:13 +01:00
Tomasz Moń
2be960ad2b drivers: udc_dwc2: Disable endpoint while hibernated
When the endpoint is disabled while the core is hibernated, there are
timeouts waiting for interrupts. It is not clear how the stack should
behave when class and/or application wants to disable the endpoint while
device is suspended. The problem was originally observed when the
endpoints were disabled as a result of usbd_disable() call.

Avoid the timeouts by modifying the backup values instead of the real
registers (which are not accessible when hibernated).

Split the 32-bit txf_set variable into two 16-bit variables (txf_set and
pending_tx_flush) because maximum number of TxFIFO instances is 16.
The txf_set variable is used as-is, while the pending_tx_flush is used
to keep track of TxFIFOs that have to be flushed on hibernation exit.

Signed-off-by: Tomasz Moń <tomasz.mon@nordicsemi.no>
2025-03-24 15:10:13 +01:00
Guillaume Gautier
33b2b1481b drivers: memc: add driver for stm32 xspi psram
Add a driver for STM32 XSPI PSRAM in memory mapped mode.

Signed-off-by: Guillaume Gautier <guillaume.gautier-ext@st.com>
2025-03-24 15:09:47 +01:00
Florijan Plohl
78f05163d6 drivers: audio: Add driver for tlv320aic3110
Add driver for the Texas Instruments TLV320AIC3110 audio codec.

Signed-off-by: Florijan Plohl <florijan.plohl@norik.com>
2025-03-24 12:13:51 +01:00
Hao Luo
4744d138c2 drivers: ambiq: Change the way to power on ambiq drivers
This commit changes to use ambiq hal power control APIs
to replace the previous register settings to power on
ambiq drivers.

Signed-off-by: Hao Luo <hluo@ambiq.com>
2025-03-24 09:54:17 +01:00
Eric Ackermann
4342d7108b drivers: ethernet: Add Xilinx AXI Enet driver
The Xilinx AXI Ethernet subsystem is commonly found in FPGA designs.
This patch adds a driver and device tree bindings for the Ethernet MAC
core and its MDIO controller.
The driver was tested on a RISC-V softcore in an FPGA design, with an
RGMII phy and Ethernet subsystem version 7.2 Rev. 14. Device tree
bindings match the device tree generated by Vitis hsi. Note that Vitis
generates one of the two included compatible strings depending on
version.

Signed-off-by: Eric Ackermann <eric.ackermann@cispa.de>
2025-03-24 09:53:43 +01:00
Fin Maaß
2a4b3148ed drivers: entropy: add maxq10xx
add maxq10xx entropy device.

Signed-off-by: Fin Maaß <f.maass@vogl-electronic.com>
2025-03-23 13:18:44 +01:00
Nikodem Kastelik
f13c8a59e2 drivers: spi: nrf: add support for SPIS120 instance
SPIS120 is a SPI slave device with >8 MHz SCK compatibility.

Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
2025-03-22 13:38:34 +01:00
Krzysztof Chruściński
125e5d8334 drivers: spi: nrfx_spis: Extend support for device runtime PM
Extend runtime PM to support fast instance (spis120) which requires
additional action in suspend/resume phase.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2025-03-22 13:38:34 +01:00
Mathieu Choplain
d0639fedcf drivers: watchdog: iwdg_stm32: add support for STM32WB0
Add support for the STM32WB0 series to the existing STM32 driver for
Independent Watchdog peripheral.

NOTE: this commit only includes basic support for the watchdog.
STM32WB0 specificities such as the different possible clock sources, LSI
frequency measurement or window support are left for future implementation.

Signed-off-by: Mathieu Choplain <mathieu.choplain@st.com>
2025-03-22 13:38:22 +01:00
Jilay Pandya
b4b5d8b236 drivers: stepper: a4979: add stop function
add stop function to a4979 stepper controller

Signed-off-by: Jilay Pandya <jilay.pandya@outlook.com>
2025-03-22 02:41:23 +01:00
Etienne Carriere
04ffa4edd1 drivers: clock_control: remove inline attributes in stm32 clock drivers
Remove the inline attribute from stm32 clock drivers functions
especially for functions that are only referenced in the clock API
operation structure and therefore cannot be inline. As a generic
comment, today compiler are smart enough to optimize embedded software
without needing inline function attributes in the source files.

This change hopes that next stm32 clock driver will no more replicate
this bad habit when using existing source files as implementation
examples.

No functional change.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-03-21 14:40:36 -04:00
Etienne Carriere
dcf4855fa4 drivers: clock_control: fix IN_RANGE() use in stm32 clock drivers
IN_RANGE() macro from zephyr/sys/util.h returns a boolean value
so it should be treated as such and not compared to a decimal value.
Fix stm32 clock drivers accordingly and simplify places where the
value is compared to true.

No functional change.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-03-21 14:40:36 -04:00
Etienne Carriere
6c2d354d9c drivers: clock_control: fix typo in STM32H7* clock init
Correct typo in STM32H7 HSI clock calibration directives introduced
in commit 6b167f2596 ("drivers: clock_control: add calibration for
h7 pllx_hsi") that currently has no functionnal impact but is worth
to be fixed for consistency.

No functional change,

Fixes: 6b167f2596
Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-03-21 14:40:36 -04:00
Etienne Carriere
a6ae1d9268 drivers: clock_control: remove STM32H7RSX unused function
Remove function exported stm32_system_clock_update() defined in
STM32H7RS series clock driver but that is not used and not even declared.
There already exists a CMSIS SystemCoreClockUpdate() function in
STM32 HAL drivers for the exact same purpose one may use if needed.

No functional change.

Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
2025-03-21 14:40:36 -04:00
Lucas Tamborrino
c6f84d0ba2 boards: espressif: esp32c6: Add LP Core board support
Add ULP Coprocessor board support for C6.
This requires a change in the board qualifier depending on the build
target.
Update esp32c6 overlay and configuration files to the proper name.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2025-03-21 17:05:20 +01:00
Lucas Tamborrino
0b9e4e013a soc: espressif: esp32c6: Add LP Core
Add ULP Coprocessor support for ESP32C6.

Signed-off-by: Lucas Tamborrino <lucas.tamborrino@espressif.com>
2025-03-21 17:05:20 +01:00
Benjamin Cabé
1e75b82244 sensors: lsm6dsv16x: fix double-promotion warning
use roundf instead of round in Q31_SHIFT_VAL macro to avoid
double-promotion warning

Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
2025-03-21 17:03:53 +01:00
Robert Lubos
a61287e876 net: lib: tls_credentials: Rename TLS_CREDENTIAL_SERVER_CERTIFICATE
TLS_CREDENTIAL_SERVER_CERTIFICATE credential type is misleading, as in
fact it just represents a public certificate, it does not matter if the
certificate belongs to a server or a client. And actually, it was
already used in-tree for clients as well, for example in LwM2M.

Therefore rename the credential type to a more generic
TLS_CREDENTIAL_PUBLIC_CERTIFICATE and deprecate the old one.

Signed-off-by: Robert Lubos <robert.lubos@nordicsemi.no>
2025-03-21 14:18:52 +01:00
Valerio Setti
e2344739ac drivers: rtc: pcf8563: some fixes to the driver
- Define alarm_set_callback() only when CONFIG_RTC_ALARM is set otherwise
a warning will be generated at runtime for the function not being
used.

- add "static" keyword to all internal functions.

Signed-off-by: Valerio Setti <vsetti@baylibre.com>
2025-03-21 14:17:45 +01:00
Abderrahmane JARMOUNI
4aaf463158 drivers: display: sdl: clear display only for supported pixel formats
Clear display only when display pixel format is actually supported
since buffer size depends on it.

Signed-off-by: Abderrahmane JARMOUNI <git@jarmouni.me>
2025-03-21 14:17:36 +01:00
Danh Doan
0eef4fe150 drivers: display: extend support for renesas,ra-glcdc driver
Change pinctrl-0 dts prop as optional in case DSI display is used
Add these APIs support: set_brightness, set_contrast, get_framebuffer
Add a new config to select frame buffer section

Signed-off-by: Danh Doan <danh.doan.ue@bp.renesas.com>
2025-03-21 14:17:21 +01:00
Ruibin Chang
dcbd0d1397 drivers/sensor/ite/tach_ite_it8xxx2: run clang format
Run clang format.

Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
2025-03-21 09:53:22 +01:00
Ruibin Chang
cbe1932a20 drivers/sensor/ite/tach_ite_it8xxx2: don't clear both tach status at once
When two tach use simultaneously, I find that the both tach status will
be cleared at once, which causes one of tach not to get rpm speed.
So I change it to clear status only one tach at a time.

This issue is reported by Huaqin:
https://partnerissuetracker.corp.google.com/issues/404067663?pli=1

Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
2025-03-21 09:53:22 +01:00
Jeppe Odgaard
62e1d4b449 drivers: rtc: rtc_ll_stm32: rework lock usage in rtc_stm32_set_time
Lock just before and just after accessing functions that modifies register
values.

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2025-03-21 09:51:56 +01:00
Jeppe Odgaard
7c996c84ce drivers: rtc: rtc_ll_stm32: replace k_mutex with k_spinlock
This allows using this RTC driver from contexts where `k_mutex` use is not
allowed.

Signed-off-by: Jeppe Odgaard <jeppe.odgaard@prevas.dk>
2025-03-21 09:51:56 +01:00
Mahesh Mahadevan
0cd23dc5b7 drivers: gpio_mcux_lpc: Provide an API to fire callbacks
Provide an API for other drivers to fire GPIO callbacks

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2025-03-21 09:51:38 +01:00
Mahesh Mahadevan
90042077b8 drivers: uart: Add PM action for NXP UART Flexcomm driver
Add power action callback handlers to the driver.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2025-03-21 09:51:38 +01:00
Mahesh Mahadevan
d035847e0b drivers: gpio: Add PM Action for MCUX LPC driver
Add PM action for MCUX LPC driver

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2025-03-21 09:51:38 +01:00
Mahesh Mahadevan
d4d81637fb drivers: nxp: Fix selection of NOCACHE_MEMORY
Update how NOCACHE_MEMORY Kconfig is selected to
be based on CPU_HAS_DCACHE Kconfig.

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2025-03-21 06:31:56 +01:00
Ryan McClelland
8bf6dac549 drivers: i3c: dw: add rtio callbacks
Add the missing api callbacks for i3c and i2c rtio.

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2025-03-21 06:31:07 +01:00
Ryan McClelland
28676ae9be drivers: i3c: shell: fix getmxds fmt3 defbyte check
Fix the checking on the getmxds for format 3.

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2025-03-21 06:31:03 +01:00
Ryan McClelland
30b4b1bdf8 drivers: i3c: shell: fix getcaps fmt2 defbyte check
Fix the checking on the getcaps for format 2.

Signed-off-by: Ryan McClelland <ryanmcclelland@meta.com>
2025-03-21 06:31:03 +01:00
Chaitanya Tata
71931a0864 drivers: nrf_wifi: Add a config option for variable bufs override
We need a way to disable the variable buffers override.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2025-03-20 21:58:36 +01:00
Chaitanya Tata
a409d31169 drivers: nrf_wifi: Fix get config
Only a single condition is specific to RAW mode, rest should be
unconditional.

Signed-off-by: Chaitanya Tata <Chaitanya.Tata@nordicsemi.no>
2025-03-20 21:58:36 +01:00
Tom Hughes
11d70c61e5 everywhere: Replace diagnostic pragmas with TOOLCHAIN_* macros
The TOOLCHAIN_DISABLE_WARNING/TOOLCHAIN_ENABLE_WARNING macros are easier
to read and compiler agnostic.

Signed-off-by: Tom Hughes <tomhughes@chromium.org>
2025-03-20 21:57:47 +01:00
Declan Snyder
b990f96feb dts: counter: Remove old kinetis lptmr binding
Remove deprecated nxp,kinetis-lptmr compatible string
which is superseded by nxp,lptmr compatible due to
removing family specific name.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-03-20 17:14:28 +01:00
Declan Snyder
f013e20bc5 soc: nxp: Add missing resolve of system timer cfg
These socs were missing a config line to disable SYSTICK if the LPTMR is
configured for the system timer, similar to how other SOCs do this for
alternative system timers than systick.

This fixes build errors in the case where that lptmr kconfig is enabled.

Also, the LPTMR kconfig should be default no because it is a secondary
option for the system timer, being lower resolution than systick. This
also resolves build errors.

Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
2025-03-20 17:14:28 +01:00
Nidhal BEN OTHMEN
43c00e5b6c soc: stm32wbax: hci_if: Clean code
Clean the code, rename some constants and variables for more
consistency.

Signed-off-by: Nidhal BEN OTHMEN <nidhal.benothmen@st.com>
2025-03-20 14:22:21 +01:00
Simon Gilbert
42c3a78148 i2c: stm32: Add cache memory support
Add basic cache memory support

Signed-off-by: Simon Gilbert <srdgilbert@gmail.com>
2025-03-20 12:17:50 +01:00
Simon Gilbert
26a8b36513 i2c: stm32: Added DMA stop for various i2c comms conditions
Added stop DMA fot transmit complete or other master end conditions

Signed-off-by: Simon Gilbert <srdgilbert@gmail.com>
2025-03-20 12:17:50 +01:00
Simon Gilbert
446a5ec49d i2c: stm32: Minor refactor of i2c_stm32_transfer function
Tidy up of i2c_stm32_transfer and added TX and RX semaphore inits

Signed-off-by: Simon Gilbert <srdgilbert@gmail.com>
2025-03-20 12:17:50 +01:00
Simon Gilbert
8dbc30a0d5 i2c: stm32: Add macros to get settings from device tree
Add macrobatics to pull DMA settings from device tree

Signed-off-by: Simon Gilbert <srdgilbert@gmail.com>
2025-03-20 12:17:50 +01:00
Simon Gilbert
ce0358692a i2c: stm32: Add dma settings structs to config and data structs
Add initial DMA settings structs to stm32 i2c config and data structs

Signed-off-by: Simon Gilbert <srdgilbert@gmail.com>
2025-03-20 12:17:50 +01:00